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authorFabio Estevam <fabio.estevam@freescale.com>2010-12-13 07:47:05 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2010-12-14 03:55:53 -0500
commit28a4f908acb342350b9ecbfcdf0a999cb83e05aa (patch)
treece0bea69a22fe4731a094a443d6ea2660a27c82b /arch
parentbb477de2efc560e55c4a830329273661f3664bc8 (diff)
ARM: mx5: check for error in ioremap
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51.c4
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51sd.c4
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c4
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikamx.c2
-rw-r--r--arch/arm/plat-mxc/ehci.c4
5 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index 6ab002d08a56..125a1961fd8c 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -178,6 +178,8 @@ static int initialize_otg_port(struct platform_device *pdev)
178 void __iomem *usbother_base; 178 void __iomem *usbother_base;
179 179
180 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 180 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
181 if (!usb_base)
182 return -ENOMEM;
181 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 183 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
182 184
183 /* Set the PHY clock to 19.2MHz */ 185 /* Set the PHY clock to 19.2MHz */
@@ -196,6 +198,8 @@ static int initialize_usbh1_port(struct platform_device *pdev)
196 void __iomem *usbother_base; 198 void __iomem *usbother_base;
197 199
198 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 200 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
201 if (!usb_base)
202 return -ENOMEM;
199 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 203 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
200 204
201 /* The clock for the USBH1 ULPI port will come externally from the PHY. */ 205 /* The clock for the USBH1 ULPI port will come externally from the PHY. */
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c
index 8e71c19b9019..7e8fb82d22fc 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-mx5/board-cpuimx51sd.c
@@ -157,6 +157,8 @@ static int initialize_otg_port(struct platform_device *pdev)
157 void __iomem *usbother_base; 157 void __iomem *usbother_base;
158 158
159 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 159 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
160 if (!usb_base)
161 return -ENOMEM;
160 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 162 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
161 163
162 /* Set the PHY clock to 19.2MHz */ 164 /* Set the PHY clock to 19.2MHz */
@@ -175,6 +177,8 @@ static int initialize_usbh1_port(struct platform_device *pdev)
175 void __iomem *usbother_base; 177 void __iomem *usbother_base;
176 178
177 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 179 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
180 if (!usb_base)
181 return -ENOMEM;
178 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 182 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
179 183
180 /* The clock for the USBH1 ULPI port will come from the PHY. */ 184 /* The clock for the USBH1 ULPI port will come from the PHY. */
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index a896f84895ad..368a315e9ace 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -262,6 +262,8 @@ static int initialize_otg_port(struct platform_device *pdev)
262 void __iomem *usbother_base; 262 void __iomem *usbother_base;
263 263
264 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 264 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
265 if (!usb_base)
266 return -ENOMEM;
265 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 267 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
266 268
267 /* Set the PHY clock to 19.2MHz */ 269 /* Set the PHY clock to 19.2MHz */
@@ -280,6 +282,8 @@ static int initialize_usbh1_port(struct platform_device *pdev)
280 void __iomem *usbother_base; 282 void __iomem *usbother_base;
281 283
282 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 284 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
285 if (!usb_base)
286 return -ENOMEM;
283 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 287 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
284 288
285 /* The clock for the USBH1 ULPI port will come externally from the PHY. */ 289 /* The clock for the USBH1 ULPI port will come externally from the PHY. */
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index 5ab21a0036c1..94e7818c5060 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -148,6 +148,8 @@ static int initialize_otg_port(struct platform_device *pdev)
148 void __iomem *usb_base; 148 void __iomem *usb_base;
149 void __iomem *usbother_base; 149 void __iomem *usbother_base;
150 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 150 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
151 if (!usb_base)
152 return -ENOMEM;
151 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); 153 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
152 154
153 /* Set the PHY clock to 19.2MHz */ 155 /* Set the PHY clock to 19.2MHz */
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index c1a7146dad96..d59f5feb3c54 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -254,6 +254,10 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
254 int ret = 0; 254 int ret = 0;
255 255
256 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 256 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
257 if (!usb_base) {
258 printk(KERN_ERR "%s(): ioremap failed\n", __func__);
259 return -ENOMEM;
260 }
257 261
258 switch (port) { 262 switch (port) {
259 case 0: /* OTG port */ 263 case 0: /* OTG port */