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authorJeff Garzik <jgarzik@pobox.com>2005-12-13 01:43:33 -0500
committerJeff Garzik <jgarzik@pobox.com>2005-12-13 01:43:33 -0500
commitd00d598ffbba974d9045ba8b95296655fe2162c5 (patch)
tree93bdc3bf4ec728d554c54e3f1f51cb5597f53a31 /arch
parentb5632303401c231bf270ef36f1013e52caf4caf9 (diff)
parentbe0d9b6c7aeaad1683059c00131cabd4c894c17c (diff)
Merge branch 'master'
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/kernel/smpboot.c3
-rw-r--r--arch/i386/mm/ioremap.c37
-rw-r--r--arch/i386/pci/direct.c4
-rw-r--r--arch/i386/pci/mmconfig.c65
-rw-r--r--arch/i386/pci/pci.h7
-rw-r--r--arch/x86_64/ia32/ia32_binfmt.c3
-rw-r--r--arch/x86_64/kernel/smpboot.c2
-rw-r--r--arch/x86_64/kernel/time.c6
-rw-r--r--arch/x86_64/mm/ioremap.c37
-rw-r--r--arch/x86_64/mm/numa.c4
-rw-r--r--arch/x86_64/pci/mmconfig.c63
11 files changed, 188 insertions, 43 deletions
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index d16520da4550..9ed449af8e9f 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -1338,8 +1338,7 @@ int __cpu_disable(void)
1338 if (cpu == 0) 1338 if (cpu == 0)
1339 return -EBUSY; 1339 return -EBUSY;
1340 1340
1341 /* We enable the timer again on the exit path of the death loop */ 1341 clear_local_APIC();
1342 disable_APIC_timer();
1343 /* Allow any queued timer interrupts to get serviced */ 1342 /* Allow any queued timer interrupts to get serviced */
1344 local_irq_enable(); 1343 local_irq_enable();
1345 mdelay(1); 1344 mdelay(1);
diff --git a/arch/i386/mm/ioremap.c b/arch/i386/mm/ioremap.c
index 5d09de8d1c6b..8498b5ac3955 100644
--- a/arch/i386/mm/ioremap.c
+++ b/arch/i386/mm/ioremap.c
@@ -223,9 +223,15 @@ void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
223} 223}
224EXPORT_SYMBOL(ioremap_nocache); 224EXPORT_SYMBOL(ioremap_nocache);
225 225
226/**
227 * iounmap - Free a IO remapping
228 * @addr: virtual address from ioremap_*
229 *
230 * Caller must ensure there is only one unmapping for the same pointer.
231 */
226void iounmap(volatile void __iomem *addr) 232void iounmap(volatile void __iomem *addr)
227{ 233{
228 struct vm_struct *p; 234 struct vm_struct *p, *o;
229 235
230 if ((void __force *)addr <= high_memory) 236 if ((void __force *)addr <= high_memory)
231 return; 237 return;
@@ -239,22 +245,37 @@ void iounmap(volatile void __iomem *addr)
239 addr < phys_to_virt(ISA_END_ADDRESS)) 245 addr < phys_to_virt(ISA_END_ADDRESS))
240 return; 246 return;
241 247
242 write_lock(&vmlist_lock); 248 addr = (volatile void *)(PAGE_MASK & (unsigned long __force)addr);
243 p = __remove_vm_area((void *)(PAGE_MASK & (unsigned long __force)addr)); 249
244 if (!p) { 250 /* Use the vm area unlocked, assuming the caller
245 printk(KERN_WARNING "iounmap: bad address %p\n", addr); 251 ensures there isn't another iounmap for the same address
252 in parallel. Reuse of the virtual address is prevented by
253 leaving it in the global lists until we're done with it.
254 cpa takes care of the direct mappings. */
255 read_lock(&vmlist_lock);
256 for (p = vmlist; p; p = p->next) {
257 if (p->addr == addr)
258 break;
259 }
260 read_unlock(&vmlist_lock);
261
262 if (!p) {
263 printk("iounmap: bad address %p\n", addr);
246 dump_stack(); 264 dump_stack();
247 goto out_unlock; 265 return;
248 } 266 }
249 267
268 /* Reset the direct mapping. Can block */
250 if ((p->flags >> 20) && p->phys_addr < virt_to_phys(high_memory) - 1) { 269 if ((p->flags >> 20) && p->phys_addr < virt_to_phys(high_memory) - 1) {
251 change_page_attr(virt_to_page(__va(p->phys_addr)), 270 change_page_attr(virt_to_page(__va(p->phys_addr)),
252 p->size >> PAGE_SHIFT, 271 p->size >> PAGE_SHIFT,
253 PAGE_KERNEL); 272 PAGE_KERNEL);
254 global_flush_tlb(); 273 global_flush_tlb();
255 } 274 }
256out_unlock: 275
257 write_unlock(&vmlist_lock); 276 /* Finally remove it */
277 o = remove_vm_area((void *)addr);
278 BUG_ON(p != o || o == NULL);
258 kfree(p); 279 kfree(p);
259} 280}
260EXPORT_SYMBOL(iounmap); 281EXPORT_SYMBOL(iounmap);
diff --git a/arch/i386/pci/direct.c b/arch/i386/pci/direct.c
index 94331d6be7a3..e3ac502bf2fb 100644
--- a/arch/i386/pci/direct.c
+++ b/arch/i386/pci/direct.c
@@ -13,7 +13,7 @@
13#define PCI_CONF1_ADDRESS(bus, devfn, reg) \ 13#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
14 (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3)) 14 (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3))
15 15
16static int pci_conf1_read(unsigned int seg, unsigned int bus, 16int pci_conf1_read(unsigned int seg, unsigned int bus,
17 unsigned int devfn, int reg, int len, u32 *value) 17 unsigned int devfn, int reg, int len, u32 *value)
18{ 18{
19 unsigned long flags; 19 unsigned long flags;
@@ -42,7 +42,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus,
42 return 0; 42 return 0;
43} 43}
44 44
45static int pci_conf1_write(unsigned int seg, unsigned int bus, 45int pci_conf1_write(unsigned int seg, unsigned int bus,
46 unsigned int devfn, int reg, int len, u32 value) 46 unsigned int devfn, int reg, int len, u32 value)
47{ 47{
48 unsigned long flags; 48 unsigned long flags;
diff --git a/arch/i386/pci/mmconfig.c b/arch/i386/pci/mmconfig.c
index dfbf80cff834..08a084901212 100644
--- a/arch/i386/pci/mmconfig.c
+++ b/arch/i386/pci/mmconfig.c
@@ -19,21 +19,25 @@
19/* The base address of the last MMCONFIG device accessed */ 19/* The base address of the last MMCONFIG device accessed */
20static u32 mmcfg_last_accessed_device; 20static u32 mmcfg_last_accessed_device;
21 21
22static DECLARE_BITMAP(fallback_slots, 32);
23
22/* 24/*
23 * Functions for accessing PCI configuration space with MMCONFIG accesses 25 * Functions for accessing PCI configuration space with MMCONFIG accesses
24 */ 26 */
25static u32 get_base_addr(unsigned int seg, int bus) 27static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
26{ 28{
27 int cfg_num = -1; 29 int cfg_num = -1;
28 struct acpi_table_mcfg_config *cfg; 30 struct acpi_table_mcfg_config *cfg;
29 31
32 if (seg == 0 && bus == 0 &&
33 test_bit(PCI_SLOT(devfn), fallback_slots))
34 return 0;
35
30 while (1) { 36 while (1) {
31 ++cfg_num; 37 ++cfg_num;
32 if (cfg_num >= pci_mmcfg_config_num) { 38 if (cfg_num >= pci_mmcfg_config_num) {
33 /* something bad is going on, no cfg table is found. */ 39 /* Not found - fallback to type 1 */
34 /* so we fall back to the old way we used to do this */ 40 return 0;
35 /* and just rely on the first entry to be correct. */
36 return pci_mmcfg_config[0].base_address;
37 } 41 }
38 cfg = &pci_mmcfg_config[cfg_num]; 42 cfg = &pci_mmcfg_config[cfg_num];
39 if (cfg->pci_segment_group_number != seg) 43 if (cfg->pci_segment_group_number != seg)
@@ -44,9 +48,9 @@ static u32 get_base_addr(unsigned int seg, int bus)
44 } 48 }
45} 49}
46 50
47static inline void pci_exp_set_dev_base(unsigned int seg, int bus, int devfn) 51static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
48{ 52{
49 u32 dev_base = get_base_addr(seg, bus) | (bus << 20) | (devfn << 12); 53 u32 dev_base = base | (bus << 20) | (devfn << 12);
50 if (dev_base != mmcfg_last_accessed_device) { 54 if (dev_base != mmcfg_last_accessed_device) {
51 mmcfg_last_accessed_device = dev_base; 55 mmcfg_last_accessed_device = dev_base;
52 set_fixmap_nocache(FIX_PCIE_MCFG, dev_base); 56 set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
@@ -57,13 +61,18 @@ static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
57 unsigned int devfn, int reg, int len, u32 *value) 61 unsigned int devfn, int reg, int len, u32 *value)
58{ 62{
59 unsigned long flags; 63 unsigned long flags;
64 u32 base;
60 65
61 if (!value || (bus > 255) || (devfn > 255) || (reg > 4095)) 66 if (!value || (bus > 255) || (devfn > 255) || (reg > 4095))
62 return -EINVAL; 67 return -EINVAL;
63 68
69 base = get_base_addr(seg, bus, devfn);
70 if (!base)
71 return pci_conf1_read(seg,bus,devfn,reg,len,value);
72
64 spin_lock_irqsave(&pci_config_lock, flags); 73 spin_lock_irqsave(&pci_config_lock, flags);
65 74
66 pci_exp_set_dev_base(seg, bus, devfn); 75 pci_exp_set_dev_base(base, bus, devfn);
67 76
68 switch (len) { 77 switch (len) {
69 case 1: 78 case 1:
@@ -86,13 +95,18 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
86 unsigned int devfn, int reg, int len, u32 value) 95 unsigned int devfn, int reg, int len, u32 value)
87{ 96{
88 unsigned long flags; 97 unsigned long flags;
98 u32 base;
89 99
90 if ((bus > 255) || (devfn > 255) || (reg > 4095)) 100 if ((bus > 255) || (devfn > 255) || (reg > 4095))
91 return -EINVAL; 101 return -EINVAL;
92 102
103 base = get_base_addr(seg, bus, devfn);
104 if (!base)
105 return pci_conf1_write(seg,bus,devfn,reg,len,value);
106
93 spin_lock_irqsave(&pci_config_lock, flags); 107 spin_lock_irqsave(&pci_config_lock, flags);
94 108
95 pci_exp_set_dev_base(seg, bus, devfn); 109 pci_exp_set_dev_base(base, bus, devfn);
96 110
97 switch (len) { 111 switch (len) {
98 case 1: 112 case 1:
@@ -116,6 +130,37 @@ static struct pci_raw_ops pci_mmcfg = {
116 .write = pci_mmcfg_write, 130 .write = pci_mmcfg_write,
117}; 131};
118 132
133/* K8 systems have some devices (typically in the builtin northbridge)
134 that are only accessible using type1
135 Normally this can be expressed in the MCFG by not listing them
136 and assigning suitable _SEGs, but this isn't implemented in some BIOS.
137 Instead try to discover all devices on bus 0 that are unreachable using MM
138 and fallback for them.
139 We only do this for bus 0/seg 0 */
140static __init void unreachable_devices(void)
141{
142 int i;
143 unsigned long flags;
144
145 for (i = 0; i < 32; i++) {
146 u32 val1;
147 u32 addr;
148
149 pci_conf1_read(0, 0, PCI_DEVFN(i, 0), 0, 4, &val1);
150 if (val1 == 0xffffffff)
151 continue;
152
153 /* Locking probably not needed, but safer */
154 spin_lock_irqsave(&pci_config_lock, flags);
155 addr = get_base_addr(0, 0, PCI_DEVFN(i, 0));
156 if (addr != 0)
157 pci_exp_set_dev_base(addr, 0, PCI_DEVFN(i, 0));
158 if (addr == 0 || readl((u32 *)addr) != val1)
159 set_bit(i, fallback_slots);
160 spin_unlock_irqrestore(&pci_config_lock, flags);
161 }
162}
163
119static int __init pci_mmcfg_init(void) 164static int __init pci_mmcfg_init(void)
120{ 165{
121 if ((pci_probe & PCI_PROBE_MMCONF) == 0) 166 if ((pci_probe & PCI_PROBE_MMCONF) == 0)
@@ -131,6 +176,8 @@ static int __init pci_mmcfg_init(void)
131 raw_pci_ops = &pci_mmcfg; 176 raw_pci_ops = &pci_mmcfg;
132 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; 177 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
133 178
179 unreachable_devices();
180
134 out: 181 out:
135 return 0; 182 return 0;
136} 183}
diff --git a/arch/i386/pci/pci.h b/arch/i386/pci/pci.h
index 127d53ad16be..f550781ec310 100644
--- a/arch/i386/pci/pci.h
+++ b/arch/i386/pci/pci.h
@@ -74,3 +74,10 @@ extern spinlock_t pci_config_lock;
74 74
75extern int (*pcibios_enable_irq)(struct pci_dev *dev); 75extern int (*pcibios_enable_irq)(struct pci_dev *dev);
76extern void (*pcibios_disable_irq)(struct pci_dev *dev); 76extern void (*pcibios_disable_irq)(struct pci_dev *dev);
77
78extern int pci_conf1_write(unsigned int seg, unsigned int bus,
79 unsigned int devfn, int reg, int len, u32 value);
80extern int pci_conf1_read(unsigned int seg, unsigned int bus,
81 unsigned int devfn, int reg, int len, u32 *value);
82
83
diff --git a/arch/x86_64/ia32/ia32_binfmt.c b/arch/x86_64/ia32/ia32_binfmt.c
index 830feb272eca..2b760d0d9ce2 100644
--- a/arch/x86_64/ia32/ia32_binfmt.c
+++ b/arch/x86_64/ia32/ia32_binfmt.c
@@ -217,8 +217,7 @@ elf_core_copy_task_fpregs(struct task_struct *tsk, struct pt_regs *regs, elf_fpr
217 if (!tsk_used_math(tsk)) 217 if (!tsk_used_math(tsk))
218 return 0; 218 return 0;
219 if (!regs) 219 if (!regs)
220 regs = (struct pt_regs *)tsk->thread.rsp0; 220 regs = ((struct pt_regs *)tsk->thread.rsp0) - 1;
221 --regs;
222 if (tsk == current) 221 if (tsk == current)
223 unlazy_fpu(tsk); 222 unlazy_fpu(tsk);
224 set_fs(KERNEL_DS); 223 set_fs(KERNEL_DS);
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c
index 683c33f7b967..ecbd7b83acc1 100644
--- a/arch/x86_64/kernel/smpboot.c
+++ b/arch/x86_64/kernel/smpboot.c
@@ -1181,7 +1181,7 @@ int __cpu_disable(void)
1181 if (cpu == 0) 1181 if (cpu == 0)
1182 return -EBUSY; 1182 return -EBUSY;
1183 1183
1184 disable_APIC_timer(); 1184 clear_local_APIC();
1185 1185
1186 /* 1186 /*
1187 * HACK: 1187 * HACK:
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index fdaddc4e5284..74102796e5c0 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -59,7 +59,7 @@ static int notsc __initdata = 0;
59unsigned int cpu_khz; /* TSC clocks / usec, not used here */ 59unsigned int cpu_khz; /* TSC clocks / usec, not used here */
60static unsigned long hpet_period; /* fsecs / HPET clock */ 60static unsigned long hpet_period; /* fsecs / HPET clock */
61unsigned long hpet_tick; /* HPET clocks / interrupt */ 61unsigned long hpet_tick; /* HPET clocks / interrupt */
62static int hpet_use_timer; 62static int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
63unsigned long vxtime_hz = PIT_TICK_RATE; 63unsigned long vxtime_hz = PIT_TICK_RATE;
64int report_lost_ticks; /* command line option */ 64int report_lost_ticks; /* command line option */
65unsigned long long monotonic_base; 65unsigned long long monotonic_base;
@@ -908,12 +908,14 @@ void __init time_init(void)
908 if (!hpet_init()) 908 if (!hpet_init())
909 vxtime_hz = (1000000000000000L + hpet_period / 2) / 909 vxtime_hz = (1000000000000000L + hpet_period / 2) /
910 hpet_period; 910 hpet_period;
911 else
912 vxtime.hpet_address = 0;
911 913
912 if (hpet_use_timer) { 914 if (hpet_use_timer) {
913 cpu_khz = hpet_calibrate_tsc(); 915 cpu_khz = hpet_calibrate_tsc();
914 timename = "HPET"; 916 timename = "HPET";
915#ifdef CONFIG_X86_PM_TIMER 917#ifdef CONFIG_X86_PM_TIMER
916 } else if (pmtmr_ioport) { 918 } else if (pmtmr_ioport && !vxtime.hpet_address) {
917 vxtime_hz = PM_TIMER_FREQUENCY; 919 vxtime_hz = PM_TIMER_FREQUENCY;
918 timename = "PM"; 920 timename = "PM";
919 pit_init(); 921 pit_init();
diff --git a/arch/x86_64/mm/ioremap.c b/arch/x86_64/mm/ioremap.c
index ecf7acb5db9b..0d260e4492f7 100644
--- a/arch/x86_64/mm/ioremap.c
+++ b/arch/x86_64/mm/ioremap.c
@@ -247,9 +247,15 @@ void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
247 return __ioremap(phys_addr, size, _PAGE_PCD); 247 return __ioremap(phys_addr, size, _PAGE_PCD);
248} 248}
249 249
250/**
251 * iounmap - Free a IO remapping
252 * @addr: virtual address from ioremap_*
253 *
254 * Caller must ensure there is only one unmapping for the same pointer.
255 */
250void iounmap(volatile void __iomem *addr) 256void iounmap(volatile void __iomem *addr)
251{ 257{
252 struct vm_struct *p; 258 struct vm_struct *p, *o;
253 259
254 if (addr <= high_memory) 260 if (addr <= high_memory)
255 return; 261 return;
@@ -257,12 +263,31 @@ void iounmap(volatile void __iomem *addr)
257 addr < phys_to_virt(ISA_END_ADDRESS)) 263 addr < phys_to_virt(ISA_END_ADDRESS))
258 return; 264 return;
259 265
260 write_lock(&vmlist_lock); 266 addr = (volatile void *)(PAGE_MASK & (unsigned long __force)addr);
261 p = __remove_vm_area((void *)((unsigned long)addr & PAGE_MASK)); 267 /* Use the vm area unlocked, assuming the caller
262 if (!p) 268 ensures there isn't another iounmap for the same address
269 in parallel. Reuse of the virtual address is prevented by
270 leaving it in the global lists until we're done with it.
271 cpa takes care of the direct mappings. */
272 read_lock(&vmlist_lock);
273 for (p = vmlist; p; p = p->next) {
274 if (p->addr == addr)
275 break;
276 }
277 read_unlock(&vmlist_lock);
278
279 if (!p) {
263 printk("iounmap: bad address %p\n", addr); 280 printk("iounmap: bad address %p\n", addr);
264 else if (p->flags >> 20) 281 dump_stack();
282 return;
283 }
284
285 /* Reset the direct mapping. Can block */
286 if (p->flags >> 20)
265 ioremap_change_attr(p->phys_addr, p->size, 0); 287 ioremap_change_attr(p->phys_addr, p->size, 0);
266 write_unlock(&vmlist_lock); 288
289 /* Finally remove it */
290 o = remove_vm_area((void *)addr);
291 BUG_ON(p != o || o == NULL);
267 kfree(p); 292 kfree(p);
268} 293}
diff --git a/arch/x86_64/mm/numa.c b/arch/x86_64/mm/numa.c
index a828a01739cc..15b67d2760cb 100644
--- a/arch/x86_64/mm/numa.c
+++ b/arch/x86_64/mm/numa.c
@@ -53,6 +53,8 @@ static int __init populate_memnodemap(
53 int res = -1; 53 int res = -1;
54 unsigned long addr, end; 54 unsigned long addr, end;
55 55
56 if (shift >= 64)
57 return -1;
56 memset(memnodemap, 0xff, sizeof(memnodemap)); 58 memset(memnodemap, 0xff, sizeof(memnodemap));
57 for (i = 0; i < numnodes; i++) { 59 for (i = 0; i < numnodes; i++) {
58 addr = nodes[i].start; 60 addr = nodes[i].start;
@@ -65,7 +67,7 @@ static int __init populate_memnodemap(
65 if (memnodemap[addr >> shift] != 0xff) 67 if (memnodemap[addr >> shift] != 0xff)
66 return -1; 68 return -1;
67 memnodemap[addr >> shift] = i; 69 memnodemap[addr >> shift] = i;
68 addr += (1 << shift); 70 addr += (1UL << shift);
69 } while (addr < end); 71 } while (addr < end);
70 res = 1; 72 res = 1;
71 } 73 }
diff --git a/arch/x86_64/pci/mmconfig.c b/arch/x86_64/pci/mmconfig.c
index a0838c4a94e4..9c4f907e301c 100644
--- a/arch/x86_64/pci/mmconfig.c
+++ b/arch/x86_64/pci/mmconfig.c
@@ -8,10 +8,13 @@
8#include <linux/pci.h> 8#include <linux/pci.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/acpi.h> 10#include <linux/acpi.h>
11#include <linux/bitmap.h>
11#include "pci.h" 12#include "pci.h"
12 13
13#define MMCONFIG_APER_SIZE (256*1024*1024) 14#define MMCONFIG_APER_SIZE (256*1024*1024)
14 15
16static DECLARE_BITMAP(fallback_slots, 32);
17
15/* Static virtual mapping of the MMCONFIG aperture */ 18/* Static virtual mapping of the MMCONFIG aperture */
16struct mmcfg_virt { 19struct mmcfg_virt {
17 struct acpi_table_mcfg_config *cfg; 20 struct acpi_table_mcfg_config *cfg;
@@ -19,7 +22,7 @@ struct mmcfg_virt {
19}; 22};
20static struct mmcfg_virt *pci_mmcfg_virt; 23static struct mmcfg_virt *pci_mmcfg_virt;
21 24
22static char *get_virt(unsigned int seg, int bus) 25static char *get_virt(unsigned int seg, unsigned bus)
23{ 26{
24 int cfg_num = -1; 27 int cfg_num = -1;
25 struct acpi_table_mcfg_config *cfg; 28 struct acpi_table_mcfg_config *cfg;
@@ -27,10 +30,9 @@ static char *get_virt(unsigned int seg, int bus)
27 while (1) { 30 while (1) {
28 ++cfg_num; 31 ++cfg_num;
29 if (cfg_num >= pci_mmcfg_config_num) { 32 if (cfg_num >= pci_mmcfg_config_num) {
30 /* something bad is going on, no cfg table is found. */ 33 /* Not found - fall back to type 1. This happens
31 /* so we fall back to the old way we used to do this */ 34 e.g. on the internal devices of a K8 northbridge. */
32 /* and just rely on the first entry to be correct. */ 35 return NULL;
33 return pci_mmcfg_virt[0].virt;
34 } 36 }
35 cfg = pci_mmcfg_virt[cfg_num].cfg; 37 cfg = pci_mmcfg_virt[cfg_num].cfg;
36 if (cfg->pci_segment_group_number != seg) 38 if (cfg->pci_segment_group_number != seg)
@@ -41,20 +43,30 @@ static char *get_virt(unsigned int seg, int bus)
41 } 43 }
42} 44}
43 45
44static inline char *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) 46static char *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
45{ 47{
46 48 char *addr;
47 return get_virt(seg, bus) + ((bus << 20) | (devfn << 12)); 49 if (seg == 0 && bus == 0 && test_bit(PCI_SLOT(devfn), &fallback_slots))
50 return NULL;
51 addr = get_virt(seg, bus);
52 if (!addr)
53 return NULL;
54 return addr + ((bus << 20) | (devfn << 12));
48} 55}
49 56
50static int pci_mmcfg_read(unsigned int seg, unsigned int bus, 57static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
51 unsigned int devfn, int reg, int len, u32 *value) 58 unsigned int devfn, int reg, int len, u32 *value)
52{ 59{
53 char *addr = pci_dev_base(seg, bus, devfn); 60 char *addr;
54 61
62 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
55 if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095))) 63 if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095)))
56 return -EINVAL; 64 return -EINVAL;
57 65
66 addr = pci_dev_base(seg, bus, devfn);
67 if (!addr)
68 return pci_conf1_read(seg,bus,devfn,reg,len,value);
69
58 switch (len) { 70 switch (len) {
59 case 1: 71 case 1:
60 *value = readb(addr + reg); 72 *value = readb(addr + reg);
@@ -73,11 +85,16 @@ static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
73static int pci_mmcfg_write(unsigned int seg, unsigned int bus, 85static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
74 unsigned int devfn, int reg, int len, u32 value) 86 unsigned int devfn, int reg, int len, u32 value)
75{ 87{
76 char *addr = pci_dev_base(seg, bus, devfn); 88 char *addr;
77 89
90 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
78 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) 91 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
79 return -EINVAL; 92 return -EINVAL;
80 93
94 addr = pci_dev_base(seg, bus, devfn);
95 if (!addr)
96 return pci_conf1_write(seg,bus,devfn,reg,len,value);
97
81 switch (len) { 98 switch (len) {
82 case 1: 99 case 1:
83 writeb(value, addr + reg); 100 writeb(value, addr + reg);
@@ -98,6 +115,30 @@ static struct pci_raw_ops pci_mmcfg = {
98 .write = pci_mmcfg_write, 115 .write = pci_mmcfg_write,
99}; 116};
100 117
118/* K8 systems have some devices (typically in the builtin northbridge)
119 that are only accessible using type1
120 Normally this can be expressed in the MCFG by not listing them
121 and assigning suitable _SEGs, but this isn't implemented in some BIOS.
122 Instead try to discover all devices on bus 0 that are unreachable using MM
123 and fallback for them.
124 We only do this for bus 0/seg 0 */
125static __init void unreachable_devices(void)
126{
127 int i;
128 for (i = 0; i < 32; i++) {
129 u32 val1;
130 char *addr;
131
132 pci_conf1_read(0, 0, PCI_DEVFN(i,0), 0, 4, &val1);
133 if (val1 == 0xffffffff)
134 continue;
135 addr = pci_dev_base(0, 0, PCI_DEVFN(i, 0));
136 if (addr == NULL|| readl(addr) != val1) {
137 set_bit(i, &fallback_slots);
138 }
139 }
140}
141
101static int __init pci_mmcfg_init(void) 142static int __init pci_mmcfg_init(void)
102{ 143{
103 int i; 144 int i;
@@ -128,6 +169,8 @@ static int __init pci_mmcfg_init(void)
128 printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[i].base_address); 169 printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[i].base_address);
129 } 170 }
130 171
172 unreachable_devices();
173
131 raw_pci_ops = &pci_mmcfg; 174 raw_pci_ops = &pci_mmcfg;
132 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; 175 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
133 176