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authorMagnus Damm <damm@igel.co.jp>2008-07-17 06:13:34 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-07-28 05:10:37 -0400
commit9ca6ecac505002d0c34b47b394f39aa14b0e6fb6 (patch)
treee9f7503ef88997043685fab09b4593cdbd77d7b9 /arch
parentde9254263b8c8b1809520a1009dd516e41976519 (diff)
sh: Use clk_always_enable() on sh7723 / ap325rxa
Use clk_always_enable() on the sh7723 processor and in the ap325rxa board code. Remove duplicate MSTPCR register definitions. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/boards/renesas/ap325rxa/setup.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c16
2 files changed, 16 insertions, 12 deletions
diff --git a/arch/sh/boards/renesas/ap325rxa/setup.c b/arch/sh/boards/renesas/ap325rxa/setup.c
index f8d6d41893a3..333b15cd7952 100644
--- a/arch/sh/boards/renesas/ap325rxa/setup.c
+++ b/arch/sh/boards/renesas/ap325rxa/setup.c
@@ -97,20 +97,8 @@ static int __init ap325rxa_devices_setup(void)
97} 97}
98device_initcall(ap325rxa_devices_setup); 98device_initcall(ap325rxa_devices_setup);
99 99
100#define MSTPCR0 (0xA4150030)
101#define MSTPCR1 (0xA4150034)
102#define MSTPCR2 (0xA4150038)
103
104static void __init ap325rxa_setup(char **cmdline_p) 100static void __init ap325rxa_setup(char **cmdline_p)
105{ 101{
106 /* enable VEU0 + VEU1 */
107 ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00000044, MSTPCR2); /* bit 2 + 6 */
108
109 /* enable MERAM */
110 ctrl_outl(ctrl_inl(MSTPCR0) & ~0x00000001, MSTPCR0); /* bit 0 */
111
112 /* I2C */
113 ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1);
114} 102}
115 103
116static struct sh_machine_vector mv_ap325rxa __initmv = { 104static struct sh_machine_vector mv_ap325rxa __initmv = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index cb5e6f822e64..cd6baffdc896 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -13,6 +13,7 @@
13#include <linux/mm.h> 13#include <linux/mm.h>
14#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
15#include <linux/uio_driver.h> 15#include <linux/uio_driver.h>
16#include <asm/clock.h>
16#include <asm/mmzone.h> 17#include <asm/mmzone.h>
17 18
18static struct uio_info vpu_platform_data = { 19static struct uio_info vpu_platform_data = {
@@ -230,9 +231,24 @@ static struct platform_device *sh7723_devices[] __initdata = {
230 231
231static int __init sh7723_devices_setup(void) 232static int __init sh7723_devices_setup(void)
232{ 233{
234 clk_always_enable("mstp031"); /* TLB */
235 clk_always_enable("mstp030"); /* IC */
236 clk_always_enable("mstp029"); /* OC */
237 clk_always_enable("mstp024"); /* FPU */
238 clk_always_enable("mstp022"); /* INTC */
239 clk_always_enable("mstp020"); /* SuperHyway */
240 clk_always_enable("mstp000"); /* MERAM */
241 clk_always_enable("mstp109"); /* I2C */
242 clk_always_enable("mstp108"); /* RTC */
243 clk_always_enable("mstp211"); /* USB */
244 clk_always_enable("mstp206"); /* VEU2H1 */
245 clk_always_enable("mstp202"); /* VEU2H0 */
246 clk_always_enable("mstp201"); /* VPU */
247
233 platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); 248 platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
234 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); 249 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
235 platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20); 250 platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
251
236 return platform_add_devices(sh7723_devices, 252 return platform_add_devices(sh7723_devices,
237 ARRAY_SIZE(sh7723_devices)); 253 ARRAY_SIZE(sh7723_devices));
238} 254}