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authorBen Dooks <ben-linux@fluff.org>2006-09-15 19:04:23 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 05:25:21 -0400
commit58095d7f39edc919cd3c63c6109ad282e7085da1 (patch)
treed0e7f7ef1a5a4b68dafbbc8e83eb57abd581bb83 /arch
parent1e582fc73781da47eddd90c75bf97f191e4f450f (diff)
[ARM] 3802/1: S3C24XX: PM tidy up cache flushing
Change to using flush_cache_all() in pm.c and also remove the need to flush the cache in the PM code. This changes the sleep.S code to have an entry to store the registers for resume, and then a second entry (after the caches are cleaned) to do the suspend and resume. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2410/pm.c20
-rw-r--r--arch/arm/mach-s3c2410/pm.h3
-rw-r--r--arch/arm/mach-s3c2410/sleep.S31
3 files changed, 34 insertions, 20 deletions
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 164a5b5847d7..46dedd37f438 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -35,6 +35,7 @@
35#include <linux/ioport.h> 35#include <linux/ioport.h>
36#include <linux/delay.h> 36#include <linux/delay.h>
37 37
38#include <asm/cacheflush.h>
38#include <asm/hardware.h> 39#include <asm/hardware.h>
39#include <asm/io.h> 40#include <asm/io.h>
40 41
@@ -52,14 +53,6 @@
52 53
53unsigned long s3c_pm_flags; 54unsigned long s3c_pm_flags;
54 55
55/* cache functions from arch/arm/mm/proc-arm920.S */
56
57#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
58extern void arm920_flush_kern_cache_all(void);
59#else
60static void arm920_flush_kern_cache_all(void) { }
61#endif
62
63#define PFX "s3c24xx-pm: " 56#define PFX "s3c24xx-pm: "
64 57
65static struct sleep_save core_save[] = { 58static struct sleep_save core_save[] = {
@@ -567,7 +560,7 @@ static int s3c2410_pm_enter(suspend_state_t state)
567 560
568 /* flush cache back to ram */ 561 /* flush cache back to ram */
569 562
570 arm920_flush_kern_cache_all(); 563 flush_cache_all();
571 564
572 s3c2410_pm_check_store(); 565 s3c2410_pm_check_store();
573 566
@@ -575,7 +568,14 @@ static int s3c2410_pm_enter(suspend_state_t state)
575 568
576 __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ 569 __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */
577 570
578 s3c2410_cpu_suspend(regs_save); 571 /* s3c2410_cpu_save will also act as our return point from when
572 * we resume as it saves its own register state, so use the return
573 * code to differentiate return from save and return from sleep */
574
575 if (s3c2410_cpu_save(regs_save) == 0) {
576 flush_cache_all();
577 s3c2410_cpu_suspend();
578 }
579 579
580 /* restore the cpu state */ 580 /* restore the cpu state */
581 581
diff --git a/arch/arm/mach-s3c2410/pm.h b/arch/arm/mach-s3c2410/pm.h
index b04e4ca0bb4d..fa8e237cfee8 100644
--- a/arch/arm/mach-s3c2410/pm.h
+++ b/arch/arm/mach-s3c2410/pm.h
@@ -40,7 +40,8 @@ extern unsigned long s3c_pm_flags;
40 40
41/* from sleep.S */ 41/* from sleep.S */
42 42
43extern void s3c2410_cpu_suspend(unsigned long *saveblk); 43extern int s3c2410_cpu_save(unsigned long *saveblk);
44extern void s3c2410_cpu_suspend(void);
44extern void s3c2410_cpu_resume(void); 45extern void s3c2410_cpu_resume(void);
45 46
46extern unsigned long s3c2410_sleep_save_phys; 47extern unsigned long s3c2410_sleep_save_phys;
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S
index a7561a79fc82..e977aa1ffe18 100644
--- a/arch/arm/mach-s3c2410/sleep.S
+++ b/arch/arm/mach-s3c2410/sleep.S
@@ -41,15 +41,25 @@
41 41
42 .text 42 .text
43 43
44 /* s3c2410_cpu_suspend 44 /* s3c2410_cpu_save
45 * 45 *
46 * put the cpu into sleep mode 46 * save enough of the CPU state to allow us to re-start
47 * pm.c code. as we store items like the sp/lr, we will
48 * end up returning from this function when the cpu resumes
49 * so the return value is set to mark this.
50 *
51 * This arangement means we avoid having to flush the cache
52 * from this code.
47 * 53 *
48 * entry: 54 * entry:
49 * r0 = sleep save block 55 * r0 = pointer to save block
56 *
57 * exit:
58 * r0 = 0 => we stored everything
59 * 1 => resumed from sleep
50 */ 60 */
51 61
52ENTRY(s3c2410_cpu_suspend) 62ENTRY(s3c2410_cpu_save)
53 stmfd sp!, { r4 - r12, lr } 63 stmfd sp!, { r4 - r12, lr }
54 64
55 @@ store co-processor registers 65 @@ store co-processor registers
@@ -62,13 +72,15 @@ ENTRY(s3c2410_cpu_suspend)
62 72
63 stmia r0, { r4 - r13 } 73 stmia r0, { r4 - r13 }
64 74
65 @@ flush the caches to ensure everything is back out to 75 mov r0, #0
66 @@ SDRAM before the core powers down 76 ldmfd sp, { r4 - r12, pc }
67 77
68#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 78 /* s3c2410_cpu_suspend
69 bl arm920_flush_kern_cache_all 79 *
70#endif 80 * put the cpu into sleep mode
81 */
71 82
83ENTRY(s3c2410_cpu_suspend)
72 @@ prepare cpu to sleep 84 @@ prepare cpu to sleep
73 85
74 ldr r4, =S3C2410_REFRESH 86 ldr r4, =S3C2410_REFRESH
@@ -100,6 +112,7 @@ s3c2410_do_sleep:
100 @@ turned on, this restores the last bits from the 112 @@ turned on, this restores the last bits from the
101 @@ stack 113 @@ stack
102resume_with_mmu: 114resume_with_mmu:
115 mov r0, #1
103 ldmfd sp!, { r4 - r12, pc } 116 ldmfd sp!, { r4 - r12, pc }
104 117
105 .ltorg 118 .ltorg