Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux

Merge upstream tree in order to reinstate crct10dif.

849 files changed, 6734 insertions, 6483 deletions

diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 837a1f2d8b96..082d9b4b5472 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -15,6 +15,7 @@ config ALPHA
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARCH_WANT_IPC_PARSE_VERSION
         select ARCH_HAVE_NMI_SAFE_CMPXCHG
+        select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
         select GENERIC_SMP_IDLE_THREAD
         select GENERIC_CMOS_UPDATE
         select GENERIC_STRNCPY_FROM_USER
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index c2cbe4fc391c..78b03ef39f6f 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -186,17 +186,24 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
  */
 static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
 {
-        int c, old;
-        c = atomic_read(v);
-        for (;;) {
-                if (unlikely(c == (u)))
-                        break;
-                old = atomic_cmpxchg((v), c, c + (a));
-                if (likely(old == c))
-                        break;
-                c = old;
-        }
-        return c;
+        int c, new, old;
+        smp_mb();
+        __asm__ __volatile__(
+        "1:     ldl_l   %[old],%[mem]\n"
+        "       cmpeq   %[old],%[u],%[c]\n"
+        "       addl    %[old],%[a],%[new]\n"
+        "       bne     %[c],2f\n"
+        "       stl_c   %[new],%[mem]\n"
+        "       beq     %[new],3f\n"
+        "2:\n"
+        ".subsection 2\n"
+        "3:     br      1b\n"
+        ".previous"
+        : [old] "=&r"(old), [new] "=&r"(new), [c] "=&r"(c)
+        : [mem] "m"(*v), [a] "rI"(a), [u] "rI"((long)u)
+        : "memory");
+        smp_mb();
+        return old;
 }
 
 
@@ -207,21 +214,56 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
  * @u: ...unless v is equal to u.
  *
  * Atomically adds @a to @v, so long as it was not @u.
- * Returns the old value of @v.
+ * Returns true iff @v was not @u.
  */
 static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 {
-        long c, old;
-        c = atomic64_read(v);
-        for (;;) {
-                if (unlikely(c == (u)))
-                        break;
-                old = atomic64_cmpxchg((v), c, c + (a));
-                if (likely(old == c))
-                        break;
-                c = old;
-        }
-        return c != (u);
+        long c, tmp;
+        smp_mb();
+        __asm__ __volatile__(
+        "1:     ldq_l   %[tmp],%[mem]\n"
+        "       cmpeq   %[tmp],%[u],%[c]\n"
+        "       addq    %[tmp],%[a],%[tmp]\n"
+        "       bne     %[c],2f\n"
+        "       stq_c   %[tmp],%[mem]\n"
+        "       beq     %[tmp],3f\n"
+        "2:\n"
+        ".subsection 2\n"
+        "3:     br      1b\n"
+        ".previous"
+        : [tmp] "=&r"(tmp), [c] "=&r"(c)
+        : [mem] "m"(*v), [a] "rI"(a), [u] "rI"(u)
+        : "memory");
+        smp_mb();
+        return !c;
+}
+
+/*
+ * atomic64_dec_if_positive - decrement by 1 if old value positive
+ * @v: pointer of type atomic_t
+ *
+ * The function returns the old value of *v minus 1, even if
+ * the atomic variable, v, was not decremented.
+ */
+static inline long atomic64_dec_if_positive(atomic64_t *v)
+{
+        long old, tmp;
+        smp_mb();
+        __asm__ __volatile__(
+        "1:     ldq_l   %[old],%[mem]\n"
+        "       subq    %[old],1,%[tmp]\n"
+        "       ble     %[old],2f\n"
+        "       stq_c   %[tmp],%[mem]\n"
+        "       beq     %[tmp],3f\n"
+        "2:\n"
+        ".subsection 2\n"
+        "3:     br      1b\n"
+        ".previous"
+        : [old] "=&r"(old), [tmp] "=&r"(tmp)
+        : [mem] "m"(*v)
+        : "memory");
+        smp_mb();
+        return old - 1;
 }
 
 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
diff --git a/arch/alpha/include/asm/param.h b/arch/alpha/include/asm/param.h
index bf46af51941b..a5b68b268bcf 100644
--- a/arch/alpha/include/asm/param.h
+++ b/arch/alpha/include/asm/param.h
@@ -3,7 +3,9 @@
 
 #include <uapi/asm/param.h>
 
-#define HZ              CONFIG_HZ
-#define USER_HZ         HZ
-# define CLOCKS_PER_SEC HZ      /* frequency at which times() counts */
+# undef HZ
+# define HZ             CONFIG_HZ
+# define USER_HZ        1024
+# define CLOCKS_PER_SEC USER_HZ /* frequency at which times() counts */
+
 #endif /* _ASM_ALPHA_PARAM_H */
diff --git a/arch/alpha/include/asm/spinlock.h b/arch/alpha/include/asm/spinlock.h
index 3bba21e41b81..37b570d01202 100644
--- a/arch/alpha/include/asm/spinlock.h
+++ b/arch/alpha/include/asm/spinlock.h
@@ -168,8 +168,4 @@ static inline void arch_write_unlock(arch_rwlock_t * lock)
 #define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
 #define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
 
-#define arch_spin_relax(lock)   cpu_relax()
-#define arch_read_relax(lock)   cpu_relax()
-#define arch_write_relax(lock)  cpu_relax()
-
 #endif /* _ALPHA_SPINLOCK_H */
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index 43baee17acdf..f2c94402e2c8 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -3,8 +3,7 @@
 
 #include <uapi/asm/unistd.h>
 
-
-#define NR_SYSCALLS                     506
+#define NR_SYSCALLS                     508
 
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_STAT64
diff --git a/arch/alpha/include/uapi/asm/fcntl.h b/arch/alpha/include/uapi/asm/fcntl.h
index dfdadb0b4bef..09f49a6b87d1 100644
--- a/arch/alpha/include/uapi/asm/fcntl.h
+++ b/arch/alpha/include/uapi/asm/fcntl.h
@@ -32,7 +32,7 @@
 #define O_SYNC          (__O_SYNC|O_DSYNC)
 
 #define O_PATH          040000000
-#define O_TMPFILE       0100000000
+#define __O_TMPFILE     0100000000
 
 #define F_GETLK         7
 #define F_SETLK         8
diff --git a/arch/alpha/include/uapi/asm/param.h b/arch/alpha/include/uapi/asm/param.h
index 29daed819ebd..dbcd9834af6d 100644
--- a/arch/alpha/include/uapi/asm/param.h
+++ b/arch/alpha/include/uapi/asm/param.h
@@ -1,13 +1,7 @@
 #ifndef _UAPI_ASM_ALPHA_PARAM_H
 #define _UAPI_ASM_ALPHA_PARAM_H
 
-/* ??? Gross.  I don't want to parameterize this, and supposedly the
-   hardware ignores reprogramming.  We also need userland buy-in to the 
-   change in HZ, since this is visible in the wait4 resources etc.  */
-
-#ifndef __KERNEL__
 #define HZ              1024
-#endif
 
 #define EXEC_PAGESIZE   8192
 
@@ -17,5 +11,4 @@
 
 #define MAXHOSTNAMELEN  64      /* max length of hostname */
 
-
 #endif /* _UAPI_ASM_ALPHA_PARAM_H */
diff --git a/arch/alpha/include/uapi/asm/socket.h b/arch/alpha/include/uapi/asm/socket.h
index eee6ea76bdaf..467de010ea7e 100644
--- a/arch/alpha/include/uapi/asm/socket.h
+++ b/arch/alpha/include/uapi/asm/socket.h
@@ -81,4 +81,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL                    46
+
 #endif /* _UAPI_ASM_SOCKET_H */
diff --git a/arch/alpha/include/uapi/asm/unistd.h b/arch/alpha/include/uapi/asm/unistd.h
index 801d28bcea51..53ae7bb1bfd1 100644
--- a/arch/alpha/include/uapi/asm/unistd.h
+++ b/arch/alpha/include/uapi/asm/unistd.h
@@ -467,5 +467,7 @@
 #define __NR_sendmmsg                   503
 #define __NR_process_vm_readv           504
 #define __NR_process_vm_writev          505
+#define __NR_kcmp                       506
+#define __NR_finit_module               507
 
 #endif /* _UAPI_ALPHA_UNISTD_H */
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index f62a994ef126..a969b95ee5ac 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -12,11 +12,32 @@
 
         .text
         .set noat
+        .cfi_sections   .debug_frame
 
 /* Stack offsets.  */
 #define SP_OFF                  184
 #define SWITCH_STACK_SIZE       320
 
+.macro  CFI_START_OSF_FRAME     func
+        .align  4
+        .globl  \func
+        .type   \func,@function
+\func:
+        .cfi_startproc simple
+        .cfi_return_column 64
+        .cfi_def_cfa    $sp, 48
+        .cfi_rel_offset 64, 8
+        .cfi_rel_offset $gp, 16
+        .cfi_rel_offset $16, 24
+        .cfi_rel_offset $17, 32
+        .cfi_rel_offset $18, 40
+.endm
+
+.macro  CFI_END_OSF_FRAME       func
+        .cfi_endproc
+        .size   \func, . - \func
+.endm
+
 /*
  * This defines the normal kernel pt-regs layout.
  *
@@ -27,100 +48,158 @@
  * the palcode-provided values are available to the signal handler.
  */
 
-#define SAVE_ALL                        \
-        subq    $sp, SP_OFF, $sp;       \
-        stq     $0, 0($sp);             \
-        stq     $1, 8($sp);             \
-        stq     $2, 16($sp);            \
-        stq     $3, 24($sp);            \
-        stq     $4, 32($sp);            \
-        stq     $28, 144($sp);          \
-        lda     $2, alpha_mv;           \
-        stq     $5, 40($sp);            \
-        stq     $6, 48($sp);            \
-        stq     $7, 56($sp);            \
-        stq     $8, 64($sp);            \
-        stq     $19, 72($sp);           \
-        stq     $20, 80($sp);           \
-        stq     $21, 88($sp);           \
-        ldq     $2, HAE_CACHE($2);      \
-        stq     $22, 96($sp);           \
-        stq     $23, 104($sp);          \
-        stq     $24, 112($sp);          \
-        stq     $25, 120($sp);          \
-        stq     $26, 128($sp);          \
-        stq     $27, 136($sp);          \
-        stq     $2, 152($sp);           \
-        stq     $16, 160($sp);          \
-        stq     $17, 168($sp);          \
+.macro  SAVE_ALL
+        subq    $sp, SP_OFF, $sp
+        .cfi_adjust_cfa_offset  SP_OFF
+        stq     $0, 0($sp)
+        stq     $1, 8($sp)
+        stq     $2, 16($sp)
+        stq     $3, 24($sp)
+        stq     $4, 32($sp)
+        stq     $28, 144($sp)
+        .cfi_rel_offset $0, 0
+        .cfi_rel_offset $1, 8
+        .cfi_rel_offset $2, 16
+        .cfi_rel_offset $3, 24
+        .cfi_rel_offset $4, 32
+        .cfi_rel_offset $28, 144
+        lda     $2, alpha_mv
+        stq     $5, 40($sp)
+        stq     $6, 48($sp)
+        stq     $7, 56($sp)
+        stq     $8, 64($sp)
+        stq     $19, 72($sp)
+        stq     $20, 80($sp)
+        stq     $21, 88($sp)
+        ldq     $2, HAE_CACHE($2)
+        stq     $22, 96($sp)
+        stq     $23, 104($sp)
+        stq     $24, 112($sp)
+        stq     $25, 120($sp)
+        stq     $26, 128($sp)
+        stq     $27, 136($sp)
+        stq     $2, 152($sp)
+        stq     $16, 160($sp)
+        stq     $17, 168($sp)
         stq     $18, 176($sp)
+        .cfi_rel_offset $5, 40
+        .cfi_rel_offset $6, 48
+        .cfi_rel_offset $7, 56
+        .cfi_rel_offset $8, 64
+        .cfi_rel_offset $19, 72
+        .cfi_rel_offset $20, 80
+        .cfi_rel_offset $21, 88
+        .cfi_rel_offset $22, 96
+        .cfi_rel_offset $23, 104
+        .cfi_rel_offset $24, 112
+        .cfi_rel_offset $25, 120
+        .cfi_rel_offset $26, 128
+        .cfi_rel_offset $27, 136
+.endm
 
-#define RESTORE_ALL                     \
-        lda     $19, alpha_mv;          \
-        ldq     $0, 0($sp);             \
-        ldq     $1, 8($sp);             \
-        ldq     $2, 16($sp);            \
-        ldq     $3, 24($sp);            \
-        ldq     $21, 152($sp);          \
-        ldq     $20, HAE_CACHE($19);    \
-        ldq     $4, 32($sp);            \
-        ldq     $5, 40($sp);            \
-        ldq     $6, 48($sp);            \
-        ldq     $7, 56($sp);            \
-        subq    $20, $21, $20;          \
-        ldq     $8, 64($sp);            \
-        beq     $20, 99f;               \
-        ldq     $20, HAE_REG($19);      \
-        stq     $21, HAE_CACHE($19);    \
-        stq     $21, 0($20);            \
-99:;                                    \
-        ldq     $19, 72($sp);           \
-        ldq     $20, 80($sp);           \
-        ldq     $21, 88($sp);           \
-        ldq     $22, 96($sp);           \
-        ldq     $23, 104($sp);          \
-        ldq     $24, 112($sp);          \
-        ldq     $25, 120($sp);          \
-        ldq     $26, 128($sp);          \
-        ldq     $27, 136($sp);          \
-        ldq     $28, 144($sp);          \
+.macro  RESTORE_ALL
+        lda     $19, alpha_mv
+        ldq     $0, 0($sp)
+        ldq     $1, 8($sp)
+        ldq     $2, 16($sp)
+        ldq     $3, 24($sp)
+        ldq     $21, 152($sp)
+        ldq     $20, HAE_CACHE($19)
+        ldq     $4, 32($sp)
+        ldq     $5, 40($sp)
+        ldq     $6, 48($sp)
+        ldq     $7, 56($sp)
+        subq    $20, $21, $20
+        ldq     $8, 64($sp)
+        beq     $20, 99f
+        ldq     $20, HAE_REG($19)
+        stq     $21, HAE_CACHE($19)
+        stq     $21, 0($20)
+99:     ldq     $19, 72($sp)
+        ldq     $20, 80($sp)
+        ldq     $21, 88($sp)
+        ldq     $22, 96($sp)
+        ldq     $23, 104($sp)
+        ldq     $24, 112($sp)
+        ldq     $25, 120($sp)
+        ldq     $26, 128($sp)
+        ldq     $27, 136($sp)
+        ldq     $28, 144($sp)
         addq    $sp, SP_OFF, $sp
+        .cfi_restore    $0
+        .cfi_restore    $1
+        .cfi_restore    $2
+        .cfi_restore    $3
+        .cfi_restore    $4
+        .cfi_restore    $5
+        .cfi_restore    $6
+        .cfi_restore    $7
+        .cfi_restore    $8
+        .cfi_restore    $19
+        .cfi_restore    $20
+        .cfi_restore    $21
+        .cfi_restore    $22
+        .cfi_restore    $23
+        .cfi_restore    $24
+        .cfi_restore    $25
+        .cfi_restore    $26
+        .cfi_restore    $27
+        .cfi_restore    $28
+        .cfi_adjust_cfa_offset  -SP_OFF
+.endm
+
+.macro  DO_SWITCH_STACK
+        bsr     $1, do_switch_stack
+        .cfi_adjust_cfa_offset  SWITCH_STACK_SIZE
+        .cfi_rel_offset $9, 0
+        .cfi_rel_offset $10, 8
+        .cfi_rel_offset $11, 16
+        .cfi_rel_offset $12, 24
+        .cfi_rel_offset $13, 32
+        .cfi_rel_offset $14, 40
+        .cfi_rel_offset $15, 48
+        /* We don't really care about the FP registers for debugging.  */
+.endm
+
+.macro  UNDO_SWITCH_STACK
+        bsr     $1, undo_switch_stack
+        .cfi_restore    $9
+        .cfi_restore    $10
+        .cfi_restore    $11
+        .cfi_restore    $12
+        .cfi_restore    $13
+        .cfi_restore    $14
+        .cfi_restore    $15
+        .cfi_adjust_cfa_offset  -SWITCH_STACK_SIZE
+.endm
 
 /*
  * Non-syscall kernel entry points.
  */
 
-        .align  4
-        .globl  entInt
-        .ent    entInt
-entInt:
+CFI_START_OSF_FRAME entInt
         SAVE_ALL
         lda     $8, 0x3fff
         lda     $26, ret_from_sys_call
         bic     $sp, $8, $8
         mov     $sp, $19
         jsr     $31, do_entInt
-.end entInt
+CFI_END_OSF_FRAME entInt
 
-        .align  4
-        .globl  entArith
-        .ent    entArith
-entArith:
+CFI_START_OSF_FRAME entArith
         SAVE_ALL
         lda     $8, 0x3fff
         lda     $26, ret_from_sys_call
         bic     $sp, $8, $8
         mov     $sp, $18
         jsr     $31, do_entArith
-.end entArith
+CFI_END_OSF_FRAME entArith
 
-        .align  4
-        .globl  entMM
-        .ent    entMM
-entMM:
+CFI_START_OSF_FRAME entMM
         SAVE_ALL
 /* save $9 - $15 so the inline exception code can manipulate them.  */
         subq    $sp, 56, $sp
+        .cfi_adjust_cfa_offset  56
         stq     $9, 0($sp)
         stq     $10, 8($sp)
         stq     $11, 16($sp)
@@ -128,6 +207,13 @@ entMM:
         stq     $13, 32($sp)
         stq     $14, 40($sp)
         stq     $15, 48($sp)
+        .cfi_rel_offset $9, 0
+        .cfi_rel_offset $10, 8
+        .cfi_rel_offset $11, 16
+        .cfi_rel_offset $12, 24
+        .cfi_rel_offset $13, 32
+        .cfi_rel_offset $14, 40
+        .cfi_rel_offset $15, 48
         addq    $sp, 56, $19
 /* handle the fault */
         lda     $8, 0x3fff
@@ -142,28 +228,33 @@ entMM:
         ldq     $14, 40($sp)
         ldq     $15, 48($sp)
         addq    $sp, 56, $sp
+        .cfi_restore    $9
+        .cfi_restore    $10
+        .cfi_restore    $11
+        .cfi_restore    $12
+        .cfi_restore    $13
+        .cfi_restore    $14
+        .cfi_restore    $15
+        .cfi_adjust_cfa_offset  -56
 /* finish up the syscall as normal.  */
         br      ret_from_sys_call
-.end entMM
+CFI_END_OSF_FRAME entMM
 
-        .align  4
-        .globl  entIF
-        .ent    entIF
-entIF:
+CFI_START_OSF_FRAME entIF
         SAVE_ALL
         lda     $8, 0x3fff
         lda     $26, ret_from_sys_call
         bic     $sp, $8, $8
         mov     $sp, $17
         jsr     $31, do_entIF
-.end entIF
+CFI_END_OSF_FRAME entIF
 
-        .align  4
-        .globl  entUna
-        .ent    entUna
-entUna:
+CFI_START_OSF_FRAME entUna
         lda     $sp, -256($sp)
+        .cfi_adjust_cfa_offset  256
         stq     $0, 0($sp)
+        .cfi_rel_offset $0, 0
+        .cfi_remember_state
         ldq     $0, 256($sp)    /* get PS */
         stq     $1, 8($sp)
         stq     $2, 16($sp)
@@ -195,6 +286,32 @@ entUna:
         stq     $28, 224($sp)
         mov     $sp, $19
         stq     $gp, 232($sp)
+        .cfi_rel_offset $1, 1*8
+        .cfi_rel_offset $2, 2*8
+        .cfi_rel_offset $3, 3*8
+        .cfi_rel_offset $4, 4*8
+        .cfi_rel_offset $5, 5*8
+        .cfi_rel_offset $6, 6*8
+        .cfi_rel_offset $7, 7*8
+        .cfi_rel_offset $8, 8*8
+        .cfi_rel_offset $9, 9*8
+        .cfi_rel_offset $10, 10*8
+        .cfi_rel_offset $11, 11*8
+        .cfi_rel_offset $12, 12*8
+        .cfi_rel_offset $13, 13*8
+        .cfi_rel_offset $14, 14*8
+        .cfi_rel_offset $15, 15*8
+        .cfi_rel_offset $19, 19*8
+        .cfi_rel_offset $20, 20*8
+        .cfi_rel_offset $21, 21*8
+        .cfi_rel_offset $22, 22*8
+        .cfi_rel_offset $23, 23*8
+        .cfi_rel_offset $24, 24*8
+        .cfi_rel_offset $25, 25*8
+        .cfi_rel_offset $26, 26*8
+        .cfi_rel_offset $27, 27*8
+        .cfi_rel_offset $28, 28*8
+        .cfi_rel_offset $29, 29*8
         lda     $8, 0x3fff
         stq     $31, 248($sp)
         bic     $sp, $8, $8
@@ -228,16 +345,45 @@ entUna:
         ldq     $28, 224($sp)
         ldq     $gp, 232($sp)
         lda     $sp, 256($sp)
+        .cfi_restore    $1
+        .cfi_restore    $2
+        .cfi_restore    $3
+        .cfi_restore    $4
+        .cfi_restore    $5
+        .cfi_restore    $6
+        .cfi_restore    $7
+        .cfi_restore    $8
+        .cfi_restore    $9
+        .cfi_restore    $10
+        .cfi_restore    $11
+        .cfi_restore    $12
+        .cfi_restore    $13
+        .cfi_restore    $14
+        .cfi_restore    $15
+        .cfi_restore    $19
+        .cfi_restore    $20
+        .cfi_restore    $21
+        .cfi_restore    $22
+        .cfi_restore    $23
+        .cfi_restore    $24
+        .cfi_restore    $25
+        .cfi_restore    $26
+        .cfi_restore    $27
+        .cfi_restore    $28
+        .cfi_restore    $29
+        .cfi_adjust_cfa_offset  -256
         call_pal PAL_rti
-.end entUna
 
         .align  4
-        .ent    entUnaUser
 entUnaUser:
+        .cfi_restore_state
         ldq     $0, 0($sp)      /* restore original $0 */
         lda     $sp, 256($sp)   /* pop entUna's stack frame */
+        .cfi_restore    $0
+        .cfi_adjust_cfa_offset  -256
         SAVE_ALL                /* setup normal kernel stack */
         lda     $sp, -56($sp)
+        .cfi_adjust_cfa_offset  56
         stq     $9, 0($sp)
         stq     $10, 8($sp)
         stq     $11, 16($sp)
@@ -245,6 +391,13 @@ entUnaUser:
         stq     $13, 32($sp)
         stq     $14, 40($sp)
         stq     $15, 48($sp)
+        .cfi_rel_offset $9, 0
+        .cfi_rel_offset $10, 8
+        .cfi_rel_offset $11, 16
+        .cfi_rel_offset $12, 24
+        .cfi_rel_offset $13, 32
+        .cfi_rel_offset $14, 40
+        .cfi_rel_offset $15, 48
         lda     $8, 0x3fff
         addq    $sp, 56, $19
         bic     $sp, $8, $8
@@ -257,20 +410,25 @@ entUnaUser:
         ldq     $14, 40($sp)
         ldq     $15, 48($sp)
         lda     $sp, 56($sp)
+        .cfi_restore    $9
+        .cfi_restore    $10
+        .cfi_restore    $11
+        .cfi_restore    $12
+        .cfi_restore    $13
+        .cfi_restore    $14
+        .cfi_restore    $15
+        .cfi_adjust_cfa_offset  -56
         br      ret_from_sys_call
-.end entUnaUser
+CFI_END_OSF_FRAME entUna
 
-        .align  4
-        .globl  entDbg
-        .ent    entDbg
-entDbg:
+CFI_START_OSF_FRAME entDbg
         SAVE_ALL
         lda     $8, 0x3fff
         lda     $26, ret_from_sys_call
         bic     $sp, $8, $8
         mov     $sp, $16
         jsr     $31, do_entDbg
-.end entDbg
+CFI_END_OSF_FRAME entDbg
 
 /*
  * The system call entry point is special.  Most importantly, it looks
@@ -285,8 +443,12 @@ entDbg:
 
         .align  4
         .globl  entSys
-        .globl  ret_from_sys_call
-        .ent    entSys
+        .type   entSys, @function
+        .cfi_startproc simple
+        .cfi_return_column 64
+        .cfi_def_cfa    $sp, 48
+        .cfi_rel_offset 64, 8
+        .cfi_rel_offset $gp, 16
 entSys:
         SAVE_ALL
         lda     $8, 0x3fff
@@ -300,6 +462,9 @@ entSys:
         stq     $17, SP_OFF+32($sp)
         s8addq  $0, $5, $5
         stq     $18, SP_OFF+40($sp)
+        .cfi_rel_offset $16, SP_OFF+24
+        .cfi_rel_offset $17, SP_OFF+32
+        .cfi_rel_offset $18, SP_OFF+40
         blbs    $3, strace
         beq     $4, 1f
         ldq     $27, 0($5)
@@ -310,6 +475,7 @@ entSys:
         stq     $31, 72($sp)            /* a3=0 => no error */
 
         .align  4
+        .globl  ret_from_sys_call
 ret_from_sys_call:
         cmovne  $26, 0, $18             /* $18 = 0 => non-restartable */
         ldq     $0, SP_OFF($sp)
@@ -324,10 +490,12 @@ ret_to_user:
         and     $17, _TIF_WORK_MASK, $2
         bne     $2, work_pending
 restore_all:
+        .cfi_remember_state
         RESTORE_ALL
         call_pal PAL_rti
 
 ret_to_kernel:
+        .cfi_restore_state
         lda     $16, 7
         call_pal PAL_swpipl
         br restore_all
@@ -356,7 +524,6 @@ $ret_success:
         stq     $0, 0($sp)
         stq     $31, 72($sp)    /* a3=0 => no error */
         br      ret_from_sys_call
-.end entSys
 
 /*
  * Do all cleanup when returning from all interrupts and system calls.
@@ -370,7 +537,7 @@ $ret_success:
  */
 
         .align  4
-        .ent    work_pending
+        .type   work_pending, @function
 work_pending:
         and     $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING, $2
         bne     $2, $work_notifysig
@@ -387,23 +554,22 @@ $work_resched:
 
 $work_notifysig:
         mov     $sp, $16
-        bsr     $1, do_switch_stack
+        DO_SWITCH_STACK
         jsr     $26, do_work_pending
-        bsr     $1, undo_switch_stack
+        UNDO_SWITCH_STACK
         br      restore_all
-.end work_pending
 
 /*
  * PTRACE syscall handler
  */
 
         .align  4
-        .ent    strace
+        .type   strace, @function
 strace:
         /* set up signal stack, call syscall_trace */
-        bsr     $1, do_switch_stack
+        DO_SWITCH_STACK
         jsr     $26, syscall_trace_enter /* returns the syscall number */
-        bsr     $1, undo_switch_stack
+        UNDO_SWITCH_STACK
 
         /* get the arguments back.. */
         ldq     $16, SP_OFF+24($sp)
@@ -431,9 +597,9 @@ ret_from_straced:
 $strace_success:
         stq     $0, 0($sp)              /* save return value */
 
-        bsr     $1, do_switch_stack
+        DO_SWITCH_STACK
         jsr     $26, syscall_trace_leave
-        bsr     $1, undo_switch_stack
+        UNDO_SWITCH_STACK
         br      $31, ret_from_sys_call
 
         .align  3
@@ -447,26 +613,31 @@ $strace_error:
         stq     $0, 0($sp)
         stq     $1, 72($sp)     /* a3 for return */
 
-        bsr     $1, do_switch_stack
+        DO_SWITCH_STACK
         mov     $18, $9         /* save old syscall number */
         mov     $19, $10        /* save old a3 */
         jsr     $26, syscall_trace_leave
         mov     $9, $18
         mov     $10, $19
-        bsr     $1, undo_switch_stack
+        UNDO_SWITCH_STACK
 
         mov     $31, $26        /* tell "ret_from_sys_call" we can restart */
         br      ret_from_sys_call
-.end strace
+CFI_END_OSF_FRAME entSys
 
 /*
  * Save and restore the switch stack -- aka the balance of the user context.
  */
 
         .align  4
-        .ent    do_switch_stack
+        .type   do_switch_stack, @function
+        .cfi_startproc simple
+        .cfi_return_column 64
+        .cfi_def_cfa $sp, 0
+        .cfi_register 64, $1
 do_switch_stack:
         lda     $sp, -SWITCH_STACK_SIZE($sp)
+        .cfi_adjust_cfa_offset  SWITCH_STACK_SIZE
         stq     $9, 0($sp)
         stq     $10, 8($sp)
         stq     $11, 16($sp)
@@ -510,10 +681,14 @@ do_switch_stack:
         stt     $f0, 312($sp)   # save fpcr in slot of $f31
         ldt     $f0, 64($sp)    # dont let "do_switch_stack" change fp state.
         ret     $31, ($1), 1
-.end do_switch_stack
+        .cfi_endproc
+        .size   do_switch_stack, .-do_switch_stack
 
         .align  4
-        .ent    undo_switch_stack
+        .type   undo_switch_stack, @function
+        .cfi_startproc simple
+        .cfi_def_cfa $sp, 0
+        .cfi_register 64, $1
 undo_switch_stack:
         ldq     $9, 0($sp)
         ldq     $10, 8($sp)
@@ -558,7 +733,8 @@ undo_switch_stack:
         ldt     $f30, 304($sp)
         lda     $sp, SWITCH_STACK_SIZE($sp)
         ret     $31, ($1), 1
-.end undo_switch_stack
+        .cfi_endproc
+        .size   undo_switch_stack, .-undo_switch_stack
 
 /*
  * The meat of the context switch code.
@@ -566,17 +742,18 @@ undo_switch_stack:
 
         .align  4
         .globl  alpha_switch_to
-        .ent    alpha_switch_to
+        .type   alpha_switch_to, @function
+        .cfi_startproc
 alpha_switch_to:
-        .prologue 0
-        bsr     $1, do_switch_stack
+        DO_SWITCH_STACK
         call_pal PAL_swpctx
         lda     $8, 0x3fff
-        bsr     $1, undo_switch_stack
+        UNDO_SWITCH_STACK
         bic     $sp, $8, $8
         mov     $17, $0
         ret
-.end alpha_switch_to
+        .cfi_endproc
+        .size   alpha_switch_to, .-alpha_switch_to
 
 /*
  * New processes begin life here.
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index f433fc11877a..28e4429596f3 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -236,7 +236,7 @@ void __init
 init_rtc_irq(void)
 {
         irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
-                                      handle_simple_irq, "RTC");
+                                      handle_percpu_irq, "RTC");
         setup_irq(RTC_IRQ, &timer_irqaction);
 }
 
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index 7b60834fb4b2..9dbbcb3b9146 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -116,7 +116,7 @@ wait_boot_cpu_to_stop(int cpuid)
 /*
  * Where secondaries begin a life of C.
  */
-void __cpuinit
+void
 smp_callin(void)
 {
         int cpuid = hard_smp_processor_id();
@@ -194,7 +194,7 @@ wait_for_txrdy (unsigned long cpumask)
  * Send a message to a secondary's console.  "START" is one such
  * interesting message.  ;-)
  */
-static void __cpuinit
+static void
 send_secondary_console_msg(char *str, int cpuid)
 {
         struct percpu_struct *cpu;
@@ -264,9 +264,10 @@ recv_secondary_console_msg(void)
                 if (cnt <= 0 || cnt >= 80)
                         strcpy(buf, "<<< BOGUS MSG >>>");
                 else {
-                        cp1 = (char *) &cpu->ipc_buffer[11];
+                        cp1 = (char *) &cpu->ipc_buffer[1];
                         cp2 = buf;
-                        strcpy(cp2, cp1);
+                        memcpy(cp2, cp1, cnt);
+                        cp2[cnt] = '\0';
                         
                         while ((cp2 = strchr(cp2, '\r')) != 0) {
                                 *cp2 = ' ';
@@ -285,7 +286,7 @@ recv_secondary_console_msg(void)
 /*
  * Convince the console to have a secondary cpu begin execution.
  */
-static int __cpuinit
+static int
 secondary_cpu_start(int cpuid, struct task_struct *idle)
 {
         struct percpu_struct *cpu;
@@ -356,7 +357,7 @@ secondary_cpu_start(int cpuid, struct task_struct *idle)
 /*
  * Bring one cpu online.
  */
-static int __cpuinit
+static int
 smp_boot_one_cpu(int cpuid, struct task_struct *idle)
 {
         unsigned long timeout;
@@ -472,7 +473,7 @@ smp_prepare_boot_cpu(void)
 {
 }
 
-int __cpuinit
+int
 __cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         smp_boot_one_cpu(cpu, tidle);
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index 5bf401f7ea97..6c35159bc00e 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -190,9 +190,6 @@ static struct irq_chip clipper_irq_type = {
 static void
 dp264_device_interrupt(unsigned long vector)
 {
-#if 1
-        printk("dp264_device_interrupt: NOT IMPLEMENTED YET!!\n");
-#else
         unsigned long pld;
         unsigned int i;
 
@@ -210,12 +207,7 @@ dp264_device_interrupt(unsigned long vector)
                         isa_device_interrupt(vector);
                 else
                         handle_irq(16 + i);
-#if 0
-                TSUNAMI_cchip->dir0.csr = 1UL << i; mb();
-                tmp = TSUNAMI_cchip->dir0.csr;
-#endif
         }
-#endif
 }
 
 static void 
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 407accc80877..c92e389ff219 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -317,8 +317,9 @@ marvel_init_irq(void)
 }
 
 static int 
-marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+marvel_map_irq(const struct pci_dev *cdev, u8 slot, u8 pin)
 {
+        struct pci_dev *dev = (struct pci_dev *)cdev;
         struct pci_controller *hose = dev->sysdata;
         struct io7_port *io7_port = hose->sysdata;
         struct io7 *io7 = io7_port->io7;
diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S
index 4284ec798ec9..dca9b3fb0071 100644
--- a/arch/alpha/kernel/systbls.S
+++ b/arch/alpha/kernel/systbls.S
@@ -524,6 +524,8 @@ sys_call_table:
         .quad sys_sendmmsg
         .quad sys_process_vm_readv
         .quad sys_process_vm_writev             /* 505 */
+        .quad sys_kcmp
+        .quad sys_finit_module
 
         .size sys_call_table, . - sys_call_table
         .type sys_call_table, @object
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c
index e336694ca042..ea3395036556 100644
--- a/arch/alpha/kernel/time.c
+++ b/arch/alpha/kernel/time.c
@@ -105,9 +105,7 @@ void arch_irq_work_raise(void)
 
 static inline __u32 rpcc(void)
 {
-    __u32 result;
-    asm volatile ("rpcc %0" : "=r"(result));
-    return result;
+        return __builtin_alpha_rpcc();
 }
 
 int update_persistent_clock(struct timespec now)
diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c
index affccb959a9e..bd0665cdc840 100644
--- a/arch/alpha/kernel/traps.c
+++ b/arch/alpha/kernel/traps.c
@@ -32,7 +32,7 @@
 
 static int opDEC_fix;
 
-static void __cpuinit
+static void
 opDEC_check(void)
 {
         __asm__ __volatile__ (
@@ -66,8 +66,8 @@ dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
 {
         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx    %s\n",
                regs->pc, regs->r26, regs->ps, print_tainted());
-        print_symbol("pc is at %s\n", regs->pc);
-        print_symbol("ra is at %s\n", regs->r26 );
+        printk("pc is at %pSR\n", (void *)regs->pc);
+        printk("ra is at %pSR\n", (void *)regs->r26);
         printk("v0 = %016lx  t0 = %016lx  t1 = %016lx\n",
                regs->r0, regs->r1, regs->r2);
         printk("t2 = %016lx  t3 = %016lx  t4 = %016lx\n",
@@ -132,9 +132,7 @@ dik_show_trace(unsigned long *sp)
                         continue;
                 if (tmp >= (unsigned long) &_etext)
                         continue;
-                printk("[<%lx>]", tmp);
-                print_symbol(" %s", tmp);
-                printk("\n");
+                printk("[<%lx>] %pSR\n", tmp, (void *)tmp);
                 if (i > 40) {
                         printk(" ...");
                         break;
@@ -1059,7 +1057,7 @@ give_sigbus:
         return;
 }
 
-void __cpuinit
+void
 trap_init(void)
 {
         /* Tell PAL-code what global pointer we want in the kernel.  */
diff --git a/arch/arc/boot/dts/abilis_tb100.dtsi b/arch/arc/boot/dts/abilis_tb100.dtsi
index 941ad118a7e7..d9f8249aa66e 100644
--- a/arch/arc/boot/dts/abilis_tb100.dtsi
+++ b/arch/arc/boot/dts/abilis_tb100.dtsi
@@ -21,10 +21,6 @@
 
 /include/ "abilis_tb10x.dtsi"
 
-/* interrupt specifiers
- * --------------------
- * 0: rising, 1: low, 2: high, 3: falling,
- */
 
 / {
         clock-frequency         = <500000000>;  /* 500 MHZ */
@@ -173,7 +169,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF140000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -185,7 +181,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF141000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -197,7 +193,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF142000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -209,7 +205,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF143000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -221,7 +217,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF144000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -233,7 +229,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF145000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -245,7 +241,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF146000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -257,7 +253,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF147000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -269,7 +265,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF148000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -281,7 +277,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF149000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -293,7 +289,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF14A000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -305,7 +301,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF14B000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -317,7 +313,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF14C000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -329,7 +325,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF14D000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
diff --git a/arch/arc/boot/dts/abilis_tb101.dtsi b/arch/arc/boot/dts/abilis_tb101.dtsi
index fd25c212049f..da8ca7941e67 100644
--- a/arch/arc/boot/dts/abilis_tb101.dtsi
+++ b/arch/arc/boot/dts/abilis_tb101.dtsi
@@ -21,10 +21,6 @@
 
 /include/ "abilis_tb10x.dtsi"
 
-/* interrupt specifiers
- * --------------------
- * 0: rising, 1: low, 2: high, 3: falling,
- */
 
 / {
         clock-frequency         = <500000000>;  /* 500 MHZ */
@@ -182,7 +178,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF140000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -194,7 +190,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF141000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -206,7 +202,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF142000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -218,7 +214,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF143000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -230,7 +226,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF144000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -242,7 +238,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF145000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -254,7 +250,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF146000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -266,7 +262,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF147000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -278,7 +274,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF148000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -290,7 +286,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF149000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -302,7 +298,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF14A000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -314,7 +310,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF14B000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -326,7 +322,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF14C000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
@@ -338,7 +334,7 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <27 1>;
+                        interrupts = <27 2>;
                         reg = <0xFF14D000 0x1000>;
                         gpio-controller;
                         #gpio-cells = <1>;
diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
index b97e3051ba4b..edf56f4749e1 100644
--- a/arch/arc/boot/dts/abilis_tb10x.dtsi
+++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
@@ -19,10 +19,6 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  */
 
-/* interrupt specifiers
- * --------------------
- * 0: rising, 1: low, 2: high, 3: falling,
- */
 
 / {
         compatible              = "abilis,arc-tb10x";
@@ -78,7 +74,7 @@
                         #interrupt-cells = <1>;
                 };
                 tb10x_ictl: pic@fe002000 {
-                        compatible = "abilis,tb10x_ictl";
+                        compatible = "abilis,tb10x-ictl";
                         reg = <0xFE002000 0x20>;
                         interrupt-controller;
                         #interrupt-cells = <2>;
@@ -91,7 +87,7 @@
                         compatible = "snps,dw-apb-uart";
                         reg = <0xFF100000 0x100>;
                         clock-frequency = <166666666>;
-                        interrupts = <25 1>;
+                        interrupts = <25 8>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         interrupt-parent = <&tb10x_ictl>;
@@ -100,7 +96,7 @@
                         compatible = "snps,dwmac-3.70a","snps,dwmac";
                         reg = <0xFE100000 0x1058>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <6 1>;
+                        interrupts = <6 8>;
                         interrupt-names = "macirq";
                         clocks = <&ahb_clk>;
                         clock-names = "stmmaceth";
@@ -109,7 +105,7 @@
                         compatible = "snps,dma-spear1340";
                         reg = <0xFE000000 0x400>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <14 1>;
+                        interrupts = <14 8>;
                         dma-channels = <6>;
                         dma-requests = <0>;
                         dma-masters = <1>;
@@ -128,7 +124,7 @@
                         compatible = "snps,designware-i2c";
                         reg = <0xFF120000 0x1000>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <12 1>;
+                        interrupts = <12 8>;
                         clocks = <&ahb_clk>;
                 };
                 i2c1: i2c@FF121000 {
@@ -137,7 +133,7 @@
                         compatible = "snps,designware-i2c";
                         reg = <0xFF121000 0x1000>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <12 1>;
+                        interrupts = <12 8>;
                         clocks = <&ahb_clk>;
                 };
                 i2c2: i2c@FF122000 {
@@ -146,7 +142,7 @@
                         compatible = "snps,designware-i2c";
                         reg = <0xFF122000 0x1000>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <12 1>;
+                        interrupts = <12 8>;
                         clocks = <&ahb_clk>;
                 };
                 i2c3: i2c@FF123000 {
@@ -155,7 +151,7 @@
                         compatible = "snps,designware-i2c";
                         reg = <0xFF123000 0x1000>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <12 1>;
+                        interrupts = <12 8>;
                         clocks = <&ahb_clk>;
                 };
                 i2c4: i2c@FF124000 {
@@ -164,7 +160,7 @@
                         compatible = "snps,designware-i2c";
                         reg = <0xFF124000 0x1000>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <12 1>;
+                        interrupts = <12 8>;
                         clocks = <&ahb_clk>;
                 };
 
@@ -176,7 +172,7 @@
                         num-cs = <1>;
                         reg = <0xFE010000 0x20>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <26 1>;
+                        interrupts = <26 8>;
                         clocks = <&ahb_clk>;
                 };
                 spi1: spi@0xFE011000 {
@@ -187,7 +183,7 @@
                         num-cs = <2>;
                         reg = <0xFE011000 0x20>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <10 1>;
+                        interrupts = <10 8>;
                         clocks = <&ahb_clk>;
                 };
 
@@ -195,7 +191,7 @@
                         compatible = "abilis,tb100-tsm";
                         reg = <0xff316000 0x400>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <17 1>;
+                        interrupts = <17 8>;
                         output-clkdiv = <4>;
                         global-packet-delay = <0x21>;
                         port-packet-delay = <0>;
@@ -213,7 +209,7 @@
                                         "cpuctrl",
                                         "a6it_int_force";
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <20 1>, <19 1>;
+                        interrupts = <20 2>, <19 2>;
                         interrupt-names = "cmd_irq", "event_irq";
                 };
                 tb10x_mdsc0: tb10x-mdscr@FF300000 {
@@ -239,7 +235,7 @@
                         compatible = "abilis,tb100-wfb";
                         reg = <0xff319000 0x1000>;
                         interrupt-parent = <&tb10x_ictl>;
-                        interrupts = <16 1>;
+                        interrupts = <16 8>;
                 };
         };
 };
diff --git a/arch/arc/boot/dts/angel4.dts b/arch/arc/boot/dts/angel4.dts
index bae4f936cb03..4fb2d6f655bd 100644
--- a/arch/arc/boot/dts/angel4.dts
+++ b/arch/arc/boot/dts/angel4.dts
@@ -51,5 +51,21 @@
                         current-speed = <115200>;
                         status = "okay";
                 };
+
+                ethernet@c0fc2000 {
+                        compatible = "snps,arc-emac";
+                        reg = <0xc0fc2000 0x3c>;
+                        interrupts = <6>;
+                        mac-address = [ 00 11 22 33 44 55 ];
+                        clock-frequency = <80000000>;
+                        max-speed = <100>;
+                        phy = <&phy0>;
+
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        phy0: ethernet-phy@0 {
+                                reg = <1>;
+                        };
+                };
         };
 };
diff --git a/arch/arc/configs/fpga_defconfig b/arch/arc/configs/fpga_defconfig
index c109af320274..4ca50f1f8d05 100644
--- a/arch/arc/configs/fpga_defconfig
+++ b/arch/arc/configs/fpga_defconfig
@@ -38,6 +38,9 @@ CONFIG_INET=y
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FIRMWARE_IN_KERNEL is not set
 # CONFIG_BLK_DEV is not set
+CONFIG_NETDEVICES=y
+CONFIG_ARC_EMAC=y
+CONFIG_LXT_PHY=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c
index 318164cabdfc..0fd1f0d515ff 100644
--- a/arch/arc/mm/fault.c
+++ b/arch/arc/mm/fault.c
@@ -207,8 +207,10 @@ out_of_memory:
         }
         up_read(&mm->mmap_sem);
 
-        if (user_mode(regs))
-                do_group_exit(SIGKILL); /* This will never return */
+        if (user_mode(regs)) {
+                pagefault_out_of_memory();
+                return;
+        }
 
         goto no_context;
 
diff --git a/arch/arc/plat-arcfpga/include/plat/irq.h b/arch/arc/plat-arcfpga/include/plat/irq.h
index 41e335670f60..6adbc53c3a5b 100644
--- a/arch/arc/plat-arcfpga/include/plat/irq.h
+++ b/arch/arc/plat-arcfpga/include/plat/irq.h
@@ -16,8 +16,6 @@
 #define UART1_IRQ       10
 #define UART2_IRQ       11
 
-#define VMAC_IRQ        6
-
 #define IDE_IRQ         13
 #define PCI_IRQ         14
 #define PS2_IRQ         15
diff --git a/arch/arc/plat-arcfpga/include/plat/memmap.h b/arch/arc/plat-arcfpga/include/plat/memmap.h
index 1663f3388085..5c78e6135a1f 100644
--- a/arch/arc/plat-arcfpga/include/plat/memmap.h
+++ b/arch/arc/plat-arcfpga/include/plat/memmap.h
@@ -15,8 +15,6 @@
 #define UART0_BASE              0xC0FC1000
 #define UART1_BASE              0xC0FC1100
 
-#define VMAC_REG_BASEADDR       0xC0FC2000
-
 #define IDE_CONTROLLER_BASE     0xC0FC9000
 
 #define AHB_PCI_HOST_BRG_BASE   0xC0FD0000
diff --git a/arch/arc/plat-tb10x/Kconfig b/arch/arc/plat-tb10x/Kconfig
index 1d3452100f1f..1ab386bb5da8 100644
--- a/arch/arc/plat-tb10x/Kconfig
+++ b/arch/arc/plat-tb10x/Kconfig
@@ -22,6 +22,7 @@ menuconfig ARC_PLAT_TB10X
         select PINCTRL
         select PINMUX
         select ARCH_REQUIRE_GPIOLIB
+        select TB10X_IRQC
         help
           Support for platforms based on the TB10x home media gateway SOC by
           Abilis Systems. TB10x is based on the ARC700 CPU architecture.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 531cdda016f9..ba412e02ec0c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -14,6 +14,7 @@ config ARM
         select GENERIC_IRQ_PROBE
         select GENERIC_IRQ_SHOW
         select GENERIC_PCI_IOMAP
+        select GENERIC_SCHED_CLOCK
         select GENERIC_SMP_IDLE_THREAD
         select GENERIC_IDLE_POLL_SETUP
         select GENERIC_STRNCPY_FROM_USER
@@ -40,6 +41,7 @@ config ARM
         select HAVE_IDE if PCI || ISA || PCMCIA
         select HAVE_IRQ_TIME_ACCOUNTING
         select HAVE_KERNEL_GZIP
+        select HAVE_KERNEL_LZ4
         select HAVE_KERNEL_LZMA
         select HAVE_KERNEL_LZO
         select HAVE_KERNEL_XZ
@@ -1314,7 +1316,7 @@ config ARM_ERRATA_754327
 
 config ARM_ERRATA_364296
         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
-        depends on CPU_V6 && !SMP
+        depends on CPU_V6
         help
           This options enables the workaround for the 364296 ARM1136
           r0p2 erratum (possible cache data corruption with
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5b7be8d975b5..e401a766c0bd 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -510,6 +510,16 @@ choice
                   Say Y here if you want the debug print routines to direct
                   their output to the uart1 port on SiRFmarco devices.
 
+        config DEBUG_STI_UART
+                depends on ARCH_STI
+                bool "Use StiH415/416 ASC for low-level debug"
+                help
+                  Say Y here if you want kernel low-level debugging support
+                  on StiH415/416 based platforms like B2000, B2020.
+                  It support UART2 and SBC_UART1.
+
+                  If unsure, say N.
+
         config DEBUG_U300_UART
                 bool "Kernel low-level debugging messages via U300 UART0"
                 depends on ARCH_U300
@@ -564,16 +574,6 @@ choice
                   This option selects UART0 on VIA/Wondermedia System-on-a-chip
                   devices, including VT8500, WM8505, WM8650 and WM8850.
 
-        config DEBUG_STI_UART
-                depends on ARCH_STI
-                bool "Use StiH415/416 ASC for low-level debug"
-                help
-                  Say Y here if you want kernel low-level debugging support
-                  on StiH415/416 based platforms like B2000, B2020.
-                  It support UART2 and SBC_UART1.
-
-                  If unsure, say N.
-
         config DEBUG_LL_UART_NONE
                 bool "No low-level debugging UART"
                 depends on !ARCH_MULTIPLATFORM
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index f79a08efe000..47279aa96a6a 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -6,6 +6,7 @@ piggy.gzip
 piggy.lzo
 piggy.lzma
 piggy.xzkern
+piggy.lz4
 vmlinux
 vmlinux.lds
 
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 48d0a44270bd..7ac1610252ba 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -91,6 +91,7 @@ suffix_$(CONFIG_KERNEL_GZIP) = gzip
 suffix_$(CONFIG_KERNEL_LZO)  = lzo
 suffix_$(CONFIG_KERNEL_LZMA) = lzma
 suffix_$(CONFIG_KERNEL_XZ)   = xzkern
+suffix_$(CONFIG_KERNEL_LZ4)  = lz4
 
 # Borrowed libfdt files for the ATAG compatibility mode
 
@@ -115,7 +116,7 @@ targets       := vmlinux vmlinux.lds \
                  font.o font.c head.o misc.o $(OBJS)
 
 # Make sure files are removed during clean
-extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
+extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern piggy.lz4 \
                  lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs) \
                  hyp-stub.S
 
diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index 24b0475cb8bf..bd245d34952d 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -51,6 +51,10 @@ extern char * strstr(const char * s1, const char *s2);
 #include "../../../../lib/decompress_unxz.c"
 #endif
 
+#ifdef CONFIG_KERNEL_LZ4
+#include "../../../../lib/decompress_unlz4.c"
+#endif
+
 int do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x))
 {
         return decompress(input, len, NULL, NULL, output, NULL, error);
diff --git a/arch/arm/boot/compressed/piggy.lz4.S b/arch/arm/boot/compressed/piggy.lz4.S
new file mode 100644
index 000000000000..3d9a575618a3
--- /dev/null
+++ b/arch/arm/boot/compressed/piggy.lz4.S
@@ -0,0 +1,6 @@
+        .section .piggydata,#alloc
+        .globl  input_data
+input_data:
+        .incbin "arch/arm/boot/compressed/piggy.lz4"
+        .globl  input_data_end
+input_data_end:
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 04feaf8f1420..444b4ede0d60 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -214,10 +214,12 @@
 
 &cpsw_emac0 {
         phy_id = <&davinci_mdio>, <0>;
+        phy-mode = "mii";
 };
 
 &cpsw_emac1 {
         phy_id = <&davinci_mdio>, <1>;
+        phy-mode = "mii";
 };
 
 &mac {
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index a16bb9691cc6..3aee1a43782d 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -467,8 +467,24 @@
 
 &cpsw_emac0 {
         phy_id = <&davinci_mdio>, <0>;
+        phy-mode = "rgmii-txid";
 };
 
 &cpsw_emac1 {
         phy_id = <&davinci_mdio>, <1>;
+        phy-mode = "rgmii-txid";
+};
+
+&tscadc {
+        status = "okay";
+        tsc {
+                ti,wires = <4>;
+                ti,x-plate-resistance = <200>;
+                ti,coordiante-readouts = <5>;
+                ti,wire-config = <0x00 0x11 0x22 0x33>;
+        };
+
+        adc {
+                ti,adc-channels = <4 5 6 7>;
+        };
 };
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 9e00eef9b74b..0c8ad173d2b0 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -392,3 +392,13 @@
         pinctrl-0 = <&davinci_mdio_default>;
         pinctrl-1 = <&davinci_mdio_sleep>;
 };
+
+&cpsw_emac0 {
+        phy_id = <&davinci_mdio>, <0>;
+        phy-mode = "rgmii-txid";
+};
+
+&cpsw_emac1 {
+        phy_id = <&davinci_mdio>, <1>;
+        phy-mode = "rgmii-txid";
+};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 0d4df90477f7..38b446ba1ce1 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -502,6 +502,23 @@
                         status = "disabled";
                 };
 
+                tscadc: tscadc@44e0d000 {
+                        compatible = "ti,am3359-tscadc";
+                        reg = <0x44e0d000 0x1000>;
+                        interrupt-parent = <&intc>;
+                        interrupts = <16>;
+                        ti,hwmods = "adc_tsc";
+                        status = "disabled";
+
+                        tsc {
+                                compatible = "ti,am3359-tsc";
+                        };
+                        am335x_adc: adc {
+                                #io-channel-cells = <1>;
+                                compatible = "ti,am3359-adc";
+                        };
+                };
+
                 gpmc: gpmc@50000000 {
                         compatible = "ti,am3352-gpmc";
                         ti,hwmods = "gpmc";
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
index 3f0239ec1bc5..dc259e8b8a73 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -190,7 +190,7 @@
                 samsung,i2c-max-bus-freq = <66000>;
 
                 hdmiddc@50 {
-                        compatible = "samsung,exynos5-hdmiddc";
+                        compatible = "samsung,exynos4210-hdmiddc";
                         reg = <0x50>;
                 };
         };
@@ -224,7 +224,7 @@
                 samsung,i2c-max-bus-freq = <378000>;
 
                 hdmiphy@38 {
-                        compatible = "samsung,exynos5-hdmiphy";
+                        compatible = "samsung,exynos4212-hdmiphy";
                         reg = <0x38>;
                 };
         };
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 35a66dee4011..49f18c24a576 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -105,7 +105,7 @@
                 samsung,i2c-max-bus-freq = <66000>;
 
                 hdmiddc@50 {
-                        compatible = "samsung,exynos5-hdmiddc";
+                        compatible = "samsung,exynos4210-hdmiddc";
                         reg = <0x50>;
                 };
         };
@@ -135,7 +135,7 @@
                 samsung,i2c-max-bus-freq = <66000>;
 
                 hdmiphy@38 {
-                        compatible = "samsung,exynos5-hdmiphy";
+                        compatible = "samsung,exynos4212-hdmiphy";
                         reg = <0x38>;
                 };
         };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 41cd625b6020..ef57277fc38f 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -599,7 +599,7 @@
         };
 
         hdmi {
-                compatible = "samsung,exynos5-hdmi";
+                compatible = "samsung,exynos4212-hdmi";
                 reg = <0x14530000 0x70000>;
                 interrupts = <0 95 0>;
                 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
@@ -609,7 +609,7 @@
         };
 
         mixer {
-                compatible = "samsung,exynos5-mixer";
+                compatible = "samsung,exynos5250-mixer";
                 reg = <0x14450000 0x10000>;
                 interrupts = <0 94 0>;
         };
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index 3637bf3b1d59..1f0d38d7b16f 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -155,12 +155,14 @@
                         can0: can@80032000 {
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&can0_pins_a>;
+                                xceiver-supply = <&reg_can_3v3>;
                                 status = "okay";
                         };
 
                         can1: can@80034000 {
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&can1_pins_a>;
+                                xceiver-supply = <&reg_can_3v3>;
                                 status = "okay";
                         };
                 };
@@ -319,6 +321,16 @@
                         gpio = <&gpio3 30 0>;
                         enable-active-high;
                 };
+
+                reg_can_3v3: can-3v3 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "can-3v3";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        gpio = <&gpio2 13 0>;
+                        enable-active-high;
+                };
+
         };
 
         sound {
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 0e22a285dfe0..757c4cd900ee 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -27,6 +27,21 @@
         };
 
         soc@01c20000 {
+                emac: ethernet@01c0b000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&emac_pins_a>;
+                        phy = <&phy1>;
+                        status = "okay";
+                };
+
+                mdio@01c0b080 {
+                        status = "okay";
+
+                        phy1: ethernet-phy@1 {
+                                reg = <1>;
+                        };
+                };
+
                 pinctrl@01c20800 {
                         led_pins_cubieboard: led_pins@0 {
                                 allwinner,pins = "PH20", "PH21";
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index b9efac100c85..3514b37d66bc 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -23,10 +23,51 @@
         };
 
         soc@01c20000 {
+                emac: ethernet@01c0b000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&emac_pins_a>;
+                        phy = <&phy0>;
+                        status = "okay";
+                };
+
+                mdio@01c0b080 {
+                        phy-supply = <&reg_emac_3v3>;
+                        status = "okay";
+
+                        phy0: ethernet-phy@0 {
+                                reg = <0>;
+                        };
+                };
+
+                pio: pinctrl@01c20800 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&hackberry_hogs>;
+
+                        hackberry_hogs: hogs@0 {
+                                allwinner,pins = "PH19";
+                                allwinner,function = "gpio_out";
+                                allwinner,drive = <0>;
+                                allwinner,pull = <0>;
+                        };
+                };
+
                 uart0: serial@01c28000 {
                         pinctrl-names = "default";
                         pinctrl-0 = <&uart0_pins_a>;
                         status = "okay";
                 };
         };
+
+        regulators {
+                compatible = "simple-bus";
+
+                reg_emac_3v3: emac-3v3 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "emac-3v3";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        enable-active-high;
+                        gpio = <&pio 7 19 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 82e03d22f913..b2bd6e124250 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -167,6 +167,22 @@
                 reg = <0x01c20000 0x300000>;
                 ranges;
 
+                emac: ethernet@01c0b000 {
+                        compatible = "allwinner,sun4i-emac";
+                        reg = <0x01c0b000 0x1000>;
+                        interrupts = <55>;
+                        clocks = <&ahb_gates 17>;
+                        status = "disabled";
+                };
+
+                mdio@01c0b080 {
+                        compatible = "allwinner,sun4i-mdio";
+                        reg = <0x01c0b080 0x14>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
                 intc: interrupt-controller@01c20400 {
                         compatible = "allwinner,sun4i-ic";
                         reg = <0x01c20400 0x400>;
@@ -226,6 +242,17 @@
                                 allwinner,drive = <0>;
                                 allwinner,pull = <0>;
                         };
+
+                        emac_pins_a: emac0@0 {
+                                allwinner,pins = "PA0", "PA1", "PA2",
+                                                "PA3", "PA4", "PA5", "PA6",
+                                                "PA7", "PA8", "PA9", "PA10",
+                                                "PA11", "PA12", "PA13", "PA14",
+                                                "PA15", "PA16";
+                                allwinner,function = "emac";
+                                allwinner,drive = <0>;
+                                allwinner,pull = <0>;
+                        };
                 };
 
                 timer@01c20c00 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index ab177b406b78..365760b33a26 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -828,6 +828,7 @@
                         regulator-name = "vdd_vbus_wup1";
                         regulator-min-microvolt = <5000000>;
                         regulator-max-microvolt = <5000000>;
+                        enable-active-high;
                         gpio = <&gpio 24 0>; /* PD0 */
                 };
         };
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 170159910455..ed4b901b0227 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -410,6 +410,7 @@
                         regulator-name = "usb1_vbus";
                         regulator-min-microvolt = <5000000>;
                         regulator-max-microvolt = <5000000>;
+                        enable-active-high;
                         gpio = <&gpio 170 0>; /* PV2 */
                 };
         };
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index ea078ab8edeb..ab67c94db280 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -586,6 +586,7 @@
                         regulator-name = "vbus1";
                         regulator-min-microvolt = <5000000>;
                         regulator-max-microvolt = <5000000>;
+                        enable-active-high;
                         gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
                 };
 
@@ -595,6 +596,7 @@
                         regulator-name = "vbus3";
                         regulator-min-microvolt = <5000000>;
                         regulator-max-microvolt = <5000000>;
+                        enable-active-high;
                         gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
                 };
         };
diff --git a/arch/arm/common/mcpm_platsmp.c b/arch/arm/common/mcpm_platsmp.c
index 510e5b13aa2e..1bc34c7567fd 100644
--- a/arch/arm/common/mcpm_platsmp.c
+++ b/arch/arm/common/mcpm_platsmp.c
@@ -19,7 +19,7 @@
 #include <asm/smp.h>
 #include <asm/smp_plat.h>
 
-static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned int mpidr, pcpu, pcluster, ret;
         extern void secondary_startup(void);
@@ -40,7 +40,7 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
         return 0;
 }
 
-static void __cpuinit mcpm_secondary_init(unsigned int cpu)
+static void mcpm_secondary_init(unsigned int cpu)
 {
         mcpm_cpu_powered_up();
 }
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index ddc740769601..023ee63827a2 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -28,8 +28,8 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
+#include <linux/sched_clock.h>
 
-#include <asm/sched_clock.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/timer-sp.h>
 
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index e3bf2d65618e..65edf6d47215 100644
--- a/arch/arm/configs/bcm_defconfig
+++ b/arch/arm/configs/bcm_defconfig
@@ -78,6 +78,13 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_TEST=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_BCM_KONA=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_TRIGGERS=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 340d550c12b0..fe0bdc361d2c 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -1,88 +1,167 @@
-CONFIG_EXPERIMENTAL=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_MACH_ARMADA_370=y
-CONFIG_ARCH_SIRF=y
 CONFIG_MACH_ARMADA_XP=y
+CONFIG_ARCH_BCM=y
+CONFIG_GPIO_PCA953X=y
 CONFIG_ARCH_HIGHBANK=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_ARCH_MXC=y
+CONFIG_MACH_IMX51_DT=y
+CONFIG_SOC_IMX53=y
+CONFIG_SOC_IMX6Q=y
+CONFIG_SOC_IMX6SL=y
+CONFIG_SOC_VF610=y
+CONFIG_ARCH_OMAP3=y
+CONFIG_ARCH_OMAP4=y
+CONFIG_SOC_OMAP5=y
+CONFIG_SOC_AM33XX=y
+CONFIG_SOC_AM43XX=y
+CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ARCH_SOCFPGA=y
-CONFIG_ARCH_SUNXI=y
-CONFIG_ARCH_WM8850=y
-# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
-CONFIG_ARCH_ZYNQ=y
-CONFIG_ARM_ERRATA_754322=y
 CONFIG_PLAT_SPEAR=y
 CONFIG_ARCH_SPEAR13XX=y
 CONFIG_MACH_SPEAR1310=y
 CONFIG_MACH_SPEAR1340=y
+CONFIG_ARCH_STI=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_SIRF=y
+CONFIG_ARCH_TEGRA=y
+CONFIG_ARCH_TEGRA_2x_SOC=y
+CONFIG_ARCH_TEGRA_3x_SOC=y
+CONFIG_ARCH_TEGRA_114_SOC=y
+CONFIG_TEGRA_PCI=y
+CONFIG_TEGRA_EMC_SCALING_ENABLE=y
+CONFIG_ARCH_U8500=y
+CONFIG_MACH_SNOWBALL=y
+CONFIG_MACH_UX500_DT=y
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_VEXPRESS_CA9X4=y
+CONFIG_ARCH_VIRT=y
+CONFIG_ARCH_WM8850=y
+CONFIG_ARCH_ZYNQ=y
 CONFIG_SMP=y
-CONFIG_ARM_ARCH_TIMER=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
 CONFIG_HIGHPTE=y
 CONFIG_ARM_APPENDED_DTB=y
-CONFIG_VFP=y
-CONFIG_NEON=y
 CONFIG_NET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_ATA=y
+CONFIG_SATA_AHCI_PLATFORM=y
 CONFIG_SATA_HIGHBANK=y
 CONFIG_SATA_MV=y
-CONFIG_SATA_AHCI_PLATFORM=y
 CONFIG_NETDEVICES=y
 CONFIG_SUN4I_EMAC=y
 CONFIG_NET_CALXEDA_XGMAC=y
 CONFIG_SMSC911X=y
 CONFIG_STMMAC_ETH=y
-CONFIG_SERIO_AMBAKMI=y
 CONFIG_MDIO_SUN4I=y
+CONFIG_KEYBOARD_SPEAR=y
+CONFIG_SERIO_AMBAKMI=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DW=y
-CONFIG_KEYBOARD_SPEAR=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_SIRFSOC=y
 CONFIG_SERIAL_SIRFSOC_CONSOLE=y
+CONFIG_SERIAL_TEGRA=y
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
 CONFIG_SERIAL_VT8500=y
 CONFIG_SERIAL_VT8500_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_OMAP=y
+CONFIG_SERIAL_OMAP_CONSOLE=y
 CONFIG_SERIAL_XILINX_PS_UART=y
 CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
-CONFIG_IPMI_HANDLER=y
-CONFIG_IPMI_SI=y
-CONFIG_I2C=y
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
 CONFIG_I2C_DESIGNWARE_PLATFORM=y
 CONFIG_I2C_SIRF=y
+CONFIG_I2C_TEGRA=y
 CONFIG_SPI=y
 CONFIG_SPI_PL022=y
 CONFIG_SPI_SIRF=y
-CONFIG_GPIO_PL061=y
-CONFIG_FB=y
+CONFIG_SPI_TEGRA114=y
+CONFIG_SPI_TEGRA20_SLINK=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_GPIO_TWL4030=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_AB8500=y
+CONFIG_REGULATOR_TPS51632=y
+CONFIG_REGULATOR_TPS62360=y
+CONFIG_REGULATOR_TWL4030=y
+CONFIG_REGULATOR_VEXPRESS=y
+CONFIG_DRM=y
+CONFIG_TEGRA_HOST1X=y
+CONFIG_DRM_TEGRA=y
 CONFIG_FB_ARMCLCD=y
 CONFIG_FB_WM8505=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FB_SIMPLE=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_EHCI_TEGRA=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
 CONFIG_USB_ISP1760_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_AB8500_USB=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_OMAP_USB2=y
+CONFIG_OMAP_USB3=y
+CONFIG_SAMSUNG_USB2PHY=y
+CONFIG_SAMSUNG_USB3PHY=y
+CONFIG_USB_GPIO_VBUS=y
+CONFIG_USB_ISP1301=y
+CONFIG_USB_MXS_PHY=y
 CONFIG_MMC=y
 CONFIG_MMC_ARMMMCI=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_TEGRA=y
 CONFIG_MMC_SDHCI_SPEAR=y
-CONFIG_MMC_WMT=y
+CONFIG_MMC_OMAP=y
+CONFIG_MMC_OMAP_HS=y
 CONFIG_EDAC=y
 CONFIG_EDAC_MM_EDAC=y
 CONFIG_EDAC_HIGHBANK_MC=y
 CONFIG_EDAC_HIGHBANK_L2=y
 CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_TWL4030=y
 CONFIG_RTC_DRV_PL031=y
 CONFIG_RTC_DRV_VT8500=y
-CONFIG_PWM=y
-CONFIG_PWM_VT8500=y
+CONFIG_RTC_DRV_TEGRA=y
 CONFIG_DMADEVICES=y
-CONFIG_PL330_DMA=y
-CONFIG_SIRF_DMA=y
 CONFIG_DW_DMAC=y
+CONFIG_TEGRA20_APB_DMA=y
+CONFIG_STE_DMA40=y
+CONFIG_SIRF_DMA=y
+CONFIG_TI_EDMA=y
+CONFIG_PL330_DMA=y
+CONFIG_IMX_SDMA=y
+CONFIG_IMX_DMA=y
+CONFIG_MXS_DMA=y
+CONFIG_DMA_OMAP=y
+CONFIG_PWM=y
+CONFIG_PWM_VT8500=y
+CONFIG_EXT4_FS=y
+CONFIG_TMPFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOCKUP_DETECTOR=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 2ac0ffb12f03..5339e6a4d639 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -22,6 +22,10 @@ CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_MULTI_V6=y
 CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_ARCH_OMAP2=y
+CONFIG_ARCH_OMAP3=y
+CONFIG_ARCH_OMAP4=y
+CONFIG_SOC_AM33XX=y
 CONFIG_OMAP_RESET_CLOCKS=y
 CONFIG_OMAP_MUX_DEBUG=y
 CONFIG_ARCH_VEXPRESS_CA9X4=y
@@ -34,6 +38,8 @@ CONFIG_NR_CPUS=2
 CONFIG_LEDS=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
 CONFIG_KEXEC=y
 CONFIG_FPE_NWFPE=y
@@ -152,6 +158,13 @@ CONFIG_W1=y
 CONFIG_POWER_SUPPLY=y
 CONFIG_SENSORS_LM75=m
 CONFIG_WATCHDOG=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_GOV_FAIR_SHARE=y
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_CPU_THERMAL=y
 CONFIG_OMAP_WATCHDOG=y
 CONFIG_TWL4030_WATCHDOG=y
 CONFIG_MFD_TPS65217=y
@@ -238,7 +251,13 @@ CONFIG_RTC_DRV_TWL92330=y
 CONFIG_RTC_DRV_TWL4030=y
 CONFIG_RTC_DRV_OMAP=y
 CONFIG_DMADEVICES=y
+CONFIG_TI_EDMA=y
 CONFIG_DMA_OMAP=y
+CONFIG_TI_SOC_THERMAL=y
+CONFIG_TI_THERMAL=y
+CONFIG_OMAP4_THERMAL=y
+CONFIG_OMAP5_THERMAL=y
+CONFIG_DRA752_THERMAL=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
@@ -286,3 +305,4 @@ CONFIG_SOC_OMAP5=y
 CONFIG_TI_DAVINCI_MDIO=y
 CONFIG_TI_DAVINCI_CPDMA=y
 CONFIG_TI_CPSW=y
+CONFIG_AT803X_PHY=y
diff --git a/arch/arm/configs/spear13xx_defconfig b/arch/arm/configs/spear13xx_defconfig
index 1fdb82694ca2..82eaa552ed14 100644
--- a/arch/arm/configs/spear13xx_defconfig
+++ b/arch/arm/configs/spear13xx_defconfig
@@ -61,7 +61,6 @@ CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_PL061=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
-CONFIG_MPCORE_WATCHDOG=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB=y
 # CONFIG_USB_DEVICE_CLASS is not set
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index c037aa1065b7..a0025dc13021 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -1,6 +1,8 @@
-CONFIG_EXPERIMENTAL=y
+CONFIG_HIGHMEM=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_MODULES=y
@@ -9,10 +11,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_U8500=y
 CONFIG_MACH_HREFV60=y
 CONFIG_MACH_SNOWBALL=y
-CONFIG_MACH_U5500=y
 CONFIG_MACH_UX500_DT=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_PREEMPT=y
@@ -20,6 +19,7 @@ CONFIG_AEABI=y
 CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_IDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_PM_RUNTIME=y
@@ -36,7 +36,6 @@ CONFIG_CAIF=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_AB8500_PWM=y
 CONFIG_SENSORS_BH1780=y
 CONFIG_NETDEVICES=y
 CONFIG_SMSC911X=y
@@ -60,35 +59,39 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
 CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_NOMADIK=y
 CONFIG_SPI=y
 CONFIG_SPI_PL022=y
 CONFIG_GPIO_STMPE=y
 CONFIG_GPIO_TC3589X=y
-# CONFIG_POWER_SUPPLY is not set
-# CONFIG_AB8500_BM is not set
-# CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL is not set
 CONFIG_THERMAL=y
 CONFIG_CPU_THERMAL=y
+CONFIG_WATCHDOG=y
 CONFIG_MFD_STMPE=y
 CONFIG_MFD_TC3589X=y
-CONFIG_AB5500_CORE=y
-CONFIG_AB8500_CORE=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_AB8500=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_GPIO=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB_GADGET=y
+CONFIG_REGULATOR_AB8500=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_UX500=y
+CONFIG_SND_SOC_UX500_MACH_MOP500=y
+CONFIG_USB=y
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_UX500=y
+CONFIG_USB_PHY=y
 CONFIG_AB8500_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MUSB_HDRC=y
+CONFIG_USB_ETH=m
 CONFIG_MMC=y
-CONFIG_MMC_CLKGATE=y
+CONFIG_MMC_UNSAFE_RESUME=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
 CONFIG_MMC_ARMMMCI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_LM3530=y
-CONFIG_LEDS_LP5521=y
 CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_LP5521=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
@@ -108,7 +111,6 @@ CONFIG_EXT4_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CONFIGFS_FS=m
 # CONFIG_MISC_FILESYSTEMS is not set
 CONFIG_NFS_FS=y
 CONFIG_ROOT_NFS=y
@@ -122,3 +124,7 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_FTRACE is not set
 CONFIG_DEBUG_USER=y
+CONFIG_CRYPTO_DEV_UX500=y
+CONFIG_CRYPTO_DEV_UX500_CRYP=y
+CONFIG_CRYPTO_DEV_UX500_HASH=y
+CONFIG_CRYPTO_DEV_UX500_DEBUG=y
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index accefe099182..e406d575c94f 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -89,7 +89,7 @@ static inline u64 arch_counter_get_cntvct(void)
         return cval;
 }
 
-static inline void __cpuinit arch_counter_set_user_access(void)
+static inline void arch_counter_set_user_access(void)
 {
         u32 cntkctl;
 
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index ed94b1a366ae..423744bf18eb 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -223,11 +223,12 @@ extern int iop3xx_get_init_atu(void);
 #ifndef __ASSEMBLY__
 
 #include <linux/types.h>
+#include <linux/reboot.h>
 
 void iop3xx_map_io(void);
 void iop_init_cp6_handler(void);
 void iop_init_time(unsigned long tickrate);
-void iop3xx_restart(char, const char *);
+void iop3xx_restart(enum reboot_mode, const char *);
 
 static inline u32 read_tmr0(void)
 {
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 75bf07910b81..441efc491b50 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -11,6 +11,7 @@
 #include <linux/types.h>
 
 #ifndef __ASSEMBLY__
+#include <linux/reboot.h>
 
 struct tag;
 struct meminfo;
@@ -43,7 +44,7 @@ struct machine_desc {
         unsigned char           reserve_lp0 :1; /* never has lp0        */
         unsigned char           reserve_lp1 :1; /* never has lp1        */
         unsigned char           reserve_lp2 :1; /* never has lp2        */
-        char                    restart_mode;   /* default restart mode */
+        enum reboot_mode        reboot_mode;    /* default restart mode */
         struct smp_operations   *smp;           /* SMP operations       */
         bool                    (*smp_init)(void);
         void                    (*fixup)(struct tag *, char **,
@@ -58,7 +59,7 @@ struct machine_desc {
 #ifdef CONFIG_MULTI_IRQ_HANDLER
         void                    (*handle_irq)(struct pt_regs *);
 #endif
-        void                    (*restart)(char, const char *);
+        void                    (*restart)(enum reboot_mode, const char *);
 };
 
 /*
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index 3d520ddca61b..2389b71a8e7c 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -1,16 +1,4 @@
-/*
- * sched_clock.h: support for extending counters to full 64-bit ns counter
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+/* You shouldn't include this file. Use linux/sched_clock.h instead.
+ * Temporary file until all asm/sched_clock.h users are gone
  */
-#ifndef ASM_SCHED_CLOCK
-#define ASM_SCHED_CLOCK
-
-extern void sched_clock_postinit(void);
-extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
-
-extern unsigned long long (*sched_clock_func)(void);
-
-#endif
+#include <linux/sched_clock.h>
diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h
index 18d169373612..0393fbab8dd5 100644
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@ -23,10 +23,21 @@ static inline unsigned long scu_a9_get_base(void)
         return pa;
 }
 
+#ifdef CONFIG_HAVE_ARM_SCU
 unsigned int scu_get_core_count(void __iomem *);
 int scu_power_mode(void __iomem *, unsigned int);
+#else
+static inline unsigned int scu_get_core_count(void __iomem *scu_base)
+{
+        return 0;
+}
+static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode)
+{
+        return -EINVAL;
+}
+#endif
 
-#ifdef CONFIG_SMP
+#if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
 void scu_enable(void __iomem *scu_base);
 #else
 static inline void scu_enable(void __iomem *scu_base) {}
diff --git a/arch/arm/include/asm/system_misc.h b/arch/arm/include/asm/system_misc.h
index 21a23e378bbe..a3d61ad984af 100644
--- a/arch/arm/include/asm/system_misc.h
+++ b/arch/arm/include/asm/system_misc.h
@@ -6,11 +6,12 @@
 #include <linux/compiler.h>
 #include <linux/linkage.h>
 #include <linux/irqflags.h>
+#include <linux/reboot.h>
 
 extern void cpu_init(void);
 
 void soft_restart(unsigned long);
-extern void (*arm_pm_restart)(char str, const char *cmd);
+extern void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
 extern void (*arm_pm_idle)(void);
 
 #define UDBG_UNDEFINED  (1 << 0)
diff --git a/arch/arm/include/asm/xen/hypercall.h b/arch/arm/include/asm/xen/hypercall.h
index 799f42ecca63..7704e28c3483 100644
--- a/arch/arm/include/asm/xen/hypercall.h
+++ b/arch/arm/include/asm/xen/hypercall.h
@@ -47,6 +47,7 @@ unsigned long HYPERVISOR_hvm_op(int op, void *arg);
 int HYPERVISOR_memory_op(unsigned int cmd, void *arg);
 int HYPERVISOR_physdev_op(int cmd, void *arg);
 int HYPERVISOR_vcpu_op(int cmd, int vcpuid, void *extra_args);
+int HYPERVISOR_tmem_op(void *arg);
 
 static inline void
 MULTI_update_va_mapping(struct multicall_entry *mcl, unsigned long va,
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index fccfbdb03df1..86d10dd47dc4 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -16,7 +16,7 @@ CFLAGS_REMOVE_return_address.o = -pg
 # Object file lists.
 
 obj-y           := elf.o entry-common.o irq.o opcodes.o \
-                   process.o ptrace.o return_address.o sched_clock.o \
+                   process.o ptrace.o return_address.o \
                    setup.o signal.o stacktrace.o sys_arm.o time.o traps.o
 
 obj-$(CONFIG_ATAGS)             += atags_parse.o
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index 59dcdced6e30..221f07b11ccb 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -11,9 +11,9 @@
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/errno.h>
+#include <linux/sched_clock.h>
 
 #include <asm/delay.h>
-#include <asm/sched_clock.h>
 
 #include <clocksource/arm_arch_timer.h>
 
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 5b391a689b47..47cd974e57ea 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -133,6 +133,9 @@ ENTRY(lookup_processor_type)
         ldmfd   sp!, {r4 - r6, r9, pc}
 ENDPROC(lookup_processor_type)
 
+        __FINIT
+        .text
+
 /*
  * Read processor ID register (CP#15, CR0), and look up in the linker-built
  * supported processor list.  Note that we can't use the absolute addresses
@@ -146,7 +149,6 @@ ENDPROC(lookup_processor_type)
  *      r5 = proc_info pointer in physical address space
  *      r9 = cpuid (preserved)
  */
-        __CPUINIT
 __lookup_processor_type:
         adr     r3, __lookup_processor_type_data
         ldmia   r3, {r4 - r6}
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 75f14cc3e073..b361de143756 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -87,7 +87,6 @@ ENTRY(stext)
 ENDPROC(stext)
 
 #ifdef CONFIG_SMP
-        __CPUINIT
 ENTRY(secondary_startup)
         /*
          * Common entry point for secondary CPUs.
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 45e8935cae4e..9cf6063020ae 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -343,7 +343,6 @@ __turn_mmu_on_loc:
         .long   __turn_mmu_on_end
 
 #if defined(CONFIG_SMP)
-        __CPUINIT
 ENTRY(secondary_startup)
         /*
          * Common entry point for secondary CPUs.
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 1fd749ee4a1b..7b95de601357 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1020,7 +1020,7 @@ out_mdbgen:
                 cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
 }
 
-static int __cpuinit dbg_reset_notify(struct notifier_block *self,
+static int dbg_reset_notify(struct notifier_block *self,
                                       unsigned long action, void *cpu)
 {
         if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
@@ -1029,7 +1029,7 @@ static int __cpuinit dbg_reset_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata dbg_reset_nb = {
+static struct notifier_block dbg_reset_nb = {
         .notifier_call = dbg_reset_notify,
 };
 
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index 1f2740e3dbc0..aebe0e99c153 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -157,8 +157,8 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
  * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
  * junk values out of them.
  */
-static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
-                                    unsigned long action, void *hcpu)
+static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
+                          void *hcpu)
 {
         if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
                 return NOTIFY_DONE;
@@ -171,7 +171,7 @@ static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
+static struct notifier_block cpu_pmu_hotplug_notifier = {
         .notifier_call = cpu_pmu_notify,
 };
 
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 7f1efcd4a6e9..d3ca4f6915af 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -32,6 +32,7 @@
 #include <linux/hw_breakpoint.h>
 #include <linux/cpuidle.h>
 #include <linux/leds.h>
+#include <linux/reboot.h>
 
 #include <asm/cacheflush.h>
 #include <asm/idmap.h>
@@ -113,7 +114,7 @@ void soft_restart(unsigned long addr)
         BUG();
 }
 
-static void null_restart(char mode, const char *cmd)
+static void null_restart(enum reboot_mode reboot_mode, const char *cmd)
 {
 }
 
@@ -123,7 +124,7 @@ static void null_restart(char mode, const char *cmd)
 void (*pm_power_off)(void);
 EXPORT_SYMBOL(pm_power_off);
 
-void (*arm_pm_restart)(char str, const char *cmd) = null_restart;
+void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd) = null_restart;
 EXPORT_SYMBOL_GPL(arm_pm_restart);
 
 /*
@@ -175,16 +176,6 @@ void arch_cpu_idle(void)
                 default_idle();
 }
 
-static char reboot_mode = 'h';
-
-int __init reboot_setup(char *str)
-{
-        reboot_mode = str[0];
-        return 1;
-}
-
-__setup("reboot=", reboot_setup);
-
 /*
  * Called by kexec, immediately prior to machine_kexec().
  *
diff --git a/arch/arm/kernel/psci_smp.c b/arch/arm/kernel/psci_smp.c
index 219f1d73572a..70ded3fb42d9 100644
--- a/arch/arm/kernel/psci_smp.c
+++ b/arch/arm/kernel/psci_smp.c
@@ -46,8 +46,7 @@
 
 extern void secondary_startup(void);
 
-static int __cpuinit psci_boot_secondary(unsigned int cpu,
-                                         struct task_struct *idle)
+static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         if (psci_ops.cpu_on)
                 return psci_ops.cpu_on(cpu_logical_map(cpu),
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 2bc1514d6dbe..0dd3b79b15c3 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -886,20 +886,12 @@ long arch_ptrace(struct task_struct *child, long request,
 
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
                 case PTRACE_GETHBPREGS:
-                        if (ptrace_get_breakpoints(child) < 0)
-                                return -ESRCH;
-
                         ret = ptrace_gethbpregs(child, addr,
                                                 (unsigned long __user *)data);
-                        ptrace_put_breakpoints(child);
                         break;
                 case PTRACE_SETHBPREGS:
-                        if (ptrace_get_breakpoints(child) < 0)
-                                return -ESRCH;
-
                         ret = ptrace_sethbpregs(child, addr,
                                                 (unsigned long __user *)data);
-                        ptrace_put_breakpoints(child);
                         break;
 #endif
 
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
deleted file mode 100644
index e8edcaa0e432..000000000000
--- a/arch/arm/kernel/sched_clock.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * sched_clock.c: support for extending counters to full 64-bit ns counter
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/clocksource.h>
-#include <linux/init.h>
-#include <linux/jiffies.h>
-#include <linux/kernel.h>
-#include <linux/moduleparam.h>
-#include <linux/sched.h>
-#include <linux/syscore_ops.h>
-#include <linux/timer.h>
-
-#include <asm/sched_clock.h>
-
-struct clock_data {
-        u64 epoch_ns;
-        u32 epoch_cyc;
-        u32 epoch_cyc_copy;
-        unsigned long rate;
-        u32 mult;
-        u32 shift;
-        bool suspended;
-        bool needs_suspend;
-};
-
-static void sched_clock_poll(unsigned long wrap_ticks);
-static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
-static int irqtime = -1;
-
-core_param(irqtime, irqtime, int, 0400);
-
-static struct clock_data cd = {
-        .mult   = NSEC_PER_SEC / HZ,
-};
-
-static u32 __read_mostly sched_clock_mask = 0xffffffff;
-
-static u32 notrace jiffy_sched_clock_read(void)
-{
-        return (u32)(jiffies - INITIAL_JIFFIES);
-}
-
-static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
-
-static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
-{
-        return (cyc * mult) >> shift;
-}
-
-static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask)
-{
-        u64 epoch_ns;
-        u32 epoch_cyc;
-
-        if (cd.suspended)
-                return cd.epoch_ns;
-
-        /*
-         * Load the epoch_cyc and epoch_ns atomically.  We do this by
-         * ensuring that we always write epoch_cyc, epoch_ns and
-         * epoch_cyc_copy in strict order, and read them in strict order.
-         * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
-         * the middle of an update, and we should repeat the load.
-         */
-        do {
-                epoch_cyc = cd.epoch_cyc;
-                smp_rmb();
-                epoch_ns = cd.epoch_ns;
-                smp_rmb();
-        } while (epoch_cyc != cd.epoch_cyc_copy);
-
-        return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift);
-}
-
-/*
- * Atomically update the sched_clock epoch.
- */
-static void notrace update_sched_clock(void)
-{
-        unsigned long flags;
-        u32 cyc;
-        u64 ns;
-
-        cyc = read_sched_clock();
-        ns = cd.epoch_ns +
-                cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask,
-                          cd.mult, cd.shift);
-        /*
-         * Write epoch_cyc and epoch_ns in a way that the update is
-         * detectable in cyc_to_fixed_sched_clock().
-         */
-        raw_local_irq_save(flags);
-        cd.epoch_cyc_copy = cyc;
-        smp_wmb();
-        cd.epoch_ns = ns;
-        smp_wmb();
-        cd.epoch_cyc = cyc;
-        raw_local_irq_restore(flags);
-}
-
-static void sched_clock_poll(unsigned long wrap_ticks)
-{
-        mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks));
-        update_sched_clock();
-}
-
-void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
-{
-        unsigned long r, w;
-        u64 res, wrap;
-        char r_unit;
-
-        if (cd.rate > rate)
-                return;
-
-        BUG_ON(bits > 32);
-        WARN_ON(!irqs_disabled());
-        read_sched_clock = read;
-        sched_clock_mask = (1 << bits) - 1;
-        cd.rate = rate;
-
-        /* calculate the mult/shift to convert counter ticks to ns. */
-        clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0);
-
-        r = rate;
-        if (r >= 4000000) {
-                r /= 1000000;
-                r_unit = 'M';
-        } else if (r >= 1000) {
-                r /= 1000;
-                r_unit = 'k';
-        } else
-                r_unit = ' ';
-
-        /* calculate how many ns until we wrap */
-        wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift);
-        do_div(wrap, NSEC_PER_MSEC);
-        w = wrap;
-
-        /* calculate the ns resolution of this counter */
-        res = cyc_to_ns(1ULL, cd.mult, cd.shift);
-        pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n",
-                bits, r, r_unit, res, w);
-
-        /*
-         * Start the timer to keep sched_clock() properly updated and
-         * sets the initial epoch.
-         */
-        sched_clock_timer.data = msecs_to_jiffies(w - (w / 10));
-        update_sched_clock();
-
-        /*
-         * Ensure that sched_clock() starts off at 0ns
-         */
-        cd.epoch_ns = 0;
-
-        /* Enable IRQ time accounting if we have a fast enough sched_clock */
-        if (irqtime > 0 || (irqtime == -1 && rate >= 1000000))
-                enable_sched_clock_irqtime();
-
-        pr_debug("Registered %pF as sched_clock source\n", read);
-}
-
-static unsigned long long notrace sched_clock_32(void)
-{
-        u32 cyc = read_sched_clock();
-        return cyc_to_sched_clock(cyc, sched_clock_mask);
-}
-
-unsigned long long __read_mostly (*sched_clock_func)(void) = sched_clock_32;
-
-unsigned long long notrace sched_clock(void)
-{
-        return sched_clock_func();
-}
-
-void __init sched_clock_postinit(void)
-{
-        /*
-         * If no sched_clock function has been provided at that point,
-         * make it the final one one.
-         */
-        if (read_sched_clock == jiffy_sched_clock_read)
-                setup_sched_clock(jiffy_sched_clock_read, 32, HZ);
-
-        sched_clock_poll(sched_clock_timer.data);
-}
-
-static int sched_clock_suspend(void)
-{
-        sched_clock_poll(sched_clock_timer.data);
-        cd.suspended = true;
-        return 0;
-}
-
-static void sched_clock_resume(void)
-{
-        cd.epoch_cyc = read_sched_clock();
-        cd.epoch_cyc_copy = cd.epoch_cyc;
-        cd.suspended = false;
-}
-
-static struct syscore_ops sched_clock_ops = {
-        .suspend = sched_clock_suspend,
-        .resume = sched_clock_resume,
-};
-
-static int __init sched_clock_syscore_init(void)
-{
-        register_syscore_ops(&sched_clock_ops);
-        return 0;
-}
-device_initcall(sched_clock_syscore_init);
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 9b653278c9e8..63af9a7ae512 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -74,7 +74,7 @@ __setup("fpe=", fpe_setup);
 
 extern void paging_init(struct machine_desc *desc);
 extern void sanity_check_meminfo(void);
-extern void reboot_setup(char *str);
+extern enum reboot_mode reboot_mode;
 extern void setup_dma_zone(struct machine_desc *desc);
 
 unsigned int processor_id;
@@ -861,8 +861,8 @@ void __init setup_arch(char **cmdline_p)
 
         setup_dma_zone(mdesc);
 
-        if (mdesc->restart_mode)
-                reboot_setup(&mdesc->restart_mode);
+        if (mdesc->reboot_mode != REBOOT_HARD)
+                reboot_mode = mdesc->reboot_mode;
 
         init_mm.start_code = (unsigned long) _text;
         init_mm.end_code   = (unsigned long) _etext;
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index c5fb5469054b..c2b4f8f0be9a 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -58,7 +58,7 @@ struct secondary_data secondary_data;
  * control for which core is the next to come out of the secondary
  * boot "holding pen"
  */
-volatile int __cpuinitdata pen_release = -1;
+volatile int pen_release = -1;
 
 enum ipi_msg_type {
         IPI_WAKEUP,
@@ -86,7 +86,7 @@ static unsigned long get_arch_pgd(pgd_t *pgd)
         return pgdir >> ARCH_PGD_SHIFT;
 }
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
+int __cpu_up(unsigned int cpu, struct task_struct *idle)
 {
         int ret;
 
@@ -138,7 +138,7 @@ void __init smp_init_cpus(void)
                 smp_ops.smp_init_cpus();
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+int boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         if (smp_ops.smp_boot_secondary)
                 return smp_ops.smp_boot_secondary(cpu, idle);
@@ -170,7 +170,7 @@ static int platform_cpu_disable(unsigned int cpu)
 /*
  * __cpu_disable runs on the processor to be shutdown.
  */
-int __cpuinit __cpu_disable(void)
+int __cpu_disable(void)
 {
         unsigned int cpu = smp_processor_id();
         int ret;
@@ -216,7 +216,7 @@ static DECLARE_COMPLETION(cpu_died);
  * called on the thread which is asking for a CPU to be shutdown -
  * waits until shutdown has completed, or it is timed out.
  */
-void __cpuinit __cpu_die(unsigned int cpu)
+void __cpu_die(unsigned int cpu)
 {
         if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
                 pr_err("CPU%u: cpu didn't die\n", cpu);
@@ -306,7 +306,7 @@ void __ref cpu_die(void)
  * Called by both boot and secondaries to move global data into
  * per-processor storage.
  */
-static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
+static void smp_store_cpu_info(unsigned int cpuid)
 {
         struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
 
@@ -322,7 +322,7 @@ static void percpu_timer_setup(void);
  * This is the secondary CPU boot entry.  We're using this CPUs
  * idle thread stack, but a set of temporary page tables.
  */
-asmlinkage void __cpuinit secondary_start_kernel(void)
+asmlinkage void secondary_start_kernel(void)
 {
         struct mm_struct *mm = &init_mm;
         unsigned int cpu;
@@ -521,7 +521,7 @@ static void broadcast_timer_set_mode(enum clock_event_mode mode,
 {
 }
 
-static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
+static void broadcast_timer_setup(struct clock_event_device *evt)
 {
         evt->name       = "dummy_timer";
         evt->features   = CLOCK_EVT_FEAT_ONESHOT |
@@ -550,7 +550,7 @@ int local_timer_register(struct local_timer_ops *ops)
 }
 #endif
 
-static void __cpuinit percpu_timer_setup(void)
+static void percpu_timer_setup(void)
 {
         unsigned int cpu = smp_processor_id();
         struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 90525d9d290b..25956204ef23 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -120,7 +120,7 @@ static int twd_rate_change(struct notifier_block *nb,
          * changing cpu.
          */
         if (flags == POST_RATE_CHANGE)
-                smp_call_function(twd_update_frequency,
+                on_each_cpu(twd_update_frequency,
                                   (void *)&cnd->new_rate, 1);
 
         return NOTIFY_OK;
@@ -187,7 +187,7 @@ core_initcall(twd_cpufreq_init);
 
 #endif
 
-static void __cpuinit twd_calibrate_rate(void)
+static void twd_calibrate_rate(void)
 {
         unsigned long count;
         u64 waitjiffies;
@@ -265,7 +265,7 @@ static void twd_get_clock(struct device_node *np)
 /*
  * Setup the local clock events for a CPU.
  */
-static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
+static int twd_timer_setup(struct clock_event_device *clk)
 {
         struct clock_event_device **this_cpu_clk;
         int cpu = smp_processor_id();
@@ -308,7 +308,7 @@ static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
         return 0;
 }
 
-static struct local_timer_ops twd_lt_ops __cpuinitdata = {
+static struct local_timer_ops twd_lt_ops = {
         .setup  = twd_timer_setup,
         .stop   = twd_timer_stop,
 };
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index abff4e9aaee0..98aee3258398 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -24,9 +24,9 @@
 #include <linux/timer.h>
 #include <linux/clocksource.h>
 #include <linux/irq.h>
+#include <linux/sched_clock.h>
 
 #include <asm/thread_info.h>
-#include <asm/sched_clock.h>
 #include <asm/stacktrace.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -120,6 +120,4 @@ void __init time_init(void)
                 machine_desc->init_time();
         else
                 clocksource_of_init();
-
-        sched_clock_postinit();
 }
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index 64dbfa57204a..5306de350133 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -86,7 +86,7 @@ void __init register_current_timer_delay(const struct delay_timer *timer)
         }
 }
 
-unsigned long __cpuinit calibrate_delay_is_known(void)
+unsigned long calibrate_delay_is_known(void)
 {
         delay_calibrated = true;
         return lpj_fine;
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 9eb574397ee1..4aad93d54d6f 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/reboot.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -304,7 +305,7 @@ static void at91rm9200_idle(void)
         at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
 }
 
-static void at91rm9200_restart(char mode, const char *cmd)
+static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd)
 {
         /*
          * Perform a hardware reset with the use of the Watchdog timer.
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index f6de36aefe85..dc6e2f5f804d 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -10,6 +10,7 @@
 
 #include <linux/clkdev.h>
 #include <linux/of.h>
+#include <linux/reboot.h>
 
  /* Map io */
 extern void __init at91_map_io(void);
@@ -60,8 +61,8 @@ extern void at91sam9_idle(void);
 
 /* reset */
 extern void at91_ioremap_rstc(u32 base_addr);
-extern void at91sam9_alt_restart(char, const char *);
-extern void at91sam9g45_restart(char, const char *);
+extern void at91sam9_alt_restart(enum reboot_mode, const char *);
+extern void at91sam9g45_restart(enum reboot_mode, const char *);
 
 /* shutdown */
 extern void at91_ioremap_shdwc(u32 base_addr);
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index 740fa9ebe249..40686d7ef500 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -53,7 +53,7 @@ static void bcm2835_setup_restart(void)
         WARN(!wdt_regs, "failed to remap watchdog regs");
 }
 
-static void bcm2835_restart(char mode, const char *cmd)
+static void bcm2835_restart(enum reboot_mode mode, const char *cmd)
 {
         u32 val;
 
@@ -91,7 +91,7 @@ static void bcm2835_power_off(void)
         writel_relaxed(val, wdt_regs + PM_RSTS);
 
         /* Continue with normal reset mechanism */
-        bcm2835_restart(0, "");
+        bcm2835_restart(REBOOT_HARD, "");
 }
 
 static struct map_desc io_map __initdata = {
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index f6d1746366d4..4ca2f3ca2de4 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -384,7 +384,7 @@ void __init clps711x_timer_init(void)
         setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
 }
 
-void clps711x_restart(char mode, const char *cmd)
+void clps711x_restart(enum reboot_mode mode, const char *cmd)
 {
         soft_restart(0);
 }
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index 2a22f4c6cc75..9a6767bfdc47 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -4,6 +4,8 @@
  * Common bits.
  */
 
+#include <linux/reboot.h>
+
 #define CLPS711X_NR_IRQS        (33)
 #define CLPS711X_NR_GPIO        (4 * 8 + 3)
 #define CLPS711X_GPIO(prt, bit) ((prt) * 8 + (bit))
@@ -12,5 +14,5 @@ extern void clps711x_map_io(void);
 extern void clps711x_init_irq(void);
 extern void clps711x_timer_init(void);
 extern void clps711x_handle_irq(struct pt_regs *regs);
-extern void clps711x_restart(char mode, const char *cmd);
+extern void clps711x_restart(enum reboot_mode mode, const char *cmd);
 extern void clps711x_init_early(void);
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h
index b23b17b4da10..5218b6198dc2 100644
--- a/arch/arm/mach-cns3xxx/core.h
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -11,6 +11,8 @@
 #ifndef __CNS3XXX_CORE_H
 #define __CNS3XXX_CORE_H
 
+#include <linux/reboot.h>
+
 extern void cns3xxx_timer_init(void);
 
 #ifdef CONFIG_CACHE_L2X0
@@ -22,6 +24,6 @@ static inline void cns3xxx_l2x0_init(void) {}
 void __init cns3xxx_map_io(void);
 void __init cns3xxx_init_irq(void);
 void cns3xxx_power_off(void);
-void cns3xxx_restart(char, const char *);
+void cns3xxx_restart(enum reboot_mode, const char *);
 
 #endif /* __CNS3XXX_CORE_H */
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 79e3d47aad65..fb38c726e987 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -89,7 +89,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block)
 }
 EXPORT_SYMBOL(cns3xxx_pwr_soft_rst);
 
-void cns3xxx_restart(char mode, const char *cmd)
+void cns3xxx_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * To reset, we hit the on-board reset register
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index fd38c8d22e3c..afbc439f11d4 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -509,7 +509,6 @@ struct ths7303_platform_data ths7303_pdata = {
         .ch_1 = 3,
         .ch_2 = 3,
         .ch_3 = 3,
-        .init_enable = 1,
 };
 
 static struct amp_config_info vpbe_amp = {
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index eb254fe861ac..71a46a348761 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -16,6 +16,7 @@
 #include <linux/serial_8250.h>
 #include <linux/ahci_platform.h>
 #include <linux/clk.h>
+#include <linux/reboot.h>
 
 #include <mach/cputype.h>
 #include <mach/common.h>
@@ -366,7 +367,7 @@ static struct platform_device da8xx_wdt_device = {
         .resource       = da8xx_watchdog_resources,
 };
 
-void da8xx_restart(char mode, const char *cmd)
+void da8xx_restart(enum reboot_mode mode, const char *cmd)
 {
         struct device *dev;
 
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 90b83d00fe2b..111573c0aad1 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -13,6 +13,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
 
 #include <mach/hardware.h>
 #include <linux/platform_data/i2c-davinci.h>
@@ -307,7 +308,7 @@ struct platform_device davinci_wdt_device = {
         .resource       = wdt_resources,
 };
 
-void davinci_restart(char mode, const char *cmd)
+void davinci_restart(enum reboot_mode mode, const char *cmd)
 {
         davinci_watchdog_reset(&davinci_wdt_device);
 }
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index b124b77c90c5..cce316b92c06 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -14,6 +14,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/reboot.h>
 
 extern void davinci_timer_init(void);
 
@@ -81,7 +82,7 @@ extern struct davinci_soc_info davinci_soc_info;
 
 extern void davinci_common_init(struct davinci_soc_info *soc_info);
 extern void davinci_init_ide(void);
-void davinci_restart(char mode, const char *cmd);
+void davinci_restart(enum reboot_mode mode, const char *cmd);
 void davinci_init_late(void);
 
 #ifdef CONFIG_DAVINCI_RESET_CLOCKS
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 3c797e2272f8..7b41a5e9bc31 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -17,6 +17,7 @@
 #include <linux/davinci_emac.h>
 #include <linux/spi/spi.h>
 #include <linux/platform_data/davinci_asp.h>
+#include <linux/reboot.h>
 #include <linux/videodev2.h>
 
 #include <mach/serial.h>
@@ -106,7 +107,7 @@ int da850_register_vpif_display
                         (struct vpif_display_config *display_config);
 int da850_register_vpif_capture
                         (struct vpif_capture_config *capture_config);
-void da8xx_restart(char mode, const char *cmd);
+void da8xx_restart(enum reboot_mode mode, const char *cmd);
 void da8xx_rproc_reserve_cma(void);
 int da8xx_register_rproc(void);
 
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index 366e975effa8..16314c64f755 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -35,6 +35,7 @@
 #include <linux/serial_8250.h>
 #include <linux/input/matrix_keypad.h>
 #include <linux/mfd/ti_ssp.h>
+#include <linux/reboot.h>
 
 #include <linux/platform_data/mmc-davinci.h>
 #include <linux/platform_data/mtd-davinci.h>
@@ -54,7 +55,7 @@ extern struct platform_device tnetv107x_serial_device;
 extern void tnetv107x_init(void);
 extern void tnetv107x_devices_init(struct tnetv107x_device_info *);
 extern void tnetv107x_irq_init(void);
-void tnetv107x_restart(char mode, const char *cmd);
+void tnetv107x_restart(enum reboot_mode mode, const char *cmd);
 
 #endif
 
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index bad361ec1666..7a55b5c95971 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -18,8 +18,8 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/platform_device.h>
+#include <linux/sched_clock.h>
 
-#include <asm/sched_clock.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index 3b2a70d43efa..4545667ecd3c 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 #include <linux/err.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 
 #include <asm/mach/map.h>
 
@@ -730,7 +731,7 @@ static void tnetv107x_watchdog_reset(struct platform_device *pdev)
         __raw_writel(1, &regs->kick);
 }
 
-void tnetv107x_restart(char mode, const char *cmd)
+void tnetv107x_restart(enum reboot_mode mode, const char *cmd)
 {
         tnetv107x_watchdog_reset(&tnetv107x_wdt_device);
 }
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 2a9443d04d92..00247c771313 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -381,7 +381,7 @@ void __init dove_init(void)
         dove_xor1_init();
 }
 
-void dove_restart(char mode, const char *cmd)
+void dove_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Enable soft reset to assert RSTOUTn.
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index e86347928b67..1d725224d146 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -11,6 +11,8 @@
 #ifndef __ARCH_DOVE_COMMON_H
 #define __ARCH_DOVE_COMMON_H
 
+#include <linux/reboot.h>
+
 struct mv643xx_eth_platform_data;
 struct mv_sata_platform_data;
 
@@ -42,6 +44,6 @@ void dove_spi1_init(void);
 void dove_i2c_init(void);
 void dove_sdio0_init(void);
 void dove_sdio1_init(void);
-void dove_restart(char, const char *);
+void dove_restart(enum reboot_mode, const char *);
 
 #endif
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 99f259e8cf33..5362df3df89f 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -26,6 +26,7 @@
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE + 0x010c)
 #define  SOFT_RESET             0x00000001
 
+#define BRIDGE_CAUSE            (BRIDGE_VIRT_BASE + 0x0110)
 #define  BRIDGE_INT_TIMER1_CLR  (~0x0004)
 
 #define IRQ_VIRT_BASE           (BRIDGE_VIRT_BASE + 0x0200)
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 8a53f346cdb3..68ac934d4565 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -311,7 +311,7 @@ static int __init ebsa110_init(void)
 
 arch_initcall(ebsa110_init);
 
-static void ebsa110_restart(char mode, const char *cmd)
+static void ebsa110_restart(enum reboot_mode mode, const char *cmd)
 {
         soft_restart(0x80000000);
 }
@@ -321,7 +321,6 @@ MACHINE_START(EBSA110, "EBSA110")
         .atag_offset    = 0x400,
         .reserve_lp0    = 1,
         .reserve_lp2    = 1,
-        .restart_mode   = 's',
         .map_io         = ebsa110_map_io,
         .init_early     = ebsa110_init_early,
         .init_irq       = ebsa110_init_irq,
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index c49ed3dc1aea..df8612fbbc9c 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -35,6 +35,7 @@
 #include <linux/spi/spi.h>
 #include <linux/export.h>
 #include <linux/irqchip/arm-vic.h>
+#include <linux/reboot.h>
 
 #include <mach/hardware.h>
 #include <linux/platform_data/video-ep93xx.h>
@@ -921,7 +922,7 @@ void __init ep93xx_init_devices(void)
         gpio_led_register_device(-1, &ep93xx_led_data);
 }
 
-void ep93xx_restart(char mode, const char *cmd)
+void ep93xx_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Set then clear the SWRST bit to initiate a software reset
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index a14e1b37beff..e256e0baec2e 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -4,6 +4,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/reboot.h>
+
 struct i2c_gpio_platform_data;
 struct i2c_board_info;
 struct spi_board_info;
@@ -55,7 +57,7 @@ void ep93xx_ide_release_gpio(struct platform_device *pdev);
 void ep93xx_init_devices(void);
 extern void ep93xx_timer_init(void);
 
-void ep93xx_restart(char, const char *);
+void ep93xx_restart(enum reboot_mode, const char *);
 void ep93xx_init_late(void);
 
 #ifdef CONFIG_CRUNCH
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index f5f65b58181e..855d4a7b462d 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -38,7 +38,7 @@ config CPU_EXYNOS4210
         depends on ARCH_EXYNOS4
         select ARM_CPU_SUSPEND if PM
         select PINCTRL_EXYNOS
-        select PM_GENERIC_DOMAINS
+        select PM_GENERIC_DOMAINS if PM
         select S5P_PM if PM
         select S5P_SLEEP if PM
         select SAMSUNG_DMADEV
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 2c655db4b78e..164685bd25c8 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -285,12 +285,12 @@ static struct map_desc exynos5440_iodesc0[] __initdata = {
         },
 };
 
-void exynos4_restart(char mode, const char *cmd)
+void exynos4_restart(enum reboot_mode mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
 }
 
-void exynos5_restart(char mode, const char *cmd)
+void exynos5_restart(enum reboot_mode mode, const char *cmd)
 {
         struct device_node *np;
         u32 val;
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 38d45fd23be4..3e156bcddcb4 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -12,6 +12,7 @@
 #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
 #define __ARCH_ARM_MACH_EXYNOS_COMMON_H
 
+#include <linux/reboot.h>
 #include <linux/of.h>
 
 void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
@@ -20,8 +21,8 @@ extern unsigned long xxti_f, xusbxti_f;
 
 struct map_desc;
 void exynos_init_io(void);
-void exynos4_restart(char mode, const char *cmd);
-void exynos5_restart(char mode, const char *cmd);
+void exynos4_restart(enum reboot_mode mode, const char *cmd);
+void exynos5_restart(enum reboot_mode mode, const char *cmd);
 void exynos_init_late(void);
 
 /* ToDo: remove these after migrating legacy exynos4 platforms to dt */
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index 5364d4bfa8bc..cdd9d91e9933 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -13,8 +13,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 /*
  * exynos4 specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index deba1308ff16..58b43e6f9262 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -75,7 +75,7 @@ static void __iomem *scu_base_addr(void)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-static void __cpuinit exynos_secondary_init(unsigned int cpu)
+static void exynos_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -90,7 +90,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
         unsigned long phys_cpu = cpu_logical_map(cpu);
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 6987a09ec219..9669cc0b6318 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -86,7 +86,7 @@ fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi)
 MACHINE_START(CATS, "Chalice-CATS")
         /* Maintainer: Philip Blundell */
         .atag_offset    = 0x100,
-        .restart_mode   = 's',
+        .reboot_mode    = REBOOT_SOFT,
         .fixup          = fixup_cats,
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index a42b369bc439..2739ca2c1334 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -198,9 +198,9 @@ void __init footbridge_map_io(void)
         }
 }
 
-void footbridge_restart(char mode, const char *cmd)
+void footbridge_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's') {
+        if (mode == REBOOT_SOFT) {
                 /* Jump into the ROM */
                 soft_restart(0x41000000);
         } else {
diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h
index a846e50a07b8..56607b3a773e 100644
--- a/arch/arm/mach-footbridge/common.h
+++ b/arch/arm/mach-footbridge/common.h
@@ -1,3 +1,4 @@
+#include <linux/reboot.h>
 
 extern void footbridge_timer_init(void);
 extern void isa_timer_init(void);
@@ -8,4 +9,4 @@ extern void footbridge_map_io(void);
 extern void footbridge_init_irq(void);
 
 extern void isa_init_irq(unsigned int irq);
-extern void footbridge_restart(char, const char *);
+extern void footbridge_restart(enum reboot_mode, const char *);
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 90ea23fdce4c..1fd2cf097e30 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -634,9 +634,9 @@ fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
 #endif
 }
 
-static void netwinder_restart(char mode, const char *cmd)
+static void netwinder_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's') {
+        if (mode == REBOOT_SOFT) {
                 /* Jump into the ROM */
                 soft_restart(0x41000000);
         } else {
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index 3f65206a9b92..aea1ec5ab6f8 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -1,8 +1,10 @@
 #ifndef __HIGHBANK_CORE_H
 #define __HIGHBANK_CORE_H
 
+#include <linux/reboot.h>
+
 extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
-extern void highbank_restart(char, const char *);
+extern void highbank_restart(enum reboot_mode, const char *);
 extern void __iomem *scu_base_addr;
 
 #ifdef CONFIG_PM_SLEEP
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index a984573e0d02..32d75cf55cbc 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -24,7 +24,7 @@
 
 extern void secondary_startup(void);
 
-static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         highbank_set_cpu_jump(cpu, secondary_startup);
         arch_send_wakeup_ipi_mask(cpumask_of(cpu));
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 37d8384dcf19..2df5870b7583 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -15,13 +15,14 @@
  */
 #include <linux/io.h>
 #include <asm/proc-fns.h>
+#include <linux/reboot.h>
 
 #include "core.h"
 #include "sysregs.h"
 
-void highbank_restart(char mode, const char *cmd)
+void highbank_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 'h')
+        if (mode == REBOOT_HARD)
                 highbank_set_pwr_hard_reset();
         else
                 highbank_set_pwr_soft_reset();
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 60661a4b0e24..f54656091a9d 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -108,7 +108,6 @@ config SOC_IMX25
         select ARCH_MXC_IOMUX_V3
         select COMMON_CLK
         select CPU_ARM926T
-        select HAVE_CAN_FLEXCAN if CAN
         select MXC_AVIC
 
 config SOC_IMX27
@@ -134,7 +133,6 @@ config SOC_IMX35
         select ARCH_MXC_IOMUX_V3
         select COMMON_CLK
         select CPU_V6K
-        select HAVE_CAN_FLEXCAN if CAN
         select HAVE_EPIT
         select MXC_AVIC
         select SMP_ON_UP if SMP
@@ -774,7 +772,6 @@ comment "Device tree only"
 
 config  SOC_IMX53
         bool "i.MX53 support"
-        select HAVE_CAN_FLEXCAN if CAN
         select HAVE_IMX_SRC
         select IMX_HAVE_PLATFORM_IMX2_WDT
         select PINCTRL
@@ -797,7 +794,6 @@ config SOC_IMX6Q
         select CPU_V7
         select HAVE_ARM_SCU if SMP
         select HAVE_ARM_TWD if LOCAL_TIMERS
-        select HAVE_CAN_FLEXCAN if CAN
         select HAVE_IMX_ANATOP
         select HAVE_IMX_GPC
         select HAVE_IMX_MMDC
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index ee78847abf47..cb6c838b63ed 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -11,6 +11,8 @@
 #ifndef __ASM_ARCH_MXC_COMMON_H__
 #define __ASM_ARCH_MXC_COMMON_H__
 
+#include <linux/reboot.h>
+
 struct platform_device;
 struct pt_regs;
 struct clk;
@@ -71,7 +73,7 @@ extern int mx53_clocks_init_dt(void);
 extern struct platform_device *mxc_register_gpio(char *name, int id,
         resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
 extern void mxc_set_cpu_type(unsigned int type);
-extern void mxc_restart(char, const char *);
+extern void mxc_restart(enum reboot_mode, const char *);
 extern void mxc_arch_reset_init(void __iomem *);
 extern void mxc_arch_reset_init_dt(void);
 extern int mx53_revision(void);
diff --git a/arch/arm/mach-imx/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h
index 0d2922bc575c..769563fdeaa0 100644
--- a/arch/arm/mach-imx/devices-imx25.h
+++ b/arch/arm/mach-imx/devices-imx25.h
@@ -13,10 +13,10 @@ extern const struct imx_fec_data imx25_fec_data;
         imx_add_fec(&imx25_fec_data, pdata)
 
 extern const struct imx_flexcan_data imx25_flexcan_data[];
-#define imx25_add_flexcan(id, pdata)    \
-        imx_add_flexcan(&imx25_flexcan_data[id], pdata)
-#define imx25_add_flexcan0(pdata)       imx25_add_flexcan(0, pdata)
-#define imx25_add_flexcan1(pdata)       imx25_add_flexcan(1, pdata)
+#define imx25_add_flexcan(id)   \
+        imx_add_flexcan(&imx25_flexcan_data[id])
+#define imx25_add_flexcan0()            imx25_add_flexcan(0)
+#define imx25_add_flexcan1()            imx25_add_flexcan(1)
 
 extern const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data;
 #define imx25_add_fsl_usb2_udc(pdata)   \
diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h
index e2675f1b141c..780d8240281b 100644
--- a/arch/arm/mach-imx/devices-imx35.h
+++ b/arch/arm/mach-imx/devices-imx35.h
@@ -17,10 +17,10 @@ extern const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data;
         imx_add_fsl_usb2_udc(&imx35_fsl_usb2_udc_data, pdata)
 
 extern const struct imx_flexcan_data imx35_flexcan_data[];
-#define imx35_add_flexcan(id, pdata)    \
-        imx_add_flexcan(&imx35_flexcan_data[id], pdata)
-#define imx35_add_flexcan0(pdata)       imx35_add_flexcan(0, pdata)
-#define imx35_add_flexcan1(pdata)       imx35_add_flexcan(1, pdata)
+#define imx35_add_flexcan(id)   \
+        imx_add_flexcan(&imx35_flexcan_data[id])
+#define imx35_add_flexcan0()            imx35_add_flexcan(0)
+#define imx35_add_flexcan1()            imx35_add_flexcan(1)
 
 extern const struct imx_imx2_wdt_data imx35_imx2_wdt_data;
 #define imx35_add_imx2_wdt()       \
diff --git a/arch/arm/mach-imx/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig
index 3dd2b1b041d1..68c74fb0373c 100644
--- a/arch/arm/mach-imx/devices/Kconfig
+++ b/arch/arm/mach-imx/devices/Kconfig
@@ -4,7 +4,6 @@ config IMX_HAVE_PLATFORM_FEC
 
 config IMX_HAVE_PLATFORM_FLEXCAN
         bool
-        select HAVE_CAN_FLEXCAN if CAN
 
 config IMX_HAVE_PLATFORM_FSL_USB2_UDC
         bool
diff --git a/arch/arm/mach-imx/devices/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h
index 453e20bc2657..c13b76b9f6b3 100644
--- a/arch/arm/mach-imx/devices/devices-common.h
+++ b/arch/arm/mach-imx/devices/devices-common.h
@@ -50,7 +50,6 @@ struct platform_device *__init imx_add_fec(
                 const struct imx_fec_data *data,
                 const struct fec_platform_data *pdata);
 
-#include <linux/can/platform/flexcan.h>
 struct imx_flexcan_data {
         int id;
         resource_size_t iobase;
@@ -58,8 +57,7 @@ struct imx_flexcan_data {
         resource_size_t irq;
 };
 struct platform_device *__init imx_add_flexcan(
-                const struct imx_flexcan_data *data,
-                const struct flexcan_platform_data *pdata);
+                const struct imx_flexcan_data *data);
 
 #include <linux/fsl_devices.h>
 struct imx_fsl_usb2_udc_data {
diff --git a/arch/arm/mach-imx/devices/platform-flexcan.c b/arch/arm/mach-imx/devices/platform-flexcan.c
index 1078bf0a94ef..55d61eaf63c6 100644
--- a/arch/arm/mach-imx/devices/platform-flexcan.c
+++ b/arch/arm/mach-imx/devices/platform-flexcan.c
@@ -38,8 +38,7 @@ const struct imx_flexcan_data imx35_flexcan_data[] __initconst = {
 #endif /* ifdef CONFIG_SOC_IMX35 */
 
 struct platform_device *__init imx_add_flexcan(
-                const struct imx_flexcan_data *data,
-                const struct flexcan_platform_data *pdata)
+                const struct imx_flexcan_data *data)
 {
         struct resource res[] = {
                 {
@@ -54,5 +53,5 @@ struct platform_device *__init imx_add_flexcan(
         };
 
         return imx_add_platform_device("flexcan", data->id,
-                        res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
+                        res, ARRAY_SIZE(res), NULL, 0);
 }
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index e2b70f4c1a2c..e77cc3af6db2 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -279,7 +279,7 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
         imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata);
         imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
 
-        imx25_add_flexcan1(NULL);
+        imx25_add_flexcan1();
         imx25_add_sdhci_esdhc_imx(0, &sd1_pdata);
 
         gpio_request(GPIO_LED1, "LED1");
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
index 5a2d5ef12dd5..14d6c8249b76 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
@@ -287,7 +287,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
 
         imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
 
-        imx35_add_flexcan1(NULL);
+        imx35_add_flexcan1();
         imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
 
         gpio_request(GPIO_LED1, "LED1");
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index f5965220a4d8..7be13f8e69a0 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -27,6 +27,7 @@
 #include <linux/of_platform.h>
 #include <linux/opp.h>
 #include <linux/phy.h>
+#include <linux/reboot.h>
 #include <linux/regmap.h>
 #include <linux/micrel_phy.h>
 #include <linux/mfd/syscon.h>
@@ -67,7 +68,7 @@ static void __init imx6q_init_revision(void)
         mxc_set_cpu_type(rev >> 16 & 0xff);
 }
 
-static void imx6q_restart(char mode, const char *cmd)
+static void imx6q_restart(enum reboot_mode mode, const char *cmd)
 {
         struct device_node *np;
         void __iomem *wdog_base;
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index 8bcda688a006..13490c203050 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -249,7 +249,7 @@ static void __init mx25pdk_init(void)
         imx25_add_imx_i2c0(&mx25_3ds_i2c0_data);
 
         gpio_request_one(MX25PDK_CAN_PWDN, GPIOF_OUT_INIT_LOW, "can-pwdn");
-        imx25_add_flexcan0(NULL);
+        imx25_add_flexcan0();
 }
 
 static void __init mx25pdk_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 8ed533f0f8ca..b726cb1c5fdd 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -385,7 +385,7 @@ static void __init pcm043_init(void)
         if (!otg_mode_host)
                 imx35_add_fsl_usb2_udc(&otg_device_pdata);
 
-        imx35_add_flexcan1(NULL);
+        imx35_add_flexcan1();
         imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
 }
 
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index c6e1ab544882..1f24c1fdfea4 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -53,7 +53,7 @@ void imx_scu_standby_enable(void)
         writel_relaxed(val, scu_base);
 }
 
-static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         imx_set_cpu_jump(cpu, v7_secondary_startup);
         imx_enable_cpu(cpu, true);
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c
index 7cdc79a9657c..6fe81bb4d3c9 100644
--- a/arch/arm/mach-imx/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -37,7 +37,7 @@ static struct clk *wdog_clk;
 /*
  * Reset the system. It is called by machine_restart().
  */
-void mxc_restart(char mode, const char *cmd)
+void mxc_restart(enum reboot_mode mode, const char *cmd)
 {
         unsigned int wcr_enable;
 
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index fea91313678b..cd46529e9eaa 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -26,8 +26,8 @@
 #include <linux/clockchips.h>
 #include <linux/clk.h>
 #include <linux/err.h>
+#include <linux/sched_clock.h>
 
-#include <asm/sched_clock.h>
 #include <asm/mach/time.h>
 
 #include "common.h"
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index 72516658be1e..ad0ac5547b2c 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,7 +1,8 @@
+#include <linux/reboot.h>
 #include <linux/amba/serial.h>
 extern struct amba_pl010_data ap_uart_data;
 void integrator_init_early(void);
 int integrator_init(bool is_cp);
 void integrator_reserve(void);
-void integrator_restart(char, const char *);
+void integrator_restart(enum reboot_mode, const char *);
 void integrator_init_sysfs(struct device *parent, u32 id);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 81461d218717..4cdfd7365925 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -124,7 +124,7 @@ void __init integrator_reserve(void)
 /*
  * To reset, we hit the on-board reset register in the system FPGA
  */
-void integrator_restart(char mode, const char *cmd)
+void integrator_restart(enum reboot_mode mode, const char *cmd)
 {
         cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
 }
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index a5b15c4e8def..d9e95e612fcb 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -41,6 +41,7 @@
 #include <linux/stat.h>
 #include <linux/sys_soc.h>
 #include <linux/termios.h>
+#include <linux/sched_clock.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -48,7 +49,6 @@
 #include <asm/setup.h>
 #include <asm/param.h>          /* HZ */
 #include <asm/mach-types.h>
-#include <asm/sched_clock.h>
 
 #include <mach/lm.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 7480f58267aa..17b40279e0a4 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -2,6 +2,9 @@
 #define _IOP13XX_HW_H_
 
 #ifndef __ASSEMBLY__
+
+#include <linux/reboot.h>
+
 /* The ATU offsets can change based on the strapping */
 extern u32 iop13xx_atux_pmmr_offset;
 extern u32 iop13xx_atue_pmmr_offset;
@@ -11,7 +14,7 @@ void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
 void iop13xx_add_tpmi_devices(void);
 void iop13xx_init_irq(void);
-void iop13xx_restart(char, const char *);
+void iop13xx_restart(enum reboot_mode, const char *);
 
 /* CPUID CP6 R0 Page 0 */
 static inline int iop13xx_cpu_id(void)
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index 1c5bd7637b05..96e6c7a6793b 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -594,7 +594,7 @@ __setup("iop13xx_init_adma", iop13xx_init_adma_setup);
 __setup("iop13xx_init_uart", iop13xx_init_uart_setup);
 __setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
 
-void iop13xx_restart(char mode, const char *cmd)
+void iop13xx_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Reset the internal bus (warning both cores are reset)
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index ea0984a7449e..069144300b77 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -286,7 +286,7 @@ static void n2100_power_off(void)
                 ;
 }
 
-static void n2100_restart(char mode, const char *cmd)
+static void n2100_restart(enum reboot_mode mode, const char *cmd)
 {
         gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
         gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index d7223b3b81f3..5327decde5a0 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -30,6 +30,7 @@
 #include <linux/export.h>
 #include <linux/gpio.h>
 #include <linux/cpu.h>
+#include <linux/sched_clock.h>
 
 #include <mach/udc.h>
 #include <mach/hardware.h>
@@ -38,7 +39,6 @@
 #include <asm/pgtable.h>
 #include <asm/page.h>
 #include <asm/irq.h>
-#include <asm/sched_clock.h>
 #include <asm/system_misc.h>
 
 #include <asm/mach/map.h>
@@ -531,9 +531,9 @@ static void __init ixp4xx_clockevent_init(void)
                                         0xf, 0xfffffffe);
 }
 
-void ixp4xx_restart(char mode, const char *cmd)
+void ixp4xx_restart(enum reboot_mode mode, const char *cmd)
 {
-        if ( 1 && mode == 's') {
+        if ( 1 && mode == REBOOT_SOFT) {
                 /* Jump into ROM at address 0 */
                 soft_restart(0);
         } else {
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 5d413f8c5700..63de1b3fd06b 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -27,6 +27,8 @@
 #include <linux/i2c.h>
 #include <linux/i2c-gpio.h>
 
+#include <mach/hardware.h>
+
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index db5afb69c123..4c4c6a6f4526 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -13,6 +13,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/reboot.h>
+
 #include <asm/types.h>
 
 #ifndef __ARMEB__
@@ -123,7 +125,7 @@ extern void ixp4xx_init_early(void);
 extern void ixp4xx_init_irq(void);
 extern void ixp4xx_sys_init(void);
 extern void ixp4xx_timer_init(void);
-extern void ixp4xx_restart(char, const char *);
+extern void ixp4xx_restart(enum reboot_mode, const char *);
 extern void ixp4xx_pci_preinit(void);
 struct pci_sys_data;
 extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
diff --git a/arch/arm/mach-ixp4xx/include/mach/timex.h b/arch/arm/mach-ixp4xx/include/mach/timex.h
index c9e930f29339..0396d89f947c 100644
--- a/arch/arm/mach-ixp4xx/include/mach/timex.h
+++ b/arch/arm/mach-ixp4xx/include/mach/timex.h
@@ -3,7 +3,7 @@
  * 
  */
 
-#include <mach/hardware.h>
+#include <mach/ixp4xx-regs.h>
 
 /*
  * We use IXP425 General purpose timer for our timer needs, it runs at 
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 46a89f5e8269..75ef03dc9964 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -27,6 +27,8 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 
+#include <mach/hardware.h>
+
 static struct resource omixp_flash_resources[] = {
         {
                 .flags  = IORESOURCE_MEM,
diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c
index 1d4181e1daf2..14378e3fef16 100644
--- a/arch/arm/mach-keystone/platsmp.c
+++ b/arch/arm/mach-keystone/platsmp.c
@@ -21,7 +21,7 @@
 
 #include "keystone.h"
 
-static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu,
+static int keystone_smp_boot_secondary(unsigned int cpu,
                                                 struct task_struct *idle)
 {
         unsigned long start = virt_to_phys(&secondary_startup);
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 7c72c725b711..e9238b5567ee 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -20,6 +20,7 @@
 #include <linux/mv643xx_i2c.h>
 #include <linux/timex.h>
 #include <linux/kexec.h>
+#include <linux/reboot.h>
 #include <net/dsa.h>
 #include <asm/page.h>
 #include <asm/mach/map.h>
@@ -722,7 +723,7 @@ void __init kirkwood_init(void)
 #endif
 }
 
-void kirkwood_restart(char mode, const char *cmd)
+void kirkwood_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Enable soft reset to assert RSTOUTn.
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 1c09f3f93fbb..fcf3ba682e24 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -11,6 +11,8 @@
 #ifndef __ARCH_KIRKWOOD_COMMON_H
 #define __ARCH_KIRKWOOD_COMMON_H
 
+#include <linux/reboot.h>
+
 struct dsa_platform_data;
 struct mv643xx_eth_platform_data;
 struct mv_sata_platform_data;
@@ -53,7 +55,7 @@ void kirkwood_audio_init(void);
 void kirkwood_cpuidle_init(void);
 void kirkwood_cpufreq_init(void);
 
-void kirkwood_restart(char, const char *);
+void kirkwood_restart(enum reboot_mode, const char *);
 void kirkwood_clk_init(void);
 
 /* board init functions for boards not fully converted to fdt */
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index d4cbe5e81bb4..91242c944d7a 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -21,14 +21,12 @@
 #define CPU_RESET               0x00000002
 
 #define RSTOUTn_MASK            (BRIDGE_VIRT_BASE + 0x0108)
-#define WDT_RESET_OUT_EN        0x00000002
 #define SOFT_RESET_OUT_EN       0x00000004
 
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE + 0x010c)
 #define SOFT_RESET              0x00000001
 
 #define BRIDGE_CAUSE            (BRIDGE_VIRT_BASE + 0x0110)
-#define WDT_INT_REQ             0x0008
 
 #define BRIDGE_INT_TIMER1_CLR   (~0x0004)
 
diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h
index 6e97ce462d73..43253f8e6de4 100644
--- a/arch/arm/mach-ks8695/generic.h
+++ b/arch/arm/mach-ks8695/generic.h
@@ -12,5 +12,5 @@
 
 extern __init void ks8695_map_io(void);
 extern __init void ks8695_init_irq(void);
-extern void ks8695_restart(char, const char *);
+extern void ks8695_restart(enum reboot_mode, const char *);
 extern void ks8695_timer_init(void);
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index c272a3863d5f..426c97662f5b 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -154,11 +154,11 @@ void __init ks8695_timer_init(void)
         setup_irq(KS8695_IRQ_TIMER1, &ks8695_timer_irq);
 }
 
-void ks8695_restart(char mode, const char *cmd)
+void ks8695_restart(enum reboot_mode reboot_mode, const char *cmd)
 {
         unsigned int reg;
 
-        if (mode == 's')
+        if (reboot_mode == REBOOT_SOFT)
                 soft_restart(0);
 
         /* disable timer0 */
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index 0d4db8c544b5..d7aa54c25c59 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -207,11 +207,11 @@ void __init lpc32xx_map_io(void)
         iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
 }
 
-void lpc23xx_restart(char mode, const char *cmd)
+void lpc23xx_restart(enum reboot_mode mode, const char *cmd)
 {
         switch (mode) {
-        case 's':
-        case 'h':
+        case REBOOT_SOFT:
+        case REBOOT_HARD:
                 lpc32xx_watchdog_reset();
                 break;
 
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index e0b26062a272..1cd8853b2f9b 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -21,6 +21,7 @@
 
 #include <mach/board.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 
 /*
  * Other arch specific structures and functions
@@ -29,7 +30,7 @@ extern void lpc32xx_timer_init(void);
 extern void __init lpc32xx_init_irq(void);
 extern void __init lpc32xx_map_io(void);
 extern void __init lpc32xx_serial_init(void);
-extern void lpc23xx_restart(char, const char *);
+extern void lpc23xx_restart(enum reboot_mode, const char *);
 
 
 /*
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index c1cd5a943ab1..e54f87ec2e4a 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -182,8 +182,8 @@ static void pl08x_put_signal(const struct pl08x_channel_data *cd, int ch)
 static struct pl08x_platform_data pl08x_pd = {
         .slave_channels = &pl08x_slave_channels[0],
         .num_slave_channels = ARRAY_SIZE(pl08x_slave_channels),
-        .get_signal = pl08x_get_signal,
-        .put_signal = pl08x_put_signal,
+        .get_xfer_signal = pl08x_get_signal,
+        .put_xfer_signal = pl08x_put_signal,
         .lli_buses = PL08X_AHB1,
         .mem_buses = PL08X_AHB1,
 };
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 9292b7966e3b..c03b4ab582db 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -47,7 +47,7 @@ void __init mmp_map_io(void)
         mmp_chip_id = __raw_readl(MMP_CHIPID);
 }
 
-void mmp_restart(char mode, const char *cmd)
+void mmp_restart(enum reboot_mode mode, const char *cmd)
 {
         soft_restart(0);
 }
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index 0bdc50b134ce..991d7e9877de 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -1,10 +1,11 @@
+#include <linux/reboot.h>
 #define ARRAY_AND_SIZE(x)       (x), ARRAY_SIZE(x)
 
 extern void timer_init(int irq);
 
 extern void __init icu_init_irq(void);
 extern void __init mmp_map_io(void);
-extern void mmp_restart(char, const char *);
+extern void mmp_restart(enum reboot_mode, const char *);
 extern void __init pxa168_clk_init(void);
 extern void __init pxa910_clk_init(void);
 extern void __init mmp2_clk_init(void);
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 7ed1df21ea1c..459c2d03eb5c 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -1,9 +1,11 @@
 #ifndef __ASM_MACH_PXA168_H
 #define __ASM_MACH_PXA168_H
 
+#include <linux/reboot.h>
+
 extern void pxa168_timer_init(void);
 extern void __init pxa168_init_irq(void);
-extern void pxa168_restart(char, const char *);
+extern void pxa168_restart(enum reboot_mode, const char *);
 extern void pxa168_clear_keypad_wakeup(void);
 
 #include <linux/i2c.h>
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index a30dcf3b7d9e..144e997624c0 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -172,7 +172,7 @@ int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
         return platform_device_register(&pxa168_device_usb_host);
 }
 
-void pxa168_restart(char mode, const char *cmd)
+void pxa168_restart(enum reboot_mode mode, const char *cmd)
 {
         soft_restart(0xffff0000);
 }
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 86a18b3d252e..7ac41e83cfef 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -28,8 +28,8 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
+#include <linux/sched_clock.h>
 
-#include <asm/sched_clock.h>
 #include <mach/addr-map.h>
 #include <mach/regs-timers.h>
 #include <mach/regs-apbc.h>
diff --git a/arch/arm/mach-msm/headsmp.S b/arch/arm/mach-msm/headsmp.S
index bcd5af223dea..6c62c3f82fe6 100644
--- a/arch/arm/mach-msm/headsmp.S
+++ b/arch/arm/mach-msm/headsmp.S
@@ -11,8 +11,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 /*
  * MSM specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 00cdb0a5dac8..3f06edcdd0ce 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -38,7 +38,7 @@ static inline int get_core_count(void)
         return ((read_cpuid_id() >> 4) & 3) + 1;
 }
 
-static void __cpuinit msm_secondary_init(unsigned int cpu)
+static void msm_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -54,7 +54,7 @@ static void __cpuinit msm_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static __cpuinit void prepare_cold_cpu(unsigned int cpu)
+static void prepare_cold_cpu(unsigned int cpu)
 {
         int ret;
         ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
@@ -73,7 +73,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
                                   "address\n");
 }
 
-static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
         static int cold_boot_done;
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 284313f3e02c..8697cfc0d0b6 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -23,10 +23,10 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
+#include <linux/sched_clock.h>
 
 #include <asm/mach/time.h>
 #include <asm/localtimer.h>
-#include <asm/sched_clock.h>
 
 #include "common.h"
 
@@ -139,7 +139,7 @@ static struct clocksource msm_clocksource = {
 };
 
 #ifdef CONFIG_LOCAL_TIMERS
-static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
+static int msm_local_timer_setup(struct clock_event_device *evt)
 {
         /* Use existing clock_event for cpu 0 */
         if (!smp_processor_id())
@@ -164,7 +164,7 @@ static void msm_local_timer_stop(struct clock_event_device *evt)
         disable_percpu_irq(evt->irq);
 }
 
-static struct local_timer_ops msm_local_timer_ops __cpuinitdata = {
+static struct local_timer_ops msm_local_timer_ops = {
         .setup  = msm_local_timer_setup,
         .stop   = msm_local_timer_stop,
 };
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 749a7f8c4992..75062eff2494 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -413,7 +413,7 @@ void __init mv78xx0_init(void)
         clk_init();
 }
 
-void mv78xx0_restart(char mode, const char *cmd)
+void mv78xx0_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Enable soft reset to assert RSTOUTn.
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 5e9485bad0ac..6889af26077d 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -11,6 +11,8 @@
 #ifndef __ARCH_MV78XX0_COMMON_H
 #define __ARCH_MV78XX0_COMMON_H
 
+#include <linux/reboot.h>
+
 struct mv643xx_eth_platform_data;
 struct mv_sata_platform_data;
 
@@ -45,7 +47,7 @@ void mv78xx0_uart1_init(void);
 void mv78xx0_uart2_init(void);
 void mv78xx0_uart3_init(void);
 void mv78xx0_i2c_init(void);
-void mv78xx0_restart(char, const char *);
+void mv78xx0_restart(enum reboot_mode, const char *);
 
 extern void mv78xx0_timer_init(void);
 
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index be117591f7f2..4c24303ec481 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -28,7 +28,7 @@
 #include <asm/cacheflush.h>
 #include "armada-370-xp.h"
 
-unsigned long __cpuinitdata coherency_phys_base;
+unsigned long coherency_phys_base;
 static void __iomem *coherency_base;
 static void __iomem *coherency_cpu_base;
 
diff --git a/arch/arm/mach-mvebu/common.h b/arch/arm/mach-mvebu/common.h
index 98defd5e92cd..e366010e1d91 100644
--- a/arch/arm/mach-mvebu/common.h
+++ b/arch/arm/mach-mvebu/common.h
@@ -17,7 +17,9 @@
 
 #define ARMADA_XP_MAX_CPUS 4
 
-void mvebu_restart(char mode, const char *cmd);
+#include <linux/reboot.h>
+
+void mvebu_restart(enum reboot_mode mode, const char *cmd);
 
 void armada_370_xp_init_irq(void);
 void armada_370_xp_handle_irq(struct pt_regs *regs);
diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S
index 7147300c8af2..8a1b0c96e9ec 100644
--- a/arch/arm/mach-mvebu/headsmp.S
+++ b/arch/arm/mach-mvebu/headsmp.S
@@ -21,8 +21,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 /*
  * Armada XP specific entry point for secondary CPUs.
  * We add the CPU to the coherency fabric and then jump to secondary
diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
index 93f2f3ab45f1..ce81d3031405 100644
--- a/arch/arm/mach-mvebu/platsmp.c
+++ b/arch/arm/mach-mvebu/platsmp.c
@@ -71,13 +71,12 @@ void __init set_secondary_cpus_clock(void)
         }
 }
 
-static void __cpuinit armada_xp_secondary_init(unsigned int cpu)
+static void armada_xp_secondary_init(unsigned int cpu)
 {
         armada_xp_mpic_smp_cpu_init();
 }
 
-static int __cpuinit armada_xp_boot_secondary(unsigned int cpu,
-                                              struct task_struct *idle)
+static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         pr_info("Booting CPU %d\n", cpu);
 
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index b8079df8c986..f875124ff4f9 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -26,6 +26,7 @@
 #include <linux/init.h>
 #include <linux/of_address.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
 
 static void __iomem *system_controller_base;
 
@@ -63,7 +64,7 @@ static struct of_device_id of_system_controller_table[] = {
         { /* end of list */ },
 };
 
-void mvebu_restart(char mode, const char *cmd)
+void mvebu_restart(enum reboot_mode mode, const char *cmd)
 {
         if (!system_controller_base) {
                 pr_err("Cannot restart, system-controller not available: check the device tree\n");
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 616fe0210da1..8cde9e05b5d6 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -10,7 +10,6 @@ config SOC_IMX28
         select ARM_AMBA
         select ARM_CPU_SUSPEND if PM
         select CPU_ARM926T
-        select HAVE_CAN_FLEXCAN if CAN
         select PINCTRL_IMX28
 
 config ARCH_MXS
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 7fa611c1b287..4ce27b536dc9 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -14,12 +14,12 @@
 #include <linux/clk/mxs.h>
 #include <linux/clkdev.h>
 #include <linux/clocksource.h>
-#include <linux/can/platform/flexcan.h>
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/irqchip/mxs.h>
+#include <linux/reboot.h>
 #include <linux/micrel_phy.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
@@ -76,41 +76,6 @@ static inline void __mxs_togl(u32 mask, void __iomem *reg)
         __raw_writel(mask, reg + MXS_TOG_ADDR);
 }
 
-/*
- * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
- */
-#define MX28EVK_FLEXCAN_SWITCH  MXS_GPIO_NR(2, 13)
-
-static int flexcan0_en, flexcan1_en;
-
-static void mx28evk_flexcan_switch(void)
-{
-        if (flexcan0_en || flexcan1_en)
-                gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
-        else
-                gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
-}
-
-static void mx28evk_flexcan0_switch(int enable)
-{
-        flexcan0_en = enable;
-        mx28evk_flexcan_switch();
-}
-
-static void mx28evk_flexcan1_switch(int enable)
-{
-        flexcan1_en = enable;
-        mx28evk_flexcan_switch();
-}
-
-static struct flexcan_platform_data flexcan_pdata[2];
-
-static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
-        OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
-        OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
-        { /* sentinel */ }
-};
-
 #define OCOTP_WORD_OFFSET               0x20
 #define OCOTP_WORD_COUNT                0x20
 
@@ -270,15 +235,6 @@ static void __init imx28_evk_init(void)
         mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
 }
 
-static void __init imx28_evk_post_init(void)
-{
-        if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
-                              "flexcan-switch")) {
-                flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch;
-                flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch;
-        }
-}
-
 static int apx4devkit_phy_fixup(struct phy_device *phy)
 {
         phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
@@ -484,13 +440,10 @@ static void __init mxs_machine_init(void)
                 crystalfontz_init();
 
         of_platform_populate(NULL, of_default_bus_match_table,
-                             mxs_auxdata_lookup, parent);
+                             NULL, parent);
 
         if (of_machine_is_compatible("karo,tx28"))
                 tx28_post_init();
-
-        if (of_machine_is_compatible("fsl,imx28-evk"))
-                imx28_evk_post_init();
 }
 
 #define MX23_CLKCTRL_RESET_OFFSET       0x120
@@ -500,7 +453,7 @@ static void __init mxs_machine_init(void)
 /*
  * Reset the system. It is called by machine_restart().
  */
-static void mxs_restart(char mode, const char *cmd)
+static void mxs_restart(enum reboot_mode mode, const char *cmd)
 {
         struct device_node *np;
         void __iomem *reset_addr;
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 1504b68f4c66..db25b0cef3a7 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -24,6 +24,7 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/irqchip/arm-vic.h>
+#include <linux/reboot.h>
 #include <mach/hardware.h>
 #include <asm/mach/map.h>
 #include <mach/netx-regs.h>
@@ -187,7 +188,7 @@ static int __init netx_init(void)
 
 subsys_initcall(netx_init);
 
-void netx_restart(char mode, const char *cmd)
+void netx_restart(enum reboot_mode mode, const char *cmd)
 {
         writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
                NETX_SYSTEM_RES_CR);
diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h
index 768b26bbb42b..bb2ce471cc28 100644
--- a/arch/arm/mach-netx/generic.h
+++ b/arch/arm/mach-netx/generic.h
@@ -17,8 +17,10 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
+#include <linux/reboot.h>
+
 extern void __init netx_map_io(void);
 extern void __init netx_init_irq(void);
-extern void netx_restart(char, const char *);
+extern void netx_restart(enum reboot_mode, const char *);
 
 extern void netx_timer_init(void);
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 2df209ed1a07..13e0df9c11ce 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -103,7 +103,7 @@ static void __init cpu8815_map_io(void)
         iotable_init(cpu8815_io_desc, ARRAY_SIZE(cpu8815_io_desc));
 }
 
-static void cpu8815_restart(char mode, const char *cmd)
+static void cpu8815_restart(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K);
 
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 6c116e1a4b01..4677a9ccb3cb 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -26,6 +26,7 @@
 #include <linux/serial_reg.h>
 #include <linux/smc91x.h>
 #include <linux/export.h>
+#include <linux/reboot.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -215,7 +216,7 @@ void voiceblue_wdt_ping(void)
         gpio_set_value(0, wdt_gpio_state);
 }
 
-static void voiceblue_restart(char mode, const char *cmd)
+static void voiceblue_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index 14f7e9920479..abec019a5281 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -28,6 +28,7 @@
 
 #include <linux/mtd/mtd.h>
 #include <linux/i2c-omap.h>
+#include <linux/reboot.h>
 
 #include <plat/i2c.h>
 
@@ -70,7 +71,7 @@ static inline int omap_serial_wakeup_init(void)
 void omap1_init_early(void);
 void omap1_init_irq(void);
 void omap1_init_late(void);
-void omap1_restart(char, const char *);
+void omap1_restart(enum reboot_mode, const char *);
 
 extern void __init omap_check_revision(void);
 
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
index 5eebd7e889d0..72bf4bf4a702 100644
--- a/arch/arm/mach-omap1/reset.c
+++ b/arch/arm/mach-omap1/reset.c
@@ -3,6 +3,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
 
 #include <mach/hardware.h>
 
@@ -22,7 +23,7 @@
 #define OMAP_EXTWARM_RST_SRC_ID_SHIFT                   5
 
 
-void omap1_restart(char mode, const char *cmd)
+void omap1_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 726ec23d29c7..80603d2fef77 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -43,9 +43,9 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/sched_clock.h>
 
 #include <asm/irq.h>
-#include <asm/sched_clock.h>
 
 #include <mach/hardware.h>
 #include <asm/mach/irq.h>
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index c7b32a966f67..627fa7e41fba 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -1,63 +1,10 @@
 config ARCH_OMAP
         bool
 
-config ARCH_OMAP2PLUS
-        bool "TI OMAP2/3/4/5 SoCs with device tree support" if (ARCH_MULTI_V6 || ARCH_MULTI_V7)
-        select ARCH_HAS_CPUFREQ
-        select ARCH_HAS_BANDGAP
-        select ARCH_HAS_HOLES_MEMORYMODEL
-        select ARCH_OMAP
-        select ARCH_REQUIRE_GPIOLIB
-        select CLKDEV_LOOKUP
-        select CLKSRC_MMIO
-        select GENERIC_CLOCKEVENTS
-        select GENERIC_IRQ_CHIP
-        select HAVE_CLK
-        select OMAP_DM_TIMER
-        select PINCTRL
-        select PROC_DEVICETREE if PROC_FS
-        select SOC_BUS
-        select SPARSE_IRQ
-        select TI_PRIV_EDMA
-        select USE_OF
-        help
-          Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
-
-
-if ARCH_OMAP2PLUS
-
-menu "TI OMAP2/3/4 Specific Features"
-
-config ARCH_OMAP2PLUS_TYPICAL
-        bool "Typical OMAP configuration"
-        default y
-        select AEABI
-        select HIGHMEM
-        select I2C
-        select I2C_OMAP
-        select MENELAUS if ARCH_OMAP2
-        select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
-        select PM_RUNTIME
-        select REGULATOR
-        select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
-        select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
-        select VFP
-        help
-          Compile a kernel suitable for booting most boards
-
-config SOC_HAS_OMAP2_SDRC
-        bool "OMAP2 SDRAM Controller support"
-
-config SOC_HAS_REALTIME_COUNTER
-        bool "Real time free running counter"
-        depends on SOC_OMAP5
-        default y
-
 config ARCH_OMAP2
         bool "TI OMAP2"
-        depends on ARCH_OMAP2PLUS
         depends on ARCH_MULTI_V6
-        default y
+        select ARCH_OMAP2PLUS
         select CPU_V6
         select MULTI_IRQ_HANDLER
         select SOC_HAS_OMAP2_SDRC
@@ -65,9 +12,8 @@ config ARCH_OMAP2
 
 config ARCH_OMAP3
         bool "TI OMAP3"
-        depends on ARCH_OMAP2PLUS
         depends on ARCH_MULTI_V7
-        default y
+        select ARCH_OMAP2PLUS
         select ARCH_HAS_OPP
         select ARM_CPU_SUSPEND if PM
         select CPU_V7
@@ -81,9 +27,8 @@ config ARCH_OMAP3
 
 config ARCH_OMAP4
         bool "TI OMAP4"
-        default y
-        depends on ARCH_OMAP2PLUS
         depends on ARCH_MULTI_V7
+        select ARCH_OMAP2PLUS
         select ARCH_HAS_OPP
         select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
         select ARM_CPU_SUSPEND if PM
@@ -108,12 +53,87 @@ config ARCH_OMAP4
 config SOC_OMAP5
         bool "TI OMAP5"
         depends on ARCH_MULTI_V7
+        select ARCH_OMAP2PLUS
         select ARM_CPU_SUSPEND if PM
         select ARM_GIC
         select CPU_V7
+        select HAVE_ARM_SCU if SMP
+        select HAVE_ARM_TWD if LOCAL_TIMERS
         select HAVE_SMP
         select COMMON_CLK
         select HAVE_ARM_ARCH_TIMER
+        select ARM_ERRATA_798181
+
+config SOC_AM33XX
+        bool "AM33XX support"
+        depends on ARCH_MULTI_V7
+        select ARCH_OMAP2PLUS
+        select ARM_CPU_SUSPEND if PM
+        select CPU_V7
+        select MULTI_IRQ_HANDLER
+        select COMMON_CLK
+
+config SOC_AM43XX
+        bool "TI AM43x"
+        depends on ARCH_MULTI_V7
+        select CPU_V7
+        select ARCH_OMAP2PLUS
+        select MULTI_IRQ_HANDLER
+        select ARM_GIC
+        select COMMON_CLK
+        select MACH_OMAP_GENERIC
+
+config ARCH_OMAP2PLUS
+        bool
+        select ARCH_HAS_BANDGAP
+        select ARCH_HAS_CPUFREQ
+        select ARCH_HAS_HOLES_MEMORYMODEL
+        select ARCH_OMAP
+        select ARCH_REQUIRE_GPIOLIB
+        select CLKDEV_LOOKUP
+        select CLKSRC_MMIO
+        select GENERIC_CLOCKEVENTS
+        select GENERIC_IRQ_CHIP
+        select HAVE_CLK
+        select OMAP_DM_TIMER
+        select PINCTRL
+        select PROC_DEVICETREE if PROC_FS
+        select SOC_BUS
+        select SPARSE_IRQ
+        select TI_PRIV_EDMA
+        select USE_OF
+        help
+          Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
+
+
+if ARCH_OMAP2PLUS
+
+menu "TI OMAP2/3/4 Specific Features"
+
+config ARCH_OMAP2PLUS_TYPICAL
+        bool "Typical OMAP configuration"
+        default y
+        select AEABI
+        select HIGHMEM
+        select I2C
+        select I2C_OMAP
+        select MENELAUS if ARCH_OMAP2
+        select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
+        select PM_RUNTIME
+        select REGULATOR
+        select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
+        select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
+        select VFP
+        help
+          Compile a kernel suitable for booting most boards
+
+config SOC_HAS_OMAP2_SDRC
+        bool "OMAP2 SDRAM Controller support"
+
+config SOC_HAS_REALTIME_COUNTER
+        bool "Real time free running counter"
+        depends on SOC_OMAP5
+        default y
 
 comment "OMAP Core Type"
         depends on ARCH_OMAP2
@@ -142,23 +162,6 @@ config SOC_TI81XX
         depends on ARCH_OMAP3
         default y
 
-config SOC_AM33XX
-        bool "AM33XX support"
-        depends on ARCH_MULTI_V7
-        default y
-        select ARM_CPU_SUSPEND if PM
-        select CPU_V7
-        select MULTI_IRQ_HANDLER
-        select COMMON_CLK
-
-config SOC_AM43XX
-        bool "TI AM43x"
-        select CPU_V7
-        select MULTI_IRQ_HANDLER
-        select ARM_GIC
-        select COMMON_CLK
-        select MACH_OMAP_GENERIC
-
 config OMAP_PACKAGE_ZAF
        bool
 
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index ea5a27ff9941..d4f671547c37 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -95,10 +95,6 @@ obj-$(CONFIG_POWER_AVS_OMAP_CLASS3)    += smartreflex-class3.o
 AFLAGS_sleep24xx.o                      :=-Wa,-march=armv6
 AFLAGS_sleep34xx.o                      :=-Wa,-march=armv7-a$(plus_sec)
 
-ifeq ($(CONFIG_PM_VERBOSE),y)
-CFLAGS_pm_bus.o                         += -DDEBUG
-endif
-
 endif
 
 ifeq ($(CONFIG_CPU_IDLE),y)
diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c
index 88e4fa8af031..1eae96212315 100644
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -6,6 +6,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/kernel.h>
+#include <linux/reboot.h>
 
 #include "common.h"
 #include "prm-regbits-33xx.h"
@@ -19,7 +20,7 @@
  * Resets the SoC.  For @cmd, see the 'reboot' syscall in
  * kernel/sys.c.  No return value.
  */
-void am33xx_restart(char mode, const char *cmd)
+void am33xx_restart(enum reboot_mode mode, const char *cmd)
 {
         /* TODO: Handle mode and cmd if necessary */
 
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index b54562d1235e..87e65dde8e13 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -553,6 +553,37 @@ static struct usbhs_omap_platform_data igep3_usbhs_bdata __initdata = {
 
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
+        /* Display Sub System */
+        OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        /* TFP410 PanelBus DVI Transmitte (GPIO_170) */
+        OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
         /* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
         OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
         { .reg_offset = OMAP_MUX_TERMINATOR },
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c
index bd74f9f6063b..bdd1e3a179e1 100644
--- a/arch/arm/mach-omap2/board-rx51-video.c
+++ b/arch/arm/mach-omap2/board-rx51-video.c
@@ -61,7 +61,7 @@ static struct omap_dss_board_info rx51_dss_board_info = {
 
 static int __init rx51_video_init(void)
 {
-        if (!machine_is_nokia_rx51())
+        if (!machine_is_nokia_rx51() && !of_machine_is_compatible("nokia,omap3-n900"))
                 return 0;
 
         if (omap_mux_init_gpio(RX51_LCD_RESET_GPIO, OMAP_PIN_OUTPUT)) {
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 72cab3f4f16d..dfcc182ecff9 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -31,6 +31,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c/twl.h>
 #include <linux/i2c-omap.h>
+#include <linux/reboot.h>
 
 #include <asm/proc-fns.h>
 
@@ -119,33 +120,33 @@ static inline void omap_soc_device_init(void)
 #endif
 
 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
-void omap2xxx_restart(char mode, const char *cmd);
+void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
 #else
-static inline void omap2xxx_restart(char mode, const char *cmd)
+static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
 {
 }
 #endif
 
 #ifdef CONFIG_SOC_AM33XX
-void am33xx_restart(char mode, const char *cmd);
+void am33xx_restart(enum reboot_mode mode, const char *cmd);
 #else
-static inline void am33xx_restart(char mode, const char *cmd)
+static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
 {
 }
 #endif
 
 #ifdef CONFIG_ARCH_OMAP3
-void omap3xxx_restart(char mode, const char *cmd);
+void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
 #else
-static inline void omap3xxx_restart(char mode, const char *cmd)
+static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
 {
 }
 #endif
 
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
-void omap44xx_restart(char mode, const char *cmd);
+void omap44xx_restart(enum reboot_mode mode, const char *cmd);
 #else
-static inline void omap44xx_restart(char mode, const char *cmd)
+static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
 {
 }
 #endif
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index ba8d06598e55..afc201713131 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -15,7 +15,6 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/err.h>
-#include <linux/gpio.h>
 #include <linux/slab.h>
 #include <linux/of.h>
 #include <linux/pinctrl/machine.h>
@@ -66,7 +65,7 @@ static int __init omap3_l3_init(void)
 
         WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
 
-        return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
+        return PTR_RET(pdev);
 }
 omap_postcore_initcall(omap3_l3_init);
 
@@ -100,7 +99,7 @@ static int __init omap4_l3_init(void)
 
         WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
 
-        return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
+        return PTR_RET(pdev);
 }
 omap_postcore_initcall(omap4_l3_init);
 
diff --git a/arch/arm/mach-omap2/fb.c b/arch/arm/mach-omap2/fb.c
index 190ae493c6ef..2ca33cc0c484 100644
--- a/arch/arm/mach-omap2/fb.c
+++ b/arch/arm/mach-omap2/fb.c
@@ -83,10 +83,7 @@ static int __init omap_init_vrfb(void)
         pdev = platform_device_register_resndata(NULL, "omapvrfb", -1,
                         res, num_res, NULL, 0);
 
-        if (IS_ERR(pdev))
-                return PTR_ERR(pdev);
-        else
-                return 0;
+        return PTR_RET(pdev);
 }
 
 omap_arch_initcall(omap_init_vrfb);
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 1c7969e965d7..f3fdd6afa213 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1734,7 +1734,7 @@ static int __init omap_gpmc_init(void)
         pdev = omap_device_build(DEVICE_NAME, -1, oh, NULL, 0);
         WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
 
-        return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
+        return PTR_RET(pdev);
 }
 omap_postcore_initcall(omap_gpmc_init);
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index fe3253a100e7..4a3f06f02859 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -394,7 +394,7 @@ static void __init omap_hwmod_init_postsetup(void)
         omap_pm_if_early_init();
 }
 
-static void __init omap_common_late_init(void)
+static void __init __maybe_unused omap_common_late_init(void)
 {
         omap_mux_late_init();
         omap2_common_pm_late_init();
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 4ea308114165..75e92952c18e 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -20,8 +20,6 @@
 
 #include "omap44xx.h"
 
-        __CPUINIT
-
 /* Physical address needed since MMU not enabled yet on secondary core */
 #define AUX_CORE_BOOT0_PA                       0x48281800
 
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index f993a4188701..f991016e2a6a 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -291,7 +291,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
  * @cpu : CPU ID
  * @power_state: CPU low power state.
  */
-int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
+int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
 {
         struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
         unsigned int cpu_state = 0;
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 98a11463a843..8708b2a9da45 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -51,7 +51,7 @@ void __iomem *omap4_get_scu_base(void)
         return scu_base;
 }
 
-static void __cpuinit omap4_secondary_init(unsigned int cpu)
+static void omap4_secondary_init(unsigned int cpu)
 {
         /*
          * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
@@ -72,7 +72,7 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         static struct clockdomain *cpu1_clkdm;
         static bool booted;
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index f8bb3b9b6a76..813c61558a5f 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -323,8 +323,8 @@ static void irq_save_secure_context(void)
 #endif
 
 #ifdef CONFIG_HOTPLUG_CPU
-static int __cpuinit irq_cpu_hotplug_notify(struct notifier_block *self,
-                                         unsigned long action, void *hcpu)
+static int irq_cpu_hotplug_notify(struct notifier_block *self,
+                                  unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned int)hcpu;
 
diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c
index 719b716a4494..68423e26399d 100644
--- a/arch/arm/mach-omap2/omap2-restart.c
+++ b/arch/arm/mach-omap2/omap2-restart.c
@@ -31,7 +31,7 @@ static struct clk *reset_virt_prcm_set_ck, *reset_sys_ck;
  * Set the DPLL to bypass so that reboot completes successfully.  No
  * return value.
  */
-void omap2xxx_restart(char mode, const char *cmd)
+void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
 {
         u32 rate;
 
diff --git a/arch/arm/mach-omap2/omap3-restart.c b/arch/arm/mach-omap2/omap3-restart.c
index 923c582189e5..5de2a0c2979d 100644
--- a/arch/arm/mach-omap2/omap3-restart.c
+++ b/arch/arm/mach-omap2/omap3-restart.c
@@ -12,6 +12,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/reboot.h>
 
 #include "iomap.h"
 #include "common.h"
@@ -28,7 +29,7 @@
  * Resets the SoC.  For @cmd, see the 'reboot' syscall in
  * kernel/sys.c.  No return value.
  */
-void omap3xxx_restart(char mode, const char *cmd)
+void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
 {
         omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
         omap3xxx_prm_dpll3_reset(); /* never returns */
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 38cd3a69cff3..57911430324e 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -23,6 +23,7 @@
 #include <linux/export.h>
 #include <linux/irqchip/arm-gic.h>
 #include <linux/of_address.h>
+#include <linux/reboot.h>
 
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-omap2/omap4-restart.c b/arch/arm/mach-omap2/omap4-restart.c
index f90e02e11898..41dfd7da8170 100644
--- a/arch/arm/mach-omap2/omap4-restart.c
+++ b/arch/arm/mach-omap2/omap4-restart.c
@@ -8,6 +8,7 @@
  */
 
 #include <linux/types.h>
+#include <linux/reboot.h>
 #include "prminst44xx.h"
 
 /**
@@ -18,7 +19,7 @@
  * Resets the SoC.  For @cmd, see the 'reboot' syscall in
  * kernel/sys.c.  No return value.
  */
-void omap44xx_restart(char mode, const char *cmd)
+void omap44xx_restart(enum reboot_mode mode, const char *cmd)
 {
         /* XXX Should save 'cmd' into scratchpad for use after reboot */
         omap4_prminst_global_warm_sw_reset(); /* never returns */
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
index 9ace8eae7ee8..33c8846b4193 100644
--- a/arch/arm/mach-omap2/pmu.c
+++ b/arch/arm/mach-omap2/pmu.c
@@ -54,10 +54,7 @@ static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[])
         WARN(IS_ERR(omap_pmu_dev), "Can't build omap_device for %s.\n",
              dev_name);
 
-        if (IS_ERR(omap_pmu_dev))
-                return PTR_ERR(omap_pmu_dev);
-
-        return 0;
+        return PTR_RET(omap_pmu_dev);
 }
 
 static int __init omap_init_pmu(void)
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 88ff83a0942e..9086ce03ae12 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -34,6 +34,8 @@ ppa_zero_params:
 ppa_por_params:
         .word           1, 0
 
+#ifdef CONFIG_ARCH_OMAP4
+
 /*
  * =============================
  * == CPU suspend finisher ==
@@ -326,7 +328,9 @@ skip_l2en:
 
         b       cpu_resume                      @ Jump to generic resume
 ENDPROC(omap4_cpu_resume)
-#endif
+#endif  /* CONFIG_ARCH_OMAP4 */
+
+#endif  /* defined(CONFIG_SMP) && defined(CONFIG_PM) */
 
 #ifndef CONFIG_OMAP4_ERRATA_I688
 ENTRY(omap_bus_sync)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 3bdb0fb02028..b37e1fcbad56 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -41,10 +41,10 @@
 #include <linux/of_irq.h>
 #include <linux/platform_device.h>
 #include <linux/platform_data/dmtimer-omap.h>
+#include <linux/sched_clock.h>
 
 #include <asm/mach/time.h>
 #include <asm/smp_twd.h>
-#include <asm/sched_clock.h>
 
 #include "omap_hwmod.h"
 #include "omap_device.h"
@@ -220,7 +220,7 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
                                          int posted)
 {
         char name[10]; /* 10 = sizeof("gptXX_Xck0") */
-        const char *oh_name;
+        const char *oh_name = NULL;
         struct device_node *np;
         struct omap_hwmod *oh;
         struct resource irq, mem;
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index f8a6db9239bf..b41599f98a8e 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -347,7 +347,7 @@ void __init orion5x_init(void)
         orion5x_wdt_init();
 }
 
-void orion5x_restart(char mode, const char *cmd)
+void orion5x_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Enable and issue soft reset
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index cdaa01f3d186..a909afb384fb 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -1,6 +1,8 @@
 #ifndef __ARCH_ORION5X_COMMON_H
 #define __ARCH_ORION5X_COMMON_H
 
+#include <linux/reboot.h>
+
 struct dsa_platform_data;
 struct mv643xx_eth_platform_data;
 struct mv_sata_platform_data;
@@ -29,7 +31,7 @@ void orion5x_spi_init(void);
 void orion5x_uart0_init(void);
 void orion5x_uart1_init(void);
 void orion5x_xor_init(void);
-void orion5x_restart(char, const char *);
+void orion5x_restart(enum reboot_mode, const char *);
 
 /*
  * PCIe/PCI functions.
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 461fd69a10ae..f727d03f1688 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -18,7 +18,6 @@
 #define CPU_CTRL                (ORION5X_BRIDGE_VIRT_BASE + 0x104)
 
 #define RSTOUTn_MASK            (ORION5X_BRIDGE_VIRT_BASE + 0x108)
-#define WDT_RESET_OUT_EN        0x0002
 
 #define CPU_SOFT_RESET          (ORION5X_BRIDGE_VIRT_BASE + 0x10c)
 
@@ -26,8 +25,6 @@
 
 #define POWER_MNG_CTRL_REG      (ORION5X_BRIDGE_VIRT_BASE + 0x11C)
 
-#define WDT_INT_REQ             0x0008
-
 #define BRIDGE_INT_TIMER1_CLR   (~0x0004)
 
 #define MAIN_IRQ_CAUSE          (ORION5X_BRIDGE_VIRT_BASE + 0x200)
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 24f4e14e5893..6234977b5aea 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -139,7 +139,7 @@ static struct mv_sata_platform_data lschl_sata_data = {
 
 static void lschl_power_off(void)
 {
-        orion5x_restart('h', NULL);
+        orion5x_restart(REBOOT_HARD, NULL);
 }
 
 /*****************************************************************************
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index fc653bb41e78..fe04c4b64569 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -185,7 +185,7 @@ static struct mv_sata_platform_data ls_hgl_sata_data = {
 
 static void ls_hgl_power_off(void)
 {
-        orion5x_restart('h', NULL);
+        orion5x_restart(REBOOT_HARD, NULL);
 }
 
 
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 18e66e617dc2..ca4dbe973daf 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -185,7 +185,7 @@ static struct mv_sata_platform_data lsmini_sata_data = {
 
 static void lsmini_power_off(void)
 {
-        orion5x_restart('h', NULL);
+        orion5x_restart(REBOOT_HARD, NULL);
 }
 
 
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index b13f51bc35cf..ec79fea82704 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -11,6 +11,7 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/reboot.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -63,7 +64,7 @@ static const char *picoxcell_dt_match[] = {
         NULL
 };
 
-static void picoxcell_wdt_restart(char mode, const char *cmd)
+static void picoxcell_wdt_restart(enum reboot_mode mode, const char *cmd)
 {
         /*
          * Configure the watchdog to reset with the shortest possible timeout
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h
index 81135cd88e54..a6304858474a 100644
--- a/arch/arm/mach-prima2/common.h
+++ b/arch/arm/mach-prima2/common.h
@@ -10,6 +10,8 @@
 #define __MACH_PRIMA2_COMMON_H__
 
 #include <linux/init.h>
+#include <linux/reboot.h>
+
 #include <asm/mach/time.h>
 #include <asm/exception.h>
 
@@ -22,7 +24,7 @@ extern void sirfsoc_cpu_die(unsigned int cpu);
 
 extern void __init sirfsoc_of_irq_init(void);
 extern void __init sirfsoc_of_clk_init(void);
-extern void sirfsoc_restart(char, const char *);
+extern void sirfsoc_restart(enum reboot_mode, const char *);
 extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);
 
 #ifndef CONFIG_DEBUG_LL
diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S
index 5b8a408d8921..d86fe33c5f53 100644
--- a/arch/arm/mach-prima2/headsmp.S
+++ b/arch/arm/mach-prima2/headsmp.S
@@ -9,8 +9,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 /*
  * SIRFSOC specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
index 1c3de7bed841..3dbcb1ab6e37 100644
--- a/arch/arm/mach-prima2/platsmp.c
+++ b/arch/arm/mach-prima2/platsmp.c
@@ -44,7 +44,7 @@ void __init sirfsoc_map_scu(void)
         scu_base = (void __iomem *)SIRFSOC_VA(base);
 }
 
-static void __cpuinit sirfsoc_secondary_init(unsigned int cpu)
+static void sirfsoc_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -65,7 +65,7 @@ static struct of_device_id rsc_ids[]  = {
         {},
 };
 
-static int __cpuinit sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
         struct device_node *np;
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index d5e0cbc934c0..ccb53391147a 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -13,6 +13,7 @@
 #include <linux/device.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/reboot.h>
 
 void __iomem *sirfsoc_rstc_base;
 static DEFINE_MUTEX(rstc_lock);
@@ -84,7 +85,7 @@ int sirfsoc_reset_device(struct device *dev)
 
 #define SIRFSOC_SYS_RST_BIT  BIT(31)
 
-void sirfsoc_restart(char mode, const char *cmd)
+void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
 {
         writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
 }
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index a5b8fead7d61..f162f1b77cd2 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -663,16 +663,16 @@ static void corgi_poweroff(void)
                 /* Green LED off tells the bootloader to halt */
                 gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
 
-        pxa_restart('h', NULL);
+        pxa_restart(REBOOT_HARD, NULL);
 }
 
-static void corgi_restart(char mode, const char *cmd)
+static void corgi_restart(enum reboot_mode mode, const char *cmd)
 {
         if (!machine_is_corgi())
                 /* Green LED on tells the bootloader to reboot */
                 gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
 
-        pxa_restart('h', cmd);
+        pxa_restart(REBOOT_HARD, cmd);
 }
 
 static void __init corgi_init(void)
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index fd7ea39b78c0..8963984d1f43 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -9,6 +9,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/reboot.h>
+
 struct irq_data;
 
 extern void pxa_timer_init(void);
@@ -56,4 +58,4 @@ void __init pxa_set_btuart_info(void *info);
 void __init pxa_set_stuart_info(void *info);
 void __init pxa_set_hwuart_info(void *info);
 
-void pxa_restart(char, const char *);
+void pxa_restart(enum reboot_mode, const char *);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 654b0ac84dea..acc9d3cc0762 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -37,6 +37,7 @@
 #include <linux/wm97xx.h>
 #include <linux/mtd/physmap.h>
 #include <linux/usb/gpio_vbus.h>
+#include <linux/reboot.h>
 #include <linux/regulator/max1586.h>
 #include <linux/slab.h>
 #include <linux/i2c/pxa-i2c.h>
@@ -696,13 +697,13 @@ static void mioa701_machine_exit(void);
 static void mioa701_poweroff(void)
 {
         mioa701_machine_exit();
-        pxa_restart('s', NULL);
+        pxa_restart(REBOOT_SOFT, NULL);
 }
 
-static void mioa701_restart(char c, const char *cmd)
+static void mioa701_restart(enum reboot_mode c, const char *cmd)
 {
         mioa701_machine_exit();
-        pxa_restart('s', cmd);
+        pxa_restart(REBOOT_SOFT, cmd);
 }
 
 static struct gpio global_gpios[] = {
@@ -761,7 +762,6 @@ static void mioa701_machine_exit(void)
 
 MACHINE_START(MIOA701, "MIO A701")
         .atag_offset    = 0x100,
-        .restart_mode   = 's',
         .map_io         = &pxa27x_map_io,
         .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = &pxa27x_init_irq,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 50ccd5f1d560..711d37e26bd8 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -422,7 +422,7 @@ static struct i2c_board_info __initdata poodle_i2c_devices[] = {
 
 static void poodle_poweroff(void)
 {
-        pxa_restart('h', NULL);
+        pxa_restart(REBOOT_HARD, NULL);
 }
 
 static void __init poodle_init(void)
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 3fab583755d4..0d5dd646f61f 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -83,7 +83,7 @@ static void do_hw_reset(void)
         writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
 }
 
-void pxa_restart(char mode, const char *cmd)
+void pxa_restart(enum reboot_mode mode, const char *cmd)
 {
         local_irq_disable();
         local_fiq_disable();
@@ -91,14 +91,14 @@ void pxa_restart(char mode, const char *cmd)
         clear_reset_status(RESET_STATUS_ALL);
 
         switch (mode) {
-        case 's':
+        case REBOOT_SOFT:
                 /* Jump into ROM at address 0 */
                 soft_restart(0);
                 break;
-        case 'g':
+        case REBOOT_GPIO:
                 do_gpio_reset();
                 break;
-        case 'h':
+        case REBOOT_HARD:
         default:
                 do_hw_reset();
                 break;
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 362726c49c70..2125df0444e7 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -31,6 +31,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/io.h>
 #include <linux/module.h>
+#include <linux/reboot.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -924,10 +925,10 @@ static inline void spitz_i2c_init(void) {}
  ******************************************************************************/
 static void spitz_poweroff(void)
 {
-        pxa_restart('g', NULL);
+        pxa_restart(REBOOT_GPIO, NULL);
 }
 
-static void spitz_restart(char mode, const char *cmd)
+static void spitz_restart(enum reboot_mode mode, const char *cmd)
 {
         uint32_t msc0 = __raw_readl(MSC0);
         /* Bootloader magic for a reboot */
@@ -979,7 +980,6 @@ static void __init spitz_fixup(struct tag *tags, char **cmdline,
 
 #ifdef CONFIG_MACH_SPITZ
 MACHINE_START(SPITZ, "SHARP Spitz")
-        .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
         .nr_irqs        = PXA_NR_IRQS,
@@ -993,7 +993,6 @@ MACHINE_END
 
 #ifdef CONFIG_MACH_BORZOI
 MACHINE_START(BORZOI, "SHARP Borzoi")
-        .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
         .nr_irqs        = PXA_NR_IRQS,
@@ -1007,7 +1006,6 @@ MACHINE_END
 
 #ifdef CONFIG_MACH_AKITA
 MACHINE_START(AKITA, "SHARP Akita")
-        .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
         .nr_irqs        = PXA_NR_IRQS,
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 8f1ee92aea30..9aa852a8fab9 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -16,11 +16,11 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/clockchips.h>
+#include <linux/sched_clock.h>
 
 #include <asm/div64.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
-#include <asm/sched_clock.h>
 #include <mach/regs-ost.h>
 #include <mach/irqs.h>
 
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 3d91d2e5bf3a..0206b915a6f6 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -36,6 +36,7 @@
 #include <linux/input/matrix_keypad.h>
 #include <linux/i2c/pxa-i2c.h>
 #include <linux/usb/gpio_vbus.h>
+#include <linux/reboot.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -911,10 +912,10 @@ static struct platform_device *devices[] __initdata = {
 
 static void tosa_poweroff(void)
 {
-        pxa_restart('g', NULL);
+        pxa_restart(REBOOT_GPIO, NULL);
 }
 
-static void tosa_restart(char mode, const char *cmd)
+static void tosa_restart(enum reboot_mode mode, const char *cmd)
 {
         uint32_t msc0 = __raw_readl(MSC0);
 
@@ -969,7 +970,6 @@ static void __init fixup_tosa(struct tag *tags, char **cmdline,
 }
 
 MACHINE_START(TOSA, "SHARP Tosa")
-        .restart_mode   = 'g',
         .fixup          = fixup_tosa,
         .map_io         = pxa25x_map_io,
         .nr_irqs        = TOSA_NR_IRQS,
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 5b1c8bfe6fa9..c85ddb2a0ad0 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -29,6 +29,7 @@
 #include <linux/io.h>
 #include <linux/irqchip/arm-gic.h>
 #include <linux/platform_data/clk-realview.h>
+#include <linux/reboot.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -418,7 +419,7 @@ static void __init realview_eb_timer_init(void)
         realview_eb_twd_init();
 }
 
-static void realview_eb_restart(char mode, const char *cmd)
+static void realview_eb_restart(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index d5e83a1f6982..c5eade76461b 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -31,6 +31,7 @@
 #include <linux/io.h>
 #include <linux/irqchip/arm-gic.h>
 #include <linux/platform_data/clk-realview.h>
+#include <linux/reboot.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -329,7 +330,7 @@ static void __init realview_pb1176_timer_init(void)
         realview_timer_init(IRQ_DC1176_TIMER0);
 }
 
-static void realview_pb1176_restart(char mode, const char *cmd)
+static void realview_pb1176_restart(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index c3cfe213b5e6..f4b0962578fe 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -29,6 +29,7 @@
 #include <linux/io.h>
 #include <linux/irqchip/arm-gic.h>
 #include <linux/platform_data/clk-realview.h>
+#include <linux/reboot.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -316,7 +317,7 @@ static void __init realview_pb11mp_timer_init(void)
         realview_pb11mp_twd_init();
 }
 
-static void realview_pb11mp_restart(char mode, const char *cmd)
+static void realview_pb11mp_restart(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index dde652a59620..10a3e1d76891 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -29,6 +29,7 @@
 #include <linux/io.h>
 #include <linux/irqchip/arm-gic.h>
 #include <linux/platform_data/clk-realview.h>
+#include <linux/reboot.h>
 
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -264,7 +265,7 @@ static void __init realview_pba8_timer_init(void)
         realview_timer_init(IRQ_PBA8_TIMER0_1);
 }
 
-static void realview_pba8_restart(char mode, const char *cmd)
+static void realview_pba8_restart(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 54f0185b01e3..9d75493e3f0c 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -28,6 +28,7 @@
 #include <linux/io.h>
 #include <linux/irqchip/arm-gic.h>
 #include <linux/platform_data/clk-realview.h>
+#include <linux/reboot.h>
 
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -344,7 +345,7 @@ static void realview_pbx_fixup(struct tag *tags, char **from,
 #endif
 }
 
-static void realview_pbx_restart(char mode, const char *cmd)
+static void realview_pbx_restart(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index a302cf5e0fc7..09d602b10d57 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -20,6 +20,7 @@
 #include <linux/ata_platform.h>
 #include <linux/io.h>
 #include <linux/i2c.h>
+#include <linux/reboot.h>
 
 #include <asm/elf.h>
 #include <asm/mach-types.h>
@@ -201,7 +202,7 @@ static int __init rpc_init(void)
 
 arch_initcall(rpc_init);
 
-static void rpc_restart(char mode, const char *cmd)
+static void rpc_restart(enum reboot_mode mode, const char *cmd)
 {
         iomd_writeb(0, IOMD_ROMCR0);
 
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 6d9252e081ce..7791ac76f945 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -208,7 +208,7 @@ config S3C24XX_GPIO_EXTRA128
 
 config S3C24XX_PLL
         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
-        depends on ARM_S3C24XX
+        depends on ARM_S3C24XX_CPUFREQ
         help
           Compile in support for changing the PLL frequency from the
           S3C24XX series CPUfreq driver. The PLL takes time to settle
diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h
index 307c3714be55..84b280654f4c 100644
--- a/arch/arm/mach-s3c24xx/common.h
+++ b/arch/arm/mach-s3c24xx/common.h
@@ -12,6 +12,8 @@
 #ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
 #define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
 
+#include <linux/reboot.h>
+
 struct s3c2410_uartcfg;
 
 #ifdef CONFIG_CPU_S3C2410
@@ -20,7 +22,7 @@ extern  int s3c2410a_init(void);
 extern void s3c2410_map_io(void);
 extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void s3c2410_init_clocks(int xtal);
-extern void s3c2410_restart(char mode, const char *cmd);
+extern void s3c2410_restart(enum reboot_mode mode, const char *cmd);
 extern void s3c2410_init_irq(void);
 #else
 #define s3c2410_init_clocks NULL
@@ -36,7 +38,7 @@ extern void s3c2412_map_io(void);
 extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void s3c2412_init_clocks(int xtal);
 extern  int s3c2412_baseclk_add(void);
-extern void s3c2412_restart(char mode, const char *cmd);
+extern void s3c2412_restart(enum reboot_mode mode, const char *cmd);
 extern void s3c2412_init_irq(void);
 #else
 #define s3c2412_init_clocks NULL
@@ -51,7 +53,7 @@ extern void s3c2416_map_io(void);
 extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void s3c2416_init_clocks(int xtal);
 extern  int s3c2416_baseclk_add(void);
-extern void s3c2416_restart(char mode, const char *cmd);
+extern void s3c2416_restart(enum reboot_mode mode, const char *cmd);
 extern void s3c2416_init_irq(void);
 
 extern struct syscore_ops s3c2416_irq_syscore_ops;
@@ -66,7 +68,7 @@ extern struct syscore_ops s3c2416_irq_syscore_ops;
 extern void s3c244x_map_io(void);
 extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void s3c244x_init_clocks(int xtal);
-extern void s3c244x_restart(char mode, const char *cmd);
+extern void s3c244x_restart(enum reboot_mode mode, const char *cmd);
 #else
 #define s3c244x_init_clocks NULL
 #define s3c244x_init_uarts NULL
@@ -96,7 +98,7 @@ extern void s3c2443_map_io(void);
 extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void s3c2443_init_clocks(int xtal);
 extern  int s3c2443_baseclk_add(void);
-extern void s3c2443_restart(char mode, const char *cmd);
+extern void s3c2443_restart(enum reboot_mode mode, const char *cmd);
 extern void s3c2443_init_irq(void);
 #else
 #define s3c2443_init_clocks NULL
diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c
index ff384acc65b2..34676d1d5fec 100644
--- a/arch/arm/mach-s3c24xx/s3c2410.c
+++ b/arch/arm/mach-s3c24xx/s3c2410.c
@@ -22,6 +22,7 @@
 #include <linux/syscore_ops.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 #include <linux/io.h>
 
 #include <asm/mach/arch.h>
@@ -196,9 +197,9 @@ int __init s3c2410a_init(void)
         return s3c2410_init();
 }
 
-void s3c2410_restart(char mode, const char *cmd)
+void s3c2410_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's') {
+        if (mode == REBOOT_SOFT) {
                 soft_restart(0);
         }
 
diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c
index 0f864d4c97de..0251650cbf80 100644
--- a/arch/arm/mach-s3c24xx/s3c2412.c
+++ b/arch/arm/mach-s3c24xx/s3c2412.c
@@ -22,6 +22,7 @@
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -129,9 +130,9 @@ static void s3c2412_idle(void)
         cpu_do_idle();
 }
 
-void s3c2412_restart(char mode, const char *cmd)
+void s3c2412_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's')
+        if (mode == REBOOT_SOFT)
                 soft_restart(0);
 
         /* errata "Watch-dog/Software Reset Problem" specifies that
diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c
index b9c5d382dafb..9ef3ccfbe196 100644
--- a/arch/arm/mach-s3c24xx/s3c2416.c
+++ b/arch/arm/mach-s3c24xx/s3c2416.c
@@ -35,6 +35,7 @@
 #include <linux/syscore_ops.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -79,9 +80,9 @@ static struct device s3c2416_dev = {
         .bus            = &s3c2416_subsys,
 };
 
-void s3c2416_restart(char mode, const char *cmd)
+void s3c2416_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's')
+        if (mode == REBOOT_SOFT)
                 soft_restart(0);
 
         __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c
index 8328cd65bf3d..b6c71918b25c 100644
--- a/arch/arm/mach-s3c24xx/s3c2443.c
+++ b/arch/arm/mach-s3c24xx/s3c2443.c
@@ -22,6 +22,7 @@
 #include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -59,9 +60,9 @@ static struct device s3c2443_dev = {
         .bus            = &s3c2443_subsys,
 };
 
-void s3c2443_restart(char mode, const char *cmd)
+void s3c2443_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's')
+        if (mode == REBOOT_SOFT)
                 soft_restart(0);
 
         __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index d0423e2544c1..911b555029fc 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -18,6 +18,7 @@
 #include <linux/init.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 #include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/clk.h>
@@ -198,9 +199,9 @@ struct syscore_ops s3c244x_pm_syscore_ops = {
         .resume         = s3c244x_resume,
 };
 
-void s3c244x_restart(char mode, const char *cmd)
+void s3c244x_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's')
+        if (mode == REBOOT_SOFT)
                 soft_restart(0);
 
         samsung_wdt_reset();
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 1aed6f4be1ce..3f62e467b129 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -21,6 +21,7 @@
 #include <linux/ioport.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 #include <linux/io.h>
 #include <linux/dma-mapping.h>
 #include <linux/irq.h>
@@ -381,9 +382,9 @@ static int __init s3c64xx_init_irq_eint(void)
 }
 arch_initcall(s3c64xx_init_irq_eint);
 
-void s3c64xx_restart(char mode, const char *cmd)
+void s3c64xx_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode != 's')
+        if (mode != REBOOT_SOFT)
                 samsung_wdt_reset();
 
         /* if all else fails, or mode was for soft, jump to 0 */
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h
index 6cfc99bdfb37..e8f990b37665 100644
--- a/arch/arm/mach-s3c64xx/common.h
+++ b/arch/arm/mach-s3c64xx/common.h
@@ -17,13 +17,15 @@
 #ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H
 #define __ARCH_ARM_MACH_S3C64XX_COMMON_H
 
+#include <linux/reboot.h>
+
 void s3c64xx_init_irq(u32 vic0, u32 vic1);
 void s3c64xx_init_io(struct map_desc *mach_desc, int size);
 
 void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
 void s3c64xx_setup_clocks(void);
 
-void s3c64xx_restart(char mode, const char *cmd);
+void s3c64xx_restart(enum reboot_mode mode, const char *cmd);
 void s3c64xx_init_late(void);
 
 #ifdef CONFIG_CPU_S3C6400
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 76d0053bf564..dfdfdc320ce7 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -24,6 +24,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
 #include <linux/irq.h>
+#include <linux/reboot.h>
 
 #include <asm/irq.h>
 #include <asm/proc-fns.h>
@@ -439,9 +440,9 @@ static int __init s5p64x0_init_irq_eint(void)
 }
 arch_initcall(s5p64x0_init_irq_eint);
 
-void s5p64x0_restart(char mode, const char *cmd)
+void s5p64x0_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode != 's')
+        if (mode != REBOOT_SOFT)
                 samsung_wdt_reset();
 
         soft_restart(0);
diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h
index f8a60fdc5884..f3a9b43cba4a 100644
--- a/arch/arm/mach-s5p64x0/common.h
+++ b/arch/arm/mach-s5p64x0/common.h
@@ -12,6 +12,8 @@
 #ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H
 #define __ARCH_ARM_MACH_S5P64X0_COMMON_H
 
+#include <linux/reboot.h>
+
 void s5p6440_init_irq(void);
 void s5p6450_init_irq(void);
 void s5p64x0_init_io(struct map_desc *mach_desc, int size);
@@ -22,7 +24,7 @@ void s5p6440_setup_clocks(void);
 void s5p6450_register_clocks(void);
 void s5p6450_setup_clocks(void);
 
-void s5p64x0_restart(char mode, const char *cmd);
+void s5p64x0_restart(enum reboot_mode mode, const char *cmd);
 
 #ifdef CONFIG_CPU_S5P6440
 
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index 511031564d35..4bdfecf6d024 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -24,6 +24,7 @@
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
+#include <linux/reboot.h>
 
 #include <asm/irq.h>
 #include <asm/proc-fns.h>
@@ -217,9 +218,9 @@ void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no)
         s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
 }
 
-void s5pc100_restart(char mode, const char *cmd)
+void s5pc100_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode != 's')
+        if (mode != REBOOT_SOFT)
                 samsung_wdt_reset();
 
         soft_restart(0);
diff --git a/arch/arm/mach-s5pc100/common.h b/arch/arm/mach-s5pc100/common.h
index c41f912e9e1f..08d782d65d7b 100644
--- a/arch/arm/mach-s5pc100/common.h
+++ b/arch/arm/mach-s5pc100/common.h
@@ -12,13 +12,15 @@
 #ifndef __ARCH_ARM_MACH_S5PC100_COMMON_H
 #define __ARCH_ARM_MACH_S5PC100_COMMON_H
 
+#include <linux/reboot.h>
+
 void s5pc100_init_io(struct map_desc *mach_desc, int size);
 void s5pc100_init_irq(void);
 
 void s5pc100_register_clocks(void);
 void s5pc100_setup_clocks(void);
 
-void s5pc100_restart(char mode, const char *cmd);
+void s5pc100_restart(enum reboot_mode mode, const char *cmd);
 
 extern  int s5pc100_init(void);
 extern void s5pc100_map_io(void);
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 9dfe93e2624d..023f1a796a9c 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -143,7 +143,7 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
         }
 };
 
-void s5pv210_restart(char mode, const char *cmd)
+void s5pv210_restart(enum reboot_mode mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
 }
diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h
index 0a1cc0aef720..fe1beb54e548 100644
--- a/arch/arm/mach-s5pv210/common.h
+++ b/arch/arm/mach-s5pv210/common.h
@@ -12,13 +12,15 @@
 #ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H
 #define __ARCH_ARM_MACH_S5PV210_COMMON_H
 
+#include <linux/reboot.h>
+
 void s5pv210_init_io(struct map_desc *mach_desc, int size);
 void s5pv210_init_irq(void);
 
 void s5pv210_register_clocks(void);
 void s5pv210_setup_clocks(void);
 
-void s5pv210_restart(char mode, const char *cmd);
+void s5pv210_restart(enum reboot_mode mode, const char *cmd);
 
 extern  int s5pv210_init(void);
 extern void s5pv210_map_io(void);
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index ed2b85485b9d..ad40ab0f5dbd 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -377,12 +377,8 @@ static struct max8998_platform_data aquila_max8998_pdata = {
         .buck1_set1     = S5PV210_GPH0(3),
         .buck1_set2     = S5PV210_GPH0(4),
         .buck2_set3     = S5PV210_GPH0(5),
-        .buck1_voltage1 = 1200000,
-        .buck1_voltage2 = 1200000,
-        .buck1_voltage3 = 1200000,
-        .buck1_voltage4 = 1200000,
-        .buck2_voltage1 = 1200000,
-        .buck2_voltage2 = 1200000,
+        .buck1_voltage  = { 1200000, 1200000, 1200000, 1200000 },
+        .buck2_voltage  = { 1200000, 1200000 },
 };
 #endif
 
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 30b24ad84f49..e5cd9fbf19e9 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -580,12 +580,8 @@ static struct max8998_platform_data goni_max8998_pdata = {
         .buck1_set1     = S5PV210_GPH0(3),
         .buck1_set2     = S5PV210_GPH0(4),
         .buck2_set3     = S5PV210_GPH0(5),
-        .buck1_voltage1 = 1200000,
-        .buck1_voltage2 = 1200000,
-        .buck1_voltage3 = 1200000,
-        .buck1_voltage4 = 1200000,
-        .buck2_voltage1 = 1200000,
-        .buck2_voltage2 = 1200000,
+        .buck1_voltage  = { 1200000, 1200000, 1200000, 1200000 },
+        .buck2_voltage  = { 1200000, 1200000 },
 };
 #endif
 
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 9db3e98e8b85..f25b6119e028 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -19,6 +19,7 @@
 #include <linux/cpufreq.h>
 #include <linux/ioport.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 
 #include <video/sa1100fb.h>
 
@@ -131,9 +132,9 @@ static void sa1100_power_off(void)
         PMCR = PMCR_SF;
 }
 
-void sa11x0_restart(char mode, const char *cmd)
+void sa11x0_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's') {
+        if (mode == REBOOT_SOFT) {
                 /* Jump into ROM at address 0 */
                 soft_restart(0);
         } else {
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index 2abc6a1f6e86..9a33695c9492 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -3,12 +3,13 @@
  *
  * Author: Nicolas Pitre
  */
+#include <linux/reboot.h>
 
 extern void sa1100_timer_init(void);
 extern void __init sa1100_map_io(void);
 extern void __init sa1100_init_irq(void);
 extern void __init sa1100_init_gpio(void);
-extern void sa11x0_restart(char, const char *);
+extern void sa11x0_restart(enum reboot_mode, const char *);
 extern void sa11x0_init_late(void);
 
 #define SET_BANK(__nr,__start,__size) \
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index a59a13a665a6..713c86cd3d64 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -14,9 +14,9 @@
 #include <linux/irq.h>
 #include <linux/timex.h>
 #include <linux/clockchips.h>
+#include <linux/sched_clock.h>
 
 #include <asm/mach/time.h>
-#include <asm/sched_clock.h>
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index 153555724988..1d32c5e8eab6 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -11,6 +11,7 @@
 #include <linux/serial_8250.h>
 #include <linux/io.h>
 #include <linux/cpu.h>
+#include <linux/reboot.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -24,7 +25,7 @@
 #define ROMCARD_SIZE            0x08000000
 #define ROMCARD_START           0x10000000
 
-static void shark_restart(char mode, const char *cmd)
+static void shark_restart(enum reboot_mode mode, const char *cmd)
 {
         short temp;
         /* Reset the Machine via pc[3] of the sequoia chipset */
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 44a621505eeb..e115f6742107 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -42,6 +42,7 @@
 #include <linux/mmc/sh_mmcif.h>
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/i2c-gpio.h>
+#include <linux/reboot.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <mach/r8a7740.h>
@@ -377,7 +378,7 @@ static struct resource sh_eth_resources[] = {
 };
 
 static struct platform_device sh_eth_device = {
-        .name = "sh-eth",
+        .name = "r8a7740-gether",
         .id = -1,
         .dev = {
                 .platform_data = &sh_eth_platdata,
@@ -1259,7 +1260,7 @@ static void __init eva_add_early_devices(void)
 }
 
 #define RESCNT2 IOMEM(0xe6188020)
-static void eva_restart(char mode, const char *cmd)
+static void eva_restart(enum reboot_mode mode, const char *cmd)
 {
         /* Do soft power on reset */
         writel((1 << 31), RESCNT2);
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 165483c9bee2..1068120d339f 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -34,6 +34,7 @@
 #include <linux/pinctrl/machine.h>
 #include <linux/pinctrl/pinconf-generic.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/smsc911x.h>
@@ -890,7 +891,7 @@ static void __init kzm_init(void)
         sh73a0_pm_init();
 }
 
-static void kzm9g_restart(char mode, const char *cmd)
+static void kzm9g_restart(enum reboot_mode mode, const char *cmd)
 {
 #define RESCNT2 IOMEM(0xe6188020)
         /* Do soft power on reset */
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 7fd32d604e34..de10fd78bf2b 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -594,7 +594,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("e6860000.sdhi",          &mstp_clks[MSTP313]),
         CLKDEV_DEV_ID("sh_mmcif",               &mstp_clks[MSTP312]),
         CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
-        CLKDEV_DEV_ID("sh-eth",                 &mstp_clks[MSTP309]),
+        CLKDEV_DEV_ID("r8a7740-gether",         &mstp_clks[MSTP309]),
         CLKDEV_DEV_ID("e9a00000.sh-eth",        &mstp_clks[MSTP309]),
         CLKDEV_DEV_ID("renesas_tpu_pwm",        &mstp_clks[MSTP304]),
 
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index 53798e5037d7..a0e9eb72e46d 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -145,7 +145,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
-        CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
+        CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
         CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
         CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
         CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index 9daeb8c37483..10340f5becbb 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -165,7 +165,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("rcar-pcie", &mstp_clks[MSTP116]), /* PCIe */
         CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */
         CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */
-        CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
+        CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
         CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */
         CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */
         CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
index 6f9865467258..bfd920083a3b 100644
--- a/arch/arm/mach-shmobile/headsmp-scu.S
+++ b/arch/arm/mach-shmobile/headsmp-scu.S
@@ -23,7 +23,6 @@
 #include <linux/init.h>
 #include <asm/memory.h>
 
-        __CPUINIT
 /*
  * Boot code for secondary CPUs.
  *
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
index 559d1ce5f57e..a9d212498987 100644
--- a/arch/arm/mach-shmobile/headsmp.S
+++ b/arch/arm/mach-shmobile/headsmp.S
@@ -14,8 +14,6 @@
 #include <linux/init.h>
 #include <asm/memory.h>
 
-        __CPUINIT
-
 ENTRY(shmobile_invalidate_start)
         bl      v7_invalidate_l1
         b       secondary_startup
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index 899a86c31ec9..1ccddd228112 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -287,14 +287,14 @@ static struct gpio_em_config gio3_config = {
 static struct resource gio3_resources[] = {
         [0] = {
                 .name   = "GIO_096",
-                .start  = 0xe0050100,
-                .end    = 0xe005012b,
+                .start  = 0xe0050180,
+                .end    = 0xe00501ab,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
                 .name   = "GIO_096",
-                .start  = 0xe0050140,
-                .end    = 0xe005015f,
+                .start  = 0xe00501c0,
+                .end    = 0xe00501df,
                 .flags  = IORESOURCE_MEM,
         },
         [2] = {
diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
index c5a75a7a508f..7f45c2edbca9 100644
--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
@@ -62,7 +62,7 @@ enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFB3 };
 static const struct plat_sci_port scif[] = {
         SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
         SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
-        SCIFB_DATA(SCIFB0, 0xe6c50000, gic_spi(145)), /* SCIFB0 */
+        SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
         SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
         SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
         SCIFB_DATA(SCIFB3, 0xe6cf0000, gic_spi(151)), /* SCIFB3 */
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index 80991b35f4ac..22a05a869d25 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -30,7 +30,7 @@
 
 #define EMEV2_SCU_BASE 0x1e000000
 
-static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
         return 0;
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 526cfaae81c1..9bdf810f2a87 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -81,7 +81,7 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
         return ret ? ret : 1;
 }
 
-static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         struct r8a7779_pm_ch *ch = NULL;
         int ret = -EIO;
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index d613113a04bd..d5fc3ed4e315 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -48,7 +48,7 @@ void __init sh73a0_register_twd(void)
 }
 #endif
 
-static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         cpu = cpu_logical_map(cpu);
 
diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index 9004bfb1756e..95c115d8b5ee 100644
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -10,7 +10,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
         .arch   armv7-a
 
 ENTRY(secondary_trampoline)
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index b51ce8c7929d..5356a72bc8ce 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -29,7 +29,7 @@
 
 #include "core.h"
 
-static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
 
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 8ea11b472b91..bfce9641e32f 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -19,6 +19,7 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
+#include <linux/reboot.h>
 
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/arch.h>
@@ -89,13 +90,13 @@ static void __init socfpga_init_irq(void)
         socfpga_sysmgr_init();
 }
 
-static void socfpga_cyclone5_restart(char mode, const char *cmd)
+static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd)
 {
         u32 temp;
 
         temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
 
-        if (mode == 'h')
+        if (mode == REBOOT_HARD)
                 temp |= RSTMGR_CTRL_SWCOLDRSTREQ;
         else
                 temp |= RSTMGR_CTRL_SWWARMRSTREQ;
diff --git a/arch/arm/mach-spear/generic.h b/arch/arm/mach-spear/generic.h
index a9fd45362fee..a99d90a4d09c 100644
--- a/arch/arm/mach-spear/generic.h
+++ b/arch/arm/mach-spear/generic.h
@@ -16,6 +16,8 @@
 #include <linux/dmaengine.h>
 #include <linux/amba/pl08x.h>
 #include <linux/init.h>
+#include <linux/reboot.h>
+
 #include <asm/mach/time.h>
 
 extern void spear13xx_timer_init(void);
@@ -32,10 +34,10 @@ void __init spear6xx_clk_init(void __iomem *misc_base);
 void __init spear13xx_map_io(void);
 void __init spear13xx_l2x0_init(void);
 
-void spear_restart(char, const char *);
+void spear_restart(enum reboot_mode, const char *);
 
 void spear13xx_secondary_startup(void);
-void __cpuinit spear13xx_cpu_die(unsigned int cpu);
+void spear13xx_cpu_die(unsigned int cpu);
 
 extern struct smp_operations spear13xx_smp_ops;
 
diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c
index 9c4c722c954e..5c4a19887b2b 100644
--- a/arch/arm/mach-spear/platsmp.c
+++ b/arch/arm/mach-spear/platsmp.c
@@ -24,7 +24,7 @@ static DEFINE_SPINLOCK(boot_lock);
 
 static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
 
-static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
+static void spear13xx_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -40,7 +40,7 @@ static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static int __cpuinit spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/mach-spear/restart.c b/arch/arm/mach-spear/restart.c
index 2b44500bb718..ce5e098c4888 100644
--- a/arch/arm/mach-spear/restart.c
+++ b/arch/arm/mach-spear/restart.c
@@ -12,14 +12,15 @@
  */
 #include <linux/io.h>
 #include <linux/amba/sp810.h>
+#include <linux/reboot.h>
 #include <asm/system_misc.h>
 #include <mach/spear.h>
 #include "generic.h"
 
 #define SPEAR13XX_SYS_SW_RES                    (VA_MISC_BASE + 0x204)
-void spear_restart(char mode, const char *cmd)
+void spear_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's') {
+        if (mode == REBOOT_SOFT) {
                 /* software reset, Jump into ROM at address 0 */
                 soft_restart(0);
         } else {
diff --git a/arch/arm/mach-spear/spear3xx.c b/arch/arm/mach-spear/spear3xx.c
index 0227c97797cd..bf3b1fd8cb23 100644
--- a/arch/arm/mach-spear/spear3xx.c
+++ b/arch/arm/mach-spear/spear3xx.c
@@ -56,8 +56,8 @@ struct pl08x_platform_data pl080_plat_data = {
         },
         .lli_buses = PL08X_AHB1,
         .mem_buses = PL08X_AHB1,
-        .get_signal = pl080_get_signal,
-        .put_signal = pl080_put_signal,
+        .get_xfer_signal = pl080_get_signal,
+        .put_xfer_signal = pl080_put_signal,
 };
 
 /*
diff --git a/arch/arm/mach-spear/spear6xx.c b/arch/arm/mach-spear/spear6xx.c
index 8b0295a41226..da26fa5b68d7 100644
--- a/arch/arm/mach-spear/spear6xx.c
+++ b/arch/arm/mach-spear/spear6xx.c
@@ -334,8 +334,8 @@ static struct pl08x_platform_data spear6xx_pl080_plat_data = {
         },
         .lli_buses = PL08X_AHB1,
         .mem_buses = PL08X_AHB1,
-        .get_signal = pl080_get_signal,
-        .put_signal = pl080_put_signal,
+        .get_xfer_signal = pl080_get_signal,
+        .put_xfer_signal = pl080_put_signal,
         .slave_channels = spear600_dma_info,
         .num_slave_channels = ARRAY_SIZE(spear600_dma_info),
 };
diff --git a/arch/arm/mach-sti/platsmp.c b/arch/arm/mach-sti/platsmp.c
index 977a863468fc..dce50d983a8e 100644
--- a/arch/arm/mach-sti/platsmp.c
+++ b/arch/arm/mach-sti/platsmp.c
@@ -27,7 +27,7 @@
 
 #include "smp.h"
 
-static void __cpuinit write_pen_release(int val)
+static void write_pen_release(int val)
 {
         pen_release = val;
         smp_wmb();
@@ -37,7 +37,7 @@ static void __cpuinit write_pen_release(int val)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-void __cpuinit sti_secondary_init(unsigned int cpu)
+void sti_secondary_init(unsigned int cpu)
 {
         trace_hardirqs_off();
 
@@ -54,7 +54,7 @@ void __cpuinit sti_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-int __cpuinit sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
+int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 84485a10fc3a..38a3c55527c8 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -18,6 +18,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
 
 #include <linux/clk/sunxi.h>
 
@@ -33,7 +34,7 @@
 
 static void __iomem *wdt_base;
 
-static void sun4i_restart(char mode, const char *cmd)
+static void sun4i_restart(enum reboot_mode mode, const char *cmd)
 {
         if (!wdt_base)
                 return;
diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h
index 1787327fae3a..9a6659fe2dc2 100644
--- a/arch/arm/mach-tegra/board.h
+++ b/arch/arm/mach-tegra/board.h
@@ -23,8 +23,9 @@
 #define __MACH_TEGRA_BOARD_H
 
 #include <linux/types.h>
+#include <linux/reboot.h>
 
-void tegra_assert_system_reset(char mode, const char *cmd);
+void tegra_assert_system_reset(enum reboot_mode mode, const char *cmd);
 
 void __init tegra_init_early(void);
 void __init tegra_map_common_io(void);
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index b25153e2ebaa..94a119a35af8 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/reboot.h>
 #include <linux/irqchip.h>
 #include <linux/clk-provider.h>
 
@@ -68,7 +69,7 @@ void __init tegra_dt_init_irq(void)
 }
 #endif
 
-void tegra_assert_system_reset(char mode, const char *cmd)
+void tegra_assert_system_reset(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0);
         u32 reg;
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 24db4ac428ae..97b33a2a2d75 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -35,7 +35,7 @@
 
 static cpumask_t tegra_cpu_init_mask;
 
-static void __cpuinit tegra_secondary_init(unsigned int cpu)
+static void tegra_secondary_init(unsigned int cpu)
 {
         cpumask_set_cpu(cpu, &tegra_cpu_init_mask);
 }
@@ -167,7 +167,7 @@ static int tegra114_boot_secondary(unsigned int cpu, struct task_struct *idle)
         return ret;
 }
 
-static int __cpuinit tegra_boot_secondary(unsigned int cpu,
+static int tegra_boot_secondary(unsigned int cpu,
                                           struct task_struct *idle)
 {
         if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20)
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 94e69bee3da5..261fec140c06 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -191,7 +191,7 @@ static const char *lp_state[TEGRA_MAX_SUSPEND_MODE] = {
         [TEGRA_SUSPEND_LP0] = "LP0",
 };
 
-static int __cpuinit tegra_suspend_enter(suspend_state_t state)
+static int tegra_suspend_enter(suspend_state_t state)
 {
         enum tegra_suspend_mode mode = tegra_pmc_get_suspend_mode();
 
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 4f7ac2a11452..35670b15f281 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -300,11 +300,11 @@ static void __init u300_init_check_chip(void)
 /* Forward declare this function from the watchdog */
 void coh901327_watchdog_reset(void);
 
-static void u300_restart(char mode, const char *cmd)
+static void u300_restart(enum reboot_mode mode, const char *cmd)
 {
         switch (mode) {
-        case 's':
-        case 'h':
+        case REBOOT_SOFT:
+        case REBOOT_HARD:
 #ifdef CONFIG_COH901327_WATCHDOG
                 coh901327_watchdog_reset();
 #endif
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 390ae5feb1d0..b5db207dfd1e 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -21,9 +21,9 @@
 #include <linux/delay.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
+#include <linux/sched_clock.h>
 
 /* Generic stuff */
-#include <asm/sched_clock.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 14d90469392f..1f296e796a4f 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -54,7 +54,7 @@ static void __iomem *scu_base_addr(void)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-static void __cpuinit ux500_secondary_init(unsigned int cpu)
+static void ux500_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -69,7 +69,7 @@ static void __cpuinit ux500_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 54bb80b012ac..3b0572f30d56 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -38,6 +38,7 @@
 #include <linux/clkdev.h>
 #include <linux/mtd/physmap.h>
 #include <linux/bitops.h>
+#include <linux/reboot.h>
 
 #include <asm/irq.h>
 #include <asm/hardware/arm_timer.h>
@@ -733,7 +734,7 @@ static void versatile_leds_event(led_event_t ledevt)
 }
 #endif  /* CONFIG_LEDS */
 
-void versatile_restart(char mode, const char *cmd)
+void versatile_restart(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
         u32 val;
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index 5c1b87d1da6b..f06d5768e428 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -24,13 +24,14 @@
 
 #include <linux/amba/bus.h>
 #include <linux/of_platform.h>
+#include <linux/reboot.h>
 
 extern void __init versatile_init(void);
 extern void __init versatile_init_early(void);
 extern void __init versatile_init_irq(void);
 extern void __init versatile_map_io(void);
 extern void versatile_timer_init(void);
-extern void versatile_restart(char, const char *);
+extern void versatile_restart(enum reboot_mode, const char *);
 extern unsigned int mmc_status(struct device *dev);
 #ifdef CONFIG_OF
 extern struct of_dev_auxdata versatile_auxdata_lookup[];
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index f8f2f00856e0..eefaa60d6614 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -21,6 +21,7 @@
 #include <linux/clocksource.h>
 #include <linux/io.h>
 #include <linux/pm.h>
+#include <linux/reboot.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -46,7 +47,7 @@
 
 static void __iomem *pmc_base;
 
-void vt8500_restart(char mode, const char *cmd)
+void vt8500_restart(enum reboot_mode mode, const char *cmd)
 {
         if (pmc_base)
                 writel(1, pmc_base + VT8500_PMSR_REG);
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 9e4dd8b63c4a..b1eabaad50a5 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -230,9 +230,9 @@ void __init nuc900_init_clocks(void)
 #define WTE     (1 << 7)
 #define WTRE    (1 << 1)
 
-void nuc9xx_restart(char mode, const char *cmd)
+void nuc9xx_restart(enum reboot_mode mode, const char *cmd)
 {
-        if (mode == 's') {
+        if (mode == REBOOT_SOFT) {
                 /* Jump into ROM at address 0 */
                 soft_restart(0);
         } else {
diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h
index 88ef4b267089..e3ab1e1381f1 100644
--- a/arch/arm/mach-w90x900/nuc9xx.h
+++ b/arch/arm/mach-w90x900/nuc9xx.h
@@ -14,10 +14,13 @@
  * published by the Free Software Foundation.
  *
  */
+
+#include <linux/reboot.h>
+
 struct map_desc;
 
 /* core initialisation functions */
 
 extern void nuc900_init_irq(void);
 extern void nuc900_timer_init(void);
-extern void nuc9xx_restart(char, const char *);
+extern void nuc9xx_restart(enum reboot_mode, const char *);
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 4130e65a0e3f..5b799c29886e 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -101,7 +101,7 @@ static const char * const zynq_dt_match[] = {
         NULL
 };
 
-MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
+DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
         .smp            = smp_ops(zynq_smp_ops),
         .map_io         = zynq_map_io,
         .init_machine   = zynq_init_machine,
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index fbbd0e21c404..3040d219570f 100644
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -27,7 +27,7 @@ extern void secondary_startup(void);
 extern char zynq_secondary_trampoline;
 extern char zynq_secondary_trampoline_jump;
 extern char zynq_secondary_trampoline_end;
-extern int __cpuinit zynq_cpun_start(u32 address, int cpu);
+extern int zynq_cpun_start(u32 address, int cpu);
 extern struct smp_operations zynq_smp_ops __initdata;
 #endif
 
diff --git a/arch/arm/mach-zynq/headsmp.S b/arch/arm/mach-zynq/headsmp.S
index d183cd234a9b..d4cd5f34fe5c 100644
--- a/arch/arm/mach-zynq/headsmp.S
+++ b/arch/arm/mach-zynq/headsmp.S
@@ -9,8 +9,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 ENTRY(zynq_secondary_trampoline)
         ldr     r0, [pc]
         bx      r0
diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c
index 023f225493f2..689fbbc3d9c8 100644
--- a/arch/arm/mach-zynq/platsmp.c
+++ b/arch/arm/mach-zynq/platsmp.c
@@ -30,11 +30,11 @@
 /*
  * Store number of cores in the system
  * Because of scu_get_core_count() must be in __init section and can't
- * be called from zynq_cpun_start() because it is in __cpuinit section.
+ * be called from zynq_cpun_start() because it is not in __init section.
  */
 static int ncores;
 
-int __cpuinit zynq_cpun_start(u32 address, int cpu)
+int zynq_cpun_start(u32 address, int cpu)
 {
         u32 trampoline_code_size = &zynq_secondary_trampoline_end -
                                                 &zynq_secondary_trampoline;
@@ -92,7 +92,7 @@ int __cpuinit zynq_cpun_start(u32 address, int cpu)
 }
 EXPORT_SYMBOL(zynq_cpun_start);
 
-static int __cpuinit zynq_boot_secondary(unsigned int cpu,
+static int zynq_boot_secondary(unsigned int cpu,
                                                 struct task_struct *idle)
 {
         return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 7ec02961dfa0..7f9b1798c6cf 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1328,6 +1328,15 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
         if (gfp & GFP_ATOMIC)
                 return __iommu_alloc_atomic(dev, size, handle);
 
+        /*
+         * Following is a work-around (a.k.a. hack) to prevent pages
+         * with __GFP_COMP being passed to split_page() which cannot
+         * handle them.  The real problem is that this flag probably
+         * should be 0 on ARM as it is not supported on this
+         * platform; see CONFIG_HUGETLBFS.
+         */
+        gfp &= ~(__GFP_COMP);
+
         pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
         if (!pages)
                 return NULL;
@@ -1386,16 +1395,17 @@ static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
                           dma_addr_t handle, struct dma_attrs *attrs)
 {
-        struct page **pages = __iommu_get_pages(cpu_addr, attrs);
+        struct page **pages;
         size = PAGE_ALIGN(size);
 
-        if (!pages) {
-                WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
+        if (__in_atomic_pool(cpu_addr, size)) {
+                __iommu_free_atomic(dev, cpu_addr, handle, size);
                 return;
         }
 
-        if (__in_atomic_pool(cpu_addr, size)) {
-                __iommu_free_atomic(dev, cpu_addr, handle, size);
+        pages = __iommu_get_pages(cpu_addr, attrs);
+        if (!pages) {
+                WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
                 return;
         }
 
@@ -1650,13 +1660,27 @@ static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *p
 {
         struct dma_iommu_mapping *mapping = dev->archdata.mapping;
         dma_addr_t dma_addr;
-        int ret, len = PAGE_ALIGN(size + offset);
+        int ret, prot, len = PAGE_ALIGN(size + offset);
 
         dma_addr = __alloc_iova(mapping, len);
         if (dma_addr == DMA_ERROR_CODE)
                 return dma_addr;
 
-        ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
+        switch (dir) {
+        case DMA_BIDIRECTIONAL:
+                prot = IOMMU_READ | IOMMU_WRITE;
+                break;
+        case DMA_TO_DEVICE:
+                prot = IOMMU_READ;
+                break;
+        case DMA_FROM_DEVICE:
+                prot = IOMMU_WRITE;
+                break;
+        default:
+                prot = 0;
+        }
+
+        ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
         if (ret < 0)
                 goto fail;
 
@@ -1921,7 +1945,7 @@ void arm_iommu_detach_device(struct device *dev)
 
         iommu_detach_device(mapping->domain, dev);
         kref_put(&mapping->kref, release_iommu_mapping);
-        mapping = NULL;
+        dev->archdata.mapping = NULL;
         set_dma_ops(dev, NULL);
 
         pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 6833cbead6cc..15225d829d71 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -597,7 +597,7 @@ void __init mem_init(void)
 
 #ifdef CONFIG_SA1111
         /* now that our DMA memory is actually so designated, we can free it */
-        free_reserved_area(__va(PHYS_PFN_OFFSET), swapper_pg_dir, -1, NULL);
+        free_reserved_area(__va(PHYS_OFFSET), swapper_pg_dir, -1, NULL);
 #endif
 
         free_highpages();
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 10062ceadd1c..0c6356255fe3 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -181,11 +181,9 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
         if (mmap_is_legacy()) {
                 mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
                 mm->get_unmapped_area = arch_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 mm->mmap_base = mmap_base(random_factor);
                 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
 
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index d7229d28c7f8..4f56617a2392 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -950,7 +950,7 @@ void __init debug_ll_io_init(void)
         map.virtual &= PAGE_MASK;
         map.length = PAGE_SIZE;
         map.type = MT_DEVICE;
-        create_mapping(&map);
+        iotable_init(&map, 1);
 }
 #endif
 
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 2bb61e703d6c..d1a2d05971e0 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -443,8 +443,6 @@ ENTRY(cpu_arm1020_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm1020_setup, #function
 __arm1020_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 8f96aa40f510..9d89405c3d03 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -425,8 +425,6 @@ ENTRY(cpu_arm1020e_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm1020e_setup, #function
 __arm1020e_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 8ebe4a469a22..6f01a0ae3b30 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -407,8 +407,6 @@ ENTRY(cpu_arm1022_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm1022_setup, #function
 __arm1022_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 093fc7e520c3..4799a24b43e6 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -396,9 +396,6 @@ ENTRY(cpu_arm1026_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-
-        __CPUINIT
-
         .type   __arm1026_setup, #function
 __arm1026_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 0ac908c7ade1..d42c37f9f5bc 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -116,8 +116,6 @@ ENTRY(cpu_arm720_reset)
 ENDPROC(cpu_arm720_reset)
                 .popsection
 
-        __CPUINIT
-
         .type   __arm710_setup, #function
 __arm710_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index fde2d2a794cf..9b0ae90cbf17 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -60,8 +60,6 @@ ENTRY(cpu_arm740_reset)
 ENDPROC(cpu_arm740_reset)
         .popsection
 
-        __CPUINIT
-
         .type   __arm740_setup, #function
 __arm740_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 6ddea3e464bd..f6cc3f63ce39 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -51,8 +51,6 @@ ENTRY(cpu_arm7tdmi_reset)
 ENDPROC(cpu_arm7tdmi_reset)
                 .popsection
 
-                __CPUINIT
-
                 .type   __arm7tdmi_setup, #function
 __arm7tdmi_setup:
                 mov     pc, lr
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 2556cf1c2da1..549557df6d57 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -410,8 +410,6 @@ ENTRY(cpu_arm920_do_resume)
 ENDPROC(cpu_arm920_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __arm920_setup, #function
 __arm920_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 4464c49d7449..2a758b06c6f6 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -388,8 +388,6 @@ ENTRY(cpu_arm922_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm922_setup, #function
 __arm922_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 281eb9b9c1d6..97448c3acf38 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -438,8 +438,6 @@ ENTRY(cpu_arm925_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm925_setup, #function
 __arm925_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 344c8a548cc0..0f098f407c9f 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -425,8 +425,6 @@ ENTRY(cpu_arm926_do_resume)
 ENDPROC(cpu_arm926_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __arm926_setup, #function
 __arm926_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 8da189d4a402..1c39a704ff6e 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -273,8 +273,6 @@ ENDPROC(arm940_dma_unmap_area)
         @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
         define_cache_functions arm940
 
-        __CPUINIT
-
         .type   __arm940_setup, #function
 __arm940_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index f666cf34075a..0289cd905e73 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -326,8 +326,6 @@ ENTRY(cpu_arm946_dcache_clean_area)
         mcr     p15, 0, r0, c7, c10, 4          @ drain WB
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm946_setup, #function
 __arm946_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index 8881391dfb9e..f51197ba754a 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -51,8 +51,6 @@ ENTRY(cpu_arm9tdmi_reset)
 ENDPROC(cpu_arm9tdmi_reset)
                 .popsection
 
-                __CPUINIT
-
                 .type   __arm9tdmi_setup, #function
 __arm9tdmi_setup:
                 mov     pc, lr
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index aaeb6c127c7a..2dfc0f1d3bfd 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -135,8 +135,6 @@ ENTRY(cpu_fa526_set_pte_ext)
 #endif
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __fa526_setup, #function
 __fa526_setup:
         /* On return of this routine, r0 must carry correct flags for CFG register */
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 4106b09e0c29..d5146b98c8d1 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -514,8 +514,6 @@ ENTRY(cpu_feroceon_set_pte_ext)
 #endif
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __feroceon_setup, #function
 __feroceon_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 0b60dd3d742a..40acba595731 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -383,8 +383,6 @@ ENTRY(cpu_mohawk_do_resume)
 ENDPROC(cpu_mohawk_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __mohawk_setup, #function
 __mohawk_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index 775d70fba937..c45319c8f1d9 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -159,8 +159,6 @@ ENTRY(cpu_sa110_set_pte_ext)
 #endif
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __sa110_setup, #function
 __sa110_setup:
         mov     r10, #0
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index d92dfd081429..09d241ae2dbe 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -198,8 +198,6 @@ ENTRY(cpu_sa1100_do_resume)
 ENDPROC(cpu_sa1100_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __sa1100_setup, #function
 __sa1100_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 2d1ef87328a1..1128064fddcb 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -180,8 +180,6 @@ ENDPROC(cpu_v6_do_resume)
 
         .align
 
-        __CPUINIT
-
 /*
  *      __v6_setup
  *
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index 9704097c450e..f64afb9f1bd5 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -160,8 +160,6 @@ ENDPROC(cpu_v7_set_pte_ext)
         mcr     p15, 0, \ttbr1, c2, c0, 1       @ load TTB1
         .endm
 
-        __CPUINIT
-
         /*   AT
          *  TFR   EV X F   I D LR    S
          * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
@@ -172,5 +170,3 @@ ENDPROC(cpu_v7_set_pte_ext)
         .type   v7_crval, #object
 v7_crval:
         crval   clear=0x2120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
-
-        .previous
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 5ffe1956c6d9..c36ac69488c8 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -140,8 +140,6 @@ ENDPROC(cpu_v7_set_pte_ext)
         mcrr    p15, 0, \ttbr0, \zero, c2                       @ load TTBR0
         .endm
 
-        __CPUINIT
-
         /*
          *   AT
          *  TFR   EV X F   IHD LR    S
@@ -153,5 +151,3 @@ ENDPROC(cpu_v7_set_pte_ext)
         .type   v7_crval, #object
 v7_crval:
         crval   clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
-
-        .previous
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7ef3ad05df39..5c6d5a3050ea 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -167,8 +167,6 @@ ENDPROC(cpu_pj4b_do_idle)
 
 #endif
 
-        __CPUINIT
-
 /*
  *      __v7_setup
  *
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index e8efd83b6f25..dc1645890042 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -446,8 +446,6 @@ ENTRY(cpu_xsc3_do_resume)
 ENDPROC(cpu_xsc3_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __xsc3_setup, #function
 __xsc3_setup:
         mov     r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index e766f889bfd6..d19b1cfcad91 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -558,8 +558,6 @@ ENTRY(cpu_xscale_do_resume)
 ENDPROC(cpu_xscale_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __xscale_setup, #function
 __xscale_setup:
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I, D caches & BTB
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
index 1a643ee8e082..f50d223a0bd3 100644
--- a/arch/arm/net/bpf_jit_32.c
+++ b/arch/arm/net/bpf_jit_32.c
@@ -900,8 +900,7 @@ void bpf_jit_compile(struct sk_filter *fp)
 #endif
 
         alloc_size = 4 * ctx.idx;
-        ctx.target = module_alloc(max(sizeof(struct work_struct),
-                                      alloc_size));
+        ctx.target = module_alloc(alloc_size);
         if (unlikely(ctx.target == NULL))
                 goto out;
 
@@ -927,19 +926,8 @@ out:
         return;
 }
 
-static void bpf_jit_free_worker(struct work_struct *work)
-{
-        module_free(NULL, work);
-}
-
 void bpf_jit_free(struct sk_filter *fp)
 {
-        struct work_struct *work;
-
-        if (fp->bpf_func != sk_run_filter) {
-                work = (struct work_struct *)fp->bpf_func;
-
-                INIT_WORK(work, bpf_jit_free_worker);
-                schedule_work(work);
-        }
+        if (fp->bpf_func != sk_run_filter)
+                module_free(NULL, fp->bpf_func);
 }
diff --git a/arch/arm/plat-iop/gpio.c b/arch/arm/plat-iop/gpio.c
index e4de9be78feb..697de6dc4936 100644
--- a/arch/arm/plat-iop/gpio.c
+++ b/arch/arm/plat-iop/gpio.c
@@ -17,6 +17,7 @@
 #include <linux/gpio.h>
 #include <linux/export.h>
 #include <asm/hardware/iop3xx.h>
+#include <mach/gpio.h>
 
 void gpio_line_config(int line, int direction)
 {
diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c
index 33fa699a4d28..3a4d5e5fde52 100644
--- a/arch/arm/plat-iop/restart.c
+++ b/arch/arm/plat-iop/restart.c
@@ -11,7 +11,7 @@
 #include <asm/system_misc.h>
 #include <mach/hardware.h>
 
-void iop3xx_restart(char mode, const char *cmd)
+void iop3xx_restart(enum reboot_mode mode, const char *cmd)
 {
         *IOP3XX_PCSR = 0x30;
 
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 837a2d52e9db..29606bd75f3f 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -22,9 +22,9 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/export.h>
+#include <linux/sched_clock.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
-#include <asm/sched_clock.h>
 #include <asm/uaccess.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 5b0b86bb34bb..d9bc98eb2a6b 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -18,9 +18,9 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/clocksource.h>
+#include <linux/sched_clock.h>
 
 #include <asm/mach/time.h>
-#include <asm/sched_clock.h>
 
 #include <plat/counter-32k.h>
 
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 5d5ac0f05422..9d2b2ac74938 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -16,7 +16,7 @@
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <asm/sched_clock.h>
+#include <linux/sched_clock.h>
 
 /*
  * MBus bridge block registers.
diff --git a/arch/arm/plat-samsung/samsung-time.c b/arch/arm/plat-samsung/samsung-time.c
index f899cbc9b288..2957075ca836 100644
--- a/arch/arm/plat-samsung/samsung-time.c
+++ b/arch/arm/plat-samsung/samsung-time.c
@@ -15,12 +15,12 @@
 #include <linux/clk.h>
 #include <linux/clockchips.h>
 #include <linux/platform_device.h>
+#include <linux/sched_clock.h>
 
 #include <asm/smp_twd.h>
 #include <asm/mach/time.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/sched_clock.h>
 
 #include <mach/map.h>
 #include <plat/devs.h>
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 1e1b2d769748..39895d892c3b 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -23,7 +23,7 @@
  * observers, irrespective of whether they're taking part in coherency
  * or not.  This is necessary for the hotplug code to work reliably.
  */
-static void __cpuinit write_pen_release(int val)
+static void write_pen_release(int val)
 {
         pen_release = val;
         smp_wmb();
@@ -33,7 +33,7 @@ static void __cpuinit write_pen_release(int val)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-void __cpuinit versatile_secondary_init(unsigned int cpu)
+void versatile_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -48,7 +48,7 @@ void __cpuinit versatile_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
+int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index b33b74c87232..51b109e3b6c3 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -20,8 +20,8 @@
  */
 #include <linux/kernel.h>
 #include <linux/io.h>
+#include <linux/sched_clock.h>
 
-#include <asm/sched_clock.h>
 #include <plat/sched_clock.h>
 
 static void __iomem *ctr;
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 13609e01f4b7..f71c37edca26 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -314,4 +314,5 @@ EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op);
 EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
 EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
 EXPORT_SYMBOL_GPL(HYPERVISOR_vcpu_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_tmem_op);
 EXPORT_SYMBOL_GPL(privcmd_call);
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S
index 199cb2da7663..d1cf7b7c2200 100644
--- a/arch/arm/xen/hypercall.S
+++ b/arch/arm/xen/hypercall.S
@@ -88,6 +88,7 @@ HYPERCALL2(hvm_op);
 HYPERCALL2(memory_op);
 HYPERCALL2(physdev_op);
 HYPERCALL3(vcpu_op);
+HYPERCALL1(tmem_op);
 
 ENTRY(privcmd_call)
         stmdb sp!, {r4}
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 4143d9b0d87a..9737e97f9f38 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -270,6 +270,8 @@ source "drivers/Kconfig"
 
 source "fs/Kconfig"
 
+source "arch/arm64/kvm/Kconfig"
+
 source "arch/arm64/Kconfig.debug"
 
 source "security/Kconfig"
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index d56ed11ba9a3..98abd476992d 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -97,7 +97,7 @@ static inline u32 arch_timer_get_cntfrq(void)
         return val;
 }
 
-static inline void __cpuinit arch_counter_set_user_access(void)
+static inline void arch_counter_set_user_access(void)
 {
         u32 cntkctl;
 
diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
index ef8235c68c09..a2232d07be9d 100644
--- a/arch/arm64/include/asm/debug-monitors.h
+++ b/arch/arm64/include/asm/debug-monitors.h
@@ -83,14 +83,7 @@ static inline int reinstall_suspended_bps(struct pt_regs *regs)
 }
 #endif
 
-#ifdef CONFIG_COMPAT
 int aarch32_break_handler(struct pt_regs *regs);
-#else
-static int aarch32_break_handler(struct pt_regs *regs)
-{
-        return -EFAULT;
-}
-#endif
 
 #endif  /* __ASSEMBLY */
 #endif  /* __KERNEL__ */
diff --git a/arch/arm64/include/asm/system_misc.h b/arch/arm64/include/asm/system_misc.h
index a6e1750369ef..7a18fabbe0f6 100644
--- a/arch/arm64/include/asm/system_misc.h
+++ b/arch/arm64/include/asm/system_misc.h
@@ -23,6 +23,7 @@
 #include <linux/compiler.h>
 #include <linux/linkage.h>
 #include <linux/irqflags.h>
+#include <linux/reboot.h>
 
 struct pt_regs;
 
@@ -41,7 +42,7 @@ extern void show_pte(struct mm_struct *mm, unsigned long addr);
 extern void __show_regs(struct pt_regs *);
 
 void soft_restart(unsigned long);
-extern void (*arm_pm_restart)(char str, const char *cmd);
+extern void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
 
 #define UDBG_UNDEFINED  (1 << 0)
 #define UDBG_SYSCALL    (1 << 1)
diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index 49c162c03b69..666e231d410b 100644
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -21,6 +21,7 @@
 #include <linux/sched.h>
 #include <linux/mm.h>
 #include <linux/dma-mapping.h>
+#include <linux/kvm_host.h>
 #include <asm/thread_info.h>
 #include <asm/memory.h>
 #include <asm/cputable.h>
diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
index 08018e3df580..cbfacf7fb438 100644
--- a/arch/arm64/kernel/debug-monitors.c
+++ b/arch/arm64/kernel/debug-monitors.c
@@ -141,7 +141,7 @@ static void clear_os_lock(void *unused)
         isb();
 }
 
-static int __cpuinit os_lock_notify(struct notifier_block *self,
+static int os_lock_notify(struct notifier_block *self,
                                     unsigned long action, void *data)
 {
         int cpu = (unsigned long)data;
@@ -150,11 +150,11 @@ static int __cpuinit os_lock_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata os_lock_nb = {
+static struct notifier_block os_lock_nb = {
         .notifier_call = os_lock_notify,
 };
 
-static int __cpuinit debug_monitors_init(void)
+static int debug_monitors_init(void)
 {
         /* Clear the OS lock. */
         smp_call_function(clear_os_lock, NULL, 1);
diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c
index 5ab825c59db9..329218ca9ffb 100644
--- a/arch/arm64/kernel/hw_breakpoint.c
+++ b/arch/arm64/kernel/hw_breakpoint.c
@@ -821,7 +821,7 @@ static void reset_ctrl_regs(void *unused)
         }
 }
 
-static int __cpuinit hw_breakpoint_reset_notify(struct notifier_block *self,
+static int hw_breakpoint_reset_notify(struct notifier_block *self,
                                                 unsigned long action,
                                                 void *hcpu)
 {
@@ -831,7 +831,7 @@ static int __cpuinit hw_breakpoint_reset_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata hw_breakpoint_reset_nb = {
+static struct notifier_block hw_breakpoint_reset_nb = {
         .notifier_call = hw_breakpoint_reset_notify,
 };
 
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 46f02c3b5015..1788bf6b471f 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -132,7 +132,7 @@ void machine_restart(char *cmd)
 
         /* Now call the architecture specific reboot code. */
         if (arm_pm_restart)
-                arm_pm_restart('h', cmd);
+                arm_pm_restart(reboot_mode, cmd);
 
         /*
          * Whoops - the architecture was unable to reboot.
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 5d54e3717bf8..fee5cce83450 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -71,7 +71,7 @@ static DEFINE_RAW_SPINLOCK(boot_lock);
  * in coherency or not.  This is necessary for the hotplug code to work
  * reliably.
  */
-static void __cpuinit write_pen_release(u64 val)
+static void write_pen_release(u64 val)
 {
         void *start = (void *)&secondary_holding_pen_release;
         unsigned long size = sizeof(secondary_holding_pen_release);
@@ -84,7 +84,7 @@ static void __cpuinit write_pen_release(u64 val)
  * Boot a secondary CPU, and assign it the specified idle task.
  * This also gives us the initial stack to use for this CPU.
  */
-static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
@@ -122,7 +122,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 
 static DECLARE_COMPLETION(cpu_running);
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
+int __cpu_up(unsigned int cpu, struct task_struct *idle)
 {
         int ret;
 
@@ -162,7 +162,7 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
  * This is the secondary CPU boot entry.  We're using this CPUs
  * idle thread stack, but a set of temporary page tables.
  */
-asmlinkage void __cpuinit secondary_start_kernel(void)
+asmlinkage void secondary_start_kernel(void)
 {
         struct mm_struct *mm = &init_mm;
         unsigned int cpu = smp_processor_id();
@@ -200,13 +200,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         raw_spin_unlock(&boot_lock);
 
         /*
-         * Enable local interrupts.
-         */
-        notify_cpu_starting(cpu);
-        local_irq_enable();
-        local_fiq_enable();
-
-        /*
          * OK, now it's safe to let the boot CPU continue.  Wait for
          * the CPU migration code to notice that the CPU is online
          * before we continue.
@@ -215,6 +208,14 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         complete(&cpu_running);
 
         /*
+         * Enable GIC and timers.
+         */
+        notify_cpu_starting(cpu);
+
+        local_irq_enable();
+        local_fiq_enable();
+
+        /*
          * OK, it's off to the idle thread for us
          */
         cpu_startup_entry(CPUHP_ONLINE);
diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
new file mode 100644
index 000000000000..21e90820bd23
--- /dev/null
+++ b/arch/arm64/kvm/Kconfig
@@ -0,0 +1,51 @@
+#
+# KVM configuration
+#
+
+source "virt/kvm/Kconfig"
+
+menuconfig VIRTUALIZATION
+        bool "Virtualization"
+        ---help---
+          Say Y here to get to see options for using your Linux host to run
+          other operating systems inside virtual machines (guests).
+          This option alone does not add any kernel code.
+
+          If you say N, all options in this submenu will be skipped and
+          disabled.
+
+if VIRTUALIZATION
+
+config KVM
+        bool "Kernel-based Virtual Machine (KVM) support"
+        select MMU_NOTIFIER
+        select PREEMPT_NOTIFIERS
+        select ANON_INODES
+        select KVM_MMIO
+        select KVM_ARM_HOST
+        select KVM_ARM_VGIC
+        select KVM_ARM_TIMER
+        ---help---
+          Support hosting virtualized guest machines.
+
+          If unsure, say N.
+
+config KVM_ARM_HOST
+        bool
+        ---help---
+          Provides host support for ARM processors.
+
+config KVM_ARM_VGIC
+        bool
+        depends on KVM_ARM_HOST && OF
+        select HAVE_KVM_IRQCHIP
+        ---help---
+          Adds support for a hardware assisted, in-kernel GIC emulation.
+
+config KVM_ARM_TIMER
+        bool
+        depends on KVM_ARM_VGIC
+        ---help---
+          Adds support for the Architected Timers in virtual machines.
+
+endif # VIRTUALIZATION
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index 0ecac8980aae..6c8ba25bf6bb 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -152,25 +152,8 @@ void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs)
 #define ESR_CM                  (1 << 8)
 #define ESR_LNX_EXEC            (1 << 24)
 
-/*
- * Check that the permissions on the VMA allow for the fault which occurred.
- * If we encountered a write fault, we must have write permission, otherwise
- * we allow any permission.
- */
-static inline bool access_error(unsigned int esr, struct vm_area_struct *vma)
-{
-        unsigned int mask = VM_READ | VM_WRITE | VM_EXEC;
-
-        if (esr & ESR_WRITE)
-                mask = VM_WRITE;
-        if (esr & ESR_LNX_EXEC)
-                mask = VM_EXEC;
-
-        return vma->vm_flags & mask ? false : true;
-}
-
 static int __do_page_fault(struct mm_struct *mm, unsigned long addr,
-                           unsigned int esr, unsigned int flags,
+                           unsigned int mm_flags, unsigned long vm_flags,
                            struct task_struct *tsk)
 {
         struct vm_area_struct *vma;
@@ -188,12 +171,17 @@ static int __do_page_fault(struct mm_struct *mm, unsigned long addr,
          * it.
          */
 good_area:
-        if (access_error(esr, vma)) {
+        /*
+         * Check that the permissions on the VMA allow for the fault which
+         * occurred. If we encountered a write or exec fault, we must have
+         * appropriate permissions, otherwise we allow any permission.
+         */
+        if (!(vma->vm_flags & vm_flags)) {
                 fault = VM_FAULT_BADACCESS;
                 goto out;
         }
 
-        return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
+        return handle_mm_fault(mm, vma, addr & PAGE_MASK, mm_flags);
 
 check_stack:
         if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
@@ -208,9 +196,15 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
         struct task_struct *tsk;
         struct mm_struct *mm;
         int fault, sig, code;
-        bool write = (esr & ESR_WRITE) && !(esr & ESR_CM);
-        unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
-                (write ? FAULT_FLAG_WRITE : 0);
+        unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC;
+        unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
+
+        if (esr & ESR_LNX_EXEC) {
+                vm_flags = VM_EXEC;
+        } else if ((esr & ESR_WRITE) && !(esr & ESR_CM)) {
+                vm_flags = VM_WRITE;
+                mm_flags |= FAULT_FLAG_WRITE;
+        }
 
         tsk = current;
         mm  = tsk->mm;
@@ -248,7 +242,7 @@ retry:
 #endif
         }
 
-        fault = __do_page_fault(mm, addr, esr, flags, tsk);
+        fault = __do_page_fault(mm, addr, mm_flags, vm_flags, tsk);
 
         /*
          * If we need to retry but a fatal signal is pending, handle the
@@ -265,7 +259,7 @@ retry:
          */
 
         perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
-        if (flags & FAULT_FLAG_ALLOW_RETRY) {
+        if (mm_flags & FAULT_FLAG_ALLOW_RETRY) {
                 if (fault & VM_FAULT_MAJOR) {
                         tsk->maj_flt++;
                         perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs,
@@ -280,7 +274,7 @@ retry:
                          * Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of
                          * starvation.
                          */
-                        flags &= ~FAULT_FLAG_ALLOW_RETRY;
+                        mm_flags &= ~FAULT_FLAG_ALLOW_RETRY;
                         goto retry;
                 }
         }
diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c
index 7c7be7855638..8ed6cb1a900f 100644
--- a/arch/arm64/mm/mmap.c
+++ b/arch/arm64/mm/mmap.c
@@ -90,11 +90,9 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
         if (mmap_is_legacy()) {
                 mm->mmap_base = TASK_UNMAPPED_BASE;
                 mm->get_unmapped_area = arch_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 mm->mmap_base = mmap_base();
                 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
 EXPORT_SYMBOL_GPL(arch_pick_mmap_layout);
diff --git a/arch/arm64/xen/hypercall.S b/arch/arm64/xen/hypercall.S
index 2816c479cd49..531342ec4bcf 100644
--- a/arch/arm64/xen/hypercall.S
+++ b/arch/arm64/xen/hypercall.S
@@ -79,6 +79,7 @@ HYPERCALL2(hvm_op);
 HYPERCALL2(memory_op);
 HYPERCALL2(physdev_op);
 HYPERCALL3(vcpu_op);
+HYPERCALL1(tmem_op);
 
 ENTRY(privcmd_call)
         mov x16, x0
diff --git a/arch/avr32/include/uapi/asm/socket.h b/arch/avr32/include/uapi/asm/socket.h
index 37401f535126..11c4259c62fb 100644
--- a/arch/avr32/include/uapi/asm/socket.h
+++ b/arch/avr32/include/uapi/asm/socket.h
@@ -74,4 +74,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* __ASM_AVR32_SOCKET_H */
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 08c7ac650405..3b6abc54b015 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -283,7 +283,7 @@ config BF_REV_0_0
 
 config BF_REV_0_1
         bool "0.1"
-        depends on (BF51x || BF52x || (BF54x && !BF54xM))
+        depends on (BF51x || BF52x || (BF54x && !BF54xM) || BF60x)
 
 config BF_REV_0_2
         bool "0.2"
diff --git a/arch/blackfin/include/asm/bfin6xx_spi.h b/arch/blackfin/include/asm/bfin_spi3.h
index 89370b653dcd..0957e65a54be 100644
--- a/arch/blackfin/include/asm/bfin6xx_spi.h
+++ b/arch/blackfin/include/asm/bfin_spi3.h
@@ -240,7 +240,7 @@ struct bfin_spi_regs {
 #define MAX_CTRL_CS          8  /* cs in spi controller */
 
 /* device.platform_data for SSP controller devices */
-struct bfin6xx_spi_master {
+struct bfin_spi3_master {
         u16 num_chipselect;
         u16 pin_req[7];
 };
@@ -248,7 +248,7 @@ struct bfin6xx_spi_master {
 /* spi_board_info.controller_data for SPI slave devices,
  * copied to spi_device.platform_data ... mostly for dma tuning
  */
-struct bfin6xx_spi_chip {
+struct bfin_spi3_chip {
         u32 control;
         u16 cs_chg_udelay; /* Some devices require 16-bit delays */
         u32 tx_dummy_val; /* tx value for rx only transfer */
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index b882ce22c347..fa53faeeb0e9 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -9,6 +9,7 @@
 #include <linux/ptrace.h>               /* for linux pt_regs struct */
 #include <linux/kgdb.h>
 #include <linux/uaccess.h>
+#include <asm/irq_regs.h>
 
 void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 {
diff --git a/arch/blackfin/kernel/perf_event.c b/arch/blackfin/kernel/perf_event.c
index e47d19ae3e06..974e55496db3 100644
--- a/arch/blackfin/kernel/perf_event.c
+++ b/arch/blackfin/kernel/perf_event.c
@@ -468,7 +468,7 @@ static void bfin_pmu_setup(int cpu)
         memset(cpuhw, 0, sizeof(struct cpu_hw_events));
 }
 
-static int __cpuinit
+static int
 bfin_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
 {
         unsigned int cpu = (long)hcpu;
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 107b306b06f1..19ad0637e8ff 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -99,7 +99,7 @@ void __init generate_cplb_tables(void)
 }
 #endif
 
-void __cpuinit bfin_setup_caches(unsigned int cpu)
+void bfin_setup_caches(unsigned int cpu)
 {
 #ifdef CONFIG_BFIN_ICACHE
         bfin_icache_init(icplb_tbl[cpu]);
@@ -165,7 +165,7 @@ void __cpuinit bfin_setup_caches(unsigned int cpu)
 #endif
 }
 
-void __cpuinit bfin_setup_cpudata(unsigned int cpu)
+void bfin_setup_cpudata(unsigned int cpu)
 {
         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
 
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index ab1c617b9cfc..11789beca75a 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -48,7 +48,7 @@ int __init setup_profiling_timer(unsigned int multiplier) /* not supported */
         return -EINVAL;
 }
 
-void __cpuinit platform_secondary_init(unsigned int cpu)
+void platform_secondary_init(unsigned int cpu)
 {
         /* Clone setup for peripheral interrupt sources from CoreA. */
         bfin_write_SICB_IMASK0(bfin_read_SIC_IMASK0());
@@ -69,12 +69,11 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
         SSYNC();
 
         /* We are done with local CPU inits, unblock the boot CPU. */
-        set_cpu_online(cpu, true);
         spin_lock(&boot_lock);
         spin_unlock(&boot_lock);
 }
 
-int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle)
+int platform_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
@@ -91,7 +90,9 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
                 SSYNC();
         }
 
-        timeout = jiffies + 1 * HZ;
+        timeout = jiffies + HZ;
+        /* release the lock and let coreb run */
+        spin_unlock(&boot_lock);
         while (time_before(jiffies, timeout)) {
                 if (cpu_online(cpu))
                         break;
@@ -100,8 +101,6 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
         }
 
         if (cpu_online(cpu)) {
-                /* release the lock and let coreb run */
-                spin_unlock(&boot_lock);
                 return 0;
         } else
                 panic("CPU%u: processor failed to boot\n", cpu);
@@ -155,7 +154,7 @@ void platform_clear_ipi(unsigned int cpu, int irq)
  * Setup core B's local core timer.
  * In SMP, core timer is used for clock event device.
  */
-void __cpuinit bfin_local_timer_setup(void)
+void bfin_local_timer_setup(void)
 {
 #if defined(CONFIG_TICKSOURCE_CORETMR)
         struct irq_data *data = irq_get_irq_data(IRQ_CORETMR);
diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c
index bba40aed4273..0bc47231540b 100644
--- a/arch/blackfin/mach-bf609/boards/ezkit.c
+++ b/arch/blackfin/mach-bf609/boards/ezkit.c
@@ -17,7 +17,7 @@
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
 #include <linux/usb/musb.h>
-#include <asm/bfin6xx_spi.h>
+#include <asm/bfin_spi3.h>
 #include <asm/dma.h>
 #include <asm/gpio.h>
 #include <asm/nand.h>
@@ -108,7 +108,6 @@ static struct platform_device bfin_rotary_device = {
 static unsigned short pins[] = P_RMII0;
 
 static struct stmmac_mdio_bus_data phy_private_data = {
-        .bus_id = 0,
         .phy_mask = 1,
 };
 
@@ -745,13 +744,13 @@ static struct flash_platform_data bfin_spi_flash_data = {
         .type = "w25q32",
 };
 
-static struct bfin6xx_spi_chip spi_flash_chip_info = {
+static struct bfin_spi3_chip spi_flash_chip_info = {
         .enable_dma = true,         /* use dma transfer with this chip*/
 };
 #endif
 
 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
-static struct bfin6xx_spi_chip spidev_chip_info = {
+static struct bfin_spi3_chip spidev_chip_info = {
         .enable_dma = true,
 };
 #endif
@@ -1296,7 +1295,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 };
-#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
+#if IS_ENABLED(CONFIG_SPI_BFIN_V3)
 /* SPI (0) */
 static struct resource bfin_spi0_resource[] = {
         {
@@ -1337,13 +1336,13 @@ static struct resource bfin_spi1_resource[] = {
 };
 
 /* SPI controller data */
-static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
+static struct bfin_spi3_master bf60x_spi_master_info0 = {
         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 };
 
 static struct platform_device bf60x_spi_master0 = {
-        .name = "bfin-spi",
+        .name = "bfin-spi3",
         .id = 0, /* Bus number */
         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
         .resource = bfin_spi0_resource,
@@ -1352,13 +1351,13 @@ static struct platform_device bf60x_spi_master0 = {
         },
 };
 
-static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
+static struct bfin_spi3_master bf60x_spi_master_info1 = {
         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 };
 
 static struct platform_device bf60x_spi_master1 = {
-        .name = "bfin-spi",
+        .name = "bfin-spi3",
         .id = 1, /* Bus number */
         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
         .resource = bfin_spi1_resource,
@@ -1534,7 +1533,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
         &bfin_sdh_device,
 #endif
 
-#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
+#if IS_ENABLED(CONFIG_SPI_BFIN_V3)
         &bf60x_spi_master0,
         &bf60x_spi_master1,
 #endif
diff --git a/arch/blackfin/mach-common/cache-c.c b/arch/blackfin/mach-common/cache-c.c
index a60a24f5035d..0e1e451fd7d8 100644
--- a/arch/blackfin/mach-common/cache-c.c
+++ b/arch/blackfin/mach-common/cache-c.c
@@ -52,7 +52,7 @@ bfin_cache_init(struct cplb_entry *cplb_tbl, unsigned long cplb_addr,
 }
 
 #ifdef CONFIG_BFIN_ICACHE
-void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
+void bfin_icache_init(struct cplb_entry *icplb_tbl)
 {
         bfin_cache_init(icplb_tbl, ICPLB_ADDR0, ICPLB_DATA0, IMEM_CONTROL,
                 (IMC | ENICPLB));
@@ -60,7 +60,7 @@ void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
 #endif
 
 #ifdef CONFIG_BFIN_DCACHE
-void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
+void bfin_dcache_init(struct cplb_entry *dcplb_tbl)
 {
         /*
          *  Anomaly notes:
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 6c0c6816a51a..d143fd8d2bc5 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1281,7 +1281,7 @@ static struct irq_chip bfin_gpio_irqchip = {
         .irq_set_wake = bfin_gpio_set_wake,
 };
 
-void __cpuinit init_exception_vectors(void)
+void init_exception_vectors(void)
 {
         /* cannot program in software:
          * evt0 - emulation (jtag)
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 1bc2ce6f3c94..82f301c117a5 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -46,9 +46,10 @@ struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
 unsigned long blackfin_iflush_l1_entry[NR_CPUS];
 #endif
 
-struct blackfin_initial_pda __cpuinitdata initial_pda_coreb;
+struct blackfin_initial_pda initial_pda_coreb;
 
 enum ipi_message_type {
+        BFIN_IPI_NONE,
         BFIN_IPI_TIMER,
         BFIN_IPI_RESCHEDULE,
         BFIN_IPI_CALL_FUNC,
@@ -72,8 +73,8 @@ static DEFINE_SPINLOCK(stop_lock);
 
 /* Simple FIFO buffer, overflow leads to panic */
 struct ipi_data {
-        unsigned long count;
-        unsigned long bits;
+        atomic_t count;
+        atomic_t bits;
 };
 
 static DEFINE_PER_CPU(struct ipi_data, bfin_ipi);
@@ -146,8 +147,7 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
         platform_clear_ipi(cpu, IRQ_SUPPLE_1);
 
         bfin_ipi_data = &__get_cpu_var(bfin_ipi);
-        smp_mb();
-        while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {
+        while ((pending = atomic_xchg(&bfin_ipi_data->bits, 0)) != 0) {
                 msg = 0;
                 do {
                         msg = find_next_bit(&pending, BITS_PER_LONG, msg + 1);
@@ -170,9 +170,8 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
                                 ipi_cpu_stop(cpu);
                                 break;
                         }
+                        atomic_dec(&bfin_ipi_data->count);
                 } while (msg < BITS_PER_LONG);
-
-                smp_mb();
         }
         return IRQ_HANDLED;
 }
@@ -183,8 +182,8 @@ static void bfin_ipi_init(void)
         struct ipi_data *bfin_ipi_data;
         for_each_possible_cpu(cpu) {
                 bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
-                bfin_ipi_data->bits = 0;
-                bfin_ipi_data->count = 0;
+                atomic_set(&bfin_ipi_data->bits, 0);
+                atomic_set(&bfin_ipi_data->count, 0);
         }
 }
 
@@ -195,12 +194,10 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)
         unsigned long flags;
 
         local_irq_save(flags);
-        smp_mb();
         for_each_cpu(cpu, cpumask) {
                 bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
-                smp_mb();
-                set_bit(msg, &bfin_ipi_data->bits);
-                bfin_ipi_data->count++;
+                atomic_set_mask((1 << msg), &bfin_ipi_data->bits);
+                atomic_inc(&bfin_ipi_data->count);
                 platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1);
         }
 
@@ -249,7 +246,7 @@ void smp_send_stop(void)
         return;
 }
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
+int __cpu_up(unsigned int cpu, struct task_struct *idle)
 {
         int ret;
 
@@ -262,7 +259,7 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
         return ret;
 }
 
-static void __cpuinit setup_secondary(unsigned int cpu)
+static void setup_secondary(unsigned int cpu)
 {
         unsigned long ilat;
 
@@ -280,7 +277,7 @@ static void __cpuinit setup_secondary(unsigned int cpu)
             IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
 }
 
-void __cpuinit secondary_start_kernel(void)
+void secondary_start_kernel(void)
 {
         unsigned int cpu = smp_processor_id();
         struct mm_struct *mm = &init_mm;
@@ -319,7 +316,6 @@ void __cpuinit secondary_start_kernel(void)
         setup_secondary(cpu);
 
         platform_secondary_init(cpu);
-
         /* setup local core timer */
         bfin_local_timer_setup();
 
@@ -335,6 +331,8 @@ void __cpuinit secondary_start_kernel(void)
          */
         calibrate_delay();
 
+        /* We are done with local CPU inits, unblock the boot CPU. */
+        set_cpu_online(cpu, true);
         cpu_startup_entry(CPUHP_ONLINE);
 }
 
@@ -404,7 +402,7 @@ EXPORT_SYMBOL(resync_core_dcache);
 #endif
 
 #ifdef CONFIG_HOTPLUG_CPU
-int __cpuexit __cpu_disable(void)
+int __cpu_disable(void)
 {
         unsigned int cpu = smp_processor_id();
 
@@ -417,7 +415,7 @@ int __cpuexit __cpu_disable(void)
 
 static DECLARE_COMPLETION(cpu_killed);
 
-int __cpuexit __cpu_die(unsigned int cpu)
+int __cpu_die(unsigned int cpu)
 {
         return wait_for_completion_timeout(&cpu_killed, 5000);
 }
diff --git a/arch/cris/arch-v10/drivers/Kconfig b/arch/cris/arch-v10/drivers/Kconfig
index 5f2cdb3e428c..daf5f19b61a1 100644
--- a/arch/cris/arch-v10/drivers/Kconfig
+++ b/arch/cris/arch-v10/drivers/Kconfig
@@ -2,9 +2,7 @@ if ETRAX_ARCH_V10
 
 config ETRAX_ETHERNET
         bool "Ethernet support"
-        depends on ETRAX_ARCH_V10
-        select ETHERNET
-        select NET_CORE
+        depends on ETRAX_ARCH_V10 && NETDEVICES
         select MII
         help
           This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet
diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig
index acff3df8c43f..1d866d3ee2f8 100644
--- a/arch/cris/arch-v32/drivers/Kconfig
+++ b/arch/cris/arch-v32/drivers/Kconfig
@@ -2,9 +2,7 @@ if ETRAX_ARCH_V32
 
 config ETRAX_ETHERNET
         bool "Ethernet support"
-        depends on ETRAX_ARCH_V32
-        select ETHERNET
-        select NET_CORE
+        depends on ETRAX_ARCH_V32 && NETDEVICES
         select MII
         help
           This option enables the ETRAX FS built-in 10/100Mbit Ethernet
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index cdd12028de0c..fe8e6039db2a 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -197,7 +197,7 @@ int setup_profiling_timer(unsigned int multiplier)
  */
 unsigned long cache_decay_ticks = 1;
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         smp_boot_one_cpu(cpu, tidle);
         return cpu_online(cpu) ? 0 : -ENOSYS;
diff --git a/arch/cris/include/uapi/asm/socket.h b/arch/cris/include/uapi/asm/socket.h
index ba409c9947bc..eb723e51554e 100644
--- a/arch/cris/include/uapi/asm/socket.h
+++ b/arch/cris/include/uapi/asm/socket.h
@@ -76,6 +76,8 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* _ASM_SOCKET_H */
 
 
diff --git a/arch/frv/include/uapi/asm/socket.h b/arch/frv/include/uapi/asm/socket.h
index 31dbb5d8e13d..f0cb1c341163 100644
--- a/arch/frv/include/uapi/asm/socket.h
+++ b/arch/frv/include/uapi/asm/socket.h
@@ -74,5 +74,7 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* _ASM_SOCKET_H */
 
diff --git a/arch/frv/kernel/setup.c b/arch/frv/kernel/setup.c
index ae3a6706419b..9f3a7a62d787 100644
--- a/arch/frv/kernel/setup.c
+++ b/arch/frv/kernel/setup.c
@@ -709,7 +709,7 @@ static void __init reserve_dma_coherent(void)
 /*
  * calibrate the delay loop
  */
-void __cpuinit calibrate_delay(void)
+void calibrate_delay(void)
 {
         loops_per_jiffy = __delay_loops_MHz * (1000000 / HZ);
 
diff --git a/arch/h8300/include/uapi/asm/socket.h b/arch/h8300/include/uapi/asm/socket.h
index 5d1c6d0870e6..9490758c5e2b 100644
--- a/arch/h8300/include/uapi/asm/socket.h
+++ b/arch/h8300/include/uapi/asm/socket.h
@@ -74,4 +74,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/hexagon/kernel/setup.c b/arch/hexagon/kernel/setup.c
index bfe13311d70d..29d1f1b00016 100644
--- a/arch/hexagon/kernel/setup.c
+++ b/arch/hexagon/kernel/setup.c
@@ -41,7 +41,7 @@ static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
 
 int on_simulator;
 
-void __cpuinit calibrate_delay(void)
+void calibrate_delay(void)
 {
         loops_per_jiffy = thread_freq_mhz * 1000000 / HZ;
 }
diff --git a/arch/hexagon/kernel/smp.c b/arch/hexagon/kernel/smp.c
index 0e364ca43198..9faaa940452b 100644
--- a/arch/hexagon/kernel/smp.c
+++ b/arch/hexagon/kernel/smp.c
@@ -146,7 +146,7 @@ void __init smp_prepare_boot_cpu(void)
  * to point to current thread info
  */
 
-void __cpuinit start_secondary(void)
+void start_secondary(void)
 {
         unsigned int cpu;
         unsigned long thread_ptr;
@@ -194,7 +194,7 @@ void __cpuinit start_secondary(void)
  * maintains control until "cpu_online(cpu)" is set.
  */
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
+int __cpu_up(unsigned int cpu, struct task_struct *idle)
 {
         struct thread_info *thread = (struct thread_info *)idle->stack;
         void *stack_start;
diff --git a/arch/ia64/hp/sim/boot/fw-emu.c b/arch/ia64/hp/sim/boot/fw-emu.c
index 271f412bda1a..87bf9ad8cf0f 100644
--- a/arch/ia64/hp/sim/boot/fw-emu.c
+++ b/arch/ia64/hp/sim/boot/fw-emu.c
@@ -290,16 +290,16 @@ sys_fw_init (const char *args, int arglen)
         efi_runtime->hdr.signature = EFI_RUNTIME_SERVICES_SIGNATURE;
         efi_runtime->hdr.revision = EFI_RUNTIME_SERVICES_REVISION;
         efi_runtime->hdr.headersize = sizeof(efi_runtime->hdr);
-        efi_runtime->get_time = __pa(&fw_efi_get_time);
-        efi_runtime->set_time = __pa(&efi_unimplemented);
-        efi_runtime->get_wakeup_time = __pa(&efi_unimplemented);
-        efi_runtime->set_wakeup_time = __pa(&efi_unimplemented);
-        efi_runtime->set_virtual_address_map = __pa(&efi_unimplemented);
-        efi_runtime->get_variable = __pa(&efi_unimplemented);
-        efi_runtime->get_next_variable = __pa(&efi_unimplemented);
-        efi_runtime->set_variable = __pa(&efi_unimplemented);
-        efi_runtime->get_next_high_mono_count = __pa(&efi_unimplemented);
-        efi_runtime->reset_system = __pa(&efi_reset_system);
+        efi_runtime->get_time = (void *)__pa(&fw_efi_get_time);
+        efi_runtime->set_time = (void *)__pa(&efi_unimplemented);
+        efi_runtime->get_wakeup_time = (void *)__pa(&efi_unimplemented);
+        efi_runtime->set_wakeup_time = (void *)__pa(&efi_unimplemented);
+        efi_runtime->set_virtual_address_map = (void *)__pa(&efi_unimplemented);
+        efi_runtime->get_variable = (void *)__pa(&efi_unimplemented);
+        efi_runtime->get_next_variable = (void *)__pa(&efi_unimplemented);
+        efi_runtime->set_variable = (void *)__pa(&efi_unimplemented);
+        efi_runtime->get_next_high_mono_count = (void *)__pa(&efi_unimplemented);
+        efi_runtime->reset_system = (void *)__pa(&efi_reset_system);
 
         efi_tables->guid = SAL_SYSTEM_TABLE_GUID;
         efi_tables->table = __pa(sal_systab);
diff --git a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c
index c13064e422df..d1b04c4c95e3 100644
--- a/arch/ia64/hp/sim/simeth.c
+++ b/arch/ia64/hp/sim/simeth.c
@@ -268,7 +268,7 @@ static __inline__ int dev_is_ethdev(struct net_device *dev)
 static int
 simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr)
 {
-        struct net_device *dev = ptr;
+        struct net_device *dev = netdev_notifier_info_to_dev(ptr);
         struct simeth_local *local;
         struct in_device *in_dev;
         struct in_ifaddr **ifap = NULL;
diff --git a/arch/ia64/include/uapi/asm/socket.h b/arch/ia64/include/uapi/asm/socket.h
index 6b4329f18b29..556d0701a155 100644
--- a/arch/ia64/include/uapi/asm/socket.h
+++ b/arch/ia64/include/uapi/asm/socket.h
@@ -83,4 +83,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* _ASM_IA64_SOCKET_H */
diff --git a/arch/m32r/include/uapi/asm/socket.h b/arch/m32r/include/uapi/asm/socket.h
index 2a3b59e0e171..24be7c8da86a 100644
--- a/arch/m32r/include/uapi/asm/socket.h
+++ b/arch/m32r/include/uapi/asm/socket.h
@@ -74,4 +74,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* _ASM_M32R_SOCKET_H */
diff --git a/arch/m32r/kernel/smpboot.c b/arch/m32r/kernel/smpboot.c
index 0ac558adc605..bb21f4f63170 100644
--- a/arch/m32r/kernel/smpboot.c
+++ b/arch/m32r/kernel/smpboot.c
@@ -343,7 +343,7 @@ static void __init do_boot_cpu(int phys_id)
         }
 }
 
-int __cpuinit __cpu_up(unsigned int cpu_id, struct task_struct *tidle)
+int __cpu_up(unsigned int cpu_id, struct task_struct *tidle)
 {
         int timeout;
 
diff --git a/arch/metag/Kconfig.soc b/arch/metag/Kconfig.soc
index ec079cfb7c6a..2a3c860c7525 100644
--- a/arch/metag/Kconfig.soc
+++ b/arch/metag/Kconfig.soc
@@ -14,6 +14,18 @@ config META21_FPGA
         help
           This is a Meta 2.1 FPGA bitstream, just a bare CPU.
 
+config SOC_TZ1090
+        bool "Toumaz Xenif TZ1090 SoC (Comet)"
+        select METAG_LNKGET_AROUND_CACHE
+        select METAG_META21
+        select METAG_SMP_WRITE_REORDERING
+        select PINCTRL
+        select PINCTRL_TZ1090
+        select PINCTRL_TZ1090_PDC
+        help
+          This is a Toumaz Technology Xenif TZ1090 (A.K.A. Comet) SoC containing
+          a 2-threaded HTP.
+
 endchoice
 
 menu "SoC configuration"
diff --git a/arch/metag/Makefile b/arch/metag/Makefile
index b566116b171b..9739857bdedc 100644
--- a/arch/metag/Makefile
+++ b/arch/metag/Makefile
@@ -20,7 +20,7 @@ checkflags-$(CONFIG_METAG_META12)	+= -DMETAC_1_2
 checkflags-$(CONFIG_METAG_META21)       += -DMETAC_2_1
 CHECKFLAGS                              += -D__metag__ $(checkflags-y)
 
-KBUILD_DEFCONFIG                        := meta2_defconfig
+KBUILD_DEFCONFIG                        := tz1090_defconfig
 
 sflags-$(CONFIG_METAG_META12)           += -mmetac=1.2
 ifeq ($(CONFIG_METAG_META12),y)
diff --git a/arch/metag/boot/.gitignore b/arch/metag/boot/.gitignore
index a021da201156..2d6c0c160884 100644
--- a/arch/metag/boot/.gitignore
+++ b/arch/metag/boot/.gitignore
@@ -1,4 +1,4 @@
 vmlinux*
 uImage*
 ramdisk.*
-*.dtb
+*.dtb*
diff --git a/arch/metag/boot/dts/Makefile b/arch/metag/boot/dts/Makefile
index dbd95217733a..72c121879426 100644
--- a/arch/metag/boot/dts/Makefile
+++ b/arch/metag/boot/dts/Makefile
@@ -1,7 +1,9 @@
 dtb-y   += skeleton.dtb
+dtb-y   += tz1090_generic.dtb
 
 # Built-in dtb
 builtindtb-y                            := skeleton
+builtindtb-$(CONFIG_SOC_TZ1090)         := tz1090_generic
 
 ifneq ($(CONFIG_METAG_BUILTIN_DTB_NAME),"")
         builtindtb-y                    := $(patsubst "%",%,$(CONFIG_METAG_BUILTIN_DTB_NAME))
diff --git a/arch/metag/boot/dts/include/dt-bindings b/arch/metag/boot/dts/include/dt-bindings
new file mode 120000
index 000000000000..08c00e4972fa
--- /dev/null
+++ b/arch/metag/boot/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../../include/dt-bindings
\ No newline at end of file
diff --git a/arch/metag/boot/dts/skeleton.dts b/arch/metag/boot/dts/skeleton.dts
index 7244d1f0d555..7a49aeb365d0 100644
--- a/arch/metag/boot/dts/skeleton.dts
+++ b/arch/metag/boot/dts/skeleton.dts
@@ -7,4 +7,4 @@
  */
 /dts-v1/;
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
diff --git a/arch/metag/boot/dts/tz1090.dtsi b/arch/metag/boot/dts/tz1090.dtsi
new file mode 100644
index 000000000000..853744652b93
--- /dev/null
+++ b/arch/metag/boot/dts/tz1090.dtsi
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2012 Imagination Technologies Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+        compatible = "toumaz,tz1090", "img,meta";
+
+        interrupt-parent = <&intc>;
+
+        intc: interrupt-controller {
+                compatible = "img,meta-intc";
+                interrupt-controller;
+                #interrupt-cells = <2>;
+                num-banks = <2>;
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                pinctrl: pinctrl@02005800 {
+                        #gpio-range-cells = <3>;
+                        compatible = "img,tz1090-pinctrl";
+                        reg = <0x02005800 0xe4>;
+                };
+
+                pdc_pinctrl: pinctrl@02006500 {
+                        #gpio-range-cells = <3>;
+                        compatible = "img,tz1090-pdc-pinctrl";
+                        reg = <0x02006500 0x100>;
+                };
+        };
+};
diff --git a/arch/metag/boot/dts/tz1090_generic.dts b/arch/metag/boot/dts/tz1090_generic.dts
new file mode 100644
index 000000000000..f96090955964
--- /dev/null
+++ b/arch/metag/boot/dts/tz1090_generic.dts
@@ -0,0 +1,10 @@
+/*
+ * Copyright (C) 2012 Imagination Technologies Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "tz1090.dtsi"
diff --git a/arch/metag/configs/tz1090_defconfig b/arch/metag/configs/tz1090_defconfig
new file mode 100644
index 000000000000..9f9316a6df27
--- /dev/null
+++ b/arch/metag/configs/tz1090_defconfig
@@ -0,0 +1,42 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_ELF_CORE is not set
+CONFIG_SLAB=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_SOC_TZ1090=y
+CONFIG_METAG_HALT_ON_PANIC=y
+# CONFIG_METAG_FPU is not set
+CONFIG_METAG_DA=y
+CONFIG_HZ_100=y
+CONFIG_DEVTMPFS=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_DA_TTY=y
+CONFIG_DA_CONSOLE=y
+# CONFIG_DEVKMEM is not set
+# CONFIG_HW_RANDOM is not set
+CONFIG_GPIOLIB=y
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_DEBUG_INFO=y
diff --git a/arch/metag/include/asm/bug.h b/arch/metag/include/asm/bug.h
index d04b48cefecc..9f8967f10f8c 100644
--- a/arch/metag/include/asm/bug.h
+++ b/arch/metag/include/asm/bug.h
@@ -6,7 +6,7 @@
 struct pt_regs;
 
 extern const char *trap_name(int trapno);
-extern void die(const char *str, struct pt_regs *regs, long err,
-                unsigned long addr) __attribute__ ((noreturn));
+extern void __noreturn die(const char *str, struct pt_regs *regs, long err,
+                unsigned long addr);
 
 #endif
diff --git a/arch/metag/include/asm/checksum.h b/arch/metag/include/asm/checksum.h
index 999bf761a732..08dd1cc65799 100644
--- a/arch/metag/include/asm/checksum.h
+++ b/arch/metag/include/asm/checksum.h
@@ -64,7 +64,8 @@ static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
                                         __wsum sum)
 {
         unsigned long len_proto = (proto + len) << 8;
-        asm ("ADD    %0, %0, %1\n"
+        asm ("ADDS   %0, %0, %1\n"
+             "ADDCS  %0, %0, #1\n"
              "ADDS   %0, %0, %2\n"
              "ADDCS  %0, %0, #1\n"
              "ADDS   %0, %0, %3\n"
diff --git a/arch/metag/include/asm/clock.h b/arch/metag/include/asm/clock.h
index 3e2915a280c7..ded4ab2e1fd0 100644
--- a/arch/metag/include/asm/clock.h
+++ b/arch/metag/include/asm/clock.h
@@ -19,6 +19,8 @@
  *                      core frequency will be determined like this:
  *                      Meta 1: based on loops_per_jiffy.
  *                      Meta 2: (EXPAND_TIMER_DIV + 1) MHz.
+ *                      If a "core" clock is provided by the device tree, it
+ *                      will override this function.
  */
 struct meta_clock_desc {
         unsigned long           (*get_core_freq)(void);
@@ -27,6 +29,12 @@ struct meta_clock_desc {
 extern struct meta_clock_desc _meta_clock;
 
 /*
+ * Perform platform clock initialisation, reading clocks from device tree etc.
+ * Only accessible during boot.
+ */
+void init_metag_clocks(void);
+
+/*
  * Set up the default clock, ensuring all callbacks are valid - only accessible
  * during boot.
  */
diff --git a/arch/metag/include/asm/irq.h b/arch/metag/include/asm/irq.h
index be0c8f3c5a5d..ad6bd0edbc3b 100644
--- a/arch/metag/include/asm/irq.h
+++ b/arch/metag/include/asm/irq.h
@@ -17,6 +17,7 @@ struct pt_regs;
 
 int tbisig_map(unsigned int hw);
 extern void do_IRQ(int irq, struct pt_regs *regs);
+extern void init_IRQ(void);
 
 #ifdef CONFIG_METAG_SUSPEND_MEM
 int traps_save_context(void);
diff --git a/arch/metag/include/asm/processor.h b/arch/metag/include/asm/processor.h
index 9b029a7911c3..f16477d1f571 100644
--- a/arch/metag/include/asm/processor.h
+++ b/arch/metag/include/asm/processor.h
@@ -199,4 +199,6 @@ extern void (*soc_halt)(void);
 extern void show_trace(struct task_struct *tsk, unsigned long *sp,
                        struct pt_regs *regs);
 
+extern const struct seq_operations cpuinfo_op;
+
 #endif
diff --git a/arch/metag/kernel/cachepart.c b/arch/metag/kernel/cachepart.c
index 954548b1bea8..0a2385fa2a1d 100644
--- a/arch/metag/kernel/cachepart.c
+++ b/arch/metag/kernel/cachepart.c
@@ -100,22 +100,23 @@ void check_for_cache_aliasing(int thread_id)
                 thread_cache_size =
                                 get_thread_cache_size(cache_type, thread_id);
                 if (thread_cache_size < 0)
-                        pr_emerg("Can't read %s cache size", \
+                        pr_emerg("Can't read %s cache size\n",
                                  cache_type ? "DCACHE" : "ICACHE");
                 else if (thread_cache_size == 0)
                         /* Cache is off. No need to check for aliasing */
                         continue;
                 if (thread_cache_size / CACHE_ASSOCIATIVITY > PAGE_SIZE) {
-                        pr_emerg("Cache aliasing detected in %s on Thread %d",
+                        pr_emerg("Potential cache aliasing detected in %s on Thread %d\n",
                                  cache_type ? "DCACHE" : "ICACHE", thread_id);
-                        pr_warn("Total %s size: %u bytes",
-                                cache_type ? "DCACHE" : "ICACHE ",
+                        pr_warn("Total %s size: %u bytes\n",
+                                cache_type ? "DCACHE" : "ICACHE",
                                 cache_type ? get_dcache_size()
                                 : get_icache_size());
-                        pr_warn("Thread %s size: %d bytes",
+                        pr_warn("Thread %s size: %d bytes\n",
                                 cache_type ? "CACHE" : "ICACHE",
                                 thread_cache_size);
-                        pr_warn("Page Size: %lu bytes", PAGE_SIZE);
+                        pr_warn("Page Size: %lu bytes\n", PAGE_SIZE);
+                        panic("Potential cache aliasing detected");
                 }
         }
 }
diff --git a/arch/metag/kernel/clock.c b/arch/metag/kernel/clock.c
index defc84056f18..6339c9c6d0ab 100644
--- a/arch/metag/kernel/clock.c
+++ b/arch/metag/kernel/clock.c
@@ -8,8 +8,10 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
+#include <linux/of.h>
 
 #include <asm/param.h>
 #include <asm/clock.h>
@@ -34,8 +36,63 @@ static unsigned long get_core_freq_default(void)
 #endif
 }
 
+static struct clk *clk_core;
+
+/* Clk based get_core_freq callback. */
+static unsigned long get_core_freq_clk(void)
+{
+        return clk_get_rate(clk_core);
+}
+
+/**
+ * init_metag_core_clock() - Set up core clock from devicetree.
+ *
+ * Checks to see if a "core" clock is provided in the device tree, and overrides
+ * the get_core_freq callback to use it.
+ */
+static void __init init_metag_core_clock(void)
+{
+        /*
+         * See if a core clock is provided by the devicetree (and
+         * registered by the init callback above).
+         */
+        struct device_node *node;
+        node = of_find_compatible_node(NULL, NULL, "img,meta");
+        if (!node) {
+                pr_warn("%s: no compatible img,meta DT node found\n",
+                        __func__);
+                return;
+        }
+
+        clk_core = of_clk_get_by_name(node, "core");
+        if (IS_ERR(clk_core)) {
+                pr_warn("%s: no core clock found in DT\n",
+                        __func__);
+                return;
+        }
+
+        /*
+         * Override the core frequency callback to use
+         * this clk.
+         */
+        _meta_clock.get_core_freq = get_core_freq_clk;
+}
+
+/**
+ * init_metag_clocks() - Set up clocks from devicetree.
+ *
+ * Set up important clocks from device tree. In particular any needed for clock
+ * sources.
+ */
+void __init init_metag_clocks(void)
+{
+        init_metag_core_clock();
+
+        pr_info("Core clock frequency: %lu Hz\n", get_coreclock());
+}
+
 /**
- * setup_meta_clocks() - Set up the Meta clock.
+ * setup_meta_clocks() - Early set up of the Meta clock.
  * @desc:       Clock descriptor usually provided by machine description
  *
  * Ensures all callbacks are valid.
diff --git a/arch/metag/kernel/irq.c b/arch/metag/kernel/irq.c
index 87707efeb0a3..2a2c9d55187e 100644
--- a/arch/metag/kernel/irq.c
+++ b/arch/metag/kernel/irq.c
@@ -25,7 +25,7 @@ static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
 static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
 #endif
 
-struct irq_domain *root_domain;
+static struct irq_domain *root_domain;
 
 static unsigned int startup_meta_irq(struct irq_data *data)
 {
@@ -279,11 +279,12 @@ static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu)
 {
         struct irq_desc *desc = irq_to_desc(irq);
         struct irq_chip *chip = irq_data_get_irq_chip(data);
+        unsigned long flags;
 
-        raw_spin_lock_irq(&desc->lock);
+        raw_spin_lock_irqsave(&desc->lock, flags);
         if (chip->irq_set_affinity)
                 chip->irq_set_affinity(data, cpumask_of(cpu), false);
-        raw_spin_unlock_irq(&desc->lock);
+        raw_spin_unlock_irqrestore(&desc->lock, flags);
 }
 
 /*
diff --git a/arch/metag/kernel/kick.c b/arch/metag/kernel/kick.c
index 50fcbec98cd2..beb377621322 100644
--- a/arch/metag/kernel/kick.c
+++ b/arch/metag/kernel/kick.c
@@ -26,6 +26,8 @@
  * pass it as an argument.
  */
 #include <linux/export.h>
+#include <linux/hardirq.h>
+#include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/types.h>
@@ -66,6 +68,7 @@ EXPORT_SYMBOL(kick_unregister_func);
 TBIRES
 kick_handler(TBIRES State, int SigNum, int Triggers, int Inst, PTBI pTBI)
 {
+        struct pt_regs *old_regs;
         struct kick_irq_handler *kh;
         struct list_head *lh;
         int handled = 0;
@@ -79,6 +82,9 @@ kick_handler(TBIRES State, int SigNum, int Triggers, int Inst, PTBI pTBI)
 
         trace_hardirqs_off();
 
+        old_regs = set_irq_regs((struct pt_regs *)State.Sig.pCtx);
+        irq_enter();
+
         /*
          * There is no need to disable interrupts here because we
          * can't nest KICK interrupts in a KICK interrupt handler.
@@ -97,5 +103,8 @@ kick_handler(TBIRES State, int SigNum, int Triggers, int Inst, PTBI pTBI)
 
         WARN_ON(!handled);
 
+        irq_exit();
+        set_irq_regs(old_regs);
+
         return tail_end(ret);
 }
diff --git a/arch/metag/kernel/metag_ksyms.c b/arch/metag/kernel/metag_ksyms.c
index ec872ef14eb1..215c94ad63ac 100644
--- a/arch/metag/kernel/metag_ksyms.c
+++ b/arch/metag/kernel/metag_ksyms.c
@@ -1,5 +1,7 @@
 #include <linux/export.h>
+#include <linux/types.h>
 
+#include <asm/checksum.h>
 #include <asm/div64.h>
 #include <asm/ftrace.h>
 #include <asm/page.h>
@@ -15,6 +17,9 @@ EXPORT_SYMBOL(max_pfn);
 EXPORT_SYMBOL(min_low_pfn);
 #endif
 
+/* Network checksum functions */
+EXPORT_SYMBOL(csum_partial);
+
 /* TBI symbols */
 EXPORT_SYMBOL(__TBI);
 EXPORT_SYMBOL(__TBIFindSeg);
diff --git a/arch/metag/kernel/perf/perf_event.c b/arch/metag/kernel/perf/perf_event.c
index 5b18888ee364..5cc4d4dcf3cf 100644
--- a/arch/metag/kernel/perf/perf_event.c
+++ b/arch/metag/kernel/perf/perf_event.c
@@ -813,8 +813,8 @@ static struct metag_pmu _metag_pmu = {
 };
 
 /* PMU CPU hotplug notifier */
-static int __cpuinit metag_pmu_cpu_notify(struct notifier_block *b,
-                unsigned long action, void *hcpu)
+static int metag_pmu_cpu_notify(struct notifier_block *b, unsigned long action,
+                                void *hcpu)
 {
         unsigned int cpu = (unsigned int)hcpu;
         struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
@@ -828,7 +828,7 @@ static int __cpuinit metag_pmu_cpu_notify(struct notifier_block *b,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata metag_pmu_notifier = {
+static struct notifier_block metag_pmu_notifier = {
         .notifier_call = metag_pmu_cpu_notify,
 };
 
diff --git a/arch/metag/kernel/setup.c b/arch/metag/kernel/setup.c
index 4f5726f1a55b..c396cd0b425f 100644
--- a/arch/metag/kernel/setup.c
+++ b/arch/metag/kernel/setup.c
@@ -20,6 +20,7 @@
 #include <linux/memblock.h>
 #include <linux/mm.h>
 #include <linux/of_fdt.h>
+#include <linux/of_platform.h>
 #include <linux/pfn.h>
 #include <linux/root_dev.h>
 #include <linux/sched.h>
@@ -424,6 +425,9 @@ static int __init customize_machine(void)
         /* customizes platform devices, or adds new ones */
         if (machine_desc->init_machine)
                 machine_desc->init_machine();
+        else
+                of_platform_populate(NULL, of_default_bus_match_table, NULL,
+                                     NULL);
         return 0;
 }
 arch_initcall(customize_machine);
@@ -587,20 +591,20 @@ PTBI pTBI_get(unsigned int cpu)
 EXPORT_SYMBOL(pTBI_get);
 
 #if defined(CONFIG_METAG_DSP) && defined(CONFIG_METAG_FPU)
-char capabilites[] = "dsp fpu";
+static char capabilities[] = "dsp fpu";
 #elif defined(CONFIG_METAG_DSP)
-char capabilites[] = "dsp";
+static char capabilities[] = "dsp";
 #elif defined(CONFIG_METAG_FPU)
-char capabilites[] = "fpu";
+static char capabilities[] = "fpu";
 #else
-char capabilites[] = "";
+static char capabilities[] = "";
 #endif
 
 static struct ctl_table caps_kern_table[] = {
         {
                 .procname       = "capabilities",
-                .data           = capabilites,
-                .maxlen         = sizeof(capabilites),
+                .data           = capabilities,
+                .maxlen         = sizeof(capabilities),
                 .mode           = 0444,
                 .proc_handler   = proc_dostring,
         },
diff --git a/arch/metag/kernel/smp.c b/arch/metag/kernel/smp.c
index f443ec9a7cbe..7c0113142981 100644
--- a/arch/metag/kernel/smp.c
+++ b/arch/metag/kernel/smp.c
@@ -8,6 +8,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/atomic.h>
+#include <linux/completion.h>
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
@@ -62,10 +63,12 @@ static DEFINE_PER_CPU(struct ipi_data, ipi_data) = {
 
 static DEFINE_SPINLOCK(boot_lock);
 
+static DECLARE_COMPLETION(cpu_running);
+
 /*
  * "thread" is assumed to be a valid Meta hardware thread ID.
  */
-int __cpuinit boot_secondary(unsigned int thread, struct task_struct *idle)
+int boot_secondary(unsigned int thread, struct task_struct *idle)
 {
         u32 val;
 
@@ -115,11 +118,9 @@ int __cpuinit boot_secondary(unsigned int thread, struct task_struct *idle)
  * If the cache partition has changed, prints a message to the log describing
  * those changes.
  */
-static __cpuinit void describe_cachepart_change(unsigned int thread,
-                                                const char *label,
-                                                unsigned int sz,
-                                                unsigned int old,
-                                                unsigned int new)
+static void describe_cachepart_change(unsigned int thread, const char *label,
+                                      unsigned int sz, unsigned int old,
+                                      unsigned int new)
 {
         unsigned int lor1, land1, gor1, gand1;
         unsigned int lor2, land2, gor2, gand2;
@@ -167,7 +168,7 @@ static __cpuinit void describe_cachepart_change(unsigned int thread,
  * Ensures that coherency is enabled and that the threads share the same cache
  * partitions.
  */
-static __cpuinit void setup_smp_cache(unsigned int thread)
+static void setup_smp_cache(unsigned int thread)
 {
         unsigned int this_thread, lflags;
         unsigned int dcsz, dcpart_this, dcpart_old, dcpart_new;
@@ -212,7 +213,7 @@ static __cpuinit void setup_smp_cache(unsigned int thread)
                                   icpart_old, icpart_new);
 }
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
+int __cpu_up(unsigned int cpu, struct task_struct *idle)
 {
         unsigned int thread = cpu_2_hwthread_id[cpu];
         int ret;
@@ -235,20 +236,12 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
          */
         ret = boot_secondary(thread, idle);
         if (ret == 0) {
-                unsigned long timeout;
-
                 /*
                  * CPU was successfully started, wait for it
                  * to come online or time out.
                  */
-                timeout = jiffies + HZ;
-                while (time_before(jiffies, timeout)) {
-                        if (cpu_online(cpu))
-                                break;
-
-                        udelay(10);
-                        barrier();
-                }
+                wait_for_completion_timeout(&cpu_running,
+                                            msecs_to_jiffies(1000));
 
                 if (!cpu_online(cpu))
                         ret = -EIO;
@@ -273,10 +266,9 @@ static DECLARE_COMPLETION(cpu_killed);
 /*
  * __cpu_disable runs on the processor to be shutdown.
  */
-int __cpuexit __cpu_disable(void)
+int __cpu_disable(void)
 {
         unsigned int cpu = smp_processor_id();
-        struct task_struct *p;
 
         /*
          * Take this CPU offline.  Once we clear this, we can't return,
@@ -296,12 +288,7 @@ int __cpuexit __cpu_disable(void)
         flush_cache_all();
         local_flush_tlb_all();
 
-        read_lock(&tasklist_lock);
-        for_each_process(p) {
-                if (p->mm)
-                        cpumask_clear_cpu(cpu, mm_cpumask(p->mm));
-        }
-        read_unlock(&tasklist_lock);
+        clear_tasks_mm_cpumask(cpu);
 
         return 0;
 }
@@ -310,7 +297,7 @@ int __cpuexit __cpu_disable(void)
  * called on the thread which is asking for a CPU to be shutdown -
  * waits until shutdown has completed, or it is timed out.
  */
-void __cpuexit __cpu_die(unsigned int cpu)
+void __cpu_die(unsigned int cpu)
 {
         if (!wait_for_completion_timeout(&cpu_killed, msecs_to_jiffies(1)))
                 pr_err("CPU%u: unable to kill\n", cpu);
@@ -322,7 +309,7 @@ void __cpuexit __cpu_die(unsigned int cpu)
  * Note that we do not return from this function. If this cpu is
  * brought online again it will need to run secondary_startup().
  */
-void __cpuexit cpu_die(void)
+void cpu_die(void)
 {
         local_irq_disable();
         idle_task_exit();
@@ -337,7 +324,7 @@ void __cpuexit cpu_die(void)
  * Called by both boot and secondaries to move global data into
  * per-processor storage.
  */
-void __cpuinit smp_store_cpu_info(unsigned int cpuid)
+void smp_store_cpu_info(unsigned int cpuid)
 {
         struct cpuinfo_metag *cpu_info = &per_cpu(cpu_data, cpuid);
 
@@ -385,12 +372,7 @@ asmlinkage void secondary_start_kernel(void)
 
         setup_priv();
 
-        /*
-         * Enable local interrupts.
-         */
-        tbi_startup_interrupt(TBID_SIGNUM_TRT);
         notify_cpu_starting(cpu);
-        local_irq_enable();
 
         pr_info("CPU%u (thread %u): Booted secondary processor\n",
                 cpu, cpu_2_hwthread_id[cpu]);
@@ -402,12 +384,13 @@ asmlinkage void secondary_start_kernel(void)
          * OK, now it's safe to let the boot CPU continue
          */
         set_cpu_online(cpu, true);
+        complete(&cpu_running);
 
         /*
-         * Check for cache aliasing.
-         * Preemption is disabled
+         * Enable local interrupts.
          */
-        check_for_cache_aliasing(cpu);
+        tbi_startup_interrupt(TBID_SIGNUM_TRT);
+        local_irq_enable();
 
         /*
          * OK, it's off to the idle thread for us
diff --git a/arch/metag/kernel/time.c b/arch/metag/kernel/time.c
index 17dc10733b2f..f1c8c53dace7 100644
--- a/arch/metag/kernel/time.c
+++ b/arch/metag/kernel/time.c
@@ -5,11 +5,21 @@
  *
  */
 
-#include <linux/init.h>
-
 #include <clocksource/metag_generic.h>
+#include <linux/clk-provider.h>
+#include <linux/init.h>
+#include <asm/clock.h>
 
 void __init time_init(void)
 {
+#ifdef CONFIG_COMMON_CLK
+        /* Init clocks from device tree */
+        of_clk_init(NULL);
+#endif
+
+        /* Init meta clocks, particularly the core clock */
+        init_metag_clocks();
+
+        /* Set up the timer clock sources */
         metag_generic_timer_init();
 }
diff --git a/arch/metag/kernel/traps.c b/arch/metag/kernel/traps.c
index 2ceeaae5b199..25f9d1c2ffec 100644
--- a/arch/metag/kernel/traps.c
+++ b/arch/metag/kernel/traps.c
@@ -33,6 +33,7 @@
 #include <asm/siginfo.h>
 #include <asm/traps.h>
 #include <asm/hwthread.h>
+#include <asm/setup.h>
 #include <asm/switch.h>
 #include <asm/user_gateway.h>
 #include <asm/syscall.h>
@@ -87,8 +88,8 @@ const char *trap_name(int trapno)
 
 static DEFINE_SPINLOCK(die_lock);
 
-void die(const char *str, struct pt_regs *regs, long err,
-         unsigned long addr)
+void __noreturn die(const char *str, struct pt_regs *regs,
+                    long err, unsigned long addr)
 {
         static int die_counter;
 
@@ -811,7 +812,7 @@ static void set_trigger_mask(unsigned int mask)
 }
 #endif
 
-void __cpuinit per_cpu_trap_init(unsigned long cpu)
+void per_cpu_trap_init(unsigned long cpu)
 {
         TBIRES int_context;
         unsigned int thread = cpu_2_hwthread_id[cpu];
diff --git a/arch/metag/lib/checksum.c b/arch/metag/lib/checksum.c
index 44d2e1913560..5d6a98a05e9d 100644
--- a/arch/metag/lib/checksum.c
+++ b/arch/metag/lib/checksum.c
@@ -124,7 +124,6 @@ __wsum csum_partial(const void *buff, int len, __wsum wsum)
                 result += 1;
         return (__force __wsum)result;
 }
-EXPORT_SYMBOL(csum_partial);
 
 /*
  * this routine is used for miscellaneous IP-like checksums, mainly
diff --git a/arch/metag/mm/cache.c b/arch/metag/mm/cache.c
index b5d3b2e7c160..a62285284ab8 100644
--- a/arch/metag/mm/cache.c
+++ b/arch/metag/mm/cache.c
@@ -45,7 +45,7 @@ static volatile u32 lnkget_testdata[16] __initdata __aligned(64);
 
 #define LNKGET_CONSTANT 0xdeadbeef
 
-void __init metag_lnkget_probe(void)
+static void __init metag_lnkget_probe(void)
 {
         int temp;
         long flags;
diff --git a/arch/metag/mm/fault.c b/arch/metag/mm/fault.c
index 2c75bf7357c5..8fddf46e6c62 100644
--- a/arch/metag/mm/fault.c
+++ b/arch/metag/mm/fault.c
@@ -224,8 +224,10 @@ do_sigbus:
          */
 out_of_memory:
         up_read(&mm->mmap_sem);
-        if (user_mode(regs))
-                do_group_exit(SIGKILL);
+        if (user_mode(regs)) {
+                pagefault_out_of_memory();
+                return 1;
+        }
 
 no_context:
         /* Are we prepared to handle this kernel fault?  */
diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig
index 3649a8b150c0..deaf45ab6429 100644
--- a/arch/microblaze/configs/mmu_defconfig
+++ b/arch/microblaze/configs/mmu_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_FHANDLE=y
@@ -81,6 +80,9 @@ CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEBUG_SLAB=y
 CONFIG_DEBUG_SPINLOCK=y
 CONFIG_DEBUG_INFO=y
+CONFIG_KGDB=y
+CONFIG_KGDB_TESTS=y
+CONFIG_KGDB_KDB=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_KEYS=y
 CONFIG_ENCRYPTED_KEYS=y
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
index 6dece2d002dc..b14232b6878f 100644
--- a/arch/microblaze/include/asm/unistd.h
+++ b/arch/microblaze/include/asm/unistd.h
@@ -38,4 +38,7 @@
 #define __ARCH_WANT_SYS_FORK
 
 #endif /* __ASSEMBLY__ */
+
+#define __NR_syscalls         381
+
 #endif /* _ASM_MICROBLAZE_UNISTD_H */
diff --git a/arch/microblaze/include/uapi/asm/unistd.h b/arch/microblaze/include/uapi/asm/unistd.h
index 5f7fe7582f3a..20043b67d158 100644
--- a/arch/microblaze/include/uapi/asm/unistd.h
+++ b/arch/microblaze/include/uapi/asm/unistd.h
@@ -397,6 +397,4 @@
 #define __NR_kcmp               379
 #define __NR_finit_module       380
 
-#define __NR_syscalls           381
-
 #endif /* _UAPI_ASM_MICROBLAZE_UNISTD_H */
diff --git a/arch/microblaze/kernel/kgdb.c b/arch/microblaze/kernel/kgdb.c
index 8adc92443100..09a5e8286137 100644
--- a/arch/microblaze/kernel/kgdb.c
+++ b/arch/microblaze/kernel/kgdb.c
@@ -141,7 +141,7 @@ void kgdb_arch_exit(void)
 /*
  * Global data
  */
-const struct kgdb_arch arch_kgdb_ops = {
+struct kgdb_arch arch_kgdb_ops = {
 #ifdef __MICROBLAZEEL__
         .gdb_bpt_instr = {0x18, 0x00, 0x0c, 0xba}, /* brki r16, 0x18 */
 #else
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index 4b597d91a8d5..d9d81c219253 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -30,7 +30,6 @@ platforms += sibyte
 platforms += sni
 platforms += txx9
 platforms += vr41xx
-platforms += wrppmc
 
 # include the platform specific files
 include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms))
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index beeff436b22f..c3abed332301 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1,6 +1,7 @@
 config MIPS
         bool
         default y
+        select HAVE_CONTEXT_TRACKING
         select HAVE_GENERIC_DMA_COHERENT
         select HAVE_IDE
         select HAVE_OPROFILE
@@ -27,6 +28,7 @@ config MIPS
         select HAVE_GENERIC_HARDIRQS
         select GENERIC_IRQ_PROBE
         select GENERIC_IRQ_SHOW
+        select GENERIC_PCI_IOMAP
         select HAVE_ARCH_JUMP_LABEL
         select ARCH_WANT_IPC_PARSE_VERSION
         select IRQ_FORCED_THREADING
@@ -46,9 +48,6 @@ config MIPS
 
 menu "Machine selection"
 
-config ZONE_DMA
-        bool
-
 choice
         prompt "System type"
         default SGI_IP22
@@ -124,11 +123,14 @@ config BCM47XX
 
 config BCM63XX
         bool "Broadcom BCM63XX based boards"
+        select BOOT_RAW
         select CEVT_R4K
         select CSRC_R4K
         select DMA_NONCOHERENT
         select IRQ_CPU
         select SYS_HAS_CPU_MIPS32_R1
+        select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348
+        select NR_CPUS_DEFAULT_2
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_BIG_ENDIAN
         select SYS_HAS_EARLY_PRINTK
@@ -341,7 +343,6 @@ config MIPS_SEAD3
         select DMA_NONCOHERENT
         select IRQ_CPU
         select IRQ_GIC
-        select MIPS_CPU_SCACHE
         select MIPS_MSC
         select SYS_HAS_CPU_MIPS32_R1
         select SYS_HAS_CPU_MIPS32_R2
@@ -420,7 +421,6 @@ config POWERTV
         select CSRC_POWERTV
         select DMA_NONCOHERENT
         select HW_HAS_PCI
-        select SYS_HAS_EARLY_PRINTK
         select SYS_HAS_CPU_MIPS32_R2
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_BIG_ENDIAN
@@ -713,46 +713,8 @@ config MIKROTIK_RB532
           Support the Mikrotik(tm) RouterBoard 532 series,
           based on the IDT RC32434 SoC.
 
-config WR_PPMC
-        bool "Wind River PPMC board"
-        select CEVT_R4K
-        select CSRC_R4K
-        select IRQ_CPU
-        select BOOT_ELF32
-        select DMA_NONCOHERENT
-        select HW_HAS_PCI
-        select PCI_GT64XXX_PCI0
-        select SWAP_IO_SPACE
-        select SYS_HAS_CPU_MIPS32_R1
-        select SYS_HAS_CPU_MIPS32_R2
-        select SYS_HAS_CPU_MIPS64_R1
-        select SYS_HAS_CPU_NEVADA
-        select SYS_HAS_CPU_RM7000
-        select SYS_SUPPORTS_32BIT_KERNEL
-        select SYS_SUPPORTS_64BIT_KERNEL
-        select SYS_SUPPORTS_BIG_ENDIAN
-        select SYS_SUPPORTS_LITTLE_ENDIAN
-        help
-          This enables support for the Wind River MIPS32 4KC PPMC evaluation
-          board, which is based on GT64120 bridge chip.
-
-config CAVIUM_OCTEON_SIMULATOR
-        bool "Cavium Networks Octeon Simulator"
-        select CEVT_R4K
-        select 64BIT_PHYS_ADDR
-        select DMA_COHERENT
-        select SYS_SUPPORTS_64BIT_KERNEL
-        select SYS_SUPPORTS_BIG_ENDIAN
-        select SYS_SUPPORTS_HOTPLUG_CPU
-        select SYS_HAS_CPU_CAVIUM_OCTEON
-        select HOLES_IN_ZONE
-        help
-          The Octeon simulator is software performance model of the Cavium
-          Octeon Processor. It supports simulating Octeon processors on x86
-          hardware.
-
-config CAVIUM_OCTEON_REFERENCE_BOARD
-        bool "Cavium Networks Octeon reference board"
+config CAVIUM_OCTEON_SOC
+        bool "Cavium Networks Octeon SoC based boards"
         select CEVT_R4K
         select 64BIT_PHYS_ADDR
         select DMA_COHERENT
@@ -806,6 +768,8 @@ config NLM_XLR_BOARD
         select SYS_HAS_EARLY_PRINTK
         select USB_ARCH_HAS_OHCI if USB_SUPPORT
         select USB_ARCH_HAS_EHCI if USB_SUPPORT
+        select SYS_SUPPORTS_ZBOOT
+        select SYS_SUPPORTS_ZBOOT_UART16550
         help
           Support for systems based on Netlogic XLR and XLS processors.
           Say Y here if you have a XLR or XLS based board.
@@ -832,6 +796,8 @@ config NLM_XLP_BOARD
         select SYNC_R4K
         select SYS_HAS_EARLY_PRINTK
         select USE_OF
+        select SYS_SUPPORTS_ZBOOT
+        select SYS_SUPPORTS_ZBOOT_UART16550
         help
           This board is based on Netlogic XLP Processor.
           Say Y here if you have a XLP based board.
@@ -1031,7 +997,6 @@ config CPU_BIG_ENDIAN
 config CPU_LITTLE_ENDIAN
         bool "Little endian"
         depends on SYS_SUPPORTS_LITTLE_ENDIAN
-        help
 
 endchoice
 
@@ -1737,6 +1702,7 @@ endchoice
 
 config KVM_GUEST
         bool "KVM Guest Kernel"
+        depends on BROKEN_ON_SMP
         help
           Select this option if building a guest kernel for KVM (Trap & Emulate) mode
 
@@ -1964,7 +1930,7 @@ config MIPS_MT_FPAFF
 
 config MIPS_VPE_LOADER
         bool "VPE loader support."
-        depends on SYS_SUPPORTS_MULTITHREADING
+        depends on SYS_SUPPORTS_MULTITHREADING && MODULES
         select CPU_MIPSR2_IRQ_VI
         select CPU_MIPSR2_IRQ_EI
         select MIPS_MT
@@ -2382,6 +2348,19 @@ config SECCOMP
 
           If unsure, say Y. Only embedded should say N here.
 
+config CC_STACKPROTECTOR
+        bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
+        help
+          This option turns on the -fstack-protector GCC feature. This
+          feature puts, at the beginning of functions, a canary value on
+          the stack just before the return address, and validates
+          the value just before actually returning.  Stack based buffer
+          overflows (that need to overwrite this return address) now also
+          overwrite the canary, which gets detected and the attack is then
+          neutralized via a kernel panic.
+
+          This feature requires gcc version 4.2 or above.
+
 config USE_OF
         bool
         select OF
@@ -2413,7 +2392,6 @@ config PCI
         bool "Support for PCI controller"
         depends on HW_HAS_PCI
         select PCI_DOMAINS
-        select GENERIC_PCI_IOMAP
         select NO_GENERIC_PCI_IOPORT_MAP
         help
           Find out whether you have a PCI motherboard. PCI is the name of a
@@ -2479,6 +2457,9 @@ config I8253
         select CLKEVT_I8253
         select MIPS_EXTERNAL_TIMER
 
+config ZONE_DMA
+        bool
+
 config ZONE_DMA32
         bool
 
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index dd58a04ef4bc..37f9ef324f2f 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -227,6 +227,10 @@ KBUILD_CPPFLAGS += -DDATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)
 
 LDFLAGS                 += -m $(ld-emul)
 
+ifdef CONFIG_CC_STACKPROTECTOR
+  KBUILD_CFLAGS += -fstack-protector
+endif
+
 ifdef CONFIG_MIPS
 CHECKFLAGS += $(shell $(CC) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \
         egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \
diff --git a/arch/mips/ath79/mach-ap136.c b/arch/mips/ath79/mach-ap136.c
index 479dd4b1d0d2..07eac58c3641 100644
--- a/arch/mips/ath79/mach-ap136.c
+++ b/arch/mips/ath79/mach-ap136.c
@@ -132,7 +132,7 @@ static void __init ap136_pci_init(u8 *eeprom)
         ath79_register_pci();
 }
 #else
-static inline void ap136_pci_init(void) {}
+static inline void ap136_pci_init(u8 *eeprom) {}
 #endif /* CONFIG_PCI */
 
 static void __init ap136_setup(void)
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index 8be4e856b8b8..80f4ecd42b0d 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -182,7 +182,7 @@ const char *get_system_type(void)
         return ath79_sys_type;
 }
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
         return CP0_LEGACY_COMPARE_IRQ;
 }
diff --git a/arch/mips/bcm63xx/Kconfig b/arch/mips/bcm63xx/Kconfig
index 5639662fd503..b78306ce56c7 100644
--- a/arch/mips/bcm63xx/Kconfig
+++ b/arch/mips/bcm63xx/Kconfig
@@ -1,6 +1,10 @@
 menu "CPU support"
         depends on BCM63XX
 
+config BCM63XX_CPU_3368
+        bool "support 3368 CPU"
+        select HW_HAS_PCI
+
 config BCM63XX_CPU_6328
         bool "support 6328 CPU"
         select HW_HAS_PCI
@@ -8,14 +12,9 @@ config BCM63XX_CPU_6328
 config BCM63XX_CPU_6338
         bool "support 6338 CPU"
         select HW_HAS_PCI
-        select USB_ARCH_HAS_OHCI
-        select USB_OHCI_BIG_ENDIAN_DESC
-        select USB_OHCI_BIG_ENDIAN_MMIO
 
 config BCM63XX_CPU_6345
         bool "support 6345 CPU"
-        select USB_OHCI_BIG_ENDIAN_DESC
-        select USB_OHCI_BIG_ENDIAN_MMIO
 
 config BCM63XX_CPU_6348
         bool "support 6348 CPU"
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index a9505c4867e8..5b974eb125fc 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -28,11 +28,47 @@
 #include <bcm63xx_dev_usb_usbd.h>
 #include <board_bcm963xx.h>
 
+#include <uapi/linux/bcm933xx_hcs.h>
+
 #define PFX     "board_bcm963xx: "
 
+#define HCS_OFFSET_128K                 0x20000
+
 static struct board_info board;
 
 /*
+ * known 3368 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_3368
+static struct board_info __initdata board_cvg834g = {
+        .name                           = "CVG834G_E15R3921",
+        .expected_cpu_id                = 0x3368,
+
+        .has_uart0                      = 1,
+        .has_uart1                      = 1,
+
+        .has_enet0                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+
+        .leds = {
+                {
+                        .name           = "CVG834G:green:power",
+                        .gpio           = 37,
+                        .default_trigger= "default-on",
+                },
+        },
+
+        .ephy_reset_gpio                = 36,
+        .ephy_reset_gpio_flags          = GPIOF_INIT_HIGH,
+};
+#endif
+
+/*
  * known 6328 boards
  */
 #ifdef CONFIG_BCM63XX_CPU_6328
@@ -639,6 +675,9 @@ static struct board_info __initdata board_DWVS0 = {
  * all boards
  */
 static const struct board_info __initconst *bcm963xx_boards[] = {
+#ifdef CONFIG_BCM63XX_CPU_3368
+        &board_cvg834g,
+#endif
 #ifdef CONFIG_BCM63XX_CPU_6328
         &board_96328avng,
 #endif
@@ -722,8 +761,9 @@ void __init board_prom_init(void)
         unsigned int i;
         u8 *boot_addr, *cfe;
         char cfe_version[32];
-        char *board_name;
+        char *board_name = NULL;
         u32 val;
+        struct bcm_hcs *hcs;
 
         /* read base address of boot chip select (0)
          * 6328/6362 do not have MPI but boot from a fixed address
@@ -747,7 +787,12 @@ void __init board_prom_init(void)
 
         bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET);
 
-        board_name = bcm63xx_nvram_get_name();
+        if (BCMCPU_IS_3368()) {
+                hcs = (struct bcm_hcs *)boot_addr;
+                board_name = hcs->filename;
+        } else {
+                board_name = bcm63xx_nvram_get_name();
+        }
         /* find board by name */
         for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
                 if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
@@ -845,6 +890,10 @@ int __init board_register_devices(void)
             !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
                 bcm63xx_enet_register(1, &board.enet1);
 
+        if (board.has_enetsw &&
+            !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
+                bcm63xx_enetsw_register(&board.enetsw);
+
         if (board.has_usbd)
                 bcm63xx_usbd_register(&board.usbd);
 
@@ -873,5 +922,9 @@ int __init board_register_devices(void)
 
         platform_device_register(&bcm63xx_gpio_leds);
 
+        if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+                gpio_request_one(board.ephy_reset_gpio,
+                                board.ephy_reset_gpio_flags, "ephy-reset");
+
         return 0;
 }
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index c726a97fc798..43da4ae04cc2 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -84,7 +84,7 @@ static void enetx_set(struct clk *clk, int enable)
         else
                 clk_disable_unlocked(&clk_enet_misc);
 
-        if (BCMCPU_IS_6358()) {
+        if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
                 u32 mask;
 
                 if (clk->id == 0)
@@ -110,9 +110,8 @@ static struct clk clk_enet1 = {
  */
 static void ephy_set(struct clk *clk, int enable)
 {
-        if (!BCMCPU_IS_6358())
-                return;
-        bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable);
+        if (BCMCPU_IS_3368() || BCMCPU_IS_6358())
+                bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable);
 }
 
 
@@ -155,9 +154,10 @@ static struct clk clk_enetsw = {
  */
 static void pcm_set(struct clk *clk, int enable)
 {
-        if (!BCMCPU_IS_6358())
-                return;
-        bcm_hwclock_set(CKCTL_6358_PCM_EN, enable);
+        if (BCMCPU_IS_3368())
+                bcm_hwclock_set(CKCTL_3368_PCM_EN, enable);
+        if (BCMCPU_IS_6358())
+                bcm_hwclock_set(CKCTL_6358_PCM_EN, enable);
 }
 
 static struct clk clk_pcm = {
@@ -211,7 +211,7 @@ static void spi_set(struct clk *clk, int enable)
                 mask = CKCTL_6338_SPI_EN;
         else if (BCMCPU_IS_6348())
                 mask = CKCTL_6348_SPI_EN;
-        else if (BCMCPU_IS_6358())
+        else if (BCMCPU_IS_3368() || BCMCPU_IS_6358())
                 mask = CKCTL_6358_SPI_EN;
         else if (BCMCPU_IS_6362())
                 mask = CKCTL_6362_SPI_EN;
@@ -318,6 +318,18 @@ unsigned long clk_get_rate(struct clk *clk)
 
 EXPORT_SYMBOL(clk_get_rate);
 
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        return 0;
+}
+EXPORT_SYMBOL_GPL(clk_set_rate);
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+        return 0;
+}
+EXPORT_SYMBOL_GPL(clk_round_rate);
+
 struct clk *clk_get(struct device *dev, const char *id)
 {
         if (!strcmp(id, "enet0"))
@@ -338,7 +350,7 @@ struct clk *clk_get(struct device *dev, const char *id)
                 return &clk_xtm;
         if (!strcmp(id, "periph"))
                 return &clk_periph;
-        if (BCMCPU_IS_6358() && !strcmp(id, "pcm"))
+        if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
                 return &clk_pcm;
         if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
                 return &clk_ipsec;
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
index 79fe32df5e96..7e17374a9ae8 100644
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
@@ -29,6 +29,14 @@ static u8 bcm63xx_cpu_rev;
 static unsigned int bcm63xx_cpu_freq;
 static unsigned int bcm63xx_memory_size;
 
+static const unsigned long bcm3368_regs_base[] = {
+        __GEN_CPU_REGS_TABLE(3368)
+};
+
+static const int bcm3368_irqs[] = {
+        __GEN_CPU_IRQ_TABLE(3368)
+};
+
 static const unsigned long bcm6328_regs_base[] = {
         __GEN_CPU_REGS_TABLE(6328)
 };
@@ -116,6 +124,9 @@ unsigned int bcm63xx_get_memory_size(void)
 static unsigned int detect_cpu_clock(void)
 {
         switch (bcm63xx_get_cpu_id()) {
+        case BCM3368_CPU_ID:
+                return 300000000;
+
         case BCM6328_CPU_ID:
         {
                 unsigned int tmp, mips_pll_fcvo;
@@ -266,7 +277,7 @@ static unsigned int detect_memory_size(void)
                 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1;
         }
 
-        if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
+        if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
                 val = bcm_memc_readl(MEMC_CFG_REG);
                 rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT;
                 cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT;
@@ -302,10 +313,17 @@ void __init bcm63xx_cpu_init(void)
                 chipid_reg = BCM_6345_PERF_BASE;
                 break;
         case CPU_BMIPS4350:
-                if ((read_c0_prid() & 0xf0) == 0x10)
+                switch ((read_c0_prid() & 0xff)) {
+                case 0x04:
+                        chipid_reg = BCM_3368_PERF_BASE;
+                        break;
+                case 0x10:
                         chipid_reg = BCM_6345_PERF_BASE;
-                else
+                        break;
+                default:
                         chipid_reg = BCM_6368_PERF_BASE;
+                        break;
+                }
                 break;
         }
 
@@ -322,6 +340,10 @@ void __init bcm63xx_cpu_init(void)
         bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
 
         switch (bcm63xx_cpu_id) {
+        case BCM3368_CPU_ID:
+                bcm63xx_regs_base = bcm3368_regs_base;
+                bcm63xx_irqs = bcm3368_irqs;
+                break;
         case BCM6328_CPU_ID:
                 bcm63xx_regs_base = bcm6328_regs_base;
                 bcm63xx_irqs = bcm6328_irqs;
diff --git a/arch/mips/bcm63xx/dev-enet.c b/arch/mips/bcm63xx/dev-enet.c
index 39c23366c5c7..52bc01df9bfe 100644
--- a/arch/mips/bcm63xx/dev-enet.c
+++ b/arch/mips/bcm63xx/dev-enet.c
@@ -9,16 +9,60 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/export.h>
 #include <bcm63xx_dev_enet.h>
 #include <bcm63xx_io.h>
 #include <bcm63xx_regs.h>
 
+#ifdef BCMCPU_RUNTIME_DETECT
+static const unsigned long bcm6348_regs_enetdmac[] = {
+        [ENETDMAC_CHANCFG]      = ENETDMAC_CHANCFG_REG,
+        [ENETDMAC_IR]           = ENETDMAC_IR_REG,
+        [ENETDMAC_IRMASK]       = ENETDMAC_IRMASK_REG,
+        [ENETDMAC_MAXBURST]     = ENETDMAC_MAXBURST_REG,
+};
+
+static const unsigned long bcm6345_regs_enetdmac[] = {
+        [ENETDMAC_CHANCFG]      = ENETDMA_6345_CHANCFG_REG,
+        [ENETDMAC_IR]           = ENETDMA_6345_IR_REG,
+        [ENETDMAC_IRMASK]       = ENETDMA_6345_IRMASK_REG,
+        [ENETDMAC_MAXBURST]     = ENETDMA_6345_MAXBURST_REG,
+        [ENETDMAC_BUFALLOC]     = ENETDMA_6345_BUFALLOC_REG,
+        [ENETDMAC_RSTART]       = ENETDMA_6345_RSTART_REG,
+        [ENETDMAC_FC]           = ENETDMA_6345_FC_REG,
+        [ENETDMAC_LEN]          = ENETDMA_6345_LEN_REG,
+};
+
+const unsigned long *bcm63xx_regs_enetdmac;
+EXPORT_SYMBOL(bcm63xx_regs_enetdmac);
+
+static __init void bcm63xx_enetdmac_regs_init(void)
+{
+        if (BCMCPU_IS_6345())
+                bcm63xx_regs_enetdmac = bcm6345_regs_enetdmac;
+        else
+                bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac;
+}
+#else
+static __init void bcm63xx_enetdmac_regs_init(void) { }
+#endif
+
 static struct resource shared_res[] = {
         {
                 .start          = -1, /* filled at runtime */
                 .end            = -1, /* filled at runtime */
                 .flags          = IORESOURCE_MEM,
         },
+        {
+                .start          = -1, /* filled at runtime */
+                .end            = -1, /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .end            = -1, /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
 };
 
 static struct platform_device bcm63xx_enet_shared_device = {
@@ -94,6 +138,71 @@ static struct platform_device bcm63xx_enet1_device = {
         },
 };
 
+static struct resource enetsw_res[] = {
+        {
+                /* start & end filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                /* start filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                /* start filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct bcm63xx_enetsw_platform_data enetsw_pd;
+
+static struct platform_device bcm63xx_enetsw_device = {
+        .name           = "bcm63xx_enetsw",
+        .num_resources  = ARRAY_SIZE(enetsw_res),
+        .resource       = enetsw_res,
+        .dev            = {
+                .platform_data = &enetsw_pd,
+        },
+};
+
+static int __init register_shared(void)
+{
+        int ret, chan_count;
+
+        if (shared_device_registered)
+                return 0;
+
+        bcm63xx_enetdmac_regs_init();
+
+        shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
+        shared_res[0].end = shared_res[0].start;
+        if (BCMCPU_IS_6345())
+                shared_res[0].end += (RSET_6345_ENETDMA_SIZE) - 1;
+        else
+                shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
+
+        if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
+                chan_count = 32;
+        else if (BCMCPU_IS_6345())
+                chan_count = 8;
+        else
+                chan_count = 16;
+
+        shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
+        shared_res[1].end = shared_res[1].start;
+        shared_res[1].end += RSET_ENETDMAC_SIZE(chan_count)  - 1;
+
+        shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
+        shared_res[2].end = shared_res[2].start;
+        shared_res[2].end += RSET_ENETDMAS_SIZE(chan_count)  - 1;
+
+        ret = platform_device_register(&bcm63xx_enet_shared_device);
+        if (ret)
+                return ret;
+        shared_device_registered = 1;
+
+        return 0;
+}
+
 int __init bcm63xx_enet_register(int unit,
                                  const struct bcm63xx_enet_platform_data *pd)
 {
@@ -104,22 +213,12 @@ int __init bcm63xx_enet_register(int unit,
         if (unit > 1)
                 return -ENODEV;
 
-        if (unit == 1 && BCMCPU_IS_6338())
+        if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345()))
                 return -ENODEV;
 
-        if (!shared_device_registered) {
-                shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
-                shared_res[0].end = shared_res[0].start;
-                if (BCMCPU_IS_6338())
-                        shared_res[0].end += (RSET_ENETDMA_SIZE / 2)  - 1;
-                else
-                        shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
-
-                ret = platform_device_register(&bcm63xx_enet_shared_device);
-                if (ret)
-                        return ret;
-                shared_device_registered = 1;
-        }
+        ret = register_shared();
+        if (ret)
+                return ret;
 
         if (unit == 0) {
                 enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0);
@@ -155,8 +254,62 @@ int __init bcm63xx_enet_register(int unit,
                 dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
         }
 
+        dpd->dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
+        dpd->dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
+        if (BCMCPU_IS_6345()) {
+                dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_CHAINING_MASK;
+                dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_WRAP_EN_MASK;
+                dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_FLOWC_EN_MASK;
+                dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK;
+                dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK;
+                dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH;
+                dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT;
+        } else {
+                dpd->dma_has_sram = true;
+                dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
+        }
+
         ret = platform_device_register(pdev);
         if (ret)
                 return ret;
         return 0;
 }
+
+int __init
+bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd)
+{
+        int ret;
+
+        if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
+                return -ENODEV;
+
+        ret = register_shared();
+        if (ret)
+                return ret;
+
+        enetsw_res[0].start = bcm63xx_regset_address(RSET_ENETSW);
+        enetsw_res[0].end = enetsw_res[0].start;
+        enetsw_res[0].end += RSET_ENETSW_SIZE - 1;
+        enetsw_res[1].start = bcm63xx_get_irq_number(IRQ_ENETSW_RXDMA0);
+        enetsw_res[2].start = bcm63xx_get_irq_number(IRQ_ENETSW_TXDMA0);
+        if (!enetsw_res[2].start)
+                enetsw_res[2].start = -1;
+
+        memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
+
+        if (BCMCPU_IS_6328())
+                enetsw_pd.num_ports = ENETSW_PORTS_6328;
+        else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+                enetsw_pd.num_ports = ENETSW_PORTS_6368;
+
+        enetsw_pd.dma_has_sram = true;
+        enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
+        enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
+        enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
+
+        ret = platform_device_register(&bcm63xx_enetsw_device);
+        if (ret)
+                return ret;
+
+        return 0;
+}
diff --git a/arch/mips/bcm63xx/dev-flash.c b/arch/mips/bcm63xx/dev-flash.c
index 588d1ec622e4..172dd8397178 100644
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -71,6 +71,7 @@ static int __init bcm63xx_detect_flash_type(void)
         case BCM6348_CPU_ID:
                 /* no way to auto detect so assume parallel */
                 return BCM63XX_FLASH_TYPE_PARALLEL;
+        case BCM3368_CPU_ID:
         case BCM6358_CPU_ID:
                 val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
                 if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL)
diff --git a/arch/mips/bcm63xx/dev-spi.c b/arch/mips/bcm63xx/dev-spi.c
index 3065bb61820d..d12daed749bc 100644
--- a/arch/mips/bcm63xx/dev-spi.c
+++ b/arch/mips/bcm63xx/dev-spi.c
@@ -37,7 +37,8 @@ static __init void bcm63xx_spi_regs_init(void)
 {
         if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
                 bcm63xx_regs_spi = bcm6348_regs_spi;
-        if (BCMCPU_IS_6358() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
+        if (BCMCPU_IS_3368() || BCMCPU_IS_6358() ||
+                BCMCPU_IS_6362() || BCMCPU_IS_6368())
                 bcm63xx_regs_spi = bcm6358_regs_spi;
 }
 #else
@@ -87,7 +88,8 @@ int __init bcm63xx_spi_register(void)
                 spi_pdata.msg_ctl_width = SPI_6348_MSG_CTL_WIDTH;
         }
 
-        if (BCMCPU_IS_6358() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
+        if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
+                BCMCPU_IS_6368()) {
                 spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
                 spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
                 spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
diff --git a/arch/mips/bcm63xx/dev-uart.c b/arch/mips/bcm63xx/dev-uart.c
index d6e42c608325..3bc7f3bfc9ad 100644
--- a/arch/mips/bcm63xx/dev-uart.c
+++ b/arch/mips/bcm63xx/dev-uart.c
@@ -54,7 +54,8 @@ int __init bcm63xx_uart_register(unsigned int id)
         if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
                 return -ENODEV;
 
-        if (id == 1 && (!BCMCPU_IS_6358() && !BCMCPU_IS_6368()))
+        if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() &&
+                !BCMCPU_IS_6368()))
                 return -ENODEV;
 
         if (id == 0) {
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index c0ab3887f42e..1525f8a3841b 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -27,6 +27,17 @@ static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
 static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
 
 #ifndef BCMCPU_RUNTIME_DETECT
+#ifdef CONFIG_BCM63XX_CPU_3368
+#define irq_stat_reg            PERF_IRQSTAT_3368_REG
+#define irq_mask_reg            PERF_IRQMASK_3368_REG
+#define irq_bits                32
+#define is_ext_irq_cascaded     0
+#define ext_irq_start           0
+#define ext_irq_end             0
+#define ext_irq_count           4
+#define ext_irq_cfg_reg1        PERF_EXTIRQ_CFG_REG_3368
+#define ext_irq_cfg_reg2        0
+#endif
 #ifdef CONFIG_BCM63XX_CPU_6328
 #define irq_stat_reg            PERF_IRQSTAT_6328_REG
 #define irq_mask_reg            PERF_IRQMASK_6328_REG
@@ -140,6 +151,13 @@ static void bcm63xx_init_irq(void)
         irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
 
         switch (bcm63xx_get_cpu_id()) {
+        case BCM3368_CPU_ID:
+                irq_stat_addr += PERF_IRQSTAT_3368_REG;
+                irq_mask_addr += PERF_IRQMASK_3368_REG;
+                irq_bits = 32;
+                ext_irq_count = 4;
+                ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
+                break;
         case BCM6328_CPU_ID:
                 irq_stat_addr += PERF_IRQSTAT_6328_REG;
                 irq_mask_addr += PERF_IRQMASK_6328_REG;
@@ -294,6 +312,10 @@ asmlinkage void plat_irq_dispatch(void)
 
                 if (cause & CAUSEF_IP7)
                         do_IRQ(7);
+                if (cause & CAUSEF_IP0)
+                        do_IRQ(0);
+                if (cause & CAUSEF_IP1)
+                        do_IRQ(1);
                 if (cause & CAUSEF_IP2)
                         dispatch_internal();
                 if (!is_ext_irq_cascaded) {
@@ -475,6 +497,7 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
                         reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
                 break;
 
+        case BCM3368_CPU_ID:
         case BCM6328_CPU_ID:
         case BCM6338_CPU_ID:
         case BCM6345_CPU_ID:
diff --git a/arch/mips/bcm63xx/nvram.c b/arch/mips/bcm63xx/nvram.c
index a4b8864f9307..e652e578a679 100644
--- a/arch/mips/bcm63xx/nvram.c
+++ b/arch/mips/bcm63xx/nvram.c
@@ -42,6 +42,7 @@ void __init bcm63xx_nvram_init(void *addr)
 {
         unsigned int check_len;
         u32 crc, expected_crc;
+        u8 hcs_mac_addr[ETH_ALEN] = { 0x00, 0x10, 0x18, 0xff, 0xff, 0xff };
 
         /* extract nvram data */
         memcpy(&nvram, addr, sizeof(nvram));
@@ -62,6 +63,15 @@ void __init bcm63xx_nvram_init(void *addr)
         if (crc != expected_crc)
                 pr_warn("nvram checksum failed, contents may be invalid (expected %08x, got %08x)\n",
                         expected_crc, crc);
+
+        /* Cable modems have a different NVRAM which is embedded in the eCos
+         * firmware and not easily extractible, give at least a MAC address
+         * pool.
+         */
+        if (BCMCPU_IS_3368()) {
+                memcpy(nvram.mac_addr_base, hcs_mac_addr, ETH_ALEN);
+                nvram.mac_addr_count = 2;
+        }
 }
 
 u8 *bcm63xx_nvram_get_name(void)
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index fd698087fbfd..8ac4e095e68e 100644
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -8,7 +8,11 @@
 
 #include <linux/init.h>
 #include <linux/bootmem.h>
+#include <linux/smp.h>
 #include <asm/bootinfo.h>
+#include <asm/bmips.h>
+#include <asm/smp-ops.h>
+#include <asm/mipsregs.h>
 #include <bcm63xx_board.h>
 #include <bcm63xx_cpu.h>
 #include <bcm63xx_io.h>
@@ -26,7 +30,9 @@ void __init prom_init(void)
         bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
 
         /* disable all hardware blocks clock for now */
-        if (BCMCPU_IS_6328())
+        if (BCMCPU_IS_3368())
+                mask = CKCTL_3368_ALL_SAFE_EN;
+        else if (BCMCPU_IS_6328())
                 mask = CKCTL_6328_ALL_SAFE_EN;
         else if (BCMCPU_IS_6338())
                 mask = CKCTL_6338_ALL_SAFE_EN;
@@ -52,6 +58,47 @@ void __init prom_init(void)
 
         /* do low level board init */
         board_prom_init();
+
+        if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
+                /* set up SMP */
+                register_smp_ops(&bmips_smp_ops);
+
+                /*
+                 * BCM6328 might not have its second CPU enabled, while BCM6358
+                 * needs special handling for its shared TLB, so disable SMP
+                 * for now.
+                 */
+                if (BCMCPU_IS_6328()) {
+                        reg = bcm_readl(BCM_6328_OTP_BASE +
+                                        OTP_USER_BITS_6328_REG(3));
+
+                        if (reg & OTP_6328_REG3_TP1_DISABLED)
+                                bmips_smp_enabled = 0;
+                } else if (BCMCPU_IS_6358()) {
+                        bmips_smp_enabled = 0;
+                }
+
+                if (!bmips_smp_enabled)
+                        return;
+
+                /*
+                 * The bootloader has set up the CPU1 reset vector at
+                 * 0xa000_0200.
+                 * This conflicts with the special interrupt vector (IV).
+                 * The bootloader has also set up CPU1 to respond to the wrong
+                 * IPI interrupt.
+                 * Here we will start up CPU1 in the background and ask it to
+                 * reconfigure itself then go back to sleep.
+                 */
+                memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);
+                __sync();
+                set_c0_cause(C_SW0);
+                cpumask_set_cpu(1, &bmips_booted_mask);
+
+                /*
+                 * FIXME: we really should have some sort of hazard barrier here
+                 */
+        }
 }
 
 void __init prom_free_prom_memory(void)
diff --git a/arch/mips/bcm63xx/reset.c b/arch/mips/bcm63xx/reset.c
index 317931c6cf58..acbeb1fe7c57 100644
--- a/arch/mips/bcm63xx/reset.c
+++ b/arch/mips/bcm63xx/reset.c
@@ -30,6 +30,19 @@
         [BCM63XX_RESET_PCIE]            = BCM## __cpu ##_RESET_PCIE,    \
         [BCM63XX_RESET_PCIE_EXT]        = BCM## __cpu ##_RESET_PCIE_EXT,
 
+#define BCM3368_RESET_SPI       SOFTRESET_3368_SPI_MASK
+#define BCM3368_RESET_ENET      SOFTRESET_3368_ENET_MASK
+#define BCM3368_RESET_USBH      0
+#define BCM3368_RESET_USBD      SOFTRESET_3368_USBS_MASK
+#define BCM3368_RESET_DSL       0
+#define BCM3368_RESET_SAR       0
+#define BCM3368_RESET_EPHY      SOFTRESET_3368_EPHY_MASK
+#define BCM3368_RESET_ENETSW    0
+#define BCM3368_RESET_PCM       SOFTRESET_3368_PCM_MASK
+#define BCM3368_RESET_MPI       SOFTRESET_3368_MPI_MASK
+#define BCM3368_RESET_PCIE      0
+#define BCM3368_RESET_PCIE_EXT  0
+
 #define BCM6328_RESET_SPI       SOFTRESET_6328_SPI_MASK
 #define BCM6328_RESET_ENET      0
 #define BCM6328_RESET_USBH      SOFTRESET_6328_USBH_MASK
@@ -117,6 +130,10 @@
 /*
  * core reset bits
  */
+static const u32 bcm3368_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(3368)
+};
+
 static const u32 bcm6328_reset_bits[] = {
         __GEN_RESET_BITS_TABLE(6328)
 };
@@ -146,7 +163,10 @@ static int reset_reg;
 
 static int __init bcm63xx_reset_bits_init(void)
 {
-        if (BCMCPU_IS_6328()) {
+        if (BCMCPU_IS_3368()) {
+                reset_reg = PERF_SOFTRESET_6358_REG;
+                bcm63xx_reset_bits = bcm3368_reset_bits;
+        } else if (BCMCPU_IS_6328()) {
                 reset_reg = PERF_SOFTRESET_6328_REG;
                 bcm63xx_reset_bits = bcm6328_reset_bits;
         } else if (BCMCPU_IS_6338()) {
@@ -170,6 +190,13 @@ static int __init bcm63xx_reset_bits_init(void)
 }
 #else
 
+#ifdef CONFIG_BCM63XX_CPU_3368
+static const u32 bcm63xx_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(3368)
+};
+#define reset_reg PERF_SOFTRESET_6358_REG
+#endif
+
 #ifdef CONFIG_BCM63XX_CPU_6328
 static const u32 bcm63xx_reset_bits[] = {
         __GEN_RESET_BITS_TABLE(6328)
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
index 24a24445db64..6660c7ddf87b 100644
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -68,6 +68,9 @@ void bcm63xx_machine_reboot(void)
 
         /* mask and clear all external irq */
         switch (bcm63xx_get_cpu_id()) {
+        case BCM3368_CPU_ID:
+                perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
+                break;
         case BCM6328_CPU_ID:
                 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
                 break;
diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
index bbaa1d4beb6d..bb1dbf4abb9d 100644
--- a/arch/mips/boot/compressed/Makefile
+++ b/arch/mips/boot/compressed/Makefile
@@ -18,6 +18,8 @@ BOOT_HEAP_SIZE := 0x400000
 # Disable Function Tracer
 KBUILD_CFLAGS := $(shell echo $(KBUILD_CFLAGS) | sed -e "s/-pg//")
 
+KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
+
 KBUILD_CFLAGS := $(LINUXINCLUDE) $(KBUILD_CFLAGS) -D__KERNEL__ \
         -DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) -D"VMLINUX_LOAD_ADDRESS_ULL=$(VMLINUX_LOAD_ADDRESS)ull"
 
diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c
index 1c7b739b6a1d..c01d343ce6ad 100644
--- a/arch/mips/boot/compressed/uart-16550.c
+++ b/arch/mips/boot/compressed/uart-16550.c
@@ -23,23 +23,39 @@
 #define PORT(offset) (UART0_BASE + (4 * offset))
 #endif
 
+#ifdef CONFIG_CPU_XLR
+#define UART0_BASE  0x1EF14000
+#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
+#define IOTYPE unsigned int
+#endif
+
+#ifdef CONFIG_CPU_XLP
+#define UART0_BASE  0x18030100
+#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
+#define IOTYPE unsigned int
+#endif
+
+#ifndef IOTYPE
+#define IOTYPE char
+#endif
+
 #ifndef PORT
 #error please define the serial port address for your own machine
 #endif
 
 static inline unsigned int serial_in(int offset)
 {
-        return *((char *)PORT(offset));
+        return *((volatile IOTYPE *)PORT(offset)) & 0xFF;
 }
 
 static inline void serial_out(int offset, int value)
 {
-        *((char *)PORT(offset)) = value;
+        *((volatile IOTYPE *)PORT(offset)) = value & 0xFF;
 }
 
 void putc(char c)
 {
-        int timeout = 1024;
+        int timeout = 1000000;
 
         while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0))
                 ;
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index 75a6df7fd265..227705d9d5ae 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -10,6 +10,10 @@ config CAVIUM_CN63XXP1
           non-CN63XXP1 hardware, so it is recommended to select "n"
           unless it is known the workarounds are needed.
 
+endif # CPU_CAVIUM_OCTEON
+
+if CAVIUM_OCTEON_SOC
+
 config CAVIUM_OCTEON_2ND_KERNEL
         bool "Build the kernel to be used as a 2nd kernel on the same chip"
         default "n"
@@ -19,17 +23,6 @@ config CAVIUM_OCTEON_2ND_KERNEL
           with this option to be run at the same time as one built without this
           option.
 
-config CAVIUM_OCTEON_HW_FIX_UNALIGNED
-        bool "Enable hardware fixups of unaligned loads and stores"
-        default "y"
-        help
-          Configure the Octeon hardware to automatically fix unaligned loads
-          and stores. Normally unaligned accesses are fixed using a kernel
-          exception handler. This option enables the hardware automatic fixups,
-          which requires only an extra 3 cycles. Disable this option if you
-          are running code that relies on address exceptions on unaligned
-          accesses.
-
 config CAVIUM_OCTEON_CVMSEG_SIZE
         int "Number of L1 cache lines reserved for CVMSEG memory"
         range 0 54
@@ -103,4 +96,4 @@ config OCTEON_ILM
           To compile this driver as a module, choose M here.  The module
           will be called octeon-ilm
 
-endif # CPU_CAVIUM_OCTEON
+endif # CAVIUM_OCTEON_SOC
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index 3595affb9772..4e952043c922 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -12,11 +12,12 @@
 CFLAGS_octeon-platform.o = -I$(src)/../../../scripts/dtc/libfdt
 CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt
 
-obj-y := cpu.o setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o
-obj-y += dma-octeon.o flash_setup.o
+obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o
+obj-y += dma-octeon.o
 obj-y += octeon-memcpy.o
 obj-y += executive/
 
+obj-$(CONFIG_MTD)                     += flash_setup.o
 obj-$(CONFIG_SMP)                     += smp.o
 obj-$(CONFIG_OCTEON_ILM)              += oct_ilm.o
 
diff --git a/arch/mips/cavium-octeon/Platform b/arch/mips/cavium-octeon/Platform
index 1e43ccf1a792..8a301cb12d68 100644
--- a/arch/mips/cavium-octeon/Platform
+++ b/arch/mips/cavium-octeon/Platform
@@ -1,11 +1,11 @@
 #
 # Cavium Octeon
 #
-platform-$(CONFIG_CPU_CAVIUM_OCTEON)    += cavium-octeon/
-cflags-$(CONFIG_CPU_CAVIUM_OCTEON)      +=                              \
+platform-$(CONFIG_CAVIUM_OCTEON_SOC)    += cavium-octeon/
+cflags-$(CONFIG_CAVIUM_OCTEON_SOC)      +=                              \
                 -I$(srctree)/arch/mips/include/asm/mach-cavium-octeon
 ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
-load-$(CONFIG_CPU_CAVIUM_OCTEON)        += 0xffffffff84100000
+load-$(CONFIG_CAVIUM_OCTEON_SOC)        += 0xffffffff84100000
 else
-load-$(CONFIG_CPU_CAVIUM_OCTEON)        += 0xffffffff81100000
+load-$(CONFIG_CAVIUM_OCTEON_SOC)        += 0xffffffff81100000
 endif
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
index 7c6497781895..0a1283ce47f5 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
@@ -181,6 +181,11 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
                         return ipd_port - 16 + 4;
                 else
                         return -1;
+        case CVMX_BOARD_TYPE_UBNT_E100:
+                if (ipd_port >= 0 && ipd_port <= 2)
+                        return 7 - ipd_port;
+                else
+                        return -1;
         }
 
         /* Some unknown board. Somebody forgot to update this function... */
@@ -706,6 +711,14 @@ int __cvmx_helper_board_hardware_enable(int interface)
                                 }
                         }
                 }
+        } else if (cvmx_sysinfo_get()->board_type ==
+                        CVMX_BOARD_TYPE_UBNT_E100) {
+                cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0);
+                cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0x10);
+                cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
+                cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0x10);
+                cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(2, interface), 0);
+                cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(2, interface), 0x10);
         }
         return 0;
 }
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 7181def6037a..9d36774bded1 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -1095,7 +1095,7 @@ static void octeon_irq_ip3_ciu(void)
 
 static bool octeon_irq_use_ip4;
 
-static void __cpuinit octeon_irq_local_enable_ip4(void *arg)
+static void octeon_irq_local_enable_ip4(void *arg)
 {
         set_c0_status(STATUSF_IP4);
 }
@@ -1110,21 +1110,21 @@ static void (*octeon_irq_ip2)(void);
 static void (*octeon_irq_ip3)(void);
 static void (*octeon_irq_ip4)(void);
 
-void __cpuinitdata (*octeon_irq_setup_secondary)(void);
+void (*octeon_irq_setup_secondary)(void);
 
-void __cpuinit octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t h)
+void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t h)
 {
         octeon_irq_ip4 = h;
         octeon_irq_use_ip4 = true;
         on_each_cpu(octeon_irq_local_enable_ip4, NULL, 1);
 }
 
-static void __cpuinit octeon_irq_percpu_enable(void)
+static void octeon_irq_percpu_enable(void)
 {
         irq_cpu_online();
 }
 
-static void __cpuinit octeon_irq_init_ciu_percpu(void)
+static void octeon_irq_init_ciu_percpu(void)
 {
         int coreid = cvmx_get_core_num();
 
@@ -1167,7 +1167,7 @@ static void octeon_irq_init_ciu2_percpu(void)
         cvmx_read_csr(CVMX_CIU2_SUM_PPX_IP2(coreid));
 }
 
-static void __cpuinit octeon_irq_setup_secondary_ciu(void)
+static void octeon_irq_setup_secondary_ciu(void)
 {
         octeon_irq_init_ciu_percpu();
         octeon_irq_percpu_enable();
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index 389512e2abd6..1830874ff1e2 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -334,9 +334,10 @@ static void __init octeon_fdt_pip_iface(int pip, int idx, u64 *pmac)
         char name_buffer[20];
         int iface;
         int p;
-        int count;
+        int count = 0;
 
-        count = cvmx_helper_interface_enumerate(idx);
+        if (cvmx_helper_interface_enumerate(idx) == 0)
+                count = cvmx_helper_ports_on_interface(idx);
 
         snprintf(name_buffer, sizeof(name_buffer), "interface@%d", idx);
         iface = fdt_subnode_offset(initial_boot_params, pip, name_buffer);
@@ -490,8 +491,15 @@ int __init octeon_prune_device_tree(void)
 
                 if (alias_prop) {
                         uart = fdt_path_offset(initial_boot_params, alias_prop);
-                        if (uart_mask & (1 << i))
+                        if (uart_mask & (1 << i)) {
+                                __be32 f;
+
+                                f = cpu_to_be32(octeon_get_io_clock_rate());
+                                fdt_setprop_inplace(initial_boot_params,
+                                                    uart, "clock-frequency",
+                                                    &f, sizeof(f));
                                 continue;
+                        }
                         pr_debug("Deleting uart%d\n", i);
                         fdt_nop_node(initial_boot_params, uart);
                         fdt_nop_property(initial_boot_params, aliases,
diff --git a/arch/mips/cavium-octeon/serial.c b/arch/mips/cavium-octeon/serial.c
deleted file mode 100644
index f393f65f3923..000000000000
--- a/arch/mips/cavium-octeon/serial.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2004-2007 Cavium Networks
- */
-#include <linux/console.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/serial.h>
-#include <linux/serial_8250.h>
-#include <linux/serial_reg.h>
-#include <linux/tty.h>
-#include <linux/irq.h>
-
-#include <asm/time.h>
-
-#include <asm/octeon/octeon.h>
-
-#define DEBUG_UART 1
-
-unsigned int octeon_serial_in(struct uart_port *up, int offset)
-{
-        int rv = cvmx_read_csr((uint64_t)(up->membase + (offset << 3)));
-        if (offset == UART_IIR && (rv & 0xf) == 7) {
-                /* Busy interrupt, read the USR (39) and try again. */
-                cvmx_read_csr((uint64_t)(up->membase + (39 << 3)));
-                rv = cvmx_read_csr((uint64_t)(up->membase + (offset << 3)));
-        }
-        return rv;
-}
-
-void octeon_serial_out(struct uart_port *up, int offset, int value)
-{
-        /*
-         * If bits 6 or 7 of the OCTEON UART's LCR are set, it quits
-         * working.
-         */
-        if (offset == UART_LCR)
-                value &= 0x9f;
-        cvmx_write_csr((uint64_t)(up->membase + (offset << 3)), (u8)value);
-}
-
-static int octeon_serial_probe(struct platform_device *pdev)
-{
-        int irq, res;
-        struct resource *res_mem;
-        struct uart_8250_port up;
-
-        /* All adaptors have an irq.  */
-        irq = platform_get_irq(pdev, 0);
-        if (irq < 0)
-                return irq;
-
-        memset(&up, 0, sizeof(up));
-
-        up.port.flags = ASYNC_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE;
-        up.port.type = PORT_OCTEON;
-        up.port.iotype = UPIO_MEM;
-        up.port.regshift = 3;
-        up.port.dev = &pdev->dev;
-
-        if (octeon_is_simulation())
-                /* Make simulator output fast*/
-                up.port.uartclk = 115200 * 16;
-        else
-                up.port.uartclk = octeon_get_io_clock_rate();
-
-        up.port.serial_in = octeon_serial_in;
-        up.port.serial_out = octeon_serial_out;
-        up.port.irq = irq;
-
-        res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (res_mem == NULL) {
-                dev_err(&pdev->dev, "found no memory resource\n");
-                return -ENXIO;
-        }
-        up.port.mapbase = res_mem->start;
-        up.port.membase = ioremap(res_mem->start, resource_size(res_mem));
-
-        res = serial8250_register_8250_port(&up);
-
-        return res >= 0 ? 0 : res;
-}
-
-static struct of_device_id octeon_serial_match[] = {
-        {
-                .compatible = "cavium,octeon-3860-uart",
-        },
-        {},
-};
-MODULE_DEVICE_TABLE(of, octeon_serial_match);
-
-static struct platform_driver octeon_serial_driver = {
-        .probe          = octeon_serial_probe,
-        .driver         = {
-                .owner  = THIS_MODULE,
-                .name   = "octeon_serial",
-                .of_match_table = octeon_serial_match,
-        },
-};
-
-static int __init octeon_serial_init(void)
-{
-        return platform_driver_register(&octeon_serial_driver);
-}
-late_initcall(octeon_serial_init);
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 01b1b3f94feb..48b08eb9d9e4 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -7,6 +7,7 @@
  * Copyright (C) 2008, 2009 Wind River Systems
  *   written by Ralf Baechle <ralf@linux-mips.org>
  */
+#include <linux/compiler.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/console.h>
@@ -40,12 +41,6 @@
 #include <asm/octeon/pci-octeon.h>
 #include <asm/octeon/cvmx-mio-defs.h>
 
-#ifdef CONFIG_CAVIUM_DECODE_RSL
-extern void cvmx_interrupt_rsl_decode(void);
-extern int __cvmx_interrupt_ecc_report_single_bit_errors;
-extern void cvmx_interrupt_rsl_enable(void);
-#endif
-
 extern struct plat_smp_ops octeon_smp_ops;
 
 #ifdef CONFIG_PCI
@@ -463,18 +458,6 @@ static void octeon_halt(void)
 }
 
 /**
- * Handle all the error condition interrupts that might occur.
- *
- */
-#ifdef CONFIG_CAVIUM_DECODE_RSL
-static irqreturn_t octeon_rlm_interrupt(int cpl, void *dev_id)
-{
-        cvmx_interrupt_rsl_decode();
-        return IRQ_HANDLED;
-}
-#endif
-
-/**
  * Return a string representing the system type
  *
  * Returns
@@ -712,7 +695,7 @@ void __init prom_init(void)
         if (cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34)) {
                 pr_info("Skipping L2 locking due to reduced L2 cache size\n");
         } else {
-                uint32_t ebase = read_c0_ebase() & 0x3ffff000;
+                uint32_t __maybe_unused ebase = read_c0_ebase() & 0x3ffff000;
 #ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB
                 /* TLB refill */
                 cvmx_l2c_lock_mem_region(ebase, 0x100);
@@ -996,7 +979,7 @@ void __init plat_mem_setup(void)
         cvmx_bootmem_unlock();
         /* Add the memory region for the kernel. */
         kernel_start = (unsigned long) _text;
-        kernel_size = ALIGN(_end - _text, 0x100000);
+        kernel_size = _end - _text;
 
         /* Adjust for physical offset. */
         kernel_start &= ~0xffffffff80000000ULL;
@@ -1064,15 +1047,6 @@ void prom_free_prom_memory(void)
                         panic("Core-14449 WAR not in place (%04x).\n"
                               "Please build kernel with proper options (CONFIG_CAVIUM_CN63XXP1).", insn);
         }
-#ifdef CONFIG_CAVIUM_DECODE_RSL
-        cvmx_interrupt_rsl_enable();
-
-        /* Add an interrupt handler for general failures. */
-        if (request_irq(OCTEON_IRQ_RML, octeon_rlm_interrupt, IRQF_SHARED,
-                        "RML/RSL", octeon_rlm_interrupt)) {
-                panic("Unable to request_irq(OCTEON_IRQ_RML)");
-        }
-#endif
 }
 
 int octeon_prune_device_tree(void);
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 295137dfdc37..138cc80c5928 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -173,7 +173,7 @@ static void octeon_boot_secondary(int cpu, struct task_struct *idle)
  * After we've done initial boot, this function is called to allow the
  * board code to clean up state, if needed
  */
-static void __cpuinit octeon_init_secondary(void)
+static void octeon_init_secondary(void)
 {
         unsigned int sr;
 
@@ -375,7 +375,7 @@ static int octeon_update_boot_vector(unsigned int cpu)
         return 0;
 }
 
-static int __cpuinit octeon_cpu_callback(struct notifier_block *nfb,
+static int octeon_cpu_callback(struct notifier_block *nfb,
         unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
@@ -394,7 +394,7 @@ static int __cpuinit octeon_cpu_callback(struct notifier_block *nfb,
         return NOTIFY_OK;
 }
 
-static int __cpuinit register_cavium_notifier(void)
+static int register_cavium_notifier(void)
 {
         hotcpu_notifier(octeon_cpu_callback, 0);
         return 0;
diff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig
index 014ba4bbba7d..dace58268ce1 100644
--- a/arch/mips/configs/cavium_octeon_defconfig
+++ b/arch/mips/configs/cavium_octeon_defconfig
@@ -1,13 +1,11 @@
-CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD=y
+CONFIG_CAVIUM_OCTEON_SOC=y
 CONFIG_CAVIUM_CN63XXP1=y
 CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2
-CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=32
 CONFIG_HZ_100=y
 CONFIG_PREEMPT=y
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
@@ -50,7 +48,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
 # CONFIG_MTD_OF_PARTS is not set
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_AMDSTD=y
@@ -114,6 +111,7 @@ CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_DW=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_OCTEON=y
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
deleted file mode 100644
index 44a451be359e..000000000000
--- a/arch/mips/configs/wrppmc_defconfig
+++ /dev/null
@@ -1,97 +0,0 @@
-CONFIG_WR_PPMC=y
-CONFIG_HZ_1000=y
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_PCI=y
-CONFIG_HOTPLUG_PCI=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_ARPD=y
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_TCP_MD5SIG=y
-# CONFIG_IPV6 is not set
-CONFIG_NETWORK_SECMARK=y
-CONFIG_FW_LOADER=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_SGI_IOC4=m
-CONFIG_NETDEVICES=y
-CONFIG_PHYLIB=y
-CONFIG_VITESSE_PHY=m
-CONFIG_SMSC_PHY=m
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_E100=y
-CONFIG_QLA3XXX=m
-CONFIG_CHELSIO_T3=m
-CONFIG_NETXEN_NIC=m
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=1
-CONFIG_SERIAL_8250_RUNTIME_UARTS=1
-# CONFIG_HW_RANDOM is not set
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_DLM=m
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0,115200n8"
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAMELLIA=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRC_CCITT=y
-CONFIG_CRC16=y
-CONFIG_LIBCRC32C=y
diff --git a/arch/mips/dec/Makefile b/arch/mips/dec/Makefile
index 9eb2f9c036aa..3d5d2c56de8d 100644
--- a/arch/mips/dec/Makefile
+++ b/arch/mips/dec/Makefile
@@ -5,6 +5,5 @@
 obj-y           := ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \
                    kn02-irq.o kn02xa-berr.o reset.o setup.o time.o
 
-obj-$(CONFIG_PROM_CONSOLE)      += promcon.o
 obj-$(CONFIG_TC)                += tc.o
 obj-$(CONFIG_CPU_HAS_WB)        += wbflush.o
diff --git a/arch/mips/dec/promcon.c b/arch/mips/dec/promcon.c
deleted file mode 100644
index c239c25b79ff..000000000000
--- a/arch/mips/dec/promcon.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Wrap-around code for a console using the
- * DECstation PROM io-routines.
- *
- * Copyright (c) 1998 Harald Koerfgen
- */
-
-#include <linux/tty.h>
-#include <linux/ptrace.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/fs.h>
-
-#include <asm/dec/prom.h>
-
-static void prom_console_write(struct console *co, const char *s,
-                               unsigned count)
-{
-        unsigned i;
-
-        /*
-         *    Now, do each character
-         */
-        for (i = 0; i < count; i++) {
-                if (*s == 10)
-                        prom_printf("%c", 13);
-                prom_printf("%c", *s++);
-        }
-}
-
-static int __init prom_console_setup(struct console *co, char *options)
-{
-        return 0;
-}
-
-static struct console sercons = {
-        .name   = "ttyS",
-        .write  = prom_console_write,
-        .setup  = prom_console_setup,
-        .flags  = CON_PRINTBUFFER,
-        .index  = -1,
-};
-
-/*
- *    Register console.
- */
-
-static int __init prom_console_init(void)
-{
-        register_console(&sercons);
-
-        return 0;
-}
-console_initcall(prom_console_init);
diff --git a/arch/mips/fw/cfe/cfe_api.c b/arch/mips/fw/cfe/cfe_api.c
index d06dc5a6b8d3..cf84f01931c5 100644
--- a/arch/mips/fw/cfe/cfe_api.c
+++ b/arch/mips/fw/cfe/cfe_api.c
@@ -406,12 +406,12 @@ int cfe_setenv(char *name, char *val)
         return xiocb.xiocb_status;
 }
 
-int cfe_write(int handle, unsigned char *buffer, int length)
+int cfe_write(int handle, const char *buffer, int length)
 {
         return cfe_writeblk(handle, 0, buffer, length);
 }
 
-int cfe_writeblk(int handle, s64 offset, unsigned char *buffer, int length)
+int cfe_writeblk(int handle, s64 offset, const char *buffer, int length)
 {
         struct cfe_xiocb xiocb;
 
diff --git a/arch/mips/include/asm/cop2.h b/arch/mips/include/asm/cop2.h
index 3532e2c5f098..c1516cc0285f 100644
--- a/arch/mips/include/asm/cop2.h
+++ b/arch/mips/include/asm/cop2.h
@@ -11,6 +11,35 @@
 
 #include <linux/notifier.h>
 
+#if defined(CONFIG_CPU_CAVIUM_OCTEON)
+
+extern void octeon_cop2_save(struct octeon_cop2_state *);
+extern void octeon_cop2_restore(struct octeon_cop2_state *);
+
+#define cop2_save(r)            octeon_cop2_save(r)
+#define cop2_restore(r)         octeon_cop2_restore(r)
+
+#define cop2_present            1
+#define cop2_lazy_restore       1
+
+#elif defined(CONFIG_CPU_XLP)
+
+extern void nlm_cop2_save(struct nlm_cop2_state *);
+extern void nlm_cop2_restore(struct nlm_cop2_state *);
+#define cop2_save(r)            nlm_cop2_save(r)
+#define cop2_restore(r)         nlm_cop2_restore(r)
+
+#define cop2_present            1
+#define cop2_lazy_restore       0
+
+#else
+
+#define cop2_present            0
+#define cop2_lazy_restore       0
+#define cop2_save(r)
+#define cop2_restore(r)
+#endif
+
 enum cu2_ops {
         CU2_EXCEPTION,
         CU2_LWC2_OP,
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index e5ec8fcd8afa..1dc086087a72 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -24,6 +24,16 @@
 #ifndef cpu_has_tlb
 #define cpu_has_tlb             (cpu_data[0].options & MIPS_CPU_TLB)
 #endif
+
+/*
+ * For the moment we don't consider R6000 and R8000 so we can assume that
+ * anything that doesn't support R4000-style exceptions and interrupts is
+ * R3000-like.  Users should still treat these two macro definitions as
+ * opaque.
+ */
+#ifndef cpu_has_3kex
+#define cpu_has_3kex            (!cpu_has_4kex)
+#endif
 #ifndef cpu_has_4kex
 #define cpu_has_4kex            (cpu_data[0].options & MIPS_CPU_4KEX)
 #endif
@@ -87,19 +97,23 @@
 #define cpu_has_mips16          (cpu_data[0].ases & MIPS_ASE_MIPS16)
 #endif
 #ifndef cpu_has_mdmx
-#define cpu_has_mdmx           (cpu_data[0].ases & MIPS_ASE_MDMX)
+#define cpu_has_mdmx            (cpu_data[0].ases & MIPS_ASE_MDMX)
 #endif
 #ifndef cpu_has_mips3d
-#define cpu_has_mips3d         (cpu_data[0].ases & MIPS_ASE_MIPS3D)
+#define cpu_has_mips3d          (cpu_data[0].ases & MIPS_ASE_MIPS3D)
 #endif
 #ifndef cpu_has_smartmips
-#define cpu_has_smartmips      (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
+#define cpu_has_smartmips       (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
 #endif
 #ifndef cpu_has_rixi
 #define cpu_has_rixi            (cpu_data[0].options & MIPS_CPU_RIXI)
 #endif
 #ifndef cpu_has_mmips
-#define cpu_has_mmips           (cpu_data[0].options & MIPS_CPU_MICROMIPS)
+# ifdef CONFIG_SYS_SUPPORTS_MICROMIPS
+#  define cpu_has_mmips         (cpu_data[0].options & MIPS_CPU_MICROMIPS)
+# else
+#  define cpu_has_mmips         0
+# endif
 #endif
 #ifndef cpu_has_vtag_icache
 #define cpu_has_vtag_icache     (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
@@ -111,7 +125,7 @@
 #define cpu_has_ic_fills_f_dc   (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC)
 #endif
 #ifndef cpu_has_pindexed_dcache
-#define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
+#define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
 #endif
 #ifndef cpu_has_local_ebase
 #define cpu_has_local_ebase     1
@@ -136,7 +150,6 @@
 #endif
 #endif
 
-# define cpu_has_mips_1         (cpu_data[0].isa_level & MIPS_CPU_ISA_I)
 #ifndef cpu_has_mips_2
 # define cpu_has_mips_2         (cpu_data[0].isa_level & MIPS_CPU_ISA_II)
 #endif
@@ -149,18 +162,18 @@
 #ifndef cpu_has_mips_5
 # define cpu_has_mips_5         (cpu_data[0].isa_level & MIPS_CPU_ISA_V)
 #endif
-# ifndef cpu_has_mips32r1
+#ifndef cpu_has_mips32r1
 # define cpu_has_mips32r1       (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)
-# endif
-# ifndef cpu_has_mips32r2
+#endif
+#ifndef cpu_has_mips32r2
 # define cpu_has_mips32r2       (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
-# endif
-# ifndef cpu_has_mips64r1
+#endif
+#ifndef cpu_has_mips64r1
 # define cpu_has_mips64r1       (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
-# endif
-# ifndef cpu_has_mips64r2
+#endif
+#ifndef cpu_has_mips64r2
 # define cpu_has_mips64r2       (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
-# endif
+#endif
 
 /*
  * Shortcuts ...
@@ -182,9 +195,9 @@
  * has CLO and CLZ but not DCLO nor DCLZ.  For 64-bit kernels
  * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
  */
-# ifndef cpu_has_clo_clz
-# define cpu_has_clo_clz        cpu_has_mips_r
-# endif
+#ifndef cpu_has_clo_clz
+#define cpu_has_clo_clz cpu_has_mips_r
+#endif
 
 #ifndef cpu_has_dsp
 #define cpu_has_dsp             (cpu_data[0].ases & MIPS_ASE_DSP)
@@ -210,7 +223,7 @@
 # define cpu_has_64bits         (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
 # endif
 # ifndef cpu_has_64bit_zero_reg
-# define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
+# define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
 # endif
 # ifndef cpu_has_64bit_gp_regs
 # define cpu_has_64bit_gp_regs          0
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index dd86ab205483..632bbe5a79ea 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -282,18 +282,17 @@ enum cpu_type_enum {
  * ISA Level encodings
  *
  */
-#define MIPS_CPU_ISA_I          0x00000001
-#define MIPS_CPU_ISA_II         0x00000002
-#define MIPS_CPU_ISA_III        0x00000004
-#define MIPS_CPU_ISA_IV         0x00000008
-#define MIPS_CPU_ISA_V          0x00000010
-#define MIPS_CPU_ISA_M32R1      0x00000020
-#define MIPS_CPU_ISA_M32R2      0x00000040
-#define MIPS_CPU_ISA_M64R1      0x00000080
-#define MIPS_CPU_ISA_M64R2      0x00000100
-
-#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \
-        MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2)
+#define MIPS_CPU_ISA_II         0x00000001
+#define MIPS_CPU_ISA_III        0x00000002
+#define MIPS_CPU_ISA_IV         0x00000004
+#define MIPS_CPU_ISA_V          0x00000008
+#define MIPS_CPU_ISA_M32R1      0x00000010
+#define MIPS_CPU_ISA_M32R2      0x00000020
+#define MIPS_CPU_ISA_M64R1      0x00000040
+#define MIPS_CPU_ISA_M64R2      0x00000080
+
+#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_II | MIPS_CPU_ISA_M32R1 | \
+        MIPS_CPU_ISA_M32R2)
 #define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \
         MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)
 
diff --git a/arch/mips/include/asm/fw/cfe/cfe_api.h b/arch/mips/include/asm/fw/cfe/cfe_api.h
index 17347551a1b2..a0ea69e91e2e 100644
--- a/arch/mips/include/asm/fw/cfe/cfe_api.h
+++ b/arch/mips/include/asm/fw/cfe/cfe_api.h
@@ -115,8 +115,8 @@ int cfe_read(int handle, unsigned char *buffer, int length);
 int cfe_readblk(int handle, int64_t offset, unsigned char *buffer,
                 int length);
 int cfe_setenv(char *name, char *val);
-int cfe_write(int handle, unsigned char *buffer, int length);
-int cfe_writeblk(int handle, int64_t offset, unsigned char *buffer,
+int cfe_write(int handle, const char *buffer, int length);
+int cfe_writeblk(int handle, int64_t offset, const char *buffer,
                  int length);
 
 #endif                          /* CFE_API_H */
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 7153b32de18e..b2e3e93dd7d8 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -347,7 +347,7 @@ struct gic_shared_intr_map {
 #define GIC_CPU_INT2            2 /* .                */
 #define GIC_CPU_INT3            3 /* .                */
 #define GIC_CPU_INT4            4 /* .                */
-#define GIC_CPU_INT5            5 /* Core Interrupt 5 */
+#define GIC_CPU_INT5            5 /* Core Interrupt 7 */
 
 /* Local GIC interrupts. */
 #define GIC_INT_TMR             (GIC_CPU_INT5)
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index b7e59853fd33..3321dd5a8872 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -170,6 +170,11 @@ static inline void * isa_bus_to_virt(unsigned long address)
 extern void __iomem * __ioremap(phys_t offset, phys_t size, unsigned long flags);
 extern void __iounmap(const volatile void __iomem *addr);
 
+#ifndef CONFIG_PCI
+struct pci_dev;
+static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {}
+#endif
+
 static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
         unsigned long flags)
 {
@@ -449,6 +454,11 @@ __BUILDIO(q, u64)
 #define readl_relaxed                   readl
 #define readq_relaxed                   readq
 
+#define writeb_relaxed                  writeb
+#define writew_relaxed                  writew
+#define writel_relaxed                  writel
+#define writeq_relaxed                  writeq
+
 #define readb_be(addr)                                                  \
         __raw_readb((__force unsigned *)(addr))
 #define readw_be(addr)                                                  \
diff --git a/arch/mips/include/asm/kspd.h b/arch/mips/include/asm/kspd.h
deleted file mode 100644
index ec6832950ace..000000000000
--- a/arch/mips/include/asm/kspd.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- */
-
-#ifndef _ASM_KSPD_H
-#define _ASM_KSPD_H
-
-struct kspd_notifications {
-        void (*kspd_sp_exit)(int sp_id);
-
-        struct list_head list;
-};
-
-static inline void kspd_notify(struct kspd_notifications *notify)
-{
-}
-
-#endif
diff --git a/arch/mips/include/asm/mach-ar7/spaces.h b/arch/mips/include/asm/mach-ar7/spaces.h
index ac28f273449c..660ab64c0fc9 100644
--- a/arch/mips/include/asm/mach-ar7/spaces.h
+++ b/arch/mips/include/asm/mach-ar7/spaces.h
@@ -14,8 +14,11 @@
  * This handles the memory map.
  * We handle pages at KSEG0 for kernels with 32 bit address space.
  */
-#define PAGE_OFFSET             0x94000000UL
-#define PHYS_OFFSET             0x14000000UL
+#define PAGE_OFFSET     _AC(0x94000000, UL)
+#define PHYS_OFFSET     _AC(0x14000000, UL)
+
+#define UNCAC_BASE      _AC(0xb4000000, UL)     /* 0xa0000000 + PHYS_OFFSET */
+#define IO_BASE         UNCAC_BASE
 
 #include <asm/mach-generic/spaces.h>
 
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
index 336228990808..19f9134bfe2f 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -9,6 +9,7 @@
  * compile time if only one CPU support is enabled (idea stolen from
  * arm mach-types)
  */
+#define BCM3368_CPU_ID          0x3368
 #define BCM6328_CPU_ID          0x6328
 #define BCM6338_CPU_ID          0x6338
 #define BCM6345_CPU_ID          0x6345
@@ -22,6 +23,19 @@ u16 __bcm63xx_get_cpu_id(void);
 u8 bcm63xx_get_cpu_rev(void);
 unsigned int bcm63xx_get_cpu_freq(void);
 
+#ifdef CONFIG_BCM63XX_CPU_3368
+# ifdef bcm63xx_get_cpu_id
+#  undef bcm63xx_get_cpu_id
+#  define bcm63xx_get_cpu_id()  __bcm63xx_get_cpu_id()
+#  define BCMCPU_RUNTIME_DETECT
+# else
+#  define bcm63xx_get_cpu_id()  BCM3368_CPU_ID
+# endif
+# define BCMCPU_IS_3368()       (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
+#else
+# define BCMCPU_IS_3368()       (0)
+#endif
+
 #ifdef CONFIG_BCM63XX_CPU_6328
 # ifdef bcm63xx_get_cpu_id
 #  undef bcm63xx_get_cpu_id
@@ -173,7 +187,10 @@ enum bcm63xx_regs_set {
 #define BCM_6358_RSET_SPI_SIZE          1804
 #define BCM_6368_RSET_SPI_SIZE          1804
 #define RSET_ENET_SIZE                  2048
-#define RSET_ENETDMA_SIZE               2048
+#define RSET_ENETDMA_SIZE               256
+#define RSET_6345_ENETDMA_SIZE          64
+#define RSET_ENETDMAC_SIZE(chans)       (16 * (chans))
+#define RSET_ENETDMAS_SIZE(chans)       (16 * (chans))
 #define RSET_ENETSW_SIZE                65536
 #define RSET_UART_SIZE                  24
 #define RSET_UDC_SIZE                   256
@@ -191,6 +208,53 @@ enum bcm63xx_regs_set {
 #define RSET_RNG_SIZE                   20
 
 /*
+ * 3368 register sets base address
+ */
+#define BCM_3368_DSL_LMEM_BASE          (0xdeadbeef)
+#define BCM_3368_PERF_BASE              (0xfff8c000)
+#define BCM_3368_TIMER_BASE             (0xfff8c040)
+#define BCM_3368_WDT_BASE               (0xfff8c080)
+#define BCM_3368_UART0_BASE             (0xfff8c100)
+#define BCM_3368_UART1_BASE             (0xfff8c120)
+#define BCM_3368_GPIO_BASE              (0xfff8c080)
+#define BCM_3368_SPI_BASE               (0xfff8c800)
+#define BCM_3368_HSSPI_BASE             (0xdeadbeef)
+#define BCM_3368_UDC0_BASE              (0xdeadbeef)
+#define BCM_3368_USBDMA_BASE            (0xdeadbeef)
+#define BCM_3368_OHCI0_BASE             (0xdeadbeef)
+#define BCM_3368_OHCI_PRIV_BASE         (0xdeadbeef)
+#define BCM_3368_USBH_PRIV_BASE         (0xdeadbeef)
+#define BCM_3368_USBD_BASE              (0xdeadbeef)
+#define BCM_3368_MPI_BASE               (0xfff80000)
+#define BCM_3368_PCMCIA_BASE            (0xfff80054)
+#define BCM_3368_PCIE_BASE              (0xdeadbeef)
+#define BCM_3368_SDRAM_REGS_BASE        (0xdeadbeef)
+#define BCM_3368_DSL_BASE               (0xdeadbeef)
+#define BCM_3368_UBUS_BASE              (0xdeadbeef)
+#define BCM_3368_ENET0_BASE             (0xfff98000)
+#define BCM_3368_ENET1_BASE             (0xfff98800)
+#define BCM_3368_ENETDMA_BASE           (0xfff99800)
+#define BCM_3368_ENETDMAC_BASE          (0xfff99900)
+#define BCM_3368_ENETDMAS_BASE          (0xfff99a00)
+#define BCM_3368_ENETSW_BASE            (0xdeadbeef)
+#define BCM_3368_EHCI0_BASE             (0xdeadbeef)
+#define BCM_3368_SDRAM_BASE             (0xdeadbeef)
+#define BCM_3368_MEMC_BASE              (0xfff84000)
+#define BCM_3368_DDR_BASE               (0xdeadbeef)
+#define BCM_3368_M2M_BASE               (0xdeadbeef)
+#define BCM_3368_ATM_BASE               (0xdeadbeef)
+#define BCM_3368_XTM_BASE               (0xdeadbeef)
+#define BCM_3368_XTMDMA_BASE            (0xdeadbeef)
+#define BCM_3368_XTMDMAC_BASE           (0xdeadbeef)
+#define BCM_3368_XTMDMAS_BASE           (0xdeadbeef)
+#define BCM_3368_PCM_BASE               (0xfff9c200)
+#define BCM_3368_PCMDMA_BASE            (0xdeadbeef)
+#define BCM_3368_PCMDMAC_BASE           (0xdeadbeef)
+#define BCM_3368_PCMDMAS_BASE           (0xdeadbeef)
+#define BCM_3368_RNG_BASE               (0xdeadbeef)
+#define BCM_3368_MISC_BASE              (0xdeadbeef)
+
+/*
  * 6328 register sets base address
  */
 #define BCM_6328_DSL_LMEM_BASE          (0xdeadbeef)
@@ -235,6 +299,8 @@ enum bcm63xx_regs_set {
 #define BCM_6328_PCMDMAS_BASE           (0xdeadbeef)
 #define BCM_6328_RNG_BASE               (0xdeadbeef)
 #define BCM_6328_MISC_BASE              (0xb0001800)
+#define BCM_6328_OTP_BASE               (0xb0000600)
+
 /*
  * 6338 register sets base address
  */
@@ -298,7 +364,7 @@ enum bcm63xx_regs_set {
 #define BCM_6345_USBDMA_BASE            (0xfffe2800)
 #define BCM_6345_ENET0_BASE             (0xfffe1800)
 #define BCM_6345_ENETDMA_BASE           (0xfffe2800)
-#define BCM_6345_ENETDMAC_BASE          (0xfffe2900)
+#define BCM_6345_ENETDMAC_BASE          (0xfffe2840)
 #define BCM_6345_ENETDMAS_BASE          (0xfffe2a00)
 #define BCM_6345_ENETSW_BASE            (0xdeadbeef)
 #define BCM_6345_PCMCIA_BASE            (0xfffe2028)
@@ -620,6 +686,9 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
 #ifdef BCMCPU_RUNTIME_DETECT
         return bcm63xx_regs_base[set];
 #else
+#ifdef CONFIG_BCM63XX_CPU_3368
+        __GEN_RSET(3368)
+#endif
 #ifdef CONFIG_BCM63XX_CPU_6328
         __GEN_RSET(6328)
 #endif
@@ -687,6 +756,52 @@ enum bcm63xx_irq {
 };
 
 /*
+ * 3368 irqs
+ */
+#define BCM_3368_TIMER_IRQ              (IRQ_INTERNAL_BASE + 0)
+#define BCM_3368_SPI_IRQ                (IRQ_INTERNAL_BASE + 1)
+#define BCM_3368_UART0_IRQ              (IRQ_INTERNAL_BASE + 2)
+#define BCM_3368_UART1_IRQ              (IRQ_INTERNAL_BASE + 3)
+#define BCM_3368_DSL_IRQ                0
+#define BCM_3368_UDC0_IRQ               0
+#define BCM_3368_OHCI0_IRQ              0
+#define BCM_3368_ENET0_IRQ              (IRQ_INTERNAL_BASE + 8)
+#define BCM_3368_ENET1_IRQ              (IRQ_INTERNAL_BASE + 6)
+#define BCM_3368_ENET_PHY_IRQ           (IRQ_INTERNAL_BASE + 9)
+#define BCM_3368_ENET0_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 15)
+#define BCM_3368_ENET0_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 16)
+#define BCM_3368_HSSPI_IRQ              0
+#define BCM_3368_EHCI0_IRQ              0
+#define BCM_3368_USBD_IRQ               0
+#define BCM_3368_USBD_RXDMA0_IRQ        0
+#define BCM_3368_USBD_TXDMA0_IRQ        0
+#define BCM_3368_USBD_RXDMA1_IRQ        0
+#define BCM_3368_USBD_TXDMA1_IRQ        0
+#define BCM_3368_USBD_RXDMA2_IRQ        0
+#define BCM_3368_USBD_TXDMA2_IRQ        0
+#define BCM_3368_ENET1_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 17)
+#define BCM_3368_ENET1_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 18)
+#define BCM_3368_PCI_IRQ                (IRQ_INTERNAL_BASE + 31)
+#define BCM_3368_PCMCIA_IRQ             0
+#define BCM_3368_ATM_IRQ                0
+#define BCM_3368_ENETSW_RXDMA0_IRQ      0
+#define BCM_3368_ENETSW_RXDMA1_IRQ      0
+#define BCM_3368_ENETSW_RXDMA2_IRQ      0
+#define BCM_3368_ENETSW_RXDMA3_IRQ      0
+#define BCM_3368_ENETSW_TXDMA0_IRQ      0
+#define BCM_3368_ENETSW_TXDMA1_IRQ      0
+#define BCM_3368_ENETSW_TXDMA2_IRQ      0
+#define BCM_3368_ENETSW_TXDMA3_IRQ      0
+#define BCM_3368_XTM_IRQ                0
+#define BCM_3368_XTM_DMA0_IRQ           0
+
+#define BCM_3368_EXT_IRQ0               (IRQ_INTERNAL_BASE + 25)
+#define BCM_3368_EXT_IRQ1               (IRQ_INTERNAL_BASE + 26)
+#define BCM_3368_EXT_IRQ2               (IRQ_INTERNAL_BASE + 27)
+#define BCM_3368_EXT_IRQ3               (IRQ_INTERNAL_BASE + 28)
+
+
+/*
  * 6328 irqs
  */
 #define BCM_6328_HIGH_IRQ_BASE          (IRQ_INTERNAL_BASE + 32)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
index d53f611184b9..753953e86242 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
@@ -4,6 +4,8 @@
 #include <linux/if_ether.h>
 #include <linux/init.h>
 
+#include <bcm63xx_regs.h>
+
 /*
  * on board ethernet platform data
  */
@@ -37,9 +39,129 @@ struct bcm63xx_enet_platform_data {
                                           int phy_id, int reg),
                           void (*mii_write)(struct net_device *dev,
                                             int phy_id, int reg, int val));
+
+        /* DMA channel enable mask */
+        u32 dma_chan_en_mask;
+
+        /* DMA channel interrupt mask */
+        u32 dma_chan_int_mask;
+
+        /* DMA engine has internal SRAM */
+        bool dma_has_sram;
+
+        /* DMA channel register width */
+        unsigned int dma_chan_width;
+
+        /* DMA descriptor shift */
+        unsigned int dma_desc_shift;
+};
+
+/*
+ * on board ethernet switch platform data
+ */
+#define ENETSW_MAX_PORT 8
+#define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
+#define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
+
+#define ENETSW_RGMII_PORT0      4
+
+struct bcm63xx_enetsw_port {
+        int             used;
+        int             phy_id;
+
+        int             bypass_link;
+        int             force_speed;
+        int             force_duplex_full;
+
+        const char      *name;
+};
+
+struct bcm63xx_enetsw_platform_data {
+        char mac_addr[ETH_ALEN];
+        int num_ports;
+        struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
+
+        /* DMA channel enable mask */
+        u32 dma_chan_en_mask;
+
+        /* DMA channel interrupt mask */
+        u32 dma_chan_int_mask;
+
+        /* DMA channel register width */
+        unsigned int dma_chan_width;
+
+        /* DMA engine has internal SRAM */
+        bool dma_has_sram;
 };
 
 int __init bcm63xx_enet_register(int unit,
                                  const struct bcm63xx_enet_platform_data *pd);
 
+int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
+
+enum bcm63xx_regs_enetdmac {
+        ENETDMAC_CHANCFG,
+        ENETDMAC_IR,
+        ENETDMAC_IRMASK,
+        ENETDMAC_MAXBURST,
+        ENETDMAC_BUFALLOC,
+        ENETDMAC_RSTART,
+        ENETDMAC_FC,
+        ENETDMAC_LEN,
+};
+
+static inline unsigned long bcm63xx_enetdmacreg(enum bcm63xx_regs_enetdmac reg)
+{
+#ifdef BCMCPU_RUNTIME_DETECT
+        extern const unsigned long *bcm63xx_regs_enetdmac;
+
+        return bcm63xx_regs_enetdmac[reg];
+#else
+#ifdef CONFIG_BCM63XX_CPU_6345
+        switch (reg) {
+        case ENETDMAC_CHANCFG:
+                return ENETDMA_6345_CHANCFG_REG;
+        case ENETDMAC_IR:
+                return ENETDMA_6345_IR_REG;
+        case ENETDMAC_IRMASK:
+                return ENETDMA_6345_IRMASK_REG;
+        case ENETDMAC_MAXBURST:
+                return ENETDMA_6345_MAXBURST_REG;
+        case ENETDMAC_BUFALLOC:
+                return ENETDMA_6345_BUFALLOC_REG;
+        case ENETDMAC_RSTART:
+                return ENETDMA_6345_RSTART_REG;
+        case ENETDMAC_FC:
+                return ENETDMA_6345_FC_REG;
+        case ENETDMAC_LEN:
+                return ENETDMA_6345_LEN_REG;
+        }
+#endif
+#if defined(CONFIG_BCM63XX_CPU_6328) || \
+        defined(CONFIG_BCM63XX_CPU_6338) || \
+        defined(CONFIG_BCM63XX_CPU_6348) || \
+        defined(CONFIG_BCM63XX_CPU_6358) || \
+        defined(CONFIG_BCM63XX_CPU_6362) || \
+        defined(CONFIG_BCM63XX_CPU_6368)
+        switch (reg) {
+        case ENETDMAC_CHANCFG:
+                return ENETDMAC_CHANCFG_REG;
+        case ENETDMAC_IR:
+                return ENETDMAC_IR_REG;
+        case ENETDMAC_IRMASK:
+                return ENETDMAC_IRMASK_REG;
+        case ENETDMAC_MAXBURST:
+                return ENETDMAC_MAXBURST_REG;
+        case ENETDMAC_BUFALLOC:
+        case ENETDMAC_RSTART:
+        case ENETDMAC_FC:
+        case ENETDMAC_LEN:
+                return 0;
+        }
+#endif
+#endif
+        return 0;
+}
+
+
 #endif /* ! BCM63XX_DEV_ENET_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
index 35baa1a60a64..565ff36a1119 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
@@ -11,6 +11,7 @@ static inline unsigned long bcm63xx_gpio_count(void)
         switch (bcm63xx_get_cpu_id()) {
         case BCM6328_CPU_ID:
                 return 32;
+        case BCM3368_CPU_ID:
         case BCM6358_CPU_ID:
                 return 40;
         case BCM6338_CPU_ID:
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 3203fe49b34d..9875db31d883 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -15,6 +15,39 @@
 /* Clock Control register */
 #define PERF_CKCTL_REG                  0x4
 
+#define CKCTL_3368_MAC_EN               (1 << 3)
+#define CKCTL_3368_TC_EN                (1 << 5)
+#define CKCTL_3368_US_TOP_EN            (1 << 6)
+#define CKCTL_3368_DS_TOP_EN            (1 << 7)
+#define CKCTL_3368_APM_EN               (1 << 8)
+#define CKCTL_3368_SPI_EN               (1 << 9)
+#define CKCTL_3368_USBS_EN              (1 << 10)
+#define CKCTL_3368_BMU_EN               (1 << 11)
+#define CKCTL_3368_PCM_EN               (1 << 12)
+#define CKCTL_3368_NTP_EN               (1 << 13)
+#define CKCTL_3368_ACP_B_EN             (1 << 14)
+#define CKCTL_3368_ACP_A_EN             (1 << 15)
+#define CKCTL_3368_EMUSB_EN             (1 << 17)
+#define CKCTL_3368_ENET0_EN             (1 << 18)
+#define CKCTL_3368_ENET1_EN             (1 << 19)
+#define CKCTL_3368_USBU_EN              (1 << 20)
+#define CKCTL_3368_EPHY_EN              (1 << 21)
+
+#define CKCTL_3368_ALL_SAFE_EN          (CKCTL_3368_MAC_EN | \
+                                         CKCTL_3368_TC_EN | \
+                                         CKCTL_3368_US_TOP_EN | \
+                                         CKCTL_3368_DS_TOP_EN | \
+                                         CKCTL_3368_APM_EN | \
+                                         CKCTL_3368_SPI_EN | \
+                                         CKCTL_3368_USBS_EN | \
+                                         CKCTL_3368_BMU_EN | \
+                                         CKCTL_3368_PCM_EN | \
+                                         CKCTL_3368_NTP_EN | \
+                                         CKCTL_3368_ACP_B_EN | \
+                                         CKCTL_3368_ACP_A_EN | \
+                                         CKCTL_3368_EMUSB_EN | \
+                                         CKCTL_3368_USBU_EN)
+
 #define CKCTL_6328_PHYMIPS_EN           (1 << 0)
 #define CKCTL_6328_ADSL_QPROC_EN        (1 << 1)
 #define CKCTL_6328_ADSL_AFE_EN          (1 << 2)
@@ -181,6 +214,7 @@
 #define SYS_PLL_SOFT_RESET              0x1
 
 /* Interrupt Mask register */
+#define PERF_IRQMASK_3368_REG           0xc
 #define PERF_IRQMASK_6328_REG           0x20
 #define PERF_IRQMASK_6338_REG           0xc
 #define PERF_IRQMASK_6345_REG           0xc
@@ -190,6 +224,7 @@
 #define PERF_IRQMASK_6368_REG           0x20
 
 /* Interrupt Status register */
+#define PERF_IRQSTAT_3368_REG           0x10
 #define PERF_IRQSTAT_6328_REG           0x28
 #define PERF_IRQSTAT_6338_REG           0x10
 #define PERF_IRQSTAT_6345_REG           0x10
@@ -199,6 +234,7 @@
 #define PERF_IRQSTAT_6368_REG           0x28
 
 /* External Interrupt Configuration register */
+#define PERF_EXTIRQ_CFG_REG_3368        0x14
 #define PERF_EXTIRQ_CFG_REG_6328        0x18
 #define PERF_EXTIRQ_CFG_REG_6338        0x14
 #define PERF_EXTIRQ_CFG_REG_6345        0x14
@@ -236,6 +272,13 @@
 #define PERF_SOFTRESET_6362_REG         0x10
 #define PERF_SOFTRESET_6368_REG         0x10
 
+#define SOFTRESET_3368_SPI_MASK         (1 << 0)
+#define SOFTRESET_3368_ENET_MASK        (1 << 2)
+#define SOFTRESET_3368_MPI_MASK         (1 << 3)
+#define SOFTRESET_3368_EPHY_MASK        (1 << 6)
+#define SOFTRESET_3368_USBS_MASK        (1 << 11)
+#define SOFTRESET_3368_PCM_MASK         (1 << 13)
+
 #define SOFTRESET_6328_SPI_MASK         (1 << 0)
 #define SOFTRESET_6328_EPHY_MASK        (1 << 1)
 #define SOFTRESET_6328_SAR_MASK         (1 << 2)
@@ -727,6 +770,8 @@
 /*************************************************************************
  * _REG relative to RSET_ENETDMA
  *************************************************************************/
+#define ENETDMA_CHAN_WIDTH              0x10
+#define ENETDMA_6345_CHAN_WIDTH         0x40
 
 /* Controller Configuration Register */
 #define ENETDMA_CFG_REG                 (0x0)
@@ -782,31 +827,56 @@
 /* State Ram Word 4 */
 #define ENETDMA_SRAM4_REG(x)            (0x20c + (x) * 0x10)
 
+/* Broadcom 6345 ENET DMA definitions */
+#define ENETDMA_6345_CHANCFG_REG        (0x00)
+
+#define ENETDMA_6345_MAXBURST_REG       (0x40)
+
+#define ENETDMA_6345_RSTART_REG         (0x08)
+
+#define ENETDMA_6345_LEN_REG            (0x0C)
+
+#define ENETDMA_6345_IR_REG             (0x14)
+
+#define ENETDMA_6345_IRMASK_REG         (0x18)
+
+#define ENETDMA_6345_FC_REG             (0x1C)
+
+#define ENETDMA_6345_BUFALLOC_REG       (0x20)
+
+/* Shift down for EOP, SOP and WRAP bits */
+#define ENETDMA_6345_DESC_SHIFT         (3)
 
 /*************************************************************************
  * _REG relative to RSET_ENETDMAC
  *************************************************************************/
 
 /* Channel Configuration register */
-#define ENETDMAC_CHANCFG_REG(x)         ((x) * 0x10)
+#define ENETDMAC_CHANCFG_REG            (0x0)
 #define ENETDMAC_CHANCFG_EN_SHIFT       0
 #define ENETDMAC_CHANCFG_EN_MASK        (1 << ENETDMAC_CHANCFG_EN_SHIFT)
 #define ENETDMAC_CHANCFG_PKTHALT_SHIFT  1
 #define ENETDMAC_CHANCFG_PKTHALT_MASK   (1 << ENETDMAC_CHANCFG_PKTHALT_SHIFT)
 #define ENETDMAC_CHANCFG_BUFHALT_SHIFT  2
 #define ENETDMAC_CHANCFG_BUFHALT_MASK   (1 << ENETDMAC_CHANCFG_BUFHALT_SHIFT)
+#define ENETDMAC_CHANCFG_CHAINING_SHIFT 2
+#define ENETDMAC_CHANCFG_CHAINING_MASK  (1 << ENETDMAC_CHANCFG_CHAINING_SHIFT)
+#define ENETDMAC_CHANCFG_WRAP_EN_SHIFT  3
+#define ENETDMAC_CHANCFG_WRAP_EN_MASK   (1 << ENETDMAC_CHANCFG_WRAP_EN_SHIFT)
+#define ENETDMAC_CHANCFG_FLOWC_EN_SHIFT 4
+#define ENETDMAC_CHANCFG_FLOWC_EN_MASK  (1 << ENETDMAC_CHANCFG_FLOWC_EN_SHIFT)
 
 /* Interrupt Control/Status register */
-#define ENETDMAC_IR_REG(x)              (0x4 + (x) * 0x10)
+#define ENETDMAC_IR_REG                 (0x4)
 #define ENETDMAC_IR_BUFDONE_MASK        (1 << 0)
 #define ENETDMAC_IR_PKTDONE_MASK        (1 << 1)
 #define ENETDMAC_IR_NOTOWNER_MASK       (1 << 2)
 
 /* Interrupt Mask register */
-#define ENETDMAC_IRMASK_REG(x)          (0x8 + (x) * 0x10)
+#define ENETDMAC_IRMASK_REG             (0x8)
 
 /* Maximum Burst Length */
-#define ENETDMAC_MAXBURST_REG(x)        (0xc + (x) * 0x10)
+#define ENETDMAC_MAXBURST_REG           (0xc)
 
 
 /*************************************************************************
@@ -814,26 +884,76 @@
  *************************************************************************/
 
 /* Ring Start Address register */
-#define ENETDMAS_RSTART_REG(x)          ((x) * 0x10)
+#define ENETDMAS_RSTART_REG             (0x0)
 
 /* State Ram Word 2 */
-#define ENETDMAS_SRAM2_REG(x)           (0x4 + (x) * 0x10)
+#define ENETDMAS_SRAM2_REG              (0x4)
 
 /* State Ram Word 3 */
-#define ENETDMAS_SRAM3_REG(x)           (0x8 + (x) * 0x10)
+#define ENETDMAS_SRAM3_REG              (0x8)
 
 /* State Ram Word 4 */
-#define ENETDMAS_SRAM4_REG(x)           (0xc + (x) * 0x10)
+#define ENETDMAS_SRAM4_REG              (0xc)
 
 
 /*************************************************************************
  * _REG relative to RSET_ENETSW
  *************************************************************************/
 
+/* Port traffic control */
+#define ENETSW_PTCTRL_REG(x)            (0x0 + (x))
+#define ENETSW_PTCTRL_RXDIS_MASK        (1 << 0)
+#define ENETSW_PTCTRL_TXDIS_MASK        (1 << 1)
+
+/* Switch mode register */
+#define ENETSW_SWMODE_REG               (0xb)
+#define ENETSW_SWMODE_FWD_EN_MASK       (1 << 1)
+
+/* IMP override Register */
+#define ENETSW_IMPOV_REG                (0xe)
+#define ENETSW_IMPOV_FORCE_MASK         (1 << 7)
+#define ENETSW_IMPOV_TXFLOW_MASK        (1 << 5)
+#define ENETSW_IMPOV_RXFLOW_MASK        (1 << 4)
+#define ENETSW_IMPOV_1000_MASK          (1 << 3)
+#define ENETSW_IMPOV_100_MASK           (1 << 2)
+#define ENETSW_IMPOV_FDX_MASK           (1 << 1)
+#define ENETSW_IMPOV_LINKUP_MASK        (1 << 0)
+
+/* Port override Register */
+#define ENETSW_PORTOV_REG(x)            (0x58 + (x))
+#define ENETSW_PORTOV_ENABLE_MASK       (1 << 6)
+#define ENETSW_PORTOV_TXFLOW_MASK       (1 << 5)
+#define ENETSW_PORTOV_RXFLOW_MASK       (1 << 4)
+#define ENETSW_PORTOV_1000_MASK         (1 << 3)
+#define ENETSW_PORTOV_100_MASK          (1 << 2)
+#define ENETSW_PORTOV_FDX_MASK          (1 << 1)
+#define ENETSW_PORTOV_LINKUP_MASK       (1 << 0)
+
+/* MDIO control register */
+#define ENETSW_MDIOC_REG                (0xb0)
+#define ENETSW_MDIOC_EXT_MASK           (1 << 16)
+#define ENETSW_MDIOC_REG_SHIFT          20
+#define ENETSW_MDIOC_PHYID_SHIFT        25
+#define ENETSW_MDIOC_RD_MASK            (1 << 30)
+#define ENETSW_MDIOC_WR_MASK            (1 << 31)
+
+/* MDIO data register */
+#define ENETSW_MDIOD_REG                (0xb4)
+
+/* Global Management Configuration Register */
+#define ENETSW_GMCR_REG                 (0x200)
+#define ENETSW_GMCR_RST_MIB_MASK        (1 << 0)
+
 /* MIB register */
 #define ENETSW_MIB_REG(x)               (0x2800 + (x) * 4)
 #define ENETSW_MIB_REG_COUNT            47
 
+/* Jumbo control register port mask register */
+#define ENETSW_JMBCTL_PORT_REG          (0x4004)
+
+/* Jumbo control mib good frame register */
+#define ENETSW_JMBCTL_MAXSIZE_REG       (0x4008)
+
 
 /*************************************************************************
  * _REG relative to RSET_OHCI_PRIV
@@ -1293,7 +1413,7 @@
 #define SPI_6348_RX_DATA                0x80
 #define SPI_6348_RX_DATA_SIZE           0x3f
 
-/* BCM 6358/6262/6368 SPI core */
+/* BCM 3368/6358/6262/6368 SPI core */
 #define SPI_6358_MSG_CTL                0x00    /* 16-bits register */
 #define SPI_6358_MSG_CTL_WIDTH          16
 #define SPI_6358_MSG_DATA               0x02
@@ -1434,4 +1554,11 @@
 
 #define PCIE_DEVICE_OFFSET              0x8000
 
+/*************************************************************************
+ * _REG relative to RSET_OTP
+ *************************************************************************/
+
+#define OTP_USER_BITS_6328_REG(i)       (0x20 + (i) * 4)
+#define   OTP_6328_REG3_TP1_DISABLED    BIT(9)
+
 #endif /* BCM63XX_REGS_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
index 682bcf3b492a..b86a0efba665 100644
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -24,6 +24,7 @@ struct board_info {
         /* enabled feature/device */
         unsigned int    has_enet0:1;
         unsigned int    has_enet1:1;
+        unsigned int    has_enetsw:1;
         unsigned int    has_pci:1;
         unsigned int    has_pccard:1;
         unsigned int    has_ohci0:1;
@@ -36,6 +37,7 @@ struct board_info {
         /* ethernet config */
         struct bcm63xx_enet_platform_data enet0;
         struct bcm63xx_enet_platform_data enet1;
+        struct bcm63xx_enetsw_platform_data enetsw;
 
         /* USB config */
         struct bcm63xx_usbd_platform_data usbd;
@@ -45,6 +47,12 @@ struct board_info {
 
         /* GPIO LEDs */
         struct gpio_led leds[5];
+
+        /* External PHY reset GPIO */
+        unsigned int ephy_reset_gpio;
+
+        /* External PHY reset GPIO flags from gpio.h */
+        unsigned long ephy_reset_gpio_flags;
 };
 
 #endif /* ! BOARD_BCM963XX_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/ioremap.h b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
index 94e3011ba7df..ff15e3b14e7a 100644
--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
@@ -11,6 +11,10 @@ static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
 static inline int is_bcm63xx_internal_registers(phys_t offset)
 {
         switch (bcm63xx_get_cpu_id()) {
+        case BCM3368_CPU_ID:
+                if (offset >= 0xfff80000)
+                        return 1;
+                break;
         case BCM6338_CPU_ID:
         case BCM6345_CPU_ID:
         case BCM6348_CPU_ID:
diff --git a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
index be8fb4240cec..47fb247f9663 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
@@ -13,6 +13,8 @@
 #ifndef __ASM_MACH_CAVIUM_OCTEON_DMA_COHERENCE_H
 #define __ASM_MACH_CAVIUM_OCTEON_DMA_COHERENCE_H
 
+#include <linux/bug.h>
+
 struct device;
 
 extern void octeon_pci_dma_init(void);
@@ -21,18 +23,21 @@ static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
         size_t size)
 {
         BUG();
+        return 0;
 }
 
 static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
         struct page *page)
 {
         BUG();
+        return 0;
 }
 
 static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
         dma_addr_t dma_addr)
 {
         BUG();
+        return 0;
 }
 
 static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
@@ -44,6 +49,7 @@ static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
 static inline int plat_dma_supported(struct device *dev, u64 mask)
 {
         BUG();
+        return 0;
 }
 
 static inline void plat_extra_sync_for_device(struct device *dev)
@@ -60,6 +66,7 @@ static inline int plat_dma_mapping_error(struct device *dev,
                                          dma_addr_t dma_addr)
 {
         BUG();
+        return 0;
 }
 
 dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
diff --git a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
index 1e7dbb192657..1668ee57acb9 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
@@ -34,15 +34,10 @@
         ori     v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
         dmtc0   v0, CP0_CVMMEMCTL_REG   # Write the cavium mem control register
         dmfc0   v0, CP0_CVMCTL_REG      # Read the cavium control register
-#ifdef CONFIG_CAVIUM_OCTEON_HW_FIX_UNALIGNED
         # Disable unaligned load/store support but leave HW fixup enabled
+        # Needed for octeon specific memcpy
         or  v0, v0, 0x5001
         xor v0, v0, 0x1001
-#else
-        # Disable unaligned load/store and HW fixup support
-        or  v0, v0, 0x5001
-        xor v0, v0, 0x5001
-#endif
         # Read the processor ID register
         mfc0 v1, CP0_PRID_REG
         # Disable instruction prefetching (Octeon Pass1 errata)
diff --git a/arch/mips/include/asm/mach-cavium-octeon/spaces.h b/arch/mips/include/asm/mach-cavium-octeon/spaces.h
new file mode 100644
index 000000000000..daa91accf5ab
--- /dev/null
+++ b/arch/mips/include/asm/mach-cavium-octeon/spaces.h
@@ -0,0 +1,24 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 Cavium, Inc.
+ */
+#ifndef _ASM_MACH_CAVIUM_OCTEON_SPACES_H
+#define _ASM_MACH_CAVIUM_OCTEON_SPACES_H
+
+#include <linux/const.h>
+
+#ifdef CONFIG_64BIT
+/* They are all the same and some OCTEON II cores cannot handle 0xa8.. */
+#define CAC_BASE                _AC(0x8000000000000000, UL)
+#define UNCAC_BASE              _AC(0x8000000000000000, UL)
+#define IO_BASE                 _AC(0x8000000000000000, UL)
+
+
+#endif /* CONFIG_64BIT */
+
+#include <asm/mach-generic/spaces.h>
+
+#endif /* _ASM_MACH_CAVIUM_OCTEON_SPACES_H */
diff --git a/arch/mips/include/asm/mach-generic/dma-coherence.h b/arch/mips/include/asm/mach-generic/dma-coherence.h
index fe23034aaf72..74cb99257d5b 100644
--- a/arch/mips/include/asm/mach-generic/dma-coherence.h
+++ b/arch/mips/include/asm/mach-generic/dma-coherence.h
@@ -66,4 +66,16 @@ static inline int plat_device_is_coherent(struct device *dev)
 #endif
 }
 
+#ifdef CONFIG_SWIOTLB
+static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
+{
+        return paddr;
+}
+
+static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
+{
+        return daddr;
+}
+#endif
+
 #endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-generic/kernel-entry-init.h b/arch/mips/include/asm/mach-generic/kernel-entry-init.h
index 7e66505fa574..13b0751b010a 100644
--- a/arch/mips/include/asm/mach-generic/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-generic/kernel-entry-init.h
@@ -12,8 +12,8 @@
 /* Intentionally empty macro, used in head.S. Override in
  * arch/mips/mach-xxx/kernel-entry-init.h when necessary.
  */
-.macro  kernel_entry_setup
-.endm
+        .macro  kernel_entry_setup
+        .endm
 
 /*
  * Do SMP slave processor setup necessary before we can savely execute C code.
diff --git a/arch/mips/include/asm/mach-ip27/kernel-entry-init.h b/arch/mips/include/asm/mach-ip27/kernel-entry-init.h
index a323efb720dc..b087cb83da3a 100644
--- a/arch/mips/include/asm/mach-ip27/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-ip27/kernel-entry-init.h
@@ -24,6 +24,53 @@
         .endm
 
 /*
+ * TLB bits
+ */
+#define PAGE_GLOBAL             (1 << 6)
+#define PAGE_VALID              (1 << 7)
+#define PAGE_DIRTY              (1 << 8)
+#define CACHE_CACHABLE_COW      (5 << 9)
+
+        /*
+         * inputs are the text nasid in t1, data nasid in t2.
+         */
+        .macro MAPPED_KERNEL_SETUP_TLB
+#ifdef CONFIG_MAPPED_KERNEL
+        /*
+         * This needs to read the nasid - assume 0 for now.
+         * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
+         * 0+DVG in tlblo_1.
+         */
+        dli     t0, 0xffffffffc0000000
+        dmtc0   t0, CP0_ENTRYHI
+        li      t0, 0x1c000             # Offset of text into node memory
+        dsll    t1, NASID_SHFT          # Shift text nasid into place
+        dsll    t2, NASID_SHFT          # Same for data nasid
+        or      t1, t1, t0              # Physical load address of kernel text
+        or      t2, t2, t0              # Physical load address of kernel data
+        dsrl    t1, 12                  # 4K pfn
+        dsrl    t2, 12                  # 4K pfn
+        dsll    t1, 6                   # Get pfn into place
+        dsll    t2, 6                   # Get pfn into place
+        li      t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6)
+        or      t0, t0, t1
+        mtc0    t0, CP0_ENTRYLO0        # physaddr, VG, cach exlwr
+        li      t0, ((PAGE_GLOBAL | PAGE_VALID |  PAGE_DIRTY | CACHE_CACHABLE_COW) >> 6)
+        or      t0, t0, t2
+        mtc0    t0, CP0_ENTRYLO1        # physaddr, DVG, cach exlwr
+        li      t0, 0x1ffe000           # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
+        mtc0    t0, CP0_PAGEMASK
+        li      t0, 0                   # KMAP_INX
+        mtc0    t0, CP0_INDEX
+        li      t0, 1
+        mtc0    t0, CP0_WIRED
+        tlbwi
+#else
+        mtc0    zero, CP0_WIRED
+#endif
+        .endm
+
+/*
  * Intentionally empty macro, used in head.S. Override in
  * arch/mips/mach-xxx/kernel-entry-init.h when necessary.
  */
diff --git a/arch/mips/include/asm/mach-ip28/spaces.h b/arch/mips/include/asm/mach-ip28/spaces.h
index 5edf05d9dad8..5d6a76434d00 100644
--- a/arch/mips/include/asm/mach-ip28/spaces.h
+++ b/arch/mips/include/asm/mach-ip28/spaces.h
@@ -11,11 +11,14 @@
 #ifndef _ASM_MACH_IP28_SPACES_H
 #define _ASM_MACH_IP28_SPACES_H
 
-#define CAC_BASE                0xa800000000000000
+#define CAC_BASE        _AC(0xa800000000000000, UL)
 
-#define HIGHMEM_START           (~0UL)
+#define HIGHMEM_START   (~0UL)
 
-#define PHYS_OFFSET             _AC(0x20000000, UL)
+#define PHYS_OFFSET     _AC(0x20000000, UL)
+
+#define UNCAC_BASE      _AC(0xc0000000, UL)     /* 0xa0000000 + PHYS_OFFSET */
+#define IO_BASE         UNCAC_BASE
 
 #include <asm/mach-generic/spaces.h>
 
diff --git a/arch/mips/include/asm/mach-jz4740/dma.h b/arch/mips/include/asm/mach-jz4740/dma.h
index 98b4e7c0dbae..509cd5828044 100644
--- a/arch/mips/include/asm/mach-jz4740/dma.h
+++ b/arch/mips/include/asm/mach-jz4740/dma.h
@@ -16,8 +16,6 @@
 #ifndef __ASM_MACH_JZ4740_DMA_H__
 #define __ASM_MACH_JZ4740_DMA_H__
 
-struct jz4740_dma_chan;
-
 enum jz4740_dma_request_type {
         JZ4740_DMA_TYPE_AUTO_REQUEST    = 8,
         JZ4740_DMA_TYPE_UART_TRANSMIT   = 20,
@@ -33,58 +31,4 @@ enum jz4740_dma_request_type {
         JZ4740_DMA_TYPE_SLCD            = 30,
 };
 
-enum jz4740_dma_width {
-        JZ4740_DMA_WIDTH_32BIT  = 0,
-        JZ4740_DMA_WIDTH_8BIT   = 1,
-        JZ4740_DMA_WIDTH_16BIT  = 2,
-};
-
-enum jz4740_dma_transfer_size {
-        JZ4740_DMA_TRANSFER_SIZE_4BYTE  = 0,
-        JZ4740_DMA_TRANSFER_SIZE_1BYTE  = 1,
-        JZ4740_DMA_TRANSFER_SIZE_2BYTE  = 2,
-        JZ4740_DMA_TRANSFER_SIZE_16BYTE = 3,
-        JZ4740_DMA_TRANSFER_SIZE_32BYTE = 4,
-};
-
-enum jz4740_dma_flags {
-        JZ4740_DMA_SRC_AUTOINC = 0x2,
-        JZ4740_DMA_DST_AUTOINC = 0x1,
-};
-
-enum jz4740_dma_mode {
-        JZ4740_DMA_MODE_SINGLE  = 0,
-        JZ4740_DMA_MODE_BLOCK   = 1,
-};
-
-struct jz4740_dma_config {
-        enum jz4740_dma_width src_width;
-        enum jz4740_dma_width dst_width;
-        enum jz4740_dma_transfer_size transfer_size;
-        enum jz4740_dma_request_type request_type;
-        enum jz4740_dma_flags flags;
-        enum jz4740_dma_mode mode;
-};
-
-typedef void (*jz4740_dma_complete_callback_t)(struct jz4740_dma_chan *, int, void *);
-
-struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name);
-void jz4740_dma_free(struct jz4740_dma_chan *dma);
-
-void jz4740_dma_configure(struct jz4740_dma_chan *dma,
-        const struct jz4740_dma_config *config);
-
-
-void jz4740_dma_enable(struct jz4740_dma_chan *dma);
-void jz4740_dma_disable(struct jz4740_dma_chan *dma);
-
-void jz4740_dma_set_src_addr(struct jz4740_dma_chan *dma, dma_addr_t src);
-void jz4740_dma_set_dst_addr(struct jz4740_dma_chan *dma, dma_addr_t dst);
-void jz4740_dma_set_transfer_count(struct jz4740_dma_chan *dma, uint32_t count);
-
-uint32_t jz4740_dma_get_residue(const struct jz4740_dma_chan *dma);
-
-void jz4740_dma_set_complete_cb(struct jz4740_dma_chan *dma,
-        jz4740_dma_complete_callback_t cb);
-
 #endif  /* __ASM_JZ4740_DMA_H__ */
diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h
index 72cfebdb5a47..05988c2d6565 100644
--- a/arch/mips/include/asm/mach-jz4740/platform.h
+++ b/arch/mips/include/asm/mach-jz4740/platform.h
@@ -32,6 +32,7 @@ extern struct platform_device jz4740_codec_device;
 extern struct platform_device jz4740_adc_device;
 extern struct platform_device jz4740_wdt_device;
 extern struct platform_device jz4740_pwm_device;
+extern struct platform_device jz4740_dma_device;
 
 void jz4740_serial_device_register(void);
 
diff --git a/arch/mips/include/asm/mach-pmcs-msp71xx/gpio.h b/arch/mips/include/asm/mach-pmcs-msp71xx/gpio.h
deleted file mode 100644
index ebdbab973e41..000000000000
--- a/arch/mips/include/asm/mach-pmcs-msp71xx/gpio.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * include/asm-mips/pmc-sierra/msp71xx/gpio.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * @author Patrick Glass <patrickglass@gmail.com>
- */
-
-#ifndef __PMC_MSP71XX_GPIO_H
-#define __PMC_MSP71XX_GPIO_H
-
-/* Max number of gpio's is 28 on chip plus 3 banks of I2C IO Expanders */
-#define ARCH_NR_GPIOS (28 + (3 * 8))
-
-/* new generic GPIO API - see Documentation/gpio.txt */
-#include <asm-generic/gpio.h>
-
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-
-/* Setup calls for the gpio and gpio extended */
-extern void msp71xx_init_gpio(void);
-extern void msp71xx_init_gpio_extended(void);
-extern int msp71xx_set_output_drive(unsigned gpio, int value);
-
-/* Custom output drive functionss */
-static inline int gpio_set_output_drive(unsigned gpio, int value)
-{
-        return msp71xx_set_output_drive(gpio, value);
-}
-
-/* IRQ's are not supported for gpio lines */
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return -EINVAL;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
-        return -EINVAL;
-}
-
-#endif /* __PMC_MSP71XX_GPIO_H */
diff --git a/arch/mips/include/asm/mach-wrppmc/mach-gt64120.h b/arch/mips/include/asm/mach-wrppmc/mach-gt64120.h
deleted file mode 100644
index 00fa3684ac98..000000000000
--- a/arch/mips/include/asm/mach-wrppmc/mach-gt64120.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * This is a direct copy of the ev96100.h file, with a global
- * search and replace.  The numbers are the same.
- *
- * The reason I'm duplicating this is so that the 64120/96100
- * defines won't be confusing in the source code.
- */
-#ifndef __ASM_MIPS_GT64120_H
-#define __ASM_MIPS_GT64120_H
-
-/*
- * This is the CPU physical memory map of PPMC Board:
- *
- *    0x00000000-0x03FFFFFF      - 64MB SDRAM (SCS[0]#)
- *    0x1C000000-0x1C000000      - LED (CS0)
- *    0x1C800000-0x1C800007      - UART 16550 port (CS1)
- *    0x1F000000-0x1F000000      - MailBox (CS3)
- *    0x1FC00000-0x20000000      - 4MB Flash (BOOT CS)
- */
-
-#define WRPPMC_SDRAM_SCS0_BASE  0x00000000
-#define WRPPMC_SDRAM_SCS0_SIZE  0x04000000
-
-#define WRPPMC_UART16550_BASE   0x1C800000
-#define WRPPMC_UART16550_CLOCK  3686400 /* 3.68MHZ */
-
-#define WRPPMC_LED_BASE         0x1C000000
-#define WRPPMC_MBOX_BASE        0x1F000000
-
-#define WRPPMC_BOOTROM_BASE     0x1FC00000
-#define WRPPMC_BOOTROM_SIZE     0x00400000 /* 4M Flash */
-
-#define WRPPMC_MIPS_TIMER_IRQ   7 /* MIPS compare/count timer interrupt */
-#define WRPPMC_UART16550_IRQ    6
-#define WRPPMC_PCI_INTA_IRQ     3
-
-/*
- * PCI Bus I/O and Memory resources allocation
- *
- * NOTE: We only have PCI_0 hose interface
- */
-#define GT_PCI_MEM_BASE 0x13000000UL
-#define GT_PCI_MEM_SIZE 0x02000000UL
-#define GT_PCI_IO_BASE  0x11000000UL
-#define GT_PCI_IO_SIZE  0x02000000UL
-
-/*
- * PCI interrupts will come in on either the INTA or INTD interrupt lines,
- * which are mapped to the #2 and #5 interrupt pins of the MIPS.  On our
- * boards, they all either come in on IntD or they all come in on IntA, they
- * aren't mixed. There can be numerous PCI interrupts, so we keep a list of the
- * "requested" interrupt numbers and go through the list whenever we get an
- * IntA/D.
- *
- * Interrupts < 8 are directly wired to the processor; PCI INTA is 8 and
- * INTD is 11.
- */
-#define GT_TIMER        4
-#define GT_INTA         2
-#define GT_INTD         5
-
-#ifndef __ASSEMBLY__
-
-/*
- * GT64120 internal register space base address
- */
-extern unsigned long gt64120_base;
-
-#define GT64120_BASE    (gt64120_base)
-
-/* define WRPPMC_EARLY_DEBUG to enable early output something to UART */
-#undef WRPPMC_EARLY_DEBUG
-
-#ifdef WRPPMC_EARLY_DEBUG
-extern void wrppmc_led_on(int mask);
-extern void wrppmc_led_off(int mask);
-extern void wrppmc_early_printk(const char *fmt, ...);
-#else
-#define wrppmc_early_printk(fmt, ...) do {} while (0)
-#endif /* WRPPMC_EARLY_DEBUG */
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_MIPS_GT64120_H */
diff --git a/arch/mips/include/asm/mach-wrppmc/war.h b/arch/mips/include/asm/mach-wrppmc/war.h
deleted file mode 100644
index e86084c0bd6b..000000000000
--- a/arch/mips/include/asm/mach-wrppmc/war.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
- */
-#ifndef __ASM_MIPS_MACH_WRPPMC_WAR_H
-#define __ASM_MIPS_MACH_WRPPMC_WAR_H
-
-#define R4600_V1_INDEX_ICACHEOP_WAR     0
-#define R4600_V1_HIT_CACHEOP_WAR        0
-#define R4600_V2_HIT_CACHEOP_WAR        0
-#define R5432_CP0_INTERRUPT_WAR         0
-#define BCM1250_M3_WAR                  0
-#define SIBYTE_1956_WAR                 0
-#define MIPS4K_ICACHE_REFILL_WAR        0
-#define MIPS_CACHE_SYNC_WAR             0
-#define TX49XX_ICACHE_INDEX_INV_WAR     0
-#define ICACHE_REFILLS_WORKAROUND_WAR   1
-#define R10000_LLSC_WAR                 0
-#define MIPS34K_MISSED_ITLB_WAR         0
-
-#endif /* __ASM_MIPS_MACH_WRPPMC_WAR_H */
diff --git a/arch/mips/include/asm/mips-boards/generic.h b/arch/mips/include/asm/mips-boards/generic.h
index bd9746fbe4af..48616816bcbc 100644
--- a/arch/mips/include/asm/mips-boards/generic.h
+++ b/arch/mips/include/asm/mips-boards/generic.h
@@ -24,12 +24,6 @@
 #define ASCII_DISPLAY_POS_BASE     0x1f000418
 
 /*
- * Reset register.
- */
-#define SOFTRES_REG       0x1f000500
-#define GORESET           0x42
-
-/*
  * Revision register.
  */
 #define MIPS_REVISION_REG                  0x1fc00010
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 87e6207b05e4..fed1c3e9b486 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -596,7 +596,7 @@
 #define MIPS_CONF3_RXI          (_ULCAST_(1) << 12)
 #define MIPS_CONF3_ULRI         (_ULCAST_(1) << 13)
 #define MIPS_CONF3_ISA          (_ULCAST_(3) << 14)
-#define MIPS_CONF3_ISA_OE       (_ULCAST_(3) << 16)
+#define MIPS_CONF3_ISA_OE       (_ULCAST_(1) << 16)
 #define MIPS_CONF3_VZ           (_ULCAST_(1) << 23)
 
 #define MIPS_CONF4_MMUSIZEEXT   (_ULCAST_(255) << 0)
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 516e6e9a5594..3b29079b5424 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -28,11 +28,7 @@
 
 #define TLBMISS_HANDLER_SETUP_PGD(pgd)                                  \
 do {                                                                    \
-        void (*tlbmiss_handler_setup_pgd)(unsigned long);               \
-        extern u32 tlbmiss_handler_setup_pgd_array[16];                 \
-                                                                        \
-        tlbmiss_handler_setup_pgd =                                     \
-                (__typeof__(tlbmiss_handler_setup_pgd)) tlbmiss_handler_setup_pgd_array; \
+        extern void tlbmiss_handler_setup_pgd(unsigned long);           \
         tlbmiss_handler_setup_pgd((unsigned long)(pgd));                \
 } while (0)
 
diff --git a/arch/mips/include/asm/netlogic/common.h b/arch/mips/include/asm/netlogic/common.h
index aef560a51a7e..bb68c3398c80 100644
--- a/arch/mips/include/asm/netlogic/common.h
+++ b/arch/mips/include/asm/netlogic/common.h
@@ -39,11 +39,17 @@
  * Common SMP definitions
  */
 #define RESET_VEC_PHYS          0x1fc00000
+#define RESET_VEC_SIZE          8192            /* 8KB reset code and data */
 #define RESET_DATA_PHYS         (RESET_VEC_PHYS + (1<<10))
+
+/* Offsets of parameters in the RESET_DATA_PHYS area */
 #define BOOT_THREAD_MODE        0
 #define BOOT_NMI_LOCK           4
 #define BOOT_NMI_HANDLER        8
 
+/* CPU ready flags for each CPU */
+#define BOOT_CPU_READY          2048
+
 #ifndef __ASSEMBLY__
 #include <linux/cpumask.h>
 #include <linux/spinlock.h>
@@ -59,23 +65,32 @@ int nlm_wakeup_secondary_cpus(void);
 void nlm_rmiboot_preboot(void);
 void nlm_percpu_init(int hwcpuid);
 
+static inline void *
+nlm_get_boot_data(int offset)
+{
+        return (void *)(CKSEG1ADDR(RESET_DATA_PHYS) + offset);
+}
+
 static inline void
 nlm_set_nmi_handler(void *handler)
 {
-        char *reset_data;
+        void *nmih = nlm_get_boot_data(BOOT_NMI_HANDLER);
 
-        reset_data = (char *)CKSEG1ADDR(RESET_DATA_PHYS);
-        *(int64_t *)(reset_data + BOOT_NMI_HANDLER) = (long)handler;
+        *(int64_t *)nmih = (long)handler;
 }
 
 /*
  * Misc.
  */
+void nlm_init_boot_cpu(void);
 unsigned int nlm_get_cpu_frequency(void);
 void nlm_node_init(int node);
 extern struct plat_smp_ops nlm_smp_ops;
 extern char nlm_reset_entry[], nlm_reset_entry_end[];
 
+/* SWIOTLB */
+extern struct dma_map_ops nlm_swiotlb_dma_ops;
+
 extern unsigned int nlm_threads_per_core;
 extern cpumask_t nlm_cpumask;
 
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/pic.h b/arch/mips/include/asm/netlogic/xlp-hal/pic.h
index a981f4681a15..4b5108dfaa16 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/pic.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/pic.h
@@ -315,7 +315,7 @@ nlm_pic_send_ipi(uint64_t base, int hwt, int irq, int nmi)
 {
         uint64_t ipi;
 
-        ipi = (nmi << 31) | (irq << 20);
+        ipi = ((uint64_t)nmi << 31) | (irq << 20);
         ipi |= ((hwt >> 4) << 16) | (1 << (hwt & 0xf)); /* cpuset and mask */
         nlm_write_pic_reg(base, PIC_IPI_CTL, ipi);
 }
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
index 7e47209327a5..f4ea0f7f3965 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
@@ -59,6 +59,7 @@ void xlp_wakeup_secondary_cpus(void);
 
 void xlp_mmu_init(void);
 void nlm_hal_init(void);
+void *xlp_dt_init(void *fdtp);
 
 #endif /* !__ASSEMBLY__ */
 #endif /* _ASM_NLM_XLP_H */
diff --git a/arch/mips/include/asm/netlogic/xlr/fmn.h b/arch/mips/include/asm/netlogic/xlr/fmn.h
index 2a78929cef73..5604db3d1836 100644
--- a/arch/mips/include/asm/netlogic/xlr/fmn.h
+++ b/arch/mips/include/asm/netlogic/xlr/fmn.h
@@ -175,6 +175,10 @@
 #define nlm_write_c2_cc14(s, v)         __write_32bit_c2_register($30, s, v)
 #define nlm_write_c2_cc15(s, v)         __write_32bit_c2_register($31, s, v)
 
+#define nlm_read_c2_status0()           __read_32bit_c2_register($2, 0)
+#define nlm_write_c2_status0(v)         __write_32bit_c2_register($2, 0, v)
+#define nlm_read_c2_status1()           __read_32bit_c2_register($2, 1)
+#define nlm_write_c2_status1(v)         __write_32bit_c2_register($2, 1, v)
 #define nlm_read_c2_status(sel)         __read_32bit_c2_register($2, 0)
 #define nlm_read_c2_config()            __read_32bit_c2_register($3, 0)
 #define nlm_write_c2_config(v)          __write_32bit_c2_register($3, 0, v)
@@ -237,7 +241,7 @@ static inline void nlm_msgwait(unsigned int mask)
 /*
  * Disable interrupts and enable COP2 access
  */
-static inline uint32_t nlm_cop2_enable(void)
+static inline uint32_t nlm_cop2_enable_irqsave(void)
 {
         uint32_t sr = read_c0_status();
 
@@ -245,7 +249,7 @@ static inline uint32_t nlm_cop2_enable(void)
         return sr;
 }
 
-static inline void nlm_cop2_restore(uint32_t sr)
+static inline void nlm_cop2_disable_irqrestore(uint32_t sr)
 {
         write_c0_status(sr);
 }
@@ -296,7 +300,7 @@ static inline int nlm_fmn_send(unsigned int size, unsigned int code,
          */
         for (i = 0; i < 8; i++) {
                 nlm_msgsnd(dest);
-                status = nlm_read_c2_status(0);
+                status = nlm_read_c2_status0();
                 if ((status & 0x2) == 1)
                         pr_info("Send pending fail!\n");
                 if ((status & 0x4) == 0)
@@ -316,7 +320,7 @@ static inline int nlm_fmn_receive(int bucket, int *size, int *code, int *stid,
 
         /* wait for load pending to clear */
         do {
-                status = nlm_read_c2_status(1);
+                status = nlm_read_c2_status0();
         } while ((status & 0x08) != 0);
 
         /* receive error bits */
diff --git a/arch/mips/include/asm/octeon/cvmx-bootinfo.h b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
index 284fa8d773ba..7b7818d1e4d5 100644
--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
@@ -227,6 +227,7 @@ enum cvmx_board_types_enum {
          * use any numbers in this range.
          */
         CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
+        CVMX_BOARD_TYPE_UBNT_E100 = 20002,
         CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
 
         /* The remaining range is reserved for future use. */
@@ -325,6 +326,7 @@ static inline const char *cvmx_board_type_to_string(enum
 
                     /* Customer private range */
                 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
+                ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
                 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
         }
         return "Unsupported Board";
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index f59552fae917..f6be4741f7e8 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -205,10 +205,8 @@ extern int __virt_addr_valid(const volatile void *kaddr);
 #define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-#define UNCAC_ADDR(addr)        ((addr) - PAGE_OFFSET + UNCAC_BASE +    \
-                                                                PHYS_OFFSET)
-#define CAC_ADDR(addr)          ((addr) - UNCAC_BASE + PAGE_OFFSET -    \
-                                                                PHYS_OFFSET)
+#define UNCAC_ADDR(addr)        ((addr) - PAGE_OFFSET + UNCAC_BASE)
+#define CAC_ADDR(addr)          ((addr) - UNCAC_BASE + PAGE_OFFSET)
 
 #include <asm-generic/memory_model.h>
 #include <asm-generic/getorder.h>
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index b8e24fd4cbc5..fa8e0aa250ca 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -52,7 +52,6 @@ struct pci_controller {
 /*
  * Used by boards to register their PCI busses before the actual scanning.
  */
-extern struct pci_controller * alloc_pci_controller(void);
 extern void register_pci_controller(struct pci_controller *hose);
 
 /*
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 1470b7b68b0e..3605b844ad87 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -137,7 +137,7 @@ union mips_watch_reg_state {
         struct mips3264_watch_reg_state mips3264;
 };
 
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
+#if defined(CONFIG_CPU_CAVIUM_OCTEON)
 
 struct octeon_cop2_state {
         /* DMFC2 rt, 0x0201 */
@@ -182,13 +182,26 @@ struct octeon_cop2_state {
         /* DMFC2 rt, 0x025A; DMFC2 rt, 0x025B - Pass2 */
         unsigned long   cop2_gfm_result[2];
 };
-#define INIT_OCTEON_COP2 {0,}
+#define COP2_INIT                                               \
+        .cp2                    = {0,},
 
 struct octeon_cvmseg_state {
         unsigned long cvmseg[CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE]
                             [cpu_dcache_line_size() / sizeof(unsigned long)];
 };
 
+#elif defined(CONFIG_CPU_XLP)
+struct nlm_cop2_state {
+        u64     rx[4];
+        u64     tx[4];
+        u32     tx_msg_status;
+        u32     rx_msg_status;
+};
+
+#define COP2_INIT                                               \
+        .cp2                    = {{0}, {0}, 0, 0},
+#else
+#define COP2_INIT
 #endif
 
 typedef struct {
@@ -231,8 +244,11 @@ struct thread_struct {
         unsigned long cp0_baduaddr;     /* Last kernel fault accessing USEG */
         unsigned long error_code;
 #ifdef CONFIG_CPU_CAVIUM_OCTEON
-    struct octeon_cop2_state cp2 __attribute__ ((__aligned__(128)));
-    struct octeon_cvmseg_state cvmseg __attribute__ ((__aligned__(128)));
+        struct octeon_cop2_state cp2 __attribute__ ((__aligned__(128)));
+        struct octeon_cvmseg_state cvmseg __attribute__ ((__aligned__(128)));
+#endif
+#ifdef CONFIG_CPU_XLP
+        struct nlm_cop2_state cp2;
 #endif
         struct mips_abi *abi;
 };
@@ -245,13 +261,6 @@ struct thread_struct {
 #define FPAFF_INIT
 #endif /* CONFIG_MIPS_MT_FPAFF */
 
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-#define OCTEON_INIT                                             \
-        .cp2                    = INIT_OCTEON_COP2,
-#else
-#define OCTEON_INIT
-#endif /* CONFIG_CPU_CAVIUM_OCTEON */
-
 #define INIT_THREAD  {                                          \
         /*                                                      \
          * Saved main processor registers                       \
@@ -300,9 +309,9 @@ struct thread_struct {
         .cp0_baduaddr           = 0,                            \
         .error_code             = 0,                            \
         /*                                                      \
-         * Cavium Octeon specifics (null if not Octeon)         \
+         * Platform specific cop2 registers(null if no COP2)    \
          */                                                     \
-        OCTEON_INIT                                             \
+        COP2_INIT                                               \
 }
 
 struct task_struct;
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index a89d1b10d027..23fc95e65673 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -70,6 +70,14 @@
 #ifndef CONFIG_CPU_HAS_SMARTMIPS
                 LONG_S  v1, PT_LO(sp)
 #endif
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+                /*
+                 * The Octeon multiplier state is affected by general
+                 * multiply instructions. It must be saved before and
+                 * kernel code might corrupt it
+                 */
+                jal     octeon_mult_save
+#endif
                 .endm
 
                 .macro  SAVE_STATIC
@@ -218,17 +226,8 @@
                 ori     $28, sp, _THREAD_MASK
                 xori    $28, _THREAD_MASK
 #ifdef CONFIG_CPU_CAVIUM_OCTEON
-                .set    mips64
-                pref    0, 0($28)       /* Prefetch the current pointer */
-                pref    0, PT_R31(sp)   /* Prefetch the $31(ra) */
-                /* The Octeon multiplier state is affected by general multiply
-                    instructions. It must be saved before and kernel code might
-                    corrupt it */
-                jal     octeon_mult_save
-                LONG_L  v1, 0($28)  /* Load the current pointer */
-                         /* Restore $31(ra) that was changed by the jal */
-                LONG_L  ra, PT_R31(sp)
-                pref    0, 0(v1)    /* Prefetch the current thread */
+                .set    mips64
+                pref    0, 0($28)       /* Prefetch the current pointer */
 #endif
                 .set    pop
                 .endm
@@ -248,6 +247,10 @@
                 .endm
 
                 .macro  RESTORE_TEMP
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+                /* Restore the Octeon multiplier state */
+                jal     octeon_mult_restore
+#endif
 #ifdef CONFIG_CPU_HAS_SMARTMIPS
                 LONG_L  $24, PT_ACX(sp)
                 mtlhx   $24
@@ -360,10 +363,6 @@
                 DVPE    5                               # dvpe a1
                 jal     mips_ihb
 #endif /* CONFIG_MIPS_MT_SMTC */
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-                /* Restore the Octeon multiplier state */
-                jal     octeon_mult_restore
-#endif
                 mfc0    a0, CP0_STATUS
                 ori     a0, STATMASK
                 xori    a0, STATMASK
diff --git a/arch/mips/include/asm/stackprotector.h b/arch/mips/include/asm/stackprotector.h
new file mode 100644
index 000000000000..eb9b1035e926
--- /dev/null
+++ b/arch/mips/include/asm/stackprotector.h
@@ -0,0 +1,40 @@
+/*
+ * GCC stack protector support.
+ *
+ * (This is directly adopted from the ARM implementation)
+ *
+ * Stack protector works by putting predefined pattern at the start of
+ * the stack frame and verifying that it hasn't been overwritten when
+ * returning from the function.  The pattern is called stack canary
+ * and gcc expects it to be defined by a global variable called
+ * "__stack_chk_guard" on MIPS.  This unfortunately means that on SMP
+ * we cannot have a different canary value per task.
+ */
+
+#ifndef _ASM_STACKPROTECTOR_H
+#define _ASM_STACKPROTECTOR_H 1
+
+#include <linux/random.h>
+#include <linux/version.h>
+
+extern unsigned long __stack_chk_guard;
+
+/*
+ * Initialize the stackprotector canary value.
+ *
+ * NOTE: this must only be called from functions that never return,
+ * and it must always be inlined.
+ */
+static __always_inline void boot_init_stack_canary(void)
+{
+        unsigned long canary;
+
+        /* Try to get a semi random initial value. */
+        get_random_bytes(&canary, sizeof(canary));
+        canary ^= LINUX_VERSION_CODE;
+
+        current->stack_canary = canary;
+        __stack_chk_guard = current->stack_canary;
+}
+
+#endif  /* _ASM_STACKPROTECTOR_H */
diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h
index fd16bcb6c311..eb0af15ac656 100644
--- a/arch/mips/include/asm/switch_to.h
+++ b/arch/mips/include/asm/switch_to.h
@@ -15,6 +15,7 @@
 #include <asm/cpu-features.h>
 #include <asm/watch.h>
 #include <asm/dsp.h>
+#include <asm/cop2.h>
 
 struct task_struct;
 
@@ -66,10 +67,18 @@ do {									\
 
 #define switch_to(prev, next, last)                                     \
 do {                                                                    \
-        u32 __usedfpu;                                                  \
+        u32 __usedfpu, __c0_stat;                                       \
         __mips_mt_fpaff_switch_to(prev);                                \
         if (cpu_has_dsp)                                                \
                 __save_dsp(prev);                                       \
+        if (cop2_present && (KSTK_STATUS(prev) & ST0_CU2)) {            \
+                if (cop2_lazy_restore)                                  \
+                        KSTK_STATUS(prev) &= ~ST0_CU2;                  \
+                __c0_stat = read_c0_status();                           \
+                write_c0_status(__c0_stat | ST0_CU2);                   \
+                cop2_save(&prev->thread.cp2);                           \
+                write_c0_status(__c0_stat & ~ST0_CU2);                  \
+        }                                                               \
         __clear_software_ll_bit();                                      \
         __usedfpu = test_and_clear_tsk_thread_flag(prev, TIF_USEDFPU);  \
         (last) = resume(prev, next, task_thread_info(next), __usedfpu); \
@@ -77,6 +86,14 @@ do {									\
 
 #define finish_arch_switch(prev)                                        \
 do {                                                                    \
+        u32 __c0_stat;                                                  \
+        if (cop2_present && !cop2_lazy_restore &&                       \
+                        (KSTK_STATUS(current) & ST0_CU2)) {             \
+                __c0_stat = read_c0_status();                           \
+                write_c0_status(__c0_stat | ST0_CU2);                   \
+                cop2_restore(&current->thread.cp2);                     \
+                write_c0_status(__c0_stat & ~ST0_CU2);                  \
+        }                                                               \
         if (cpu_has_dsp)                                                \
                 __restore_dsp(current);                                 \
         if (cpu_has_userlocal)                                          \
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 895320e25662..61215a34acc6 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -109,6 +109,7 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_RESTORE_SIGMASK     9       /* restore signal mask in do_signal() */
 #define TIF_USEDFPU             16      /* FPU was used by this task this quantum (SMP) */
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
+#define TIF_NOHZ                19      /* in adaptive nohz mode */
 #define TIF_FIXADE              20      /* Fix address errors in software */
 #define TIF_LOGADE              21      /* Log address errors to syslog */
 #define TIF_32BIT_REGS          22      /* also implies 16/32 fprs */
@@ -124,6 +125,7 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SECCOMP            (1<<TIF_SECCOMP)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
 #define _TIF_USEDFPU            (1<<TIF_USEDFPU)
+#define _TIF_NOHZ               (1<<TIF_NOHZ)
 #define _TIF_FIXADE             (1<<TIF_FIXADE)
 #define _TIF_LOGADE             (1<<TIF_LOGADE)
 #define _TIF_32BIT_REGS         (1<<TIF_32BIT_REGS)
@@ -131,14 +133,19 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_FPUBOUND           (1<<TIF_FPUBOUND)
 #define _TIF_LOAD_WATCH         (1<<TIF_LOAD_WATCH)
 
+#define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE |       \
+                                 _TIF_SYSCALL_AUDIT)
+
 /* work to do in syscall_trace_leave() */
-#define _TIF_WORK_SYSCALL_EXIT  (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
+#define _TIF_WORK_SYSCALL_EXIT  (_TIF_NOHZ | _TIF_SYSCALL_TRACE |       \
+                                 _TIF_SYSCALL_AUDIT)
 
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK          \
         (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME)
 /* work to do on any return to u-space */
-#define _TIF_ALLWORK_MASK       (_TIF_WORK_MASK | _TIF_WORK_SYSCALL_EXIT)
+#define _TIF_ALLWORK_MASK       (_TIF_NOHZ | _TIF_WORK_MASK |           \
+                                 _TIF_WORK_SYSCALL_EXIT)
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index 370d967725c2..c33a9564fb41 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -13,12 +13,8 @@
 
 #ifdef CONFIG_EXPORT_UASM
 #include <linux/export.h>
-#define __uasminit
-#define __uasminitdata
 #define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
 #else
-#define __uasminit __cpuinit
-#define __uasminitdata __cpuinitdata
 #define UASM_EXPORT_SYMBOL(sym)
 #endif
 
@@ -54,43 +50,36 @@
 #endif
 
 #define Ip_u1u2u3(op)                                                   \
-void __uasminit                                                         \
-ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
+void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
 
 #define Ip_u2u1u3(op)                                                   \
-void __uasminit                                                         \
-ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
+void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
 
 #define Ip_u3u1u2(op)                                                   \
-void __uasminit                                                         \
-ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
+void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
 
 #define Ip_u1u2s3(op)                                                   \
-void __uasminit                                                         \
-ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
+void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
 
 #define Ip_u2s3u1(op)                                                   \
-void __uasminit                                                         \
-ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
+void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
 
 #define Ip_u2u1s3(op)                                                   \
-void __uasminit                                                         \
-ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
+void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
 
 #define Ip_u2u1msbu3(op)                                                \
-void __uasminit                                                         \
-ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c,   \
+void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \
            unsigned int d)
 
 #define Ip_u1u2(op)                                                     \
-void __uasminit ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
+void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
 
 #define Ip_u1s2(op)                                                     \
-void __uasminit ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
+void ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
 
-#define Ip_u1(op) void __uasminit ISAOPC(op)(u32 **buf, unsigned int a)
+#define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a)
 
-#define Ip_0(op) void __uasminit ISAOPC(op)(u32 **buf)
+#define Ip_0(op) void ISAOPC(op)(u32 **buf)
 
 Ip_u2u1s3(_addiu);
 Ip_u3u1u2(_addu);
@@ -163,7 +152,7 @@ struct uasm_label {
         int lab;
 };
 
-void __uasminit ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
+void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
                         int lid);
 #ifdef CONFIG_64BIT
 int ISAFUNC(uasm_in_compat_space_p)(long addr);
@@ -174,7 +163,7 @@ void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
 void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
 
 #define UASM_L_LA(lb)                                                   \
-static inline void __uasminit ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
+static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
 {                                                                       \
         ISAFUNC(uasm_build_label)(lab, addr, label##lb);                \
 }
diff --git a/arch/mips/include/asm/xtalk/xtalk.h b/arch/mips/include/asm/xtalk/xtalk.h
index 680e7efebbaf..26d2ed1fa917 100644
--- a/arch/mips/include/asm/xtalk/xtalk.h
+++ b/arch/mips/include/asm/xtalk/xtalk.h
@@ -47,6 +47,15 @@ typedef struct xtalk_piomap_s *xtalk_piomap_t;
 #define XIO_PORT(x)     ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT))
 #define XIO_PACK(p, o)  ((((uint64_t)(p))<<XIO_PORT_SHIFT) | ((o)&XIO_ADDR_BITS))
 
+#ifdef CONFIG_PCI
+extern int bridge_probe(nasid_t nasid, int widget, int masterwid);
+#else
+static inline int bridge_probe(nasid_t nasid, int widget, int masterwid)
+{
+        return 0;
+}
+#endif
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_XTALK_XTALK_H */
diff --git a/arch/mips/include/uapi/asm/fcntl.h b/arch/mips/include/uapi/asm/fcntl.h
index 0bda78f70e1e..6ca432f00860 100644
--- a/arch/mips/include/uapi/asm/fcntl.h
+++ b/arch/mips/include/uapi/asm/fcntl.h
@@ -5,9 +5,10 @@
  *
  * Copyright (C) 1995, 96, 97, 98, 99, 2003, 05 Ralf Baechle
  */
-#ifndef _ASM_FCNTL_H
-#define _ASM_FCNTL_H
+#ifndef _UAPI_ASM_FCNTL_H
+#define _UAPI_ASM_FCNTL_H
 
+#include <asm/sgidefs.h>
 
 #define O_APPEND        0x0008
 #define O_DSYNC         0x0010  /* used to be O_SYNC, see below */
@@ -55,14 +56,15 @@
  * contain all the same fields as struct flock.
  */
 
-#ifdef CONFIG_32BIT
+#if _MIPS_SIM != _MIPS_SIM_ABI64
+
 #include <linux/types.h>
 
 struct flock {
         short   l_type;
         short   l_whence;
-        off_t   l_start;
-        off_t   l_len;
+        __kernel_off_t  l_start;
+        __kernel_off_t  l_len;
         long    l_sysid;
         __kernel_pid_t l_pid;
         long    pad[4];
@@ -70,8 +72,8 @@ struct flock {
 
 #define HAVE_ARCH_STRUCT_FLOCK
 
-#endif /* CONFIG_32BIT */
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 
 #include <asm-generic/fcntl.h>
 
-#endif /* _ASM_FCNTL_H */
+#endif /* _UAPI_ASM_FCNTL_H */
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 0f4aec2ad1e6..e5a676e3d3c0 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -409,10 +409,11 @@ enum mm_32f_73_minor_op {
 enum mm_16c_minor_op {
         mm_lwm16_op = 0x04,
         mm_swm16_op = 0x05,
-        mm_jr16_op = 0x18,
-        mm_jrc_op = 0x1a,
-        mm_jalr16_op = 0x1c,
-        mm_jalrs16_op = 0x1e,
+        mm_jr16_op = 0x0c,
+        mm_jrc_op = 0x0d,
+        mm_jalr16_op = 0x0e,
+        mm_jalrs16_op = 0x0f,
+        mm_jraddiusp_op = 0x18,
 };
 
 /*
diff --git a/arch/mips/include/uapi/asm/msgbuf.h b/arch/mips/include/uapi/asm/msgbuf.h
index 0d6c7f14de31..df849e87d9ae 100644
--- a/arch/mips/include/uapi/asm/msgbuf.h
+++ b/arch/mips/include/uapi/asm/msgbuf.h
@@ -14,25 +14,25 @@
 
 struct msqid64_ds {
         struct ipc64_perm msg_perm;
-#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
+#if !defined(__mips64) && defined(__MIPSEB__)
         unsigned long   __unused1;
 #endif
         __kernel_time_t msg_stime;      /* last msgsnd time */
-#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
+#if !defined(__mips64) && defined(__MIPSEL__)
         unsigned long   __unused1;
 #endif
-#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
+#if !defined(__mips64) && defined(__MIPSEB__)
         unsigned long   __unused2;
 #endif
         __kernel_time_t msg_rtime;      /* last msgrcv time */
-#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
+#if !defined(__mips64) && defined(__MIPSEL__)
         unsigned long   __unused2;
 #endif
-#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
+#if !defined(__mips64) && defined(__MIPSEB__)
         unsigned long   __unused3;
 #endif
         __kernel_time_t msg_ctime;      /* last change time */
-#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
+#if !defined(__mips64) && defined(__MIPSEL__)
         unsigned long   __unused3;
 #endif
         unsigned long  msg_cbytes;      /* current number of bytes on queue */
diff --git a/arch/mips/include/uapi/asm/resource.h b/arch/mips/include/uapi/asm/resource.h
index 87cb3085269c..b26439d4ab0b 100644
--- a/arch/mips/include/uapi/asm/resource.h
+++ b/arch/mips/include/uapi/asm/resource.h
@@ -26,7 +26,7 @@
  * but we keep the old value on MIPS32,
  * for compatibility:
  */
-#ifdef CONFIG_32BIT
+#ifndef __mips64
 # define RLIM_INFINITY          0x7fffffffUL
 #endif
 
diff --git a/arch/mips/include/uapi/asm/siginfo.h b/arch/mips/include/uapi/asm/siginfo.h
index 6a8714193fb9..b7a23064841f 100644
--- a/arch/mips/include/uapi/asm/siginfo.h
+++ b/arch/mips/include/uapi/asm/siginfo.h
@@ -25,10 +25,10 @@ struct siginfo;
 /*
  * Careful to keep union _sifields from shifting ...
  */
-#ifdef CONFIG_32BIT
+#if __SIZEOF_LONG__ == 4
 #define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
 #endif
-#ifdef CONFIG_64BIT
+#if __SIZEOF_LONG__ == 8
 #define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
 #endif
 
diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h
index 3b211507be7f..61c01f054d1b 100644
--- a/arch/mips/include/uapi/asm/socket.h
+++ b/arch/mips/include/uapi/asm/socket.h
@@ -92,4 +92,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* _UAPI_ASM_SOCKET_H */
diff --git a/arch/mips/include/uapi/asm/swab.h b/arch/mips/include/uapi/asm/swab.h
index 97c2f81b4b43..ac9a8f9cd1fb 100644
--- a/arch/mips/include/uapi/asm/swab.h
+++ b/arch/mips/include/uapi/asm/swab.h
@@ -13,7 +13,7 @@
 
 #define __SWAB_64_THRU_32__
 
-#ifdef CONFIG_CPU_MIPSR2
+#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
 
 static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
 {
@@ -39,10 +39,10 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
 #define __arch_swab32 __arch_swab32
 
 /*
- * Having already checked for CONFIG_CPU_MIPSR2, enable the
- * optimized version for 64-bit kernel on r2 CPUs.
+ * Having already checked for MIPS R2, enable the optimized version for
+ * 64-bit kernel on r2 CPUs.
  */
-#ifdef CONFIG_64BIT
+#ifdef __mips64
 static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
 {
         __asm__(
@@ -54,6 +54,6 @@ static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
         return x;
 }
 #define __arch_swab64 __arch_swab64
-#endif /* CONFIG_64BIT */
-#endif /* CONFIG_CPU_MIPSR2 */
+#endif /* __mips64 */
+#endif /* MIPS R2 or newer  */
 #endif /* _ASM_SWAB_H */
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
index 63bad0e491d0..28e5535dfa9e 100644
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y += prom.o irq.o time.o reset.o setup.o dma.o \
+obj-y += prom.o irq.o time.o reset.o setup.o \
         gpio.o clock.o platform.o timer.o serial.o
 
 obj-$(CONFIG_DEBUG_FS) += clock-debugfs.o
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index be2b3deeef1d..8a5ec0eedeb0 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -438,6 +438,7 @@ static struct platform_device *jz_platform_devices[] __initdata = {
         &jz4740_rtc_device,
         &jz4740_adc_device,
         &jz4740_pwm_device,
+        &jz4740_dma_device,
         &qi_lb60_gpio_keys,
         &qi_lb60_pwm_beeper,
         &qi_lb60_charger_device,
diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c
index 484d38a0864f..1b5f55426cad 100644
--- a/arch/mips/jz4740/clock.c
+++ b/arch/mips/jz4740/clock.c
@@ -687,7 +687,7 @@ static struct clk jz4740_clock_simple_clks[] = {
         [3] = {
                 .name = "dma",
                 .parent = &jz_clk_high_speed_peripheral.clk,
-                .gate_bit = JZ_CLOCK_GATE_UART0,
+                .gate_bit = JZ_CLOCK_GATE_DMAC,
                 .ops = &jz_clk_simple_ops,
         },
         [4] = {
diff --git a/arch/mips/jz4740/dma.c b/arch/mips/jz4740/dma.c
deleted file mode 100644
index 317ec6fffb12..000000000000
--- a/arch/mips/jz4740/dma.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/*
- *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- *  JZ4740 SoC DMA support
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under  the terms of the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the License, or (at your
- *  option) any later version.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-
-#include <linux/dma-mapping.h>
-#include <asm/mach-jz4740/dma.h>
-#include <asm/mach-jz4740/base.h>
-
-#define JZ_REG_DMA_SRC_ADDR(x)          (0x00 + (x) * 0x20)
-#define JZ_REG_DMA_DST_ADDR(x)          (0x04 + (x) * 0x20)
-#define JZ_REG_DMA_TRANSFER_COUNT(x)    (0x08 + (x) * 0x20)
-#define JZ_REG_DMA_REQ_TYPE(x)          (0x0C + (x) * 0x20)
-#define JZ_REG_DMA_STATUS_CTRL(x)       (0x10 + (x) * 0x20)
-#define JZ_REG_DMA_CMD(x)               (0x14 + (x) * 0x20)
-#define JZ_REG_DMA_DESC_ADDR(x)         (0x18 + (x) * 0x20)
-
-#define JZ_REG_DMA_CTRL                 0x300
-#define JZ_REG_DMA_IRQ                  0x304
-#define JZ_REG_DMA_DOORBELL             0x308
-#define JZ_REG_DMA_DOORBELL_SET         0x30C
-
-#define JZ_DMA_STATUS_CTRL_NO_DESC              BIT(31)
-#define JZ_DMA_STATUS_CTRL_DESC_INV             BIT(6)
-#define JZ_DMA_STATUS_CTRL_ADDR_ERR             BIT(4)
-#define JZ_DMA_STATUS_CTRL_TRANSFER_DONE        BIT(3)
-#define JZ_DMA_STATUS_CTRL_HALT                 BIT(2)
-#define JZ_DMA_STATUS_CTRL_COUNT_TERMINATE      BIT(1)
-#define JZ_DMA_STATUS_CTRL_ENABLE               BIT(0)
-
-#define JZ_DMA_CMD_SRC_INC                      BIT(23)
-#define JZ_DMA_CMD_DST_INC                      BIT(22)
-#define JZ_DMA_CMD_RDIL_MASK                    (0xf << 16)
-#define JZ_DMA_CMD_SRC_WIDTH_MASK               (0x3 << 14)
-#define JZ_DMA_CMD_DST_WIDTH_MASK               (0x3 << 12)
-#define JZ_DMA_CMD_INTERVAL_LENGTH_MASK         (0x7 << 8)
-#define JZ_DMA_CMD_BLOCK_MODE                   BIT(7)
-#define JZ_DMA_CMD_DESC_VALID                   BIT(4)
-#define JZ_DMA_CMD_DESC_VALID_MODE              BIT(3)
-#define JZ_DMA_CMD_VALID_IRQ_ENABLE             BIT(2)
-#define JZ_DMA_CMD_TRANSFER_IRQ_ENABLE          BIT(1)
-#define JZ_DMA_CMD_LINK_ENABLE                  BIT(0)
-
-#define JZ_DMA_CMD_FLAGS_OFFSET 22
-#define JZ_DMA_CMD_RDIL_OFFSET 16
-#define JZ_DMA_CMD_SRC_WIDTH_OFFSET 14
-#define JZ_DMA_CMD_DST_WIDTH_OFFSET 12
-#define JZ_DMA_CMD_TRANSFER_SIZE_OFFSET 8
-#define JZ_DMA_CMD_MODE_OFFSET 7
-
-#define JZ_DMA_CTRL_PRIORITY_MASK       (0x3 << 8)
-#define JZ_DMA_CTRL_HALT                BIT(3)
-#define JZ_DMA_CTRL_ADDRESS_ERROR       BIT(2)
-#define JZ_DMA_CTRL_ENABLE              BIT(0)
-
-
-static void __iomem *jz4740_dma_base;
-static spinlock_t jz4740_dma_lock;
-
-static inline uint32_t jz4740_dma_read(size_t reg)
-{
-        return readl(jz4740_dma_base + reg);
-}
-
-static inline void jz4740_dma_write(size_t reg, uint32_t val)
-{
-        writel(val, jz4740_dma_base + reg);
-}
-
-static inline void jz4740_dma_write_mask(size_t reg, uint32_t val, uint32_t mask)
-{
-        uint32_t val2;
-        val2 = jz4740_dma_read(reg);
-        val2 &= ~mask;
-        val2 |= val;
-        jz4740_dma_write(reg, val2);
-}
-
-struct jz4740_dma_chan {
-        unsigned int id;
-        void *dev;
-        const char *name;
-
-        enum jz4740_dma_flags flags;
-        uint32_t transfer_shift;
-
-        jz4740_dma_complete_callback_t complete_cb;
-
-        unsigned used:1;
-};
-
-#define JZ4740_DMA_CHANNEL(_id) { .id = _id }
-
-struct jz4740_dma_chan jz4740_dma_channels[] = {
-        JZ4740_DMA_CHANNEL(0),
-        JZ4740_DMA_CHANNEL(1),
-        JZ4740_DMA_CHANNEL(2),
-        JZ4740_DMA_CHANNEL(3),
-        JZ4740_DMA_CHANNEL(4),
-        JZ4740_DMA_CHANNEL(5),
-};
-
-struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name)
-{
-        unsigned int i;
-        struct jz4740_dma_chan *dma = NULL;
-
-        spin_lock(&jz4740_dma_lock);
-
-        for (i = 0; i < ARRAY_SIZE(jz4740_dma_channels); ++i) {
-                if (!jz4740_dma_channels[i].used) {
-                        dma = &jz4740_dma_channels[i];
-                        dma->used = 1;
-                        break;
-                }
-        }
-
-        spin_unlock(&jz4740_dma_lock);
-
-        if (!dma)
-                return NULL;
-
-        dma->dev = dev;
-        dma->name = name;
-
-        return dma;
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_request);
-
-void jz4740_dma_configure(struct jz4740_dma_chan *dma,
-        const struct jz4740_dma_config *config)
-{
-        uint32_t cmd;
-
-        switch (config->transfer_size) {
-        case JZ4740_DMA_TRANSFER_SIZE_2BYTE:
-                dma->transfer_shift = 1;
-                break;
-        case JZ4740_DMA_TRANSFER_SIZE_4BYTE:
-                dma->transfer_shift = 2;
-                break;
-        case JZ4740_DMA_TRANSFER_SIZE_16BYTE:
-                dma->transfer_shift = 4;
-                break;
-        case JZ4740_DMA_TRANSFER_SIZE_32BYTE:
-                dma->transfer_shift = 5;
-                break;
-        default:
-                dma->transfer_shift = 0;
-                break;
-        }
-
-        cmd = config->flags << JZ_DMA_CMD_FLAGS_OFFSET;
-        cmd |= config->src_width << JZ_DMA_CMD_SRC_WIDTH_OFFSET;
-        cmd |= config->dst_width << JZ_DMA_CMD_DST_WIDTH_OFFSET;
-        cmd |= config->transfer_size << JZ_DMA_CMD_TRANSFER_SIZE_OFFSET;
-        cmd |= config->mode << JZ_DMA_CMD_MODE_OFFSET;
-        cmd |= JZ_DMA_CMD_TRANSFER_IRQ_ENABLE;
-
-        jz4740_dma_write(JZ_REG_DMA_CMD(dma->id), cmd);
-        jz4740_dma_write(JZ_REG_DMA_STATUS_CTRL(dma->id), 0);
-        jz4740_dma_write(JZ_REG_DMA_REQ_TYPE(dma->id), config->request_type);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_configure);
-
-void jz4740_dma_set_src_addr(struct jz4740_dma_chan *dma, dma_addr_t src)
-{
-        jz4740_dma_write(JZ_REG_DMA_SRC_ADDR(dma->id), src);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_set_src_addr);
-
-void jz4740_dma_set_dst_addr(struct jz4740_dma_chan *dma, dma_addr_t dst)
-{
-        jz4740_dma_write(JZ_REG_DMA_DST_ADDR(dma->id), dst);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_set_dst_addr);
-
-void jz4740_dma_set_transfer_count(struct jz4740_dma_chan *dma, uint32_t count)
-{
-        count >>= dma->transfer_shift;
-        jz4740_dma_write(JZ_REG_DMA_TRANSFER_COUNT(dma->id), count);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_set_transfer_count);
-
-void jz4740_dma_set_complete_cb(struct jz4740_dma_chan *dma,
-        jz4740_dma_complete_callback_t cb)
-{
-        dma->complete_cb = cb;
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_set_complete_cb);
-
-void jz4740_dma_free(struct jz4740_dma_chan *dma)
-{
-        dma->dev = NULL;
-        dma->complete_cb = NULL;
-        dma->used = 0;
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_free);
-
-void jz4740_dma_enable(struct jz4740_dma_chan *dma)
-{
-        jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id),
-                        JZ_DMA_STATUS_CTRL_NO_DESC | JZ_DMA_STATUS_CTRL_ENABLE,
-                        JZ_DMA_STATUS_CTRL_HALT | JZ_DMA_STATUS_CTRL_NO_DESC |
-                        JZ_DMA_STATUS_CTRL_ENABLE);
-
-        jz4740_dma_write_mask(JZ_REG_DMA_CTRL,
-                        JZ_DMA_CTRL_ENABLE,
-                        JZ_DMA_CTRL_HALT | JZ_DMA_CTRL_ENABLE);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_enable);
-
-void jz4740_dma_disable(struct jz4740_dma_chan *dma)
-{
-        jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id), 0,
-                        JZ_DMA_STATUS_CTRL_ENABLE);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_disable);
-
-uint32_t jz4740_dma_get_residue(const struct jz4740_dma_chan *dma)
-{
-        uint32_t residue;
-        residue = jz4740_dma_read(JZ_REG_DMA_TRANSFER_COUNT(dma->id));
-        return residue << dma->transfer_shift;
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_get_residue);
-
-static void jz4740_dma_chan_irq(struct jz4740_dma_chan *dma)
-{
-        (void) jz4740_dma_read(JZ_REG_DMA_STATUS_CTRL(dma->id));
-
-        jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id), 0,
-                JZ_DMA_STATUS_CTRL_ENABLE | JZ_DMA_STATUS_CTRL_TRANSFER_DONE);
-
-        if (dma->complete_cb)
-                dma->complete_cb(dma, 0, dma->dev);
-}
-
-static irqreturn_t jz4740_dma_irq(int irq, void *dev_id)
-{
-        uint32_t irq_status;
-        unsigned int i;
-
-        irq_status = readl(jz4740_dma_base + JZ_REG_DMA_IRQ);
-
-        for (i = 0; i < 6; ++i) {
-                if (irq_status & (1 << i))
-                        jz4740_dma_chan_irq(&jz4740_dma_channels[i]);
-        }
-
-        return IRQ_HANDLED;
-}
-
-static int jz4740_dma_init(void)
-{
-        unsigned int ret;
-
-        jz4740_dma_base = ioremap(JZ4740_DMAC_BASE_ADDR, 0x400);
-
-        if (!jz4740_dma_base)
-                return -EBUSY;
-
-        spin_lock_init(&jz4740_dma_lock);
-
-        ret = request_irq(JZ4740_IRQ_DMAC, jz4740_dma_irq, 0, "DMA", NULL);
-
-        if (ret)
-                printk(KERN_ERR "JZ4740 DMA: Failed to request irq: %d\n", ret);
-
-        return ret;
-}
-arch_initcall(jz4740_dma_init);
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index e9348fd26a35..df65677f3d0b 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -329,3 +329,24 @@ struct platform_device jz4740_pwm_device = {
         .name = "jz4740-pwm",
         .id   = -1,
 };
+
+/* DMA */
+static struct resource jz4740_dma_resources[] = {
+        {
+                .start  = JZ4740_DMAC_BASE_ADDR,
+                .end    = JZ4740_DMAC_BASE_ADDR + 0x400 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = JZ4740_IRQ_DMAC,
+                .end    = JZ4740_IRQ_DMAC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device jz4740_dma_device = {
+        .name           = "jz4740-dma",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(jz4740_dma_resources),
+        .resource       = jz4740_dma_resources,
+};
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 0845091ba480..0c2e853c3db4 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -82,6 +82,9 @@ void output_task_defines(void)
         OFFSET(TASK_FLAGS, task_struct, flags);
         OFFSET(TASK_MM, task_struct, mm);
         OFFSET(TASK_PID, task_struct, pid);
+#if defined(CONFIG_CC_STACKPROTECTOR)
+        OFFSET(TASK_STACK_CANARY, task_struct, stack_canary);
+#endif
         DEFINE(TASK_STRUCT_SIZE, sizeof(struct task_struct));
         BLANK();
 }
diff --git a/arch/mips/kernel/bmips_vec.S b/arch/mips/kernel/bmips_vec.S
index 64c4fd62cf08..f739aedcb509 100644
--- a/arch/mips/kernel/bmips_vec.S
+++ b/arch/mips/kernel/bmips_vec.S
@@ -28,8 +28,6 @@
         .set    mips0
         .endm
 
-        __CPUINIT
-
 /***********************************************************************
  * Alternate CPU1 startup vector for BMIPS4350
  *
@@ -216,8 +214,6 @@ END(bmips_smp_int_vec)
  * Certain CPUs support extending kseg0 to 1024MB.
  ***********************************************************************/
 
-        __CPUINIT
-
 LEAF(bmips_enable_xks01)
 
 #if defined(CONFIG_XKS01)
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 46c2ad0703a0..4d78bf445a9c 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -467,5 +467,4 @@ unaligned:
         printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
         force_sig(SIGBUS, current);
         return -EFAULT;
-
 }
diff --git a/arch/mips/kernel/cevt-bcm1480.c b/arch/mips/kernel/cevt-bcm1480.c
index 15f618b40cf6..7976457184b1 100644
--- a/arch/mips/kernel/cevt-bcm1480.c
+++ b/arch/mips/kernel/cevt-bcm1480.c
@@ -109,7 +109,7 @@ static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent);
 static DEFINE_PER_CPU(struct irqaction, sibyte_hpt_irqaction);
 static DEFINE_PER_CPU(char [18], sibyte_hpt_name);
 
-void __cpuinit sb1480_clockevent_init(void)
+void sb1480_clockevent_init(void)
 {
         unsigned int cpu = smp_processor_id();
         unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu;
diff --git a/arch/mips/kernel/cevt-gic.c b/arch/mips/kernel/cevt-gic.c
index 730eaf92c018..594cbbf16d62 100644
--- a/arch/mips/kernel/cevt-gic.c
+++ b/arch/mips/kernel/cevt-gic.c
@@ -59,7 +59,7 @@ void gic_event_handler(struct clock_event_device *dev)
 {
 }
 
-int __cpuinit gic_clockevent_init(void)
+int gic_clockevent_init(void)
 {
         unsigned int cpu = smp_processor_id();
         struct clock_event_device *cd;
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 02033eaf8825..50d3f5a8d6bb 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -171,7 +171,7 @@ int c0_compare_int_usable(void)
 }
 
 #ifndef CONFIG_MIPS_MT_SMTC
-int __cpuinit r4k_clockevent_init(void)
+int r4k_clockevent_init(void)
 {
         unsigned int cpu = smp_processor_id();
         struct clock_event_device *cd;
diff --git a/arch/mips/kernel/cevt-sb1250.c b/arch/mips/kernel/cevt-sb1250.c
index 200f2778bf36..5ea6d6b1de15 100644
--- a/arch/mips/kernel/cevt-sb1250.c
+++ b/arch/mips/kernel/cevt-sb1250.c
@@ -107,7 +107,7 @@ static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent);
 static DEFINE_PER_CPU(struct irqaction, sibyte_hpt_irqaction);
 static DEFINE_PER_CPU(char [18], sibyte_hpt_name);
 
-void __cpuinit sb1250_clockevent_init(void)
+void sb1250_clockevent_init(void)
 {
         unsigned int cpu = smp_processor_id();
         unsigned int irq = K_INT_TIMER_0 + cpu;
diff --git a/arch/mips/kernel/cevt-smtc.c b/arch/mips/kernel/cevt-smtc.c
index 9de5ed7ef1a3..b6cf0a60d896 100644
--- a/arch/mips/kernel/cevt-smtc.c
+++ b/arch/mips/kernel/cevt-smtc.c
@@ -248,7 +248,7 @@ irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
 }
 
 
-int __cpuinit smtc_clockevent_init(void)
+int smtc_clockevent_init(void)
 {
         uint64_t mips_freq = mips_hpt_frequency;
         unsigned int cpu = smp_processor_id();
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index de3c25ffd9f9..2d80b5f1aeae 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -6,6 +6,7 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#include <linux/context_tracking.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/ptrace.h>
@@ -167,12 +168,16 @@ static inline void check_mult_sh(void)
         panic(bug64hit, !R4000_WAR ? r4kwar : nowar);
 }
 
-static volatile int daddi_ov __cpuinitdata;
+static volatile int daddi_ov;
 
 asmlinkage void __init do_daddi_ov(struct pt_regs *regs)
 {
+        enum ctx_state prev_state;
+
+        prev_state = exception_enter();
         daddi_ov = 1;
         regs->cp0_epc += 4;
+        exception_exit(prev_state);
 }
 
 static inline void check_daddi(void)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c6568bf4b1b0..4c6167a17875 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -27,7 +27,7 @@
 #include <asm/spram.h>
 #include <asm/uaccess.h>
 
-static int __cpuinitdata mips_fpu_disabled;
+static int mips_fpu_disabled;
 
 static int __init fpu_disable(char *s)
 {
@@ -39,7 +39,7 @@ static int __init fpu_disable(char *s)
 
 __setup("nofpu", fpu_disable);
 
-int __cpuinitdata mips_dsp_disabled;
+int mips_dsp_disabled;
 
 static int __init dsp_disable(char *s)
 {
@@ -134,7 +134,7 @@ static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
 #endif
 }
 
-static void __cpuinit set_isa(struct cpuinfo_mips *c, unsigned int isa)
+static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
 {
         switch (isa) {
         case MIPS_CPU_ISA_M64R2:
@@ -146,8 +146,7 @@ static void __cpuinit set_isa(struct cpuinfo_mips *c, unsigned int isa)
         case MIPS_CPU_ISA_IV:
                 c->isa_level |= MIPS_CPU_ISA_IV;
         case MIPS_CPU_ISA_III:
-                c->isa_level |= MIPS_CPU_ISA_I | MIPS_CPU_ISA_II |
-                                MIPS_CPU_ISA_III;
+                c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III;
                 break;
 
         case MIPS_CPU_ISA_M32R2:
@@ -156,13 +155,11 @@ static void __cpuinit set_isa(struct cpuinfo_mips *c, unsigned int isa)
                 c->isa_level |= MIPS_CPU_ISA_M32R1;
         case MIPS_CPU_ISA_II:
                 c->isa_level |= MIPS_CPU_ISA_II;
-        case MIPS_CPU_ISA_I:
-                c->isa_level |= MIPS_CPU_ISA_I;
                 break;
         }
 }
 
-static char unknown_isa[] __cpuinitdata = KERN_ERR \
+static char unknown_isa[] = KERN_ERR \
         "Unsupported ISA type, c0.config0: %d.";
 
 static inline unsigned int decode_config0(struct cpuinfo_mips *c)
@@ -272,9 +269,6 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
                 c->options |= MIPS_CPU_ULRI;
         if (config3 & MIPS_CONF3_ISA)
                 c->options |= MIPS_CPU_MICROMIPS;
-#ifdef CONFIG_CPU_MICROMIPS
-        write_c0_config3(read_c0_config3() | MIPS_CONF3_ISA_OE);
-#endif
         if (config3 & MIPS_CONF3_VZ)
                 c->ases |= MIPS_ASE_VZ;
 
@@ -296,7 +290,7 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
         return config4 & MIPS_CONF_M;
 }
 
-static void __cpuinit decode_configs(struct cpuinfo_mips *c)
+static void decode_configs(struct cpuinfo_mips *c)
 {
         int ok;
 
@@ -332,7 +326,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
         case PRID_IMP_R2000:
                 c->cputype = CPU_R2000;
                 __cpu_name[cpu] = "R2000";
-                set_isa(c, MIPS_CPU_ISA_I);
                 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
                              MIPS_CPU_NOFPUEX;
                 if (__cpu_has_fpu())
@@ -352,7 +345,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
                         c->cputype = CPU_R3000;
                         __cpu_name[cpu] = "R3000";
                 }
-                set_isa(c, MIPS_CPU_ISA_I);
                 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
                              MIPS_CPU_NOFPUEX;
                 if (__cpu_has_fpu())
@@ -455,7 +447,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
                 break;
         #endif
         case PRID_IMP_TX39:
-                set_isa(c, MIPS_CPU_ISA_I);
                 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE;
 
                 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) {
@@ -959,6 +950,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
                 set_isa(c, MIPS_CPU_ISA_M64R1);
                 c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1;
         }
+        c->kscratch_mask = 0xf;
 }
 
 #ifdef CONFIG_64BIT
@@ -970,7 +962,7 @@ EXPORT_SYMBOL(__ua_limit);
 const char *__cpu_name[NR_CPUS];
 const char *__elf_platform;
 
-__cpuinit void cpu_probe(void)
+void cpu_probe(void)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
         unsigned int cpu = smp_processor_id();
@@ -1055,7 +1047,7 @@ __cpuinit void cpu_probe(void)
 #endif
 }
 
-__cpuinit void cpu_report(void)
+void cpu_report(void)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
 
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index c61cdaed2b1d..7b6a5b3e3acf 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -28,45 +28,6 @@
 #include <kernel-entry-init.h>
 
         /*
-         * inputs are the text nasid in t1, data nasid in t2.
-         */
-        .macro MAPPED_KERNEL_SETUP_TLB
-#ifdef CONFIG_MAPPED_KERNEL
-        /*
-         * This needs to read the nasid - assume 0 for now.
-         * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
-         * 0+DVG in tlblo_1.
-         */
-        dli     t0, 0xffffffffc0000000
-        dmtc0   t0, CP0_ENTRYHI
-        li      t0, 0x1c000             # Offset of text into node memory
-        dsll    t1, NASID_SHFT          # Shift text nasid into place
-        dsll    t2, NASID_SHFT          # Same for data nasid
-        or      t1, t1, t0              # Physical load address of kernel text
-        or      t2, t2, t0              # Physical load address of kernel data
-        dsrl    t1, 12                  # 4K pfn
-        dsrl    t2, 12                  # 4K pfn
-        dsll    t1, 6                   # Get pfn into place
-        dsll    t2, 6                   # Get pfn into place
-        li      t0, ((_PAGE_GLOBAL|_PAGE_VALID| _CACHE_CACHABLE_COW) >> 6)
-        or      t0, t0, t1
-        mtc0    t0, CP0_ENTRYLO0        # physaddr, VG, cach exlwr
-        li      t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
-        or      t0, t0, t2
-        mtc0    t0, CP0_ENTRYLO1        # physaddr, DVG, cach exlwr
-        li      t0, 0x1ffe000           # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
-        mtc0    t0, CP0_PAGEMASK
-        li      t0, 0                   # KMAP_INX
-        mtc0    t0, CP0_INDEX
-        li      t0, 1
-        mtc0    t0, CP0_WIRED
-        tlbwi
-#else
-        mtc0    zero, CP0_WIRED
-#endif
-        .endm
-
-        /*
          * For the moment disable interrupts, mark the kernel mode and
          * set ST0_KX so that the CPU does not spit fire when using
          * 64-bit addresses.  A full initialization of the CPU's status
@@ -197,8 +158,6 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
         j               start_kernel
         END(kernel_entry)
 
-        __CPUINIT
-
 #ifdef CONFIG_SMP
 /*
  * SMP slave cpus entry point.  Board specific code for bootstrap calls this
@@ -227,5 +186,3 @@ NESTED(smp_bootstrap, 16, sp)
         j       start_secondary
         END(smp_bootstrap)
 #endif /* CONFIG_SMP */
-
-        __FINIT
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index c01b307317a9..5b5ddb231f26 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -219,16 +219,15 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
 
         /* Assumption : cpumask refers to a single CPU */
         spin_lock_irqsave(&gic_lock, flags);
-        for (;;) {
-                /* Re-route this IRQ */
-                GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp));
 
-                /* Update the pcpu_masks */
-                for (i = 0; i < NR_CPUS; i++)
-                        clear_bit(irq, pcpu_masks[i].pcpu_mask);
-                set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
+        /* Re-route this IRQ */
+        GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp));
+
+        /* Update the pcpu_masks */
+        for (i = 0; i < NR_CPUS; i++)
+                clear_bit(irq, pcpu_masks[i].pcpu_mask);
+        set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
 
-        }
         cpumask_copy(d->affinity, cpumask);
         spin_unlock_irqrestore(&gic_lock, flags);
 
diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S
index 33d067148e61..a03e93c4a946 100644
--- a/arch/mips/kernel/mcount.S
+++ b/arch/mips/kernel/mcount.S
@@ -168,15 +168,11 @@ NESTED(ftrace_graph_caller, PT_SIZE, ra)
 #endif
 
         /* arg3: Get frame pointer of current stack */
-#ifdef CONFIG_FRAME_POINTER
-        move    a2, fp
-#else /* ! CONFIG_FRAME_POINTER */
 #ifdef CONFIG_64BIT
         PTR_LA  a2, PT_SIZE(sp)
 #else
         PTR_LA  a2, (PT_SIZE+8)(sp)
 #endif
-#endif
 
         jal     prepare_ftrace_return
          nop
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/kernel/octeon_switch.S
index 0e23343eb0a9..4204d76af854 100644
--- a/arch/mips/kernel/octeon_switch.S
+++ b/arch/mips/kernel/octeon_switch.S
@@ -40,33 +40,6 @@
         cpu_save_nonscratch a0
         LONG_S  ra, THREAD_REG31(a0)
 
-        /* check if we need to save COP2 registers */
-        PTR_L   t2, TASK_THREAD_INFO(a0)
-        LONG_L  t0, ST_OFF(t2)
-        bbit0   t0, 30, 1f
-
-        /* Disable COP2 in the stored process state */
-        li      t1, ST0_CU2
-        xor     t0, t1
-        LONG_S  t0, ST_OFF(t2)
-
-        /* Enable COP2 so we can save it */
-        mfc0    t0, CP0_STATUS
-        or      t0, t1
-        mtc0    t0, CP0_STATUS
-
-        /* Save COP2 */
-        daddu   a0, THREAD_CP2
-        jal octeon_cop2_save
-        dsubu   a0, THREAD_CP2
-
-        /* Disable COP2 now that we are done */
-        mfc0    t0, CP0_STATUS
-        li      t1, ST0_CU2
-        xor     t0, t1
-        mtc0    t0, CP0_STATUS
-
-1:
 #if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
         /* Check if we need to store CVMSEG state */
         mfc0    t0, $11,7       /* CvmMemCtl */
@@ -98,6 +71,13 @@
         mtc0    t0, $11,7       /* CvmMemCtl */
 #endif
 3:
+
+#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
+        PTR_L   t8, __stack_chk_guard
+        LONG_L  t9, TASK_STACK_CANARY(a1)
+        LONG_S  t9, 0(t8)
+#endif
+
         /*
          * The order of restoring the registers takes care of the race
          * updating $28, $29 and kernelsp without disabling ints.
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index acb34373679e..8c58d8a84bf3 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -66,9 +66,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 seq_printf(m, "]\n");
         }
         if (cpu_has_mips_r) {
-                seq_printf(m, "isa\t\t\t:");
-                if (cpu_has_mips_1)
-                        seq_printf(m, "%s", " mips1");
+                seq_printf(m, "isa\t\t\t: mips1");
                 if (cpu_has_mips_2)
                         seq_printf(m, "%s", " mips2");
                 if (cpu_has_mips_3)
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index c6a041d9d05d..ddc76103e78c 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -201,9 +201,12 @@ int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
         return 1;
 }
 
-/*
- *
- */
+#ifdef CONFIG_CC_STACKPROTECTOR
+#include <linux/stackprotector.h>
+unsigned long __stack_chk_guard __read_mostly;
+EXPORT_SYMBOL(__stack_chk_guard);
+#endif
+
 struct mips_frame_info {
         void            *func;
         unsigned long   func_size;
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c
index 5712bb532245..7e954042f252 100644
--- a/arch/mips/kernel/prom.c
+++ b/arch/mips/kernel/prom.c
@@ -30,7 +30,7 @@ __init void mips_set_machine_name(const char *name)
         if (name == NULL)
                 return;
 
-        strncpy(mips_machine_name, name, sizeof(mips_machine_name));
+        strlcpy(mips_machine_name, name, sizeof(mips_machine_name));
         pr_info("MIPS: machine is %s\n", mips_get_machine_name());
 }
 
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 9c6299c733a3..8ae1ebef8b71 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -15,6 +15,7 @@
  * binaries.
  */
 #include <linux/compiler.h>
+#include <linux/context_tracking.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
 #include <linux/mm.h>
@@ -534,6 +535,8 @@ static inline int audit_arch(void)
  */
 asmlinkage void syscall_trace_enter(struct pt_regs *regs)
 {
+        user_exit();
+
         /* do the secure computing check first */
         secure_computing_strict(regs->regs[2]);
 
@@ -570,6 +573,13 @@ out:
  */
 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
 {
+        /*
+         * We may come here right after calling schedule_user()
+         * or do_notify_resume(), in which case we can be in RCU
+         * user mode.
+         */
+        user_exit();
+
         audit_syscall_exit(regs);
 
         if (!(current->ptrace & PT_PTRACED))
@@ -592,4 +602,6 @@ asmlinkage void syscall_trace_leave(struct pt_regs *regs)
                 send_sig(current->exit_code, current, 1);
                 current->exit_code = 0;
         }
+
+        user_enter();
 }
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 5266c6ee2b35..38af83f84c4a 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -65,6 +65,13 @@ LEAF(resume)
         fpu_save_single a0, t0                  # clobbers t0
 
 1:
+
+#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
+        PTR_L   t8, __stack_chk_guard
+        LONG_L  t9, TASK_STACK_CANARY(a1)
+        LONG_S  t9, 0(t8)
+#endif
+
         /*
          * The order of restoring the registers takes care of the race
          * updating $28, $29 and kernelsp without disabling ints.
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 5e51219990aa..921238a6bd26 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -68,6 +68,12 @@
                                                 # clobbers t1
 1:
 
+#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
+        PTR_L   t8, __stack_chk_guard
+        LONG_L  t9, TASK_STACK_CANARY(a1)
+        LONG_S  t9, 0(t8)
+#endif
+
         /*
          * The order of restoring the registers takes care of the race
          * updating $28, $29 and kernelsp without disabling ints.
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index 6fa198db8999..d763f11e35e2 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -437,7 +437,6 @@ static ssize_t file_write(struct file *file, const char __user * buffer,
                           size_t count, loff_t * ppos)
 {
         int minor = iminor(file_inode(file));
-        struct rtlx_channel *rt = &rtlx->channel[minor];
 
         /* any space left... */
         if (!rtlx_write_poll(minor)) {
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index e9127ec612ef..e774bb1088b5 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -52,7 +52,7 @@ NESTED(handle_sys, PT_SIZE, sp)
 
 stack_done:
         lw      t0, TI_FLAGS($28)       # syscall tracing enabled?
-        li      t1, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
+        li      t1, _TIF_WORK_SYSCALL_ENTRY
         and     t0, t1
         bnez    t0, syscall_trace_entry # -> yes
 
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 97a5909a61cf..be6627ead619 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -54,7 +54,7 @@ NESTED(handle_sys64, PT_SIZE, sp)
 
         sd      a3, PT_R26(sp)          # save a3 for syscall restarting
 
-        li      t1, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
+        li      t1, _TIF_WORK_SYSCALL_ENTRY
         LONG_L  t0, TI_FLAGS($28)       # syscall tracing enabled?
         and     t0, t1, t0
         bnez    t0, syscall_trace_entry
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index edcb6594e7b5..cab150789c8d 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -47,7 +47,7 @@ NESTED(handle_sysn32, PT_SIZE, sp)
 
         sd      a3, PT_R26(sp)          # save a3 for syscall restarting
 
-        li      t1, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
+        li      t1, _TIF_WORK_SYSCALL_ENTRY
         LONG_L  t0, TI_FLAGS($28)       # syscall tracing enabled?
         and     t0, t1, t0
         bnez    t0, n32_syscall_trace_entry
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 74f485d3c0ef..37605dc8eef7 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -81,7 +81,7 @@ NESTED(handle_sys, PT_SIZE, sp)
         PTR     4b, bad_stack
         .previous
 
-        li      t1, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
+        li      t1, _TIF_WORK_SYSCALL_ENTRY
         LONG_L  t0, TI_FLAGS($28)       # syscall tracing enabled?
         and     t0, t1, t0
         bnez    t0, trace_a_syscall
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index fd3ef2c2afbc..2f285abc76d5 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -8,6 +8,7 @@
  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  */
 #include <linux/cache.h>
+#include <linux/context_tracking.h>
 #include <linux/irqflags.h>
 #include <linux/sched.h>
 #include <linux/mm.h>
@@ -573,6 +574,8 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused,
 {
         local_irq_enable();
 
+        user_exit();
+
         /* deal with pending signal delivery */
         if (thread_info_flags & _TIF_SIGPENDING)
                 do_signal(regs);
@@ -581,6 +584,8 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused,
                 clear_thread_flag(TIF_NOTIFY_RESUME);
                 tracehook_notify_resume(regs);
         }
+
+        user_enter();
 }
 
 #ifdef CONFIG_SMP
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index 8e393b8443f7..c0bb4d59076a 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -63,7 +63,7 @@ static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id);
 
 static void __init bmips_smp_setup(void)
 {
-        int i;
+        int i, cpu = 1, boot_cpu = 0;
 
 #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
         /* arbitration priority */
@@ -72,13 +72,22 @@ static void __init bmips_smp_setup(void)
         /* NBK and weak order flags */
         set_c0_brcm_config_0(0x30000);
 
+        /* Find out if we are running on TP0 or TP1 */
+        boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
+
         /*
          * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread
          * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
          * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
+         *
+         * If booting from TP1, leave the existing CMT interrupt routing
+         * such that TP0 responds to SW1 and TP1 responds to SW0.
          */
-        change_c0_brcm_cmt_intr(0xf8018000,
-                (0x02 << 27) | (0x03 << 15));
+        if (boot_cpu == 0)
+                change_c0_brcm_cmt_intr(0xf8018000,
+                                        (0x02 << 27) | (0x03 << 15));
+        else
+                change_c0_brcm_cmt_intr(0xf8018000, (0x1d << 27));
 
         /* single core, 2 threads (2 pipelines) */
         max_cpus = 2;
@@ -106,9 +115,15 @@ static void __init bmips_smp_setup(void)
         if (!board_ebase_setup)
                 board_ebase_setup = &bmips_ebase_setup;
 
+        __cpu_number_map[boot_cpu] = 0;
+        __cpu_logical_map[0] = boot_cpu;
+
         for (i = 0; i < max_cpus; i++) {
-                __cpu_number_map[i] = 1;
-                __cpu_logical_map[i] = 1;
+                if (i != boot_cpu) {
+                        __cpu_number_map[i] = cpu;
+                        __cpu_logical_map[cpu] = i;
+                        cpu++;
+                }
                 set_cpu_possible(i, 1);
                 set_cpu_present(i, 1);
         }
@@ -157,7 +172,9 @@ static void bmips_boot_secondary(int cpu, struct task_struct *idle)
                 bmips_send_ipi_single(cpu, 0);
         else {
 #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
-                set_c0_brcm_cmt_ctrl(0x01);
+                /* Reset slave TP1 if booting from TP0 */
+                if (cpu_logical_map(cpu) == 1)
+                        set_c0_brcm_cmt_ctrl(0x01);
 #elif defined(CONFIG_CPU_BMIPS5000)
                 if (cpu & 0x01)
                         write_c0_brcm_action(ACTION_BOOT_THREAD(cpu));
@@ -381,7 +398,7 @@ struct plat_smp_ops bmips_smp_ops = {
  * UP BMIPS systems as well.
  ***********************************************************************/
 
-static void __cpuinit bmips_wr_vec(unsigned long dst, char *start, char *end)
+static void bmips_wr_vec(unsigned long dst, char *start, char *end)
 {
         memcpy((void *)dst, start, end - start);
         dma_cache_wback((unsigned long)start, end - start);
@@ -389,7 +406,7 @@ static void __cpuinit bmips_wr_vec(unsigned long dst, char *start, char *end)
         instruction_hazard();
 }
 
-static inline void __cpuinit bmips_nmi_handler_setup(void)
+static inline void bmips_nmi_handler_setup(void)
 {
         bmips_wr_vec(BMIPS_NMI_RESET_VEC, &bmips_reset_nmi_vec,
                 &bmips_reset_nmi_vec_end);
@@ -397,7 +414,7 @@ static inline void __cpuinit bmips_nmi_handler_setup(void)
                 &bmips_smp_int_vec_end);
 }
 
-void __cpuinit bmips_ebase_setup(void)
+void bmips_ebase_setup(void)
 {
         unsigned long new_ebase = ebase;
         void __iomem __maybe_unused *cbr;
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 3e5164c11cac..57a3f7a2b370 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -149,7 +149,7 @@ static void vsmp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
                 vsmp_send_ipi_single(i, action);
 }
 
-static void __cpuinit vsmp_init_secondary(void)
+static void vsmp_init_secondary(void)
 {
 #ifdef CONFIG_IRQ_GIC
         /* This is Malta specific: IPI,performance and timer interrupts */
@@ -162,7 +162,7 @@ static void __cpuinit vsmp_init_secondary(void)
                                          STATUSF_IP6 | STATUSF_IP7);
 }
 
-static void __cpuinit vsmp_smp_finish(void)
+static void vsmp_smp_finish(void)
 {
         /* CDFIXME: remove this? */
         write_c0_compare(read_c0_count() + (8* mips_hpt_frequency/HZ));
@@ -188,7 +188,7 @@ static void vsmp_cpus_done(void)
  * (unsigned long)idle->thread_info the gp
  * assumes a 1:1 mapping of TC => VPE
  */
-static void __cpuinit vsmp_boot_secondary(int cpu, struct task_struct *idle)
+static void vsmp_boot_secondary(int cpu, struct task_struct *idle)
 {
         struct thread_info *gp = task_thread_info(idle);
         dvpe();
diff --git a/arch/mips/kernel/smp-up.c b/arch/mips/kernel/smp-up.c
index 00500fea2750..7fde3e4d978f 100644
--- a/arch/mips/kernel/smp-up.c
+++ b/arch/mips/kernel/smp-up.c
@@ -28,11 +28,11 @@ static inline void up_send_ipi_mask(const struct cpumask *mask,
  *  After we've done initial boot, this function is called to allow the
  *  board code to clean up state, if needed
  */
-static void __cpuinit up_init_secondary(void)
+static void up_init_secondary(void)
 {
 }
 
-static void __cpuinit up_smp_finish(void)
+static void up_smp_finish(void)
 {
 }
 
@@ -44,7 +44,7 @@ static void up_cpus_done(void)
 /*
  * Firmware CPU startup hook
  */
-static void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle)
+static void up_boot_secondary(int cpu, struct task_struct *idle)
 {
 }
 
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 6e7862ab46cc..5c208ed8f856 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -86,7 +86,7 @@ static inline void set_cpu_sibling_map(int cpu)
 struct plat_smp_ops *mp_ops;
 EXPORT_SYMBOL(mp_ops);
 
-__cpuinit void register_smp_ops(struct plat_smp_ops *ops)
+void register_smp_ops(struct plat_smp_ops *ops)
 {
         if (mp_ops)
                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
@@ -98,7 +98,7 @@ __cpuinit void register_smp_ops(struct plat_smp_ops *ops)
  * First C code run on the secondary CPUs after being started up by
  * the master.
  */
-asmlinkage __cpuinit void start_secondary(void)
+asmlinkage void start_secondary(void)
 {
         unsigned int cpu;
 
@@ -197,7 +197,7 @@ void smp_prepare_boot_cpu(void)
         cpu_set(0, cpu_callin_map);
 }
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         mp_ops->boot_secondary(cpu, tidle);
 
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 75a4fd709841..dfc1b911be04 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -645,7 +645,7 @@ void smtc_prepare_cpus(int cpus)
  * (unsigned long)idle->thread_info the gp
  *
  */
-void __cpuinit smtc_boot_secondary(int cpu, struct task_struct *idle)
+void smtc_boot_secondary(int cpu, struct task_struct *idle)
 {
         extern u32 kernelsp[NR_CPUS];
         unsigned long flags;
diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index 6af08d896e20..93f86817f20a 100644
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -37,7 +37,7 @@
 /*
  * Different semantics to the set_c0_* function built by __BUILD_SET_C0
  */
-static __cpuinit unsigned int bis_c0_errctl(unsigned int set)
+static unsigned int bis_c0_errctl(unsigned int set)
 {
         unsigned int res;
         res = read_c0_errctl();
@@ -45,7 +45,7 @@ static __cpuinit unsigned int bis_c0_errctl(unsigned int set)
         return res;
 }
 
-static __cpuinit void ispram_store_tag(unsigned int offset, unsigned int data)
+static void ispram_store_tag(unsigned int offset, unsigned int data)
 {
         unsigned int errctl;
 
@@ -64,7 +64,7 @@ static __cpuinit void ispram_store_tag(unsigned int offset, unsigned int data)
 }
 
 
-static __cpuinit unsigned int ispram_load_tag(unsigned int offset)
+static unsigned int ispram_load_tag(unsigned int offset)
 {
         unsigned int data;
         unsigned int errctl;
@@ -82,7 +82,7 @@ static __cpuinit unsigned int ispram_load_tag(unsigned int offset)
         return data;
 }
 
-static __cpuinit void dspram_store_tag(unsigned int offset, unsigned int data)
+static void dspram_store_tag(unsigned int offset, unsigned int data)
 {
         unsigned int errctl;
 
@@ -98,7 +98,7 @@ static __cpuinit void dspram_store_tag(unsigned int offset, unsigned int data)
 }
 
 
-static __cpuinit unsigned int dspram_load_tag(unsigned int offset)
+static unsigned int dspram_load_tag(unsigned int offset)
 {
         unsigned int data;
         unsigned int errctl;
@@ -115,7 +115,7 @@ static __cpuinit unsigned int dspram_load_tag(unsigned int offset)
         return data;
 }
 
-static __cpuinit void probe_spram(char *type,
+static void probe_spram(char *type,
             unsigned int base,
             unsigned int (*read)(unsigned int),
             void (*write)(unsigned int, unsigned int))
@@ -196,7 +196,7 @@ static __cpuinit void probe_spram(char *type,
                 offset += 2 * SPRAM_TAG_STRIDE;
         }
 }
-void __cpuinit spram_config(void)
+void spram_config(void)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
         unsigned int config0;
diff --git a/arch/mips/kernel/sync-r4k.c b/arch/mips/kernel/sync-r4k.c
index 1ff43d5ac2c4..84536bf4a154 100644
--- a/arch/mips/kernel/sync-r4k.c
+++ b/arch/mips/kernel/sync-r4k.c
@@ -20,15 +20,15 @@
 #include <asm/barrier.h>
 #include <asm/mipsregs.h>
 
-static atomic_t __cpuinitdata count_start_flag = ATOMIC_INIT(0);
-static atomic_t __cpuinitdata count_count_start = ATOMIC_INIT(0);
-static atomic_t __cpuinitdata count_count_stop = ATOMIC_INIT(0);
-static atomic_t __cpuinitdata count_reference = ATOMIC_INIT(0);
+static atomic_t count_start_flag = ATOMIC_INIT(0);
+static atomic_t count_count_start = ATOMIC_INIT(0);
+static atomic_t count_count_stop = ATOMIC_INIT(0);
+static atomic_t count_reference = ATOMIC_INIT(0);
 
 #define COUNTON 100
 #define NR_LOOPS 5
 
-void __cpuinit synchronise_count_master(int cpu)
+void synchronise_count_master(int cpu)
 {
         int i;
         unsigned long flags;
@@ -106,7 +106,7 @@ void __cpuinit synchronise_count_master(int cpu)
         printk("done.\n");
 }
 
-void __cpuinit synchronise_count_slave(int cpu)
+void synchronise_count_slave(int cpu)
 {
         int i;
         unsigned int initcount;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index a75ae40184aa..aec3408edd4b 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -13,6 +13,7 @@
  */
 #include <linux/bug.h>
 #include <linux/compiler.h>
+#include <linux/context_tracking.h>
 #include <linux/kexec.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -89,7 +90,7 @@ void (*board_nmi_handler_setup)(void);
 void (*board_ejtag_handler_setup)(void);
 void (*board_bind_eic_interrupt)(int irq, int regset);
 void (*board_ebase_setup)(void);
-void __cpuinitdata(*board_cache_error_setup)(void);
+void(*board_cache_error_setup)(void);
 
 static void show_raw_backtrace(unsigned long reg29)
 {
@@ -264,7 +265,7 @@ static void __show_regs(const struct pt_regs *regs)
 
         printk("Status: %08x    ", (uint32_t) regs->cp0_status);
 
-        if (current_cpu_data.isa_level == MIPS_CPU_ISA_I) {
+        if (cpu_has_3kex) {
                 if (regs->cp0_status & ST0_KUO)
                         printk("KUo ");
                 if (regs->cp0_status & ST0_IEO)
@@ -277,7 +278,7 @@ static void __show_regs(const struct pt_regs *regs)
                         printk("KUc ");
                 if (regs->cp0_status & ST0_IEC)
                         printk("IEc ");
-        } else {
+        } else if (cpu_has_4kex) {
                 if (regs->cp0_status & ST0_KX)
                         printk("KX ");
                 if (regs->cp0_status & ST0_SX)
@@ -423,7 +424,9 @@ asmlinkage void do_be(struct pt_regs *regs)
         const struct exception_table_entry *fixup = NULL;
         int data = regs->cp0_cause & 4;
         int action = MIPS_BE_FATAL;
+        enum ctx_state prev_state;
 
+        prev_state = exception_enter();
         /* XXX For now.  Fixme, this searches the wrong table ...  */
         if (data && !user_mode(regs))
                 fixup = search_dbe_tables(exception_epc(regs));
@@ -436,11 +439,11 @@ asmlinkage void do_be(struct pt_regs *regs)
 
         switch (action) {
         case MIPS_BE_DISCARD:
-                return;
+                goto out;
         case MIPS_BE_FIXUP:
                 if (fixup) {
                         regs->cp0_epc = fixup->nextinsn;
-                        return;
+                        goto out;
                 }
                 break;
         default:
@@ -455,10 +458,13 @@ asmlinkage void do_be(struct pt_regs *regs)
                field, regs->cp0_epc, field, regs->regs[31]);
         if (notify_die(DIE_OOPS, "bus error", regs, 0, regs_to_trapnr(regs), SIGBUS)
             == NOTIFY_STOP)
-                return;
+                goto out;
 
         die_if_kernel("Oops", regs);
         force_sig(SIGBUS, current);
+
+out:
+        exception_exit(prev_state);
 }
 
 /*
@@ -673,8 +679,10 @@ static int simulate_sync(struct pt_regs *regs, unsigned int opcode)
 
 asmlinkage void do_ov(struct pt_regs *regs)
 {
+        enum ctx_state prev_state;
         siginfo_t info;
 
+        prev_state = exception_enter();
         die_if_kernel("Integer overflow", regs);
 
         info.si_code = FPE_INTOVF;
@@ -682,6 +690,7 @@ asmlinkage void do_ov(struct pt_regs *regs)
         info.si_errno = 0;
         info.si_addr = (void __user *) regs->cp0_epc;
         force_sig_info(SIGFPE, &info, current);
+        exception_exit(prev_state);
 }
 
 int process_fpemu_return(int sig, void __user *fault_addr)
@@ -713,11 +722,13 @@ int process_fpemu_return(int sig, void __user *fault_addr)
  */
 asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
 {
+        enum ctx_state prev_state;
         siginfo_t info = {0};
 
+        prev_state = exception_enter();
         if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs), SIGFPE)
             == NOTIFY_STOP)
-                return;
+                goto out;
         die_if_kernel("FP exception in kernel code", regs);
 
         if (fcr31 & FPU_CSR_UNI_X) {
@@ -753,7 +764,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
                 /* If something went wrong, signal */
                 process_fpemu_return(sig, fault_addr);
 
-                return;
+                goto out;
         } else if (fcr31 & FPU_CSR_INV_X)
                 info.si_code = FPE_FLTINV;
         else if (fcr31 & FPU_CSR_DIV_X)
@@ -770,6 +781,9 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
         info.si_errno = 0;
         info.si_addr = (void __user *) regs->cp0_epc;
         force_sig_info(SIGFPE, &info, current);
+
+out:
+        exception_exit(prev_state);
 }
 
 static void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
@@ -835,9 +849,11 @@ static void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
 asmlinkage void do_bp(struct pt_regs *regs)
 {
         unsigned int opcode, bcode;
+        enum ctx_state prev_state;
         unsigned long epc;
         u16 instr[2];
 
+        prev_state = exception_enter();
         if (get_isa16_mode(regs->cp0_epc)) {
                 /* Calculate EPC. */
                 epc = exception_epc(regs);
@@ -852,7 +868,7 @@ asmlinkage void do_bp(struct pt_regs *regs)
                                 goto out_sigsegv;
                     bcode = (instr[0] >> 6) & 0x3f;
                     do_trap_or_bp(regs, bcode, "Break");
-                    return;
+                    goto out;
                 }
         } else {
                 if (__get_user(opcode, (unsigned int __user *) exception_epc(regs)))
@@ -876,12 +892,12 @@ asmlinkage void do_bp(struct pt_regs *regs)
         switch (bcode) {
         case BRK_KPROBE_BP:
                 if (notify_die(DIE_BREAK, "debug", regs, bcode, regs_to_trapnr(regs), SIGTRAP) == NOTIFY_STOP)
-                        return;
+                        goto out;
                 else
                         break;
         case BRK_KPROBE_SSTEPBP:
                 if (notify_die(DIE_SSTEPBP, "single_step", regs, bcode, regs_to_trapnr(regs), SIGTRAP) == NOTIFY_STOP)
-                        return;
+                        goto out;
                 else
                         break;
         default:
@@ -889,18 +905,24 @@ asmlinkage void do_bp(struct pt_regs *regs)
         }
 
         do_trap_or_bp(regs, bcode, "Break");
+
+out:
+        exception_exit(prev_state);
         return;
 
 out_sigsegv:
         force_sig(SIGSEGV, current);
+        goto out;
 }
 
 asmlinkage void do_tr(struct pt_regs *regs)
 {
         u32 opcode, tcode = 0;
+        enum ctx_state prev_state;
         u16 instr[2];
         unsigned long epc = msk_isa16_mode(exception_epc(regs));
 
+        prev_state = exception_enter();
         if (get_isa16_mode(regs->cp0_epc)) {
                 if (__get_user(instr[0], (u16 __user *)(epc + 0)) ||
                     __get_user(instr[1], (u16 __user *)(epc + 2)))
@@ -918,10 +940,14 @@ asmlinkage void do_tr(struct pt_regs *regs)
         }
 
         do_trap_or_bp(regs, tcode, "Trap");
+
+out:
+        exception_exit(prev_state);
         return;
 
 out_sigsegv:
         force_sig(SIGSEGV, current);
+        goto out;
 }
 
 asmlinkage void do_ri(struct pt_regs *regs)
@@ -929,17 +955,19 @@ asmlinkage void do_ri(struct pt_regs *regs)
         unsigned int __user *epc = (unsigned int __user *)exception_epc(regs);
         unsigned long old_epc = regs->cp0_epc;
         unsigned long old31 = regs->regs[31];
+        enum ctx_state prev_state;
         unsigned int opcode = 0;
         int status = -1;
 
+        prev_state = exception_enter();
         if (notify_die(DIE_RI, "RI Fault", regs, 0, regs_to_trapnr(regs), SIGILL)
             == NOTIFY_STOP)
-                return;
+                goto out;
 
         die_if_kernel("Reserved instruction in kernel code", regs);
 
         if (unlikely(compute_return_epc(regs) < 0))
-                return;
+                goto out;
 
         if (get_isa16_mode(regs->cp0_epc)) {
                 unsigned short mmop[2] = { 0 };
@@ -974,6 +1002,9 @@ asmlinkage void do_ri(struct pt_regs *regs)
                 regs->regs[31] = old31;
                 force_sig(status, current);
         }
+
+out:
+        exception_exit(prev_state);
 }
 
 /*
@@ -1025,21 +1056,16 @@ static int default_cu2_call(struct notifier_block *nfb, unsigned long action,
 {
         struct pt_regs *regs = data;
 
-        switch (action) {
-        default:
-                die_if_kernel("Unhandled kernel unaligned access or invalid "
+        die_if_kernel("COP2: Unhandled kernel unaligned access or invalid "
                               "instruction", regs);
-                /* Fall through  */
-
-        case CU2_EXCEPTION:
-                force_sig(SIGILL, current);
-        }
+        force_sig(SIGILL, current);
 
         return NOTIFY_OK;
 }
 
 asmlinkage void do_cpu(struct pt_regs *regs)
 {
+        enum ctx_state prev_state;
         unsigned int __user *epc;
         unsigned long old_epc, old31;
         unsigned int opcode;
@@ -1047,10 +1073,12 @@ asmlinkage void do_cpu(struct pt_regs *regs)
         int status;
         unsigned long __maybe_unused flags;
 
-        die_if_kernel("do_cpu invoked from kernel context!", regs);
-
+        prev_state = exception_enter();
         cpid = (regs->cp0_cause >> CAUSEB_CE) & 3;
 
+        if (cpid != 2)
+                die_if_kernel("do_cpu invoked from kernel context!", regs);
+
         switch (cpid) {
         case 0:
                 epc = (unsigned int __user *)exception_epc(regs);
@@ -1060,7 +1088,7 @@ asmlinkage void do_cpu(struct pt_regs *regs)
                 status = -1;
 
                 if (unlikely(compute_return_epc(regs) < 0))
-                        return;
+                        goto out;
 
                 if (get_isa16_mode(regs->cp0_epc)) {
                         unsigned short mmop[2] = { 0 };
@@ -1093,7 +1121,7 @@ asmlinkage void do_cpu(struct pt_regs *regs)
                         force_sig(status, current);
                 }
 
-                return;
+                goto out;
 
         case 3:
                 /*
@@ -1131,19 +1159,26 @@ asmlinkage void do_cpu(struct pt_regs *regs)
                                 mt_ase_fp_affinity();
                 }
 
-                return;
+                goto out;
 
         case 2:
                 raw_notifier_call_chain(&cu2_chain, CU2_EXCEPTION, regs);
-                return;
+                goto out;
         }
 
         force_sig(SIGILL, current);
+
+out:
+        exception_exit(prev_state);
 }
 
 asmlinkage void do_mdmx(struct pt_regs *regs)
 {
+        enum ctx_state prev_state;
+
+        prev_state = exception_enter();
         force_sig(SIGILL, current);
+        exception_exit(prev_state);
 }
 
 /*
@@ -1151,8 +1186,10 @@ asmlinkage void do_mdmx(struct pt_regs *regs)
  */
 asmlinkage void do_watch(struct pt_regs *regs)
 {
+        enum ctx_state prev_state;
         u32 cause;
 
+        prev_state = exception_enter();
         /*
          * Clear WP (bit 22) bit of cause register so we don't loop
          * forever.
@@ -1174,13 +1211,16 @@ asmlinkage void do_watch(struct pt_regs *regs)
                 mips_clear_watch_registers();
                 local_irq_enable();
         }
+        exception_exit(prev_state);
 }
 
 asmlinkage void do_mcheck(struct pt_regs *regs)
 {
         const int field = 2 * sizeof(unsigned long);
         int multi_match = regs->cp0_status & ST0_TS;
+        enum ctx_state prev_state;
 
+        prev_state = exception_enter();
         show_regs(regs);
 
         if (multi_match) {
@@ -1627,7 +1667,6 @@ void *set_vi_handler(int n, vi_handler_t addr)
 }
 
 extern void tlb_init(void);
-extern void flush_tlb_handlers(void);
 
 /*
  * Timer interrupt
@@ -1642,7 +1681,7 @@ int cp0_compare_irq_shift;
 int cp0_perfcount_irq;
 EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
 
-static int __cpuinitdata noulri;
+static int noulri;
 
 static int __init ulri_disable(char *s)
 {
@@ -1653,7 +1692,7 @@ static int __init ulri_disable(char *s)
 }
 __setup("noulri", ulri_disable);
 
-void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
+void per_cpu_trap_init(bool is_boot_cpu)
 {
         unsigned int cpu = smp_processor_id();
         unsigned int status_set = ST0_CU0;
@@ -1770,7 +1809,7 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
 }
 
 /* Install CPU exception handler */
-void __cpuinit set_handler(unsigned long offset, void *addr, unsigned long size)
+void set_handler(unsigned long offset, void *addr, unsigned long size)
 {
 #ifdef CONFIG_CPU_MICROMIPS
         memcpy((void *)(ebase + offset), ((unsigned char *)addr - 1), size);
@@ -1780,7 +1819,7 @@ void __cpuinit set_handler(unsigned long offset, void *addr, unsigned long size)
         local_flush_icache_range(ebase + offset, ebase + offset + size);
 }
 
-static char panic_null_cerr[] __cpuinitdata =
+static char panic_null_cerr[] =
         "Trying to set NULL cache error exception handler";
 
 /*
@@ -1788,7 +1827,7 @@ static char panic_null_cerr[] __cpuinitdata =
  * This is suitable only for the cache error exception which is the only
  * exception handler that is being run uncached.
  */
-void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
+void set_uncached_handler(unsigned long offset, void *addr,
         unsigned long size)
 {
         unsigned long uncached_ebase = CKSEG1ADDR(ebase);
@@ -1837,6 +1876,15 @@ void __init trap_init(void)
                         ebase += (read_c0_ebase() & 0x3ffff000);
         }
 
+        if (cpu_has_mmips) {
+                unsigned int config3 = read_c0_config3();
+
+                if (IS_ENABLED(CONFIG_CPU_MICROMIPS))
+                        write_c0_config3(config3 | MIPS_CONF3_ISA_OE);
+                else
+                        write_c0_config3(config3 & ~MIPS_CONF3_ISA_OE);
+        }
+
         if (board_ebase_setup)
                 board_ebase_setup();
         per_cpu_trap_init(true);
@@ -1956,7 +2004,6 @@ void __init trap_init(void)
                 set_handler(0x080, &except_vec3_generic, 0x80);
 
         local_flush_icache_range(ebase, ebase + 0x400);
-        flush_tlb_handlers();
 
         sort_extable(__start___dbe_table, __stop___dbe_table);
 
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 203d8857070d..c369a5d35527 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -72,6 +72,7 @@
  *       A store crossing a page boundary might be executed only partially.
  *       Undo the partial store in this case.
  */
+#include <linux/context_tracking.h>
 #include <linux/mm.h>
 #include <linux/signal.h>
 #include <linux/smp.h>
@@ -684,7 +685,8 @@ const int reg16to32[] = { 16, 17, 2, 3, 4, 5, 6, 7 };
 /* Recode table from 16-bit STORE register notation to 32-bit GPR. */
 const int reg16to32st[] = { 0, 17, 2, 3, 4, 5, 6, 7 };
 
-void emulate_load_store_microMIPS(struct pt_regs *regs, void __user * addr)
+static void emulate_load_store_microMIPS(struct pt_regs *regs,
+                                         void __user *addr)
 {
         unsigned long value;
         unsigned int res;
@@ -1548,11 +1550,14 @@ sigill:
             ("Unhandled kernel unaligned access or invalid instruction", regs);
         force_sig(SIGILL, current);
 }
+
 asmlinkage void do_ade(struct pt_regs *regs)
 {
+        enum ctx_state prev_state;
         unsigned int __user *pc;
         mm_segment_t seg;
 
+        prev_state = exception_enter();
         perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS,
                         1, regs, regs->cp0_badvaddr);
         /*
@@ -1628,6 +1633,7 @@ sigbus:
         /*
          * XXX On return from the signal handler we should advance the epc
          */
+        exception_exit(prev_state);
 }
 
 #ifdef CONFIG_DEBUG_FS
diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
index 7726f6157d9e..2a03abb5bd2c 100644
--- a/arch/mips/kernel/watch.c
+++ b/arch/mips/kernel/watch.c
@@ -100,7 +100,7 @@ void mips_clear_watch_registers(void)
         }
 }
 
-__cpuinit void mips_probe_watch_registers(struct cpuinfo_mips *c)
+void mips_probe_watch_registers(struct cpuinfo_mips *c)
 {
         unsigned int t;
 
@@ -111,6 +111,7 @@ __cpuinit void mips_probe_watch_registers(struct cpuinfo_mips *c)
          * disable the register.
          */
         write_c0_watchlo0(7);
+        back_to_back_c0_hazard();
         t = read_c0_watchlo0();
         write_c0_watchlo0(0);
         c->watch_reg_masks[0] = t & 7;
@@ -121,12 +122,14 @@ __cpuinit void mips_probe_watch_registers(struct cpuinfo_mips *c)
         c->watch_reg_use_cnt = 1;
         t = read_c0_watchhi0();
         write_c0_watchhi0(t | 0xff8);
+        back_to_back_c0_hazard();
         t = read_c0_watchhi0();
         c->watch_reg_masks[0] |= (t & 0xff8);
         if ((t & 0x80000000) == 0)
                 return;
 
         write_c0_watchlo1(7);
+        back_to_back_c0_hazard();
         t = read_c0_watchlo1();
         write_c0_watchlo1(0);
         c->watch_reg_masks[1] = t & 7;
@@ -135,12 +138,14 @@ __cpuinit void mips_probe_watch_registers(struct cpuinfo_mips *c)
         c->watch_reg_use_cnt = 2;
         t = read_c0_watchhi1();
         write_c0_watchhi1(t | 0xff8);
+        back_to_back_c0_hazard();
         t = read_c0_watchhi1();
         c->watch_reg_masks[1] |= (t & 0xff8);
         if ((t & 0x80000000) == 0)
                 return;
 
         write_c0_watchlo2(7);
+        back_to_back_c0_hazard();
         t = read_c0_watchlo2();
         write_c0_watchlo2(0);
         c->watch_reg_masks[2] = t & 7;
@@ -149,12 +154,14 @@ __cpuinit void mips_probe_watch_registers(struct cpuinfo_mips *c)
         c->watch_reg_use_cnt = 3;
         t = read_c0_watchhi2();
         write_c0_watchhi2(t | 0xff8);
+        back_to_back_c0_hazard();
         t = read_c0_watchhi2();
         c->watch_reg_masks[2] |= (t & 0xff8);
         if ((t & 0x80000000) == 0)
                 return;
 
         write_c0_watchlo3(7);
+        back_to_back_c0_hazard();
         t = read_c0_watchlo3();
         write_c0_watchlo3(0);
         c->watch_reg_masks[3] = t & 7;
@@ -163,6 +170,7 @@ __cpuinit void mips_probe_watch_registers(struct cpuinfo_mips *c)
         c->watch_reg_use_cnt = 4;
         t = read_c0_watchhi3();
         write_c0_watchhi3(t | 0xff8);
+        back_to_back_c0_hazard();
         t = read_c0_watchhi3();
         c->watch_reg_masks[3] |= (t & 0xff8);
         if ((t & 0x80000000) == 0)
diff --git a/arch/mips/kvm/Kconfig b/arch/mips/kvm/Kconfig
index 2c15590e55f7..30e334e823bd 100644
--- a/arch/mips/kvm/Kconfig
+++ b/arch/mips/kvm/Kconfig
@@ -5,7 +5,6 @@ source "virt/kvm/Kconfig"
 
 menuconfig VIRTUALIZATION
         bool "Virtualization"
-        depends on HAVE_KVM
         ---help---
           Say Y here to get to see options for using your Linux host to run
           other operating systems inside virtual machines (guests).
diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
index 51194875f158..eb3e18659630 100644
--- a/arch/mips/lantiq/irq.c
+++ b/arch/mips/lantiq/irq.c
@@ -461,7 +461,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
         return 0;
 }
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
         return MIPS_CPU_TIMER_IRQ;
 }
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
index 9f9e875967aa..49c460370285 100644
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -112,7 +112,7 @@ int __init plat_of_setup(void)
         if (!of_have_populated_dt())
                 panic("device tree not present");
 
-        strncpy(of_ids[0].compatible, soc_info.compatible,
+        strlcpy(of_ids[0].compatible, soc_info.compatible,
                 sizeof(of_ids[0].compatible));
         strncpy(of_ids[1].compatible, "simple-bus",
                 sizeof(of_ids[1].compatible));
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
index f27694fb2ad1..3b7f65cc4218 100644
--- a/arch/mips/lasat/sysctl.c
+++ b/arch/mips/lasat/sysctl.c
@@ -39,7 +39,7 @@
 
 
 /* And the same for proc */
-int proc_dolasatstring(ctl_table *table, int write,
+int proc_dolasatstring(struct ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         int r;
@@ -54,7 +54,7 @@ int proc_dolasatstring(ctl_table *table, int write,
 }
 
 /* proc function to write EEPROM after changing int entry */
-int proc_dolasatint(ctl_table *table, int write,
+int proc_dolasatint(struct ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         int r;
@@ -72,7 +72,7 @@ int proc_dolasatint(ctl_table *table, int write,
 static int rtctmp;
 
 /* proc function to read/write RealTime Clock */
-int proc_dolasatrtc(ctl_table *table, int write,
+int proc_dolasatrtc(struct ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         struct timespec ts;
@@ -97,7 +97,7 @@ int proc_dolasatrtc(ctl_table *table, int write,
 #endif
 
 #ifdef CONFIG_INET
-int proc_lasat_ip(ctl_table *table, int write,
+int proc_lasat_ip(struct ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         unsigned int ip;
@@ -157,7 +157,7 @@ int proc_lasat_ip(ctl_table *table, int write,
 }
 #endif
 
-int proc_lasat_prid(ctl_table *table, int write,
+int proc_lasat_prid(struct ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         int r;
@@ -176,7 +176,7 @@ int proc_lasat_prid(ctl_table *table, int write,
 
 extern int lasat_boot_to_service;
 
-static ctl_table lasat_table[] = {
+static struct ctl_table lasat_table[] = {
         {
                 .procname       = "cpu-hz",
                 .data           = &lasat_board_info.li_cpu_hz,
@@ -262,7 +262,7 @@ static ctl_table lasat_table[] = {
         {}
 };
 
-static ctl_table lasat_root_table[] = {
+static struct ctl_table lasat_root_table[] = {
         {
                 .procname       = "lasat",
                 .mode           =  0555,
diff --git a/arch/mips/lib/uncached.c b/arch/mips/lib/uncached.c
index 65e3dfc4e585..d8522f8e842a 100644
--- a/arch/mips/lib/uncached.c
+++ b/arch/mips/lib/uncached.c
@@ -36,7 +36,7 @@
  * values, so we can avoid sharing the same stack area between a cached
  * and the uncached mode.
  */
-unsigned long __cpuinit run_uncached(void *func)
+unsigned long run_uncached(void *func)
 {
         register long sp __asm__("$sp");
         register long ret __asm__("$2");
diff --git a/arch/mips/loongson/common/cs5536/cs5536_isa.c b/arch/mips/loongson/common/cs5536/cs5536_isa.c
index a6eb2e853d94..924be39e7733 100644
--- a/arch/mips/loongson/common/cs5536/cs5536_isa.c
+++ b/arch/mips/loongson/common/cs5536/cs5536_isa.c
@@ -13,6 +13,7 @@
  * option) any later version.
  */
 
+#include <linux/pci.h>
 #include <cs5536/cs5536.h>
 #include <cs5536/cs5536_pci.h>
 
@@ -314,3 +315,16 @@ u32 pci_isa_read_reg(int reg)
 
         return conf_data;
 }
+
+/*
+ * The mfgpt timer interrupt is running early, so we must keep the south bridge
+ * mmio always enabled. Otherwise we may race with the PCI configuration which
+ * may temporarily disable it. When that happens and the timer interrupt fires,
+ * we are not able to clear it and the system will hang.
+ */
+static void cs5536_isa_mmio_always_on(struct pci_dev *dev)
+{
+        dev->mmio_always_on = 1;
+}
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA,
+        PCI_CLASS_BRIDGE_ISA, 8, cs5536_isa_mmio_always_on);
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index f03771900813..e773659ccf9f 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -471,6 +471,9 @@ int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
         unsigned int fcr31;
         unsigned int bit;
 
+        if (!cpu_has_mmips)
+                return 0;
+
         switch (insn.mm_i_format.opcode) {
         case mm_pool32a_op:
                 if ((insn.mm_i_format.simmediate & MM_POOL32A_MINOR_MASK) ==
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index e87aae1f2e80..7f4f93ab22b7 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -4,7 +4,7 @@
 
 obj-y                           += cache.o dma-default.o extable.o fault.o \
                                    gup.o init.o mmap.o page.o page-funcs.o \
-                                   tlbex.o tlbex-fault.o uasm-mips.o
+                                   tlbex.o tlbex-fault.o tlb-funcs.o uasm-mips.o
 
 obj-$(CONFIG_32BIT)             += ioremap.o pgtable-32.o
 obj-$(CONFIG_64BIT)             += pgtable-64.o
diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c
index 8557fb552863..a0bcdbb81d41 100644
--- a/arch/mips/mm/c-octeon.c
+++ b/arch/mips/mm/c-octeon.c
@@ -180,7 +180,7 @@ static void octeon_flush_kernel_vmap_range(unsigned long vaddr, int size)
  * Probe Octeon's caches
  *
  */
-static void __cpuinit probe_octeon(void)
+static void probe_octeon(void)
 {
         unsigned long icache_size;
         unsigned long dcache_size;
@@ -251,7 +251,7 @@ static void __cpuinit probe_octeon(void)
         }
 }
 
-static void  __cpuinit octeon_cache_error_setup(void)
+static void  octeon_cache_error_setup(void)
 {
         extern char except_vec2_octeon;
         set_handler(0x100, &except_vec2_octeon, 0x80);
@@ -261,7 +261,7 @@ static void  __cpuinit octeon_cache_error_setup(void)
  * Setup the Octeon cache flush routines
  *
  */
-void __cpuinit octeon_cache_init(void)
+void octeon_cache_init(void)
 {
         probe_octeon();
 
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index 704dc735a59d..2fcde0c8ea02 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -26,7 +26,7 @@
 static unsigned long icache_size, dcache_size;          /* Size in bytes */
 static unsigned long icache_lsize, dcache_lsize;        /* Size in bytes */
 
-unsigned long __cpuinit r3k_cache_size(unsigned long ca_flags)
+unsigned long r3k_cache_size(unsigned long ca_flags)
 {
         unsigned long flags, status, dummy, size;
         volatile unsigned long *p;
@@ -61,7 +61,7 @@ unsigned long __cpuinit r3k_cache_size(unsigned long ca_flags)
         return size * sizeof(*p);
 }
 
-unsigned long __cpuinit r3k_cache_lsize(unsigned long ca_flags)
+unsigned long r3k_cache_lsize(unsigned long ca_flags)
 {
         unsigned long flags, status, lsize, i;
         volatile unsigned long *p;
@@ -90,7 +90,7 @@ unsigned long __cpuinit r3k_cache_lsize(unsigned long ca_flags)
         return lsize * sizeof(*p);
 }
 
-static void __cpuinit r3k_probe_cache(void)
+static void r3k_probe_cache(void)
 {
         dcache_size = r3k_cache_size(ST0_ISC);
         if (dcache_size)
@@ -312,7 +312,7 @@ static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size)
         r3k_flush_dcache_range(start, start + size);
 }
 
-void __cpuinit r3k_cache_init(void)
+void r3k_cache_init(void)
 {
         extern void build_clear_page(void);
         extern void build_copy_page(void);
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 21813beec7a5..f749f687ee87 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -107,7 +107,7 @@ static inline void r4k_blast_dcache_page_dc64(unsigned long addr)
         blast_dcache64_page(addr);
 }
 
-static void __cpuinit r4k_blast_dcache_page_setup(void)
+static void r4k_blast_dcache_page_setup(void)
 {
         unsigned long  dc_lsize = cpu_dcache_line_size();
 
@@ -123,7 +123,7 @@ static void __cpuinit r4k_blast_dcache_page_setup(void)
 
 static void (* r4k_blast_dcache_page_indexed)(unsigned long addr);
 
-static void __cpuinit r4k_blast_dcache_page_indexed_setup(void)
+static void r4k_blast_dcache_page_indexed_setup(void)
 {
         unsigned long dc_lsize = cpu_dcache_line_size();
 
@@ -140,7 +140,7 @@ static void __cpuinit r4k_blast_dcache_page_indexed_setup(void)
 void (* r4k_blast_dcache)(void);
 EXPORT_SYMBOL(r4k_blast_dcache);
 
-static void __cpuinit r4k_blast_dcache_setup(void)
+static void r4k_blast_dcache_setup(void)
 {
         unsigned long dc_lsize = cpu_dcache_line_size();
 
@@ -227,7 +227,7 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
 
 static void (* r4k_blast_icache_page)(unsigned long addr);
 
-static void __cpuinit r4k_blast_icache_page_setup(void)
+static void r4k_blast_icache_page_setup(void)
 {
         unsigned long ic_lsize = cpu_icache_line_size();
 
@@ -244,7 +244,7 @@ static void __cpuinit r4k_blast_icache_page_setup(void)
 
 static void (* r4k_blast_icache_page_indexed)(unsigned long addr);
 
-static void __cpuinit r4k_blast_icache_page_indexed_setup(void)
+static void r4k_blast_icache_page_indexed_setup(void)
 {
         unsigned long ic_lsize = cpu_icache_line_size();
 
@@ -269,7 +269,7 @@ static void __cpuinit r4k_blast_icache_page_indexed_setup(void)
 void (* r4k_blast_icache)(void);
 EXPORT_SYMBOL(r4k_blast_icache);
 
-static void __cpuinit r4k_blast_icache_setup(void)
+static void r4k_blast_icache_setup(void)
 {
         unsigned long ic_lsize = cpu_icache_line_size();
 
@@ -290,7 +290,7 @@ static void __cpuinit r4k_blast_icache_setup(void)
 
 static void (* r4k_blast_scache_page)(unsigned long addr);
 
-static void __cpuinit r4k_blast_scache_page_setup(void)
+static void r4k_blast_scache_page_setup(void)
 {
         unsigned long sc_lsize = cpu_scache_line_size();
 
@@ -308,7 +308,7 @@ static void __cpuinit r4k_blast_scache_page_setup(void)
 
 static void (* r4k_blast_scache_page_indexed)(unsigned long addr);
 
-static void __cpuinit r4k_blast_scache_page_indexed_setup(void)
+static void r4k_blast_scache_page_indexed_setup(void)
 {
         unsigned long sc_lsize = cpu_scache_line_size();
 
@@ -326,7 +326,7 @@ static void __cpuinit r4k_blast_scache_page_indexed_setup(void)
 
 static void (* r4k_blast_scache)(void);
 
-static void __cpuinit r4k_blast_scache_setup(void)
+static void r4k_blast_scache_setup(void)
 {
         unsigned long sc_lsize = cpu_scache_line_size();
 
@@ -797,11 +797,11 @@ static inline void alias_74k_erratum(struct cpuinfo_mips *c)
         }
 }
 
-static char *way_string[] __cpuinitdata = { NULL, "direct mapped", "2-way",
+static char *way_string[] = { NULL, "direct mapped", "2-way",
         "3-way", "4-way", "5-way", "6-way", "7-way", "8-way"
 };
 
-static void __cpuinit probe_pcache(void)
+static void probe_pcache(void)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
         unsigned int config = read_c0_config();
@@ -1119,7 +1119,7 @@ static void __cpuinit probe_pcache(void)
  * executes in KSEG1 space or else you will crash and burn badly.  You have
  * been warned.
  */
-static int __cpuinit probe_scache(void)
+static int probe_scache(void)
 {
         unsigned long flags, addr, begin, end, pow2;
         unsigned int config = read_c0_config();
@@ -1196,7 +1196,7 @@ extern int r5k_sc_init(void);
 extern int rm7k_sc_init(void);
 extern int mips_sc_init(void);
 
-static void __cpuinit setup_scache(void)
+static void setup_scache(void)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
         unsigned int config = read_c0_config();
@@ -1329,7 +1329,7 @@ static void nxp_pr4450_fixup_config(void)
         NXP_BARRIER();
 }
 
-static int __cpuinitdata cca = -1;
+static int cca = -1;
 
 static int __init cca_setup(char *str)
 {
@@ -1340,7 +1340,7 @@ static int __init cca_setup(char *str)
 
 early_param("cca", cca_setup);
 
-static void __cpuinit coherency_setup(void)
+static void coherency_setup(void)
 {
         if (cca < 0 || cca > 7)
                 cca = read_c0_config() & CONF_CM_CMASK;
@@ -1380,7 +1380,7 @@ static void __cpuinit coherency_setup(void)
         }
 }
 
-static void __cpuinit r4k_cache_error_setup(void)
+static void r4k_cache_error_setup(void)
 {
         extern char __weak except_vec2_generic;
         extern char __weak except_vec2_sb1;
@@ -1398,7 +1398,7 @@ static void __cpuinit r4k_cache_error_setup(void)
         }
 }
 
-void __cpuinit r4k_cache_init(void)
+void r4k_cache_init(void)
 {
         extern void build_clear_page(void);
         extern void build_copy_page(void);
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index ba9da270289f..8d909dbbf37f 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -344,7 +344,7 @@ static __init void tx39_probe_cache(void)
         }
 }
 
-void __cpuinit tx39_cache_init(void)
+void tx39_cache_init(void)
 {
         extern void build_clear_page(void);
         extern void build_copy_page(void);
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 5aeb3eb0b72f..15f813c303b4 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -182,7 +182,7 @@ static inline void setup_protection_map(void)
         }
 }
 
-void __cpuinit cpu_cache_init(void)
+void cpu_cache_init(void)
 {
         if (cpu_has_3k_cache) {
                 extern void __weak r3k_cache_init(void);
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 576add33bf5b..ee5c1ff861ae 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -182,11 +182,7 @@ asmlinkage void sb1_cache_error(void)
 
 #ifdef CONFIG_SIBYTE_BW_TRACE
         /* Freeze the trace buffer now */
-#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
-        csr_out32(M_BCM1480_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG));
-#else
         csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG));
-#endif
         printk("Trace buffer frozen\n");
 #endif
 
diff --git a/arch/mips/mm/cex-sb1.S b/arch/mips/mm/cex-sb1.S
index fe1d887e8d70..191cf6e0c725 100644
--- a/arch/mips/mm/cex-sb1.S
+++ b/arch/mips/mm/cex-sb1.S
@@ -49,8 +49,6 @@
          * (0x170-0x17f) are used to preserve k0, k1, and ra.
          */
 
-        __CPUINIT
-
 LEAF(except_vec2_sb1)
         /*
          * If this error is recoverable, we need to exit the handler
@@ -142,8 +140,6 @@ unrecoverable:
 
 END(except_vec2_sb1)
 
-        __FINIT
-
         LEAF(handle_vec2_sb1)
         mfc0    k0,CP0_CONFIG
         li      k1,~CONF_CM_CMASK
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index caf92ecb37d6..aaccf1c10699 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -246,6 +246,9 @@ static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
                 if (!plat_device_is_coherent(dev))
                         __dma_sync(sg_page(sg), sg->offset, sg->length,
                                    direction);
+#ifdef CONFIG_NEED_SG_DMA_LENGTH
+                sg->dma_length = sg->length;
+#endif
                 sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
                                   sg->offset;
         }
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index 0fead53d1c26..85df1cd8d446 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -5,6 +5,7 @@
  *
  * Copyright (C) 1995 - 2000 by Ralf Baechle
  */
+#include <linux/context_tracking.h>
 #include <linux/signal.h>
 #include <linux/sched.h>
 #include <linux/interrupt.h>
@@ -32,8 +33,8 @@
  * and the problem, and then passes it off to one of the appropriate
  * routines.
  */
-asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long write,
-                              unsigned long address)
+static void __kprobes __do_page_fault(struct pt_regs *regs, unsigned long write,
+        unsigned long address)
 {
         struct vm_area_struct * vma = NULL;
         struct task_struct *tsk = current;
@@ -312,3 +313,13 @@ vmalloc_fault:
         }
 #endif
 }
+
+asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
+        unsigned long write, unsigned long address)
+{
+        enum ctx_state prev_state;
+
+        prev_state = exception_enter();
+        __do_page_fault(regs, write, address);
+        exception_exit(prev_state);
+}
diff --git a/arch/mips/mm/mmap.c b/arch/mips/mm/mmap.c
index 7e5fe2790d8a..f1baadd56e82 100644
--- a/arch/mips/mm/mmap.c
+++ b/arch/mips/mm/mmap.c
@@ -158,11 +158,9 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
         if (mmap_is_legacy()) {
                 mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
                 mm->get_unmapped_area = arch_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 mm->mmap_base = mmap_base(random_factor);
                 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
 
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 4eb8dcfaf1ce..218c2109a55d 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -66,29 +66,29 @@ UASM_L_LA(_copy_pref_both)
 UASM_L_LA(_copy_pref_store)
 
 /* We need one branch and therefore one relocation per target label. */
-static struct uasm_label __cpuinitdata labels[5];
-static struct uasm_reloc __cpuinitdata relocs[5];
+static struct uasm_label labels[5];
+static struct uasm_reloc relocs[5];
 
 #define cpu_is_r4600_v1_x()     ((read_c0_prid() & 0xfffffff0) == 0x00002010)
 #define cpu_is_r4600_v2_x()     ((read_c0_prid() & 0xfffffff0) == 0x00002020)
 
-static int pref_bias_clear_store __cpuinitdata;
-static int pref_bias_copy_load __cpuinitdata;
-static int pref_bias_copy_store __cpuinitdata;
+static int pref_bias_clear_store;
+static int pref_bias_copy_load;
+static int pref_bias_copy_store;
 
-static u32 pref_src_mode __cpuinitdata;
-static u32 pref_dst_mode __cpuinitdata;
+static u32 pref_src_mode;
+static u32 pref_dst_mode;
 
-static int clear_word_size __cpuinitdata;
-static int copy_word_size __cpuinitdata;
+static int clear_word_size;
+static int copy_word_size;
 
-static int half_clear_loop_size __cpuinitdata;
-static int half_copy_loop_size __cpuinitdata;
+static int half_clear_loop_size;
+static int half_copy_loop_size;
 
-static int cache_line_size __cpuinitdata;
+static int cache_line_size;
 #define cache_line_mask() (cache_line_size - 1)
 
-static inline void __cpuinit
+static inline void
 pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off)
 {
         if (cpu_has_64bit_gp_regs && DADDI_WAR && r4k_daddiu_bug()) {
@@ -108,7 +108,7 @@ pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off)
         }
 }
 
-static void __cpuinit set_prefetch_parameters(void)
+static void set_prefetch_parameters(void)
 {
         if (cpu_has_64bit_gp_regs || cpu_has_64bit_zero_reg)
                 clear_word_size = 8;
@@ -199,7 +199,7 @@ static void __cpuinit set_prefetch_parameters(void)
                                       4 * copy_word_size));
 }
 
-static void __cpuinit build_clear_store(u32 **buf, int off)
+static void build_clear_store(u32 **buf, int off)
 {
         if (cpu_has_64bit_gp_regs || cpu_has_64bit_zero_reg) {
                 uasm_i_sd(buf, ZERO, off, A0);
@@ -208,7 +208,7 @@ static void __cpuinit build_clear_store(u32 **buf, int off)
         }
 }
 
-static inline void __cpuinit build_clear_pref(u32 **buf, int off)
+static inline void build_clear_pref(u32 **buf, int off)
 {
         if (off & cache_line_mask())
                 return;
@@ -232,7 +232,7 @@ static inline void __cpuinit build_clear_pref(u32 **buf, int off)
 
                         uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0);
                 }
-                }
+        }
 }
 
 extern u32 __clear_page_start;
@@ -240,7 +240,7 @@ extern u32 __clear_page_end;
 extern u32 __copy_page_start;
 extern u32 __copy_page_end;
 
-void __cpuinit build_clear_page(void)
+void build_clear_page(void)
 {
         int off;
         u32 *buf = &__clear_page_start;
@@ -333,7 +333,7 @@ void __cpuinit build_clear_page(void)
         pr_debug("\t.set pop\n");
 }
 
-static void __cpuinit build_copy_load(u32 **buf, int reg, int off)
+static void build_copy_load(u32 **buf, int reg, int off)
 {
         if (cpu_has_64bit_gp_regs) {
                 uasm_i_ld(buf, reg, off, A1);
@@ -342,7 +342,7 @@ static void __cpuinit build_copy_load(u32 **buf, int reg, int off)
         }
 }
 
-static void __cpuinit build_copy_store(u32 **buf, int reg, int off)
+static void build_copy_store(u32 **buf, int reg, int off)
 {
         if (cpu_has_64bit_gp_regs) {
                 uasm_i_sd(buf, reg, off, A0);
@@ -387,7 +387,7 @@ static inline void build_copy_store_pref(u32 **buf, int off)
         }
 }
 
-void __cpuinit build_copy_page(void)
+void build_copy_page(void)
 {
         int off;
         u32 *buf = &__copy_page_start;
diff --git a/arch/mips/mm/sc-ip22.c b/arch/mips/mm/sc-ip22.c
index c6aaed934d53..dc7c5a5214a9 100644
--- a/arch/mips/mm/sc-ip22.c
+++ b/arch/mips/mm/sc-ip22.c
@@ -167,7 +167,7 @@ static struct bcache_ops indy_sc_ops = {
         .bc_inv = indy_sc_wback_invalidate
 };
 
-void __cpuinit indy_sc_init(void)
+void indy_sc_init(void)
 {
         if (indy_sc_probe()) {
                 indy_sc_enable();
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index df96da7e939b..5d01392e3518 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -132,7 +132,7 @@ static inline int __init mips_sc_probe(void)
         return 1;
 }
 
-int __cpuinit mips_sc_init(void)
+int mips_sc_init(void)
 {
         int found = mips_sc_probe();
         if (found) {
diff --git a/arch/mips/mm/sc-r5k.c b/arch/mips/mm/sc-r5k.c
index 8bc67720e145..0216ed6eaa2a 100644
--- a/arch/mips/mm/sc-r5k.c
+++ b/arch/mips/mm/sc-r5k.c
@@ -98,7 +98,7 @@ static struct bcache_ops r5k_sc_ops = {
         .bc_inv = r5k_dma_cache_inv_sc
 };
 
-void __cpuinit r5k_sc_init(void)
+void r5k_sc_init(void)
 {
         if (r5k_sc_probe()) {
                 r5k_sc_enable();
diff --git a/arch/mips/mm/sc-rm7k.c b/arch/mips/mm/sc-rm7k.c
index 274af3be1442..aaffbba33706 100644
--- a/arch/mips/mm/sc-rm7k.c
+++ b/arch/mips/mm/sc-rm7k.c
@@ -104,7 +104,7 @@ static void blast_rm7k_tcache(void)
 /*
  * This function is executed in uncached address space.
  */
-static __cpuinit void __rm7k_tc_enable(void)
+static void __rm7k_tc_enable(void)
 {
         int i;
 
@@ -117,7 +117,7 @@ static __cpuinit void __rm7k_tc_enable(void)
                 cache_op(Index_Store_Tag_T, CKSEG0ADDR(i));
 }
 
-static __cpuinit void rm7k_tc_enable(void)
+static void rm7k_tc_enable(void)
 {
         if (read_c0_config() & RM7K_CONF_TE)
                 return;
@@ -130,7 +130,7 @@ static __cpuinit void rm7k_tc_enable(void)
 /*
  * This function is executed in uncached address space.
  */
-static __cpuinit void __rm7k_sc_enable(void)
+static void __rm7k_sc_enable(void)
 {
         int i;
 
@@ -143,7 +143,7 @@ static __cpuinit void __rm7k_sc_enable(void)
                 cache_op(Index_Store_Tag_SD, CKSEG0ADDR(i));
 }
 
-static __cpuinit void rm7k_sc_enable(void)
+static void rm7k_sc_enable(void)
 {
         if (read_c0_config() & RM7K_CONF_SE)
                 return;
@@ -184,7 +184,7 @@ static struct bcache_ops rm7k_sc_ops = {
  * This is a probing function like the one found in c-r4k.c, we look for the
  * wrap around point with different addresses.
  */
-static __cpuinit void __probe_tcache(void)
+static void __probe_tcache(void)
 {
         unsigned long flags, addr, begin, end, pow2;
 
@@ -226,7 +226,7 @@ static __cpuinit void __probe_tcache(void)
         local_irq_restore(flags);
 }
 
-void __cpuinit rm7k_sc_init(void)
+void rm7k_sc_init(void)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
         unsigned int config = read_c0_config();
diff --git a/arch/mips/mm/tlb-funcs.S b/arch/mips/mm/tlb-funcs.S
new file mode 100644
index 000000000000..30a494db99c2
--- /dev/null
+++ b/arch/mips/mm/tlb-funcs.S
@@ -0,0 +1,37 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Micro-assembler generated tlb handler functions.
+ *
+ * Copyright (C) 2013  Broadcom Corporation.
+ *
+ * Based on mm/page-funcs.c
+ * Copyright (C) 2012  MIPS Technologies, Inc.
+ * Copyright (C) 2012  Ralf Baechle <ralf@linux-mips.org>
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+
+#define FASTPATH_SIZE   128
+
+LEAF(tlbmiss_handler_setup_pgd)
+        .space          16 * 4
+END(tlbmiss_handler_setup_pgd)
+EXPORT(tlbmiss_handler_setup_pgd_end)
+
+LEAF(handle_tlbm)
+        .space          FASTPATH_SIZE * 4
+END(handle_tlbm)
+EXPORT(handle_tlbm_end)
+
+LEAF(handle_tlbs)
+        .space          FASTPATH_SIZE * 4
+END(handle_tlbs)
+EXPORT(handle_tlbs_end)
+
+LEAF(handle_tlbl)
+        .space          FASTPATH_SIZE * 4
+END(handle_tlbl)
+EXPORT(handle_tlbl_end)
diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c
index a63d1ed0827f..9aca10994cd2 100644
--- a/arch/mips/mm/tlb-r3k.c
+++ b/arch/mips/mm/tlb-r3k.c
@@ -276,7 +276,7 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
         }
 }
 
-void __cpuinit tlb_init(void)
+void tlb_init(void)
 {
         local_flush_tlb_all();
 
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index c643de4c473a..00b26a67a06d 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -389,7 +389,7 @@ int __init has_transparent_hugepage(void)
 
 #endif /* CONFIG_TRANSPARENT_HUGEPAGE  */
 
-static int __cpuinitdata ntlb;
+static int ntlb;
 static int __init set_ntlb(char *str)
 {
         get_option(&str, &ntlb);
@@ -398,7 +398,7 @@ static int __init set_ntlb(char *str)
 
 __setup("ntlb=", set_ntlb);
 
-void __cpuinit tlb_init(void)
+void tlb_init(void)
 {
         /*
          * You should never change this register:
diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c
index 91c2499f806a..6a99733a4440 100644
--- a/arch/mips/mm/tlb-r8k.c
+++ b/arch/mips/mm/tlb-r8k.c
@@ -213,14 +213,14 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
         local_irq_restore(flags);
 }
 
-static void __cpuinit probe_tlb(unsigned long config)
+static void probe_tlb(unsigned long config)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
 
         c->tlbsize = 3 * 128;           /* 3 sets each 128 entries */
 }
 
-void __cpuinit tlb_init(void)
+void tlb_init(void)
 {
         unsigned int config = read_c0_config();
         unsigned long status;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index afeef93f81a7..556cb4815770 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -136,7 +136,7 @@ static int scratchpad_offset(int i)
  * why; it's not an issue caused by the core RTL.
  *
  */
-static int __cpuinit m4kc_tlbp_war(void)
+static int m4kc_tlbp_war(void)
 {
         return (current_cpu_data.processor_id & 0xffff00) ==
                (PRID_COMP_MIPS | PRID_IMP_4KC);
@@ -181,11 +181,9 @@ UASM_L_LA(_large_segbits_fault)
 UASM_L_LA(_tlb_huge_update)
 #endif
 
-static int __cpuinitdata hazard_instance;
+static int hazard_instance;
 
-static void __cpuinit uasm_bgezl_hazard(u32 **p,
-                                        struct uasm_reloc **r,
-                                        int instance)
+static void uasm_bgezl_hazard(u32 **p, struct uasm_reloc **r, int instance)
 {
         switch (instance) {
         case 0 ... 7:
@@ -196,9 +194,7 @@ static void __cpuinit uasm_bgezl_hazard(u32 **p,
         }
 }
 
-static void __cpuinit uasm_bgezl_label(struct uasm_label **l,
-                                       u32 **p,
-                                       int instance)
+static void uasm_bgezl_label(struct uasm_label **l, u32 **p, int instance)
 {
         switch (instance) {
         case 0 ... 7:
@@ -295,17 +291,28 @@ static inline void dump_handler(const char *symbol, const u32 *handler, int coun
  * We deliberately chose a buffer size of 128, so we won't scribble
  * over anything important on overflow before we panic.
  */
-static u32 tlb_handler[128] __cpuinitdata;
+static u32 tlb_handler[128];
 
 /* simply assume worst case size for labels and relocs */
-static struct uasm_label labels[128] __cpuinitdata;
-static struct uasm_reloc relocs[128] __cpuinitdata;
+static struct uasm_label labels[128];
+static struct uasm_reloc relocs[128];
 
-static int check_for_high_segbits __cpuinitdata;
+static int check_for_high_segbits;
 
-static unsigned int kscratch_used_mask __cpuinitdata;
+static unsigned int kscratch_used_mask;
 
-static int __cpuinit allocate_kscratch(void)
+static inline int __maybe_unused c0_kscratch(void)
+{
+        switch (current_cpu_type()) {
+        case CPU_XLP:
+        case CPU_XLR:
+                return 22;
+        default:
+                return 31;
+        }
+}
+
+static int allocate_kscratch(void)
 {
         int r;
         unsigned int a = cpu_data[0].kscratch_mask & ~kscratch_used_mask;
@@ -322,11 +329,11 @@ static int __cpuinit allocate_kscratch(void)
         return r;
 }
 
-static int scratch_reg __cpuinitdata;
-static int pgd_reg __cpuinitdata;
+static int scratch_reg;
+static int pgd_reg;
 enum vmalloc64_mode {not_refill, refill_scratch, refill_noscratch};
 
-static struct work_registers __cpuinit build_get_work_registers(u32 **p)
+static struct work_registers build_get_work_registers(u32 **p)
 {
         struct work_registers r;
 
@@ -334,9 +341,9 @@ static struct work_registers __cpuinit build_get_work_registers(u32 **p)
         int smp_processor_id_sel;
         int smp_processor_id_shift;
 
-        if (scratch_reg > 0) {
+        if (scratch_reg >= 0) {
                 /* Save in CPU local C0_KScratch? */
-                UASM_i_MTC0(p, 1, 31, scratch_reg);
+                UASM_i_MTC0(p, 1, c0_kscratch(), scratch_reg);
                 r.r1 = K0;
                 r.r2 = K1;
                 r.r3 = 1;
@@ -382,10 +389,10 @@ static struct work_registers __cpuinit build_get_work_registers(u32 **p)
         return r;
 }
 
-static void __cpuinit build_restore_work_registers(u32 **p)
+static void build_restore_work_registers(u32 **p)
 {
-        if (scratch_reg > 0) {
-                UASM_i_MFC0(p, 1, 31, scratch_reg);
+        if (scratch_reg >= 0) {
+                UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
                 return;
         }
         /* K0 already points to save area, restore $1 and $2  */
@@ -407,7 +414,7 @@ extern unsigned long pgd_current[];
 /*
  * The R3000 TLB handler is simple.
  */
-static void __cpuinit build_r3000_tlb_refill_handler(void)
+static void build_r3000_tlb_refill_handler(void)
 {
         long pgdc = (long)pgd_current;
         u32 *p;
@@ -452,7 +459,7 @@ static void __cpuinit build_r3000_tlb_refill_handler(void)
  * other one.To keep things simple, we first assume linear space,
  * then we relocate it to the final handler layout as needed.
  */
-static u32 final_handler[64] __cpuinitdata;
+static u32 final_handler[64];
 
 /*
  * Hazards
@@ -476,7 +483,7 @@ static u32 final_handler[64] __cpuinitdata;
  *
  * As if we MIPS hackers wouldn't know how to nop pipelines happy ...
  */
-static void __cpuinit __maybe_unused build_tlb_probe_entry(u32 **p)
+static void __maybe_unused build_tlb_probe_entry(u32 **p)
 {
         switch (current_cpu_type()) {
         /* Found by experiment: R4600 v2.0/R4700 needs this, too.  */
@@ -500,9 +507,9 @@ static void __cpuinit __maybe_unused build_tlb_probe_entry(u32 **p)
  */
 enum tlb_write_entry { tlb_random, tlb_indexed };
 
-static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
-                                         struct uasm_reloc **r,
-                                         enum tlb_write_entry wmode)
+static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
+                                  struct uasm_reloc **r,
+                                  enum tlb_write_entry wmode)
 {
         void(*tlbw)(u32 **) = NULL;
 
@@ -636,8 +643,8 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
         }
 }
 
-static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
-                                                                  unsigned int reg)
+static __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
+                                                        unsigned int reg)
 {
         if (cpu_has_rixi) {
                 UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL));
@@ -652,11 +659,9 @@ static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
 
 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
 
-static __cpuinit void build_restore_pagemask(u32 **p,
-                                             struct uasm_reloc **r,
-                                             unsigned int tmp,
-                                             enum label_id lid,
-                                             int restore_scratch)
+static void build_restore_pagemask(u32 **p, struct uasm_reloc **r,
+                                   unsigned int tmp, enum label_id lid,
+                                   int restore_scratch)
 {
         if (restore_scratch) {
                 /* Reset default page size */
@@ -673,8 +678,8 @@ static __cpuinit void build_restore_pagemask(u32 **p,
                         uasm_i_mtc0(p, 0, C0_PAGEMASK);
                         uasm_il_b(p, r, lid);
                 }
-                if (scratch_reg > 0)
-                        UASM_i_MFC0(p, 1, 31, scratch_reg);
+                if (scratch_reg >= 0)
+                        UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
                 else
                         UASM_i_LW(p, 1, scratchpad_offset(0), 0);
         } else {
@@ -695,12 +700,11 @@ static __cpuinit void build_restore_pagemask(u32 **p,
         }
 }
 
-static __cpuinit void build_huge_tlb_write_entry(u32 **p,
-                                                 struct uasm_label **l,
-                                                 struct uasm_reloc **r,
-                                                 unsigned int tmp,
-                                                 enum tlb_write_entry wmode,
-                                                 int restore_scratch)
+static void build_huge_tlb_write_entry(u32 **p, struct uasm_label **l,
+                                       struct uasm_reloc **r,
+                                       unsigned int tmp,
+                                       enum tlb_write_entry wmode,
+                                       int restore_scratch)
 {
         /* Set huge page tlb entry size */
         uasm_i_lui(p, tmp, PM_HUGE_MASK >> 16);
@@ -715,9 +719,9 @@ static __cpuinit void build_huge_tlb_write_entry(u32 **p,
 /*
  * Check if Huge PTE is present, if so then jump to LABEL.
  */
-static void __cpuinit
+static void
 build_is_huge_pte(u32 **p, struct uasm_reloc **r, unsigned int tmp,
-                unsigned int pmd, int lid)
+                  unsigned int pmd, int lid)
 {
         UASM_i_LW(p, tmp, 0, pmd);
         if (use_bbit_insns()) {
@@ -728,9 +732,8 @@ build_is_huge_pte(u32 **p, struct uasm_reloc **r, unsigned int tmp,
         }
 }
 
-static __cpuinit void build_huge_update_entries(u32 **p,
-                                                unsigned int pte,
-                                                unsigned int tmp)
+static void build_huge_update_entries(u32 **p, unsigned int pte,
+                                      unsigned int tmp)
 {
         int small_sequence;
 
@@ -760,11 +763,10 @@ static __cpuinit void build_huge_update_entries(u32 **p,
         UASM_i_MTC0(p, pte, C0_ENTRYLO1); /* load it */
 }
 
-static __cpuinit void build_huge_handler_tail(u32 **p,
-                                              struct uasm_reloc **r,
-                                              struct uasm_label **l,
-                                              unsigned int pte,
-                                              unsigned int ptr)
+static void build_huge_handler_tail(u32 **p, struct uasm_reloc **r,
+                                    struct uasm_label **l,
+                                    unsigned int pte,
+                                    unsigned int ptr)
 {
 #ifdef CONFIG_SMP
         UASM_i_SC(p, pte, 0, ptr);
@@ -783,7 +785,7 @@ static __cpuinit void build_huge_handler_tail(u32 **p,
  * TMP and PTR are scratch.
  * TMP will be clobbered, PTR will hold the pmd entry.
  */
-static void __cpuinit
+static void
 build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
                  unsigned int tmp, unsigned int ptr)
 {
@@ -817,7 +819,7 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
 #ifdef CONFIG_MIPS_PGD_C0_CONTEXT
         if (pgd_reg != -1) {
                 /* pgd is in pgd_reg */
-                UASM_i_MFC0(p, ptr, 31, pgd_reg);
+                UASM_i_MFC0(p, ptr, c0_kscratch(), pgd_reg);
         } else {
                 /*
                  * &pgd << 11 stored in CONTEXT [23..63].
@@ -875,7 +877,7 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
  * BVADDR is the faulting address, PTR is scratch.
  * PTR will hold the pgd for vmalloc.
  */
-static void __cpuinit
+static void
 build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
                         unsigned int bvaddr, unsigned int ptr,
                         enum vmalloc64_mode mode)
@@ -929,8 +931,8 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
                 uasm_i_jr(p, ptr);
 
                 if (mode == refill_scratch) {
-                        if (scratch_reg > 0)
-                                UASM_i_MFC0(p, 1, 31, scratch_reg);
+                        if (scratch_reg >= 0)
+                                UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
                         else
                                 UASM_i_LW(p, 1, scratchpad_offset(0), 0);
                 } else {
@@ -945,7 +947,7 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
  * TMP and PTR are scratch.
  * TMP will be clobbered, PTR will hold the pgd entry.
  */
-static void __cpuinit __maybe_unused
+static void __maybe_unused
 build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
 {
         long pgdc = (long)pgd_current;
@@ -961,7 +963,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
         uasm_i_srl(p, ptr, ptr, 19);
 #else
         /*
-         * smp_processor_id() << 3 is stored in CONTEXT.
+         * smp_processor_id() << 2 is stored in CONTEXT.
          */
         uasm_i_mfc0(p, ptr, C0_CONTEXT);
         UASM_i_LA_mostly(p, tmp, pgdc);
@@ -980,7 +982,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
 
 #endif /* !CONFIG_64BIT */
 
-static void __cpuinit build_adjust_context(u32 **p, unsigned int ctx)
+static void build_adjust_context(u32 **p, unsigned int ctx)
 {
         unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12;
         unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1);
@@ -1006,7 +1008,7 @@ static void __cpuinit build_adjust_context(u32 **p, unsigned int ctx)
         uasm_i_andi(p, ctx, ctx, mask);
 }
 
-static void __cpuinit build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
+static void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
 {
         /*
          * Bug workaround for the Nevada. It seems as if under certain
@@ -1031,8 +1033,7 @@ static void __cpuinit build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr
         UASM_i_ADDU(p, ptr, ptr, tmp); /* add in offset */
 }
 
-static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
-                                        unsigned int ptep)
+static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
 {
         /*
          * 64bit address support (36bit on a 32bit CPU) in a 32bit
@@ -1093,10 +1094,10 @@ struct mips_huge_tlb_info {
         int restore_scratch;
 };
 
-static struct mips_huge_tlb_info __cpuinit
+static struct mips_huge_tlb_info
 build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
                                struct uasm_reloc **r, unsigned int tmp,
-                               unsigned int ptr, int c0_scratch)
+                               unsigned int ptr, int c0_scratch_reg)
 {
         struct mips_huge_tlb_info rv;
         unsigned int even, odd;
@@ -1110,12 +1111,12 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
                 UASM_i_MFC0(p, tmp, C0_BADVADDR);
 
                 if (pgd_reg != -1)
-                        UASM_i_MFC0(p, ptr, 31, pgd_reg);
+                        UASM_i_MFC0(p, ptr, c0_kscratch(), pgd_reg);
                 else
                         UASM_i_MFC0(p, ptr, C0_CONTEXT);
 
-                if (c0_scratch >= 0)
-                        UASM_i_MTC0(p, scratch, 31, c0_scratch);
+                if (c0_scratch_reg >= 0)
+                        UASM_i_MTC0(p, scratch, c0_kscratch(), c0_scratch_reg);
                 else
                         UASM_i_SW(p, scratch, scratchpad_offset(0), 0);
 
@@ -1130,14 +1131,14 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
                 }
         } else {
                 if (pgd_reg != -1)
-                        UASM_i_MFC0(p, ptr, 31, pgd_reg);
+                        UASM_i_MFC0(p, ptr, c0_kscratch(), pgd_reg);
                 else
                         UASM_i_MFC0(p, ptr, C0_CONTEXT);
 
                 UASM_i_MFC0(p, tmp, C0_BADVADDR);
 
-                if (c0_scratch >= 0)
-                        UASM_i_MTC0(p, scratch, 31, c0_scratch);
+                if (c0_scratch_reg >= 0)
+                        UASM_i_MTC0(p, scratch, c0_kscratch(), c0_scratch_reg);
                 else
                         UASM_i_SW(p, scratch, scratchpad_offset(0), 0);
 
@@ -1242,8 +1243,8 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
         }
         UASM_i_MTC0(p, odd, C0_ENTRYLO1); /* load it */
 
-        if (c0_scratch >= 0) {
-                UASM_i_MFC0(p, scratch, 31, c0_scratch);
+        if (c0_scratch_reg >= 0) {
+                UASM_i_MFC0(p, scratch, c0_kscratch(), c0_scratch_reg);
                 build_tlb_write_entry(p, l, r, tlb_random);
                 uasm_l_leave(l, *p);
                 rv.restore_scratch = 1;
@@ -1271,7 +1272,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
  */
 #define MIPS64_REFILL_INSNS 32
 
-static void __cpuinit build_r4000_tlb_refill_handler(void)
+static void build_r4000_tlb_refill_handler(void)
 {
         u32 *p = tlb_handler;
         struct uasm_label *l = labels;
@@ -1286,7 +1287,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
         memset(relocs, 0, sizeof(relocs));
         memset(final_handler, 0, sizeof(final_handler));
 
-        if ((scratch_reg > 0 || scratchpad_available()) && use_bbit_insns()) {
+        if ((scratch_reg >= 0 || scratchpad_available()) && use_bbit_insns()) {
                 htlb_info = build_fast_tlb_refill_handler(&p, &l, &r, K0, K1,
                                                           scratch_reg);
                 vmalloc_mode = refill_scratch;
@@ -1444,27 +1445,25 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
         dump_handler("r4000_tlb_refill", (u32 *)ebase, 64);
 }
 
-/*
- * 128 instructions for the fastpath handler is generous and should
- * never be exceeded.
- */
-#define FASTPATH_SIZE 128
+extern u32 handle_tlbl[], handle_tlbl_end[];
+extern u32 handle_tlbs[], handle_tlbs_end[];
+extern u32 handle_tlbm[], handle_tlbm_end[];
 
-u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned;
-u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned;
-u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned;
 #ifdef CONFIG_MIPS_PGD_C0_CONTEXT
-u32 tlbmiss_handler_setup_pgd_array[16] __cacheline_aligned;
+extern u32 tlbmiss_handler_setup_pgd[], tlbmiss_handler_setup_pgd_end[];
 
-static void __cpuinit build_r4000_setup_pgd(void)
+static void build_r4000_setup_pgd(void)
 {
         const int a0 = 4;
         const int a1 = 5;
-        u32 *p = tlbmiss_handler_setup_pgd_array;
+        u32 *p = tlbmiss_handler_setup_pgd;
+        const int tlbmiss_handler_setup_pgd_size =
+                tlbmiss_handler_setup_pgd_end - tlbmiss_handler_setup_pgd;
         struct uasm_label *l = labels;
         struct uasm_reloc *r = relocs;
 
-        memset(tlbmiss_handler_setup_pgd_array, 0, sizeof(tlbmiss_handler_setup_pgd_array));
+        memset(tlbmiss_handler_setup_pgd, 0, tlbmiss_handler_setup_pgd_size *
+                                        sizeof(tlbmiss_handler_setup_pgd[0]));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
 
@@ -1490,21 +1489,21 @@ static void __cpuinit build_r4000_setup_pgd(void)
         } else {
                 /* PGD in c0_KScratch */
                 uasm_i_jr(&p, 31);
-                UASM_i_MTC0(&p, a0, 31, pgd_reg);
+                UASM_i_MTC0(&p, a0, c0_kscratch(), pgd_reg);
         }
-        if (p - tlbmiss_handler_setup_pgd_array > ARRAY_SIZE(tlbmiss_handler_setup_pgd_array))
-                panic("tlbmiss_handler_setup_pgd_array space exceeded");
+        if (p >= tlbmiss_handler_setup_pgd_end)
+                panic("tlbmiss_handler_setup_pgd space exceeded");
+
         uasm_resolve_relocs(relocs, labels);
-        pr_debug("Wrote tlbmiss_handler_setup_pgd_array (%u instructions).\n",
-                 (unsigned int)(p - tlbmiss_handler_setup_pgd_array));
+        pr_debug("Wrote tlbmiss_handler_setup_pgd (%u instructions).\n",
+                 (unsigned int)(p - tlbmiss_handler_setup_pgd));
 
-        dump_handler("tlbmiss_handler",
-                     tlbmiss_handler_setup_pgd_array,
-                     ARRAY_SIZE(tlbmiss_handler_setup_pgd_array));
+        dump_handler("tlbmiss_handler", tlbmiss_handler_setup_pgd,
+                                        tlbmiss_handler_setup_pgd_size);
 }
 #endif
 
-static void __cpuinit
+static void
 iPTE_LW(u32 **p, unsigned int pte, unsigned int ptr)
 {
 #ifdef CONFIG_SMP
@@ -1524,7 +1523,7 @@ iPTE_LW(u32 **p, unsigned int pte, unsigned int ptr)
 #endif
 }
 
-static void __cpuinit
+static void
 iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr,
         unsigned int mode)
 {
@@ -1584,7 +1583,7 @@ iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr,
  * the page table where this PTE is located, PTE will be re-loaded
  * with it's original value.
  */
-static void __cpuinit
+static void
 build_pte_present(u32 **p, struct uasm_reloc **r,
                   int pte, int ptr, int scratch, enum label_id lid)
 {
@@ -1612,7 +1611,7 @@ build_pte_present(u32 **p, struct uasm_reloc **r,
 }
 
 /* Make PTE valid, store result in PTR. */
-static void __cpuinit
+static void
 build_make_valid(u32 **p, struct uasm_reloc **r, unsigned int pte,
                  unsigned int ptr)
 {
@@ -1625,7 +1624,7 @@ build_make_valid(u32 **p, struct uasm_reloc **r, unsigned int pte,
  * Check if PTE can be written to, if not branch to LABEL. Regardless
  * restore PTE with value from PTR when done.
  */
-static void __cpuinit
+static void
 build_pte_writable(u32 **p, struct uasm_reloc **r,
                    unsigned int pte, unsigned int ptr, int scratch,
                    enum label_id lid)
@@ -1645,7 +1644,7 @@ build_pte_writable(u32 **p, struct uasm_reloc **r,
 /* Make PTE writable, update software status bits as well, then store
  * at PTR.
  */
-static void __cpuinit
+static void
 build_make_write(u32 **p, struct uasm_reloc **r, unsigned int pte,
                  unsigned int ptr)
 {
@@ -1659,7 +1658,7 @@ build_make_write(u32 **p, struct uasm_reloc **r, unsigned int pte,
  * Check if PTE can be modified, if not branch to LABEL. Regardless
  * restore PTE with value from PTR when done.
  */
-static void __cpuinit
+static void
 build_pte_modifiable(u32 **p, struct uasm_reloc **r,
                      unsigned int pte, unsigned int ptr, int scratch,
                      enum label_id lid)
@@ -1688,7 +1687,7 @@ build_pte_modifiable(u32 **p, struct uasm_reloc **r,
  * This places the pte into ENTRYLO0 and writes it with tlbwi.
  * Then it returns.
  */
-static void __cpuinit
+static void
 build_r3000_pte_reload_tlbwi(u32 **p, unsigned int pte, unsigned int tmp)
 {
         uasm_i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */
@@ -1704,7 +1703,7 @@ build_r3000_pte_reload_tlbwi(u32 **p, unsigned int pte, unsigned int tmp)
  * may have the probe fail bit set as a result of a trap on a
  * kseg2 access, i.e. without refill.  Then it returns.
  */
-static void __cpuinit
+static void
 build_r3000_tlb_reload_write(u32 **p, struct uasm_label **l,
                              struct uasm_reloc **r, unsigned int pte,
                              unsigned int tmp)
@@ -1722,7 +1721,7 @@ build_r3000_tlb_reload_write(u32 **p, struct uasm_label **l,
         uasm_i_rfe(p); /* branch delay */
 }
 
-static void __cpuinit
+static void
 build_r3000_tlbchange_handler_head(u32 **p, unsigned int pte,
                                    unsigned int ptr)
 {
@@ -1742,13 +1741,14 @@ build_r3000_tlbchange_handler_head(u32 **p, unsigned int pte,
         uasm_i_tlbp(p); /* load delay */
 }
 
-static void __cpuinit build_r3000_tlb_load_handler(void)
+static void build_r3000_tlb_load_handler(void)
 {
         u32 *p = handle_tlbl;
+        const int handle_tlbl_size = handle_tlbl_end - handle_tlbl;
         struct uasm_label *l = labels;
         struct uasm_reloc *r = relocs;
 
-        memset(handle_tlbl, 0, sizeof(handle_tlbl));
+        memset(handle_tlbl, 0, handle_tlbl_size * sizeof(handle_tlbl[0]));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
 
@@ -1762,23 +1762,24 @@ static void __cpuinit build_r3000_tlb_load_handler(void)
         uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff);
         uasm_i_nop(&p);
 
-        if ((p - handle_tlbl) > FASTPATH_SIZE)
+        if (p >= handle_tlbl_end)
                 panic("TLB load handler fastpath space exceeded");
 
         uasm_resolve_relocs(relocs, labels);
         pr_debug("Wrote TLB load handler fastpath (%u instructions).\n",
                  (unsigned int)(p - handle_tlbl));
 
-        dump_handler("r3000_tlb_load", handle_tlbl, ARRAY_SIZE(handle_tlbl));
+        dump_handler("r3000_tlb_load", handle_tlbl, handle_tlbl_size);
 }
 
-static void __cpuinit build_r3000_tlb_store_handler(void)
+static void build_r3000_tlb_store_handler(void)
 {
         u32 *p = handle_tlbs;
+        const int handle_tlbs_size = handle_tlbs_end - handle_tlbs;
         struct uasm_label *l = labels;
         struct uasm_reloc *r = relocs;
 
-        memset(handle_tlbs, 0, sizeof(handle_tlbs));
+        memset(handle_tlbs, 0, handle_tlbs_size * sizeof(handle_tlbs[0]));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
 
@@ -1792,23 +1793,24 @@ static void __cpuinit build_r3000_tlb_store_handler(void)
         uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
         uasm_i_nop(&p);
 
-        if ((p - handle_tlbs) > FASTPATH_SIZE)
+        if (p >= handle_tlbs_end)
                 panic("TLB store handler fastpath space exceeded");
 
         uasm_resolve_relocs(relocs, labels);
         pr_debug("Wrote TLB store handler fastpath (%u instructions).\n",
                  (unsigned int)(p - handle_tlbs));
 
-        dump_handler("r3000_tlb_store", handle_tlbs, ARRAY_SIZE(handle_tlbs));
+        dump_handler("r3000_tlb_store", handle_tlbs, handle_tlbs_size);
 }
 
-static void __cpuinit build_r3000_tlb_modify_handler(void)
+static void build_r3000_tlb_modify_handler(void)
 {
         u32 *p = handle_tlbm;
+        const int handle_tlbm_size = handle_tlbm_end - handle_tlbm;
         struct uasm_label *l = labels;
         struct uasm_reloc *r = relocs;
 
-        memset(handle_tlbm, 0, sizeof(handle_tlbm));
+        memset(handle_tlbm, 0, handle_tlbm_size * sizeof(handle_tlbm[0]));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
 
@@ -1822,21 +1824,21 @@ static void __cpuinit build_r3000_tlb_modify_handler(void)
         uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
         uasm_i_nop(&p);
 
-        if ((p - handle_tlbm) > FASTPATH_SIZE)
+        if (p >= handle_tlbm_end)
                 panic("TLB modify handler fastpath space exceeded");
 
         uasm_resolve_relocs(relocs, labels);
         pr_debug("Wrote TLB modify handler fastpath (%u instructions).\n",
                  (unsigned int)(p - handle_tlbm));
 
-        dump_handler("r3000_tlb_modify", handle_tlbm, ARRAY_SIZE(handle_tlbm));
+        dump_handler("r3000_tlb_modify", handle_tlbm, handle_tlbm_size);
 }
 #endif /* CONFIG_MIPS_PGD_C0_CONTEXT */
 
 /*
  * R4000 style TLB load/store/modify handlers.
  */
-static struct work_registers __cpuinit
+static struct work_registers
 build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
                                    struct uasm_reloc **r)
 {
@@ -1872,7 +1874,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
         return wr;
 }
 
-static void __cpuinit
+static void
 build_r4000_tlbchange_handler_tail(u32 **p, struct uasm_label **l,
                                    struct uasm_reloc **r, unsigned int tmp,
                                    unsigned int ptr)
@@ -1890,14 +1892,15 @@ build_r4000_tlbchange_handler_tail(u32 **p, struct uasm_label **l,
 #endif
 }
 
-static void __cpuinit build_r4000_tlb_load_handler(void)
+static void build_r4000_tlb_load_handler(void)
 {
         u32 *p = handle_tlbl;
+        const int handle_tlbl_size = handle_tlbl_end - handle_tlbl;
         struct uasm_label *l = labels;
         struct uasm_reloc *r = relocs;
         struct work_registers wr;
 
-        memset(handle_tlbl, 0, sizeof(handle_tlbl));
+        memset(handle_tlbl, 0, handle_tlbl_size * sizeof(handle_tlbl[0]));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
 
@@ -1935,6 +1938,19 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                 uasm_i_nop(&p);
 
                 uasm_i_tlbr(&p);
+
+                switch (current_cpu_type()) {
+                default:
+                        if (cpu_has_mips_r2) {
+                                uasm_i_ehb(&p);
+
+                case CPU_CAVIUM_OCTEON:
+                case CPU_CAVIUM_OCTEON_PLUS:
+                case CPU_CAVIUM_OCTEON2:
+                                break;
+                        }
+                }
+
                 /* Examine  entrylo 0 or 1 based on ptr. */
                 if (use_bbit_insns()) {
                         uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
@@ -1989,6 +2005,19 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                 uasm_i_nop(&p);
 
                 uasm_i_tlbr(&p);
+
+                switch (current_cpu_type()) {
+                default:
+                        if (cpu_has_mips_r2) {
+                                uasm_i_ehb(&p);
+
+                case CPU_CAVIUM_OCTEON:
+                case CPU_CAVIUM_OCTEON_PLUS:
+                case CPU_CAVIUM_OCTEON2:
+                                break;
+                        }
+                }
+
                 /* Examine  entrylo 0 or 1 based on ptr. */
                 if (use_bbit_insns()) {
                         uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
@@ -2036,24 +2065,25 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
         uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff);
         uasm_i_nop(&p);
 
-        if ((p - handle_tlbl) > FASTPATH_SIZE)
+        if (p >= handle_tlbl_end)
                 panic("TLB load handler fastpath space exceeded");
 
         uasm_resolve_relocs(relocs, labels);
         pr_debug("Wrote TLB load handler fastpath (%u instructions).\n",
                  (unsigned int)(p - handle_tlbl));
 
-        dump_handler("r4000_tlb_load", handle_tlbl, ARRAY_SIZE(handle_tlbl));
+        dump_handler("r4000_tlb_load", handle_tlbl, handle_tlbl_size);
 }
 
-static void __cpuinit build_r4000_tlb_store_handler(void)
+static void build_r4000_tlb_store_handler(void)
 {
         u32 *p = handle_tlbs;
+        const int handle_tlbs_size = handle_tlbs_end - handle_tlbs;
         struct uasm_label *l = labels;
         struct uasm_reloc *r = relocs;
         struct work_registers wr;
 
-        memset(handle_tlbs, 0, sizeof(handle_tlbs));
+        memset(handle_tlbs, 0, handle_tlbs_size * sizeof(handle_tlbs[0]));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
 
@@ -2090,24 +2120,25 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
         uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
         uasm_i_nop(&p);
 
-        if ((p - handle_tlbs) > FASTPATH_SIZE)
+        if (p >= handle_tlbs_end)
                 panic("TLB store handler fastpath space exceeded");
 
         uasm_resolve_relocs(relocs, labels);
         pr_debug("Wrote TLB store handler fastpath (%u instructions).\n",
                  (unsigned int)(p - handle_tlbs));
 
-        dump_handler("r4000_tlb_store", handle_tlbs, ARRAY_SIZE(handle_tlbs));
+        dump_handler("r4000_tlb_store", handle_tlbs, handle_tlbs_size);
 }
 
-static void __cpuinit build_r4000_tlb_modify_handler(void)
+static void build_r4000_tlb_modify_handler(void)
 {
         u32 *p = handle_tlbm;
+        const int handle_tlbm_size = handle_tlbm_end - handle_tlbm;
         struct uasm_label *l = labels;
         struct uasm_reloc *r = relocs;
         struct work_registers wr;
 
-        memset(handle_tlbm, 0, sizeof(handle_tlbm));
+        memset(handle_tlbm, 0, handle_tlbm_size * sizeof(handle_tlbm[0]));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
 
@@ -2145,17 +2176,31 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
         uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
         uasm_i_nop(&p);
 
-        if ((p - handle_tlbm) > FASTPATH_SIZE)
+        if (p >= handle_tlbm_end)
                 panic("TLB modify handler fastpath space exceeded");
 
         uasm_resolve_relocs(relocs, labels);
         pr_debug("Wrote TLB modify handler fastpath (%u instructions).\n",
                  (unsigned int)(p - handle_tlbm));
 
-        dump_handler("r4000_tlb_modify", handle_tlbm, ARRAY_SIZE(handle_tlbm));
+        dump_handler("r4000_tlb_modify", handle_tlbm, handle_tlbm_size);
+}
+
+static void flush_tlb_handlers(void)
+{
+        local_flush_icache_range((unsigned long)handle_tlbl,
+                           (unsigned long)handle_tlbl_end);
+        local_flush_icache_range((unsigned long)handle_tlbs,
+                           (unsigned long)handle_tlbs_end);
+        local_flush_icache_range((unsigned long)handle_tlbm,
+                           (unsigned long)handle_tlbm_end);
+#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
+        local_flush_icache_range((unsigned long)tlbmiss_handler_setup_pgd,
+                           (unsigned long)tlbmiss_handler_setup_pgd_end);
+#endif
 }
 
-void __cpuinit build_tlb_refill_handler(void)
+void build_tlb_refill_handler(void)
 {
         /*
          * The refill handler is generated per-CPU, multi-node systems
@@ -2187,6 +2232,7 @@ void __cpuinit build_tlb_refill_handler(void)
                         build_r3000_tlb_load_handler();
                         build_r3000_tlb_store_handler();
                         build_r3000_tlb_modify_handler();
+                        flush_tlb_handlers();
                         run_once++;
                 }
 #else
@@ -2214,23 +2260,10 @@ void __cpuinit build_tlb_refill_handler(void)
                         build_r4000_tlb_modify_handler();
                         if (!cpu_has_local_ebase)
                                 build_r4000_tlb_refill_handler();
+                        flush_tlb_handlers();
                         run_once++;
                 }
                 if (cpu_has_local_ebase)
                         build_r4000_tlb_refill_handler();
         }
 }
-
-void __cpuinit flush_tlb_handlers(void)
-{
-        local_flush_icache_range((unsigned long)handle_tlbl,
-                           (unsigned long)handle_tlbl + sizeof(handle_tlbl));
-        local_flush_icache_range((unsigned long)handle_tlbs,
-                           (unsigned long)handle_tlbs + sizeof(handle_tlbs));
-        local_flush_icache_range((unsigned long)handle_tlbm,
-                           (unsigned long)handle_tlbm + sizeof(handle_tlbm));
-#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
-        local_flush_icache_range((unsigned long)tlbmiss_handler_setup_pgd_array,
-                           (unsigned long)tlbmiss_handler_setup_pgd_array + sizeof(handle_tlbm));
-#endif
-}
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index 162ee6d62788..060000fa653c 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -49,7 +49,7 @@
 
 #include "uasm.c"
 
-static struct insn insn_table_MM[] __uasminitdata = {
+static struct insn insn_table_MM[] = {
         { insn_addu, M(mm_pool32a_op, 0, 0, 0, 0, mm_addu32_op), RT | RS | RD },
         { insn_addiu, M(mm_addiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
         { insn_and, M(mm_pool32a_op, 0, 0, 0, 0, mm_and_op), RT | RS | RD },
@@ -118,7 +118,7 @@ static struct insn insn_table_MM[] __uasminitdata = {
 
 #undef M
 
-static inline __uasminit u32 build_bimm(s32 arg)
+static inline u32 build_bimm(s32 arg)
 {
         WARN(arg > 0xffff || arg < -0x10000,
              KERN_WARNING "Micro-assembler field overflow\n");
@@ -128,7 +128,7 @@ static inline __uasminit u32 build_bimm(s32 arg)
         return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 1) & 0x7fff);
 }
 
-static inline __uasminit u32 build_jimm(u32 arg)
+static inline u32 build_jimm(u32 arg)
 {
 
         WARN(arg & ~((JIMM_MASK << 2) | 1),
@@ -141,7 +141,7 @@ static inline __uasminit u32 build_jimm(u32 arg)
  * The order of opcode arguments is implicitly left to right,
  * starting with RS and ending with FUNC or IMM.
  */
-static void __uasminit build_insn(u32 **buf, enum opcode opc, ...)
+static void build_insn(u32 **buf, enum opcode opc, ...)
 {
         struct insn *ip = NULL;
         unsigned int i;
@@ -199,7 +199,7 @@ static void __uasminit build_insn(u32 **buf, enum opcode opc, ...)
         (*buf)++;
 }
 
-static inline void __uasminit
+static inline void
 __resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab)
 {
         long laddr = (long)lab->addr;
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 5fcdd8fe3e83..0c724589854e 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -49,7 +49,7 @@
 
 #include "uasm.c"
 
-static struct insn insn_table[] __uasminitdata = {
+static struct insn insn_table[] = {
         { insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
         { insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD },
         { insn_andi, M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
@@ -119,7 +119,7 @@ static struct insn insn_table[] __uasminitdata = {
 
 #undef M
 
-static inline __uasminit u32 build_bimm(s32 arg)
+static inline u32 build_bimm(s32 arg)
 {
         WARN(arg > 0x1ffff || arg < -0x20000,
              KERN_WARNING "Micro-assembler field overflow\n");
@@ -129,7 +129,7 @@ static inline __uasminit u32 build_bimm(s32 arg)
         return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff);
 }
 
-static inline __uasminit u32 build_jimm(u32 arg)
+static inline u32 build_jimm(u32 arg)
 {
         WARN(arg & ~(JIMM_MASK << 2),
              KERN_WARNING "Micro-assembler field overflow\n");
@@ -141,7 +141,7 @@ static inline __uasminit u32 build_jimm(u32 arg)
  * The order of opcode arguments is implicitly left to right,
  * starting with RS and ending with FUNC or IMM.
  */
-static void __uasminit build_insn(u32 **buf, enum opcode opc, ...)
+static void build_insn(u32 **buf, enum opcode opc, ...)
 {
         struct insn *ip = NULL;
         unsigned int i;
@@ -187,7 +187,7 @@ static void __uasminit build_insn(u32 **buf, enum opcode opc, ...)
         (*buf)++;
 }
 
-static inline void __uasminit
+static inline void
 __resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab)
 {
         long laddr = (long)lab->addr;
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 7eb5e4355d25..b9d14b6c7f58 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -63,35 +63,35 @@ struct insn {
         enum fields fields;
 };
 
-static inline __uasminit u32 build_rs(u32 arg)
+static inline u32 build_rs(u32 arg)
 {
         WARN(arg & ~RS_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RS_MASK) << RS_SH;
 }
 
-static inline __uasminit u32 build_rt(u32 arg)
+static inline u32 build_rt(u32 arg)
 {
         WARN(arg & ~RT_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RT_MASK) << RT_SH;
 }
 
-static inline __uasminit u32 build_rd(u32 arg)
+static inline u32 build_rd(u32 arg)
 {
         WARN(arg & ~RD_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RD_MASK) << RD_SH;
 }
 
-static inline __uasminit u32 build_re(u32 arg)
+static inline u32 build_re(u32 arg)
 {
         WARN(arg & ~RE_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RE_MASK) << RE_SH;
 }
 
-static inline __uasminit u32 build_simm(s32 arg)
+static inline u32 build_simm(s32 arg)
 {
         WARN(arg > 0x7fff || arg < -0x8000,
              KERN_WARNING "Micro-assembler field overflow\n");
@@ -99,14 +99,14 @@ static inline __uasminit u32 build_simm(s32 arg)
         return arg & 0xffff;
 }
 
-static inline __uasminit u32 build_uimm(u32 arg)
+static inline u32 build_uimm(u32 arg)
 {
         WARN(arg & ~IMM_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & IMM_MASK;
 }
 
-static inline __uasminit u32 build_scimm(u32 arg)
+static inline u32 build_scimm(u32 arg)
 {
         WARN(arg & ~SCIMM_MASK,
              KERN_WARNING "Micro-assembler field overflow\n");
@@ -114,21 +114,21 @@ static inline __uasminit u32 build_scimm(u32 arg)
         return (arg & SCIMM_MASK) << SCIMM_SH;
 }
 
-static inline __uasminit u32 build_func(u32 arg)
+static inline u32 build_func(u32 arg)
 {
         WARN(arg & ~FUNC_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & FUNC_MASK;
 }
 
-static inline __uasminit u32 build_set(u32 arg)
+static inline u32 build_set(u32 arg)
 {
         WARN(arg & ~SET_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & SET_MASK;
 }
 
-static void __uasminit build_insn(u32 **buf, enum opcode opc, ...);
+static void build_insn(u32 **buf, enum opcode opc, ...);
 
 #define I_u1u2u3(op)                                    \
 Ip_u1u2u3(op)                                           \
@@ -286,7 +286,7 @@ I_u3u1u2(_ldx)
 
 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 #include <asm/octeon/octeon.h>
-void __uasminit ISAFUNC(uasm_i_pref)(u32 **buf, unsigned int a, signed int b,
+void ISAFUNC(uasm_i_pref)(u32 **buf, unsigned int a, signed int b,
                             unsigned int c)
 {
         if (OCTEON_IS_MODEL(OCTEON_CN63XX_PASS1_X) && a <= 24 && a != 5)
@@ -304,7 +304,7 @@ I_u2s3u1(_pref)
 #endif
 
 /* Handle labels. */
-void __uasminit ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr, int lid)
+void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr, int lid)
 {
         (*lab)->addr = addr;
         (*lab)->lab = lid;
@@ -312,7 +312,7 @@ void __uasminit ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr, in
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_build_label));
 
-int __uasminit ISAFUNC(uasm_in_compat_space_p)(long addr)
+int ISAFUNC(uasm_in_compat_space_p)(long addr)
 {
         /* Is this address in 32bit compat space? */
 #ifdef CONFIG_64BIT
@@ -323,7 +323,7 @@ int __uasminit ISAFUNC(uasm_in_compat_space_p)(long addr)
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_in_compat_space_p));
 
-static int __uasminit uasm_rel_highest(long val)
+static int uasm_rel_highest(long val)
 {
 #ifdef CONFIG_64BIT
         return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
@@ -332,7 +332,7 @@ static int __uasminit uasm_rel_highest(long val)
 #endif
 }
 
-static int __uasminit uasm_rel_higher(long val)
+static int uasm_rel_higher(long val)
 {
 #ifdef CONFIG_64BIT
         return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
@@ -341,19 +341,19 @@ static int __uasminit uasm_rel_higher(long val)
 #endif
 }
 
-int __uasminit ISAFUNC(uasm_rel_hi)(long val)
+int ISAFUNC(uasm_rel_hi)(long val)
 {
         return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000;
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_rel_hi));
 
-int __uasminit ISAFUNC(uasm_rel_lo)(long val)
+int ISAFUNC(uasm_rel_lo)(long val)
 {
         return ((val & 0xffff) ^ 0x8000) - 0x8000;
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_rel_lo));
 
-void __uasminit ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr)
+void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr)
 {
         if (!ISAFUNC(uasm_in_compat_space_p)(addr)) {
                 ISAFUNC(uasm_i_lui)(buf, rs, uasm_rel_highest(addr));
@@ -371,7 +371,7 @@ void __uasminit ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr)
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(UASM_i_LA_mostly));
 
-void __uasminit ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr)
+void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr)
 {
         ISAFUNC(UASM_i_LA_mostly)(buf, rs, addr);
         if (ISAFUNC(uasm_rel_lo(addr))) {
@@ -386,8 +386,7 @@ void __uasminit ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr)
 UASM_EXPORT_SYMBOL(ISAFUNC(UASM_i_LA));
 
 /* Handle relocations. */
-void __uasminit
-ISAFUNC(uasm_r_mips_pc16)(struct uasm_reloc **rel, u32 *addr, int lid)
+void ISAFUNC(uasm_r_mips_pc16)(struct uasm_reloc **rel, u32 *addr, int lid)
 {
         (*rel)->addr = addr;
         (*rel)->type = R_MIPS_PC16;
@@ -396,11 +395,11 @@ ISAFUNC(uasm_r_mips_pc16)(struct uasm_reloc **rel, u32 *addr, int lid)
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_r_mips_pc16));
 
-static inline void __uasminit
-__resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
+static inline void __resolve_relocs(struct uasm_reloc *rel,
+                                    struct uasm_label *lab);
 
-void __uasminit
-ISAFUNC(uasm_resolve_relocs)(struct uasm_reloc *rel, struct uasm_label *lab)
+void ISAFUNC(uasm_resolve_relocs)(struct uasm_reloc *rel,
+                                  struct uasm_label *lab)
 {
         struct uasm_label *l;
 
@@ -411,8 +410,8 @@ ISAFUNC(uasm_resolve_relocs)(struct uasm_reloc *rel, struct uasm_label *lab)
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_resolve_relocs));
 
-void __uasminit
-ISAFUNC(uasm_move_relocs)(struct uasm_reloc *rel, u32 *first, u32 *end, long off)
+void ISAFUNC(uasm_move_relocs)(struct uasm_reloc *rel, u32 *first, u32 *end,
+                               long off)
 {
         for (; rel->lab != UASM_LABEL_INVALID; rel++)
                 if (rel->addr >= first && rel->addr < end)
@@ -420,8 +419,8 @@ ISAFUNC(uasm_move_relocs)(struct uasm_reloc *rel, u32 *first, u32 *end, long off
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_move_relocs));
 
-void __uasminit
-ISAFUNC(uasm_move_labels)(struct uasm_label *lab, u32 *first, u32 *end, long off)
+void ISAFUNC(uasm_move_labels)(struct uasm_label *lab, u32 *first, u32 *end,
+                               long off)
 {
         for (; lab->lab != UASM_LABEL_INVALID; lab++)
                 if (lab->addr >= first && lab->addr < end)
@@ -429,9 +428,8 @@ ISAFUNC(uasm_move_labels)(struct uasm_label *lab, u32 *first, u32 *end, long off
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_move_labels));
 
-void __uasminit
-ISAFUNC(uasm_copy_handler)(struct uasm_reloc *rel, struct uasm_label *lab, u32 *first,
-                  u32 *end, u32 *target)
+void ISAFUNC(uasm_copy_handler)(struct uasm_reloc *rel, struct uasm_label *lab,
+                                u32 *first, u32 *end, u32 *target)
 {
         long off = (long)(target - first);
 
@@ -442,7 +440,7 @@ ISAFUNC(uasm_copy_handler)(struct uasm_reloc *rel, struct uasm_label *lab, u32 *
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_copy_handler));
 
-int __uasminit ISAFUNC(uasm_insn_has_bdelay)(struct uasm_reloc *rel, u32 *addr)
+int ISAFUNC(uasm_insn_has_bdelay)(struct uasm_reloc *rel, u32 *addr)
 {
         for (; rel->lab != UASM_LABEL_INVALID; rel++) {
                 if (rel->addr == addr
@@ -456,83 +454,79 @@ int __uasminit ISAFUNC(uasm_insn_has_bdelay)(struct uasm_reloc *rel, u32 *addr)
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_insn_has_bdelay));
 
 /* Convenience functions for labeled branches. */
-void __uasminit
-ISAFUNC(uasm_il_bltz)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid)
+void ISAFUNC(uasm_il_bltz)(u32 **p, struct uasm_reloc **r, unsigned int reg,
+                           int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_bltz)(p, reg, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bltz));
 
-void __uasminit
-ISAFUNC(uasm_il_b)(u32 **p, struct uasm_reloc **r, int lid)
+void ISAFUNC(uasm_il_b)(u32 **p, struct uasm_reloc **r, int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_b)(p, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_b));
 
-void __uasminit
-ISAFUNC(uasm_il_beqz)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid)
+void ISAFUNC(uasm_il_beqz)(u32 **p, struct uasm_reloc **r, unsigned int reg,
+                           int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_beqz)(p, reg, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_beqz));
 
-void __uasminit
-ISAFUNC(uasm_il_beqzl)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid)
+void ISAFUNC(uasm_il_beqzl)(u32 **p, struct uasm_reloc **r, unsigned int reg,
+                            int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_beqzl)(p, reg, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_beqzl));
 
-void __uasminit
-ISAFUNC(uasm_il_bne)(u32 **p, struct uasm_reloc **r, unsigned int reg1,
-        unsigned int reg2, int lid)
+void ISAFUNC(uasm_il_bne)(u32 **p, struct uasm_reloc **r, unsigned int reg1,
+                          unsigned int reg2, int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_bne)(p, reg1, reg2, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bne));
 
-void __uasminit
-ISAFUNC(uasm_il_bnez)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid)
+void ISAFUNC(uasm_il_bnez)(u32 **p, struct uasm_reloc **r, unsigned int reg,
+                           int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_bnez)(p, reg, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bnez));
 
-void __uasminit
-ISAFUNC(uasm_il_bgezl)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid)
+void ISAFUNC(uasm_il_bgezl)(u32 **p, struct uasm_reloc **r, unsigned int reg,
+                            int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_bgezl)(p, reg, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bgezl));
 
-void __uasminit
-ISAFUNC(uasm_il_bgez)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid)
+void ISAFUNC(uasm_il_bgez)(u32 **p, struct uasm_reloc **r, unsigned int reg,
+                           int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_bgez)(p, reg, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bgez));
 
-void __uasminit
-ISAFUNC(uasm_il_bbit0)(u32 **p, struct uasm_reloc **r, unsigned int reg,
-              unsigned int bit, int lid)
+void ISAFUNC(uasm_il_bbit0)(u32 **p, struct uasm_reloc **r, unsigned int reg,
+                            unsigned int bit, int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_bbit0)(p, reg, bit, 0);
 }
 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bbit0));
 
-void __uasminit
-ISAFUNC(uasm_il_bbit1)(u32 **p, struct uasm_reloc **r, unsigned int reg,
-              unsigned int bit, int lid)
+void ISAFUNC(uasm_il_bbit1)(u32 **p, struct uasm_reloc **r, unsigned int reg,
+                            unsigned int bit, int lid)
 {
         uasm_r_mips_pc16(r, *p, lid);
         ISAFUNC(uasm_i_bbit1)(p, reg, bit, 0);
diff --git a/arch/mips/mti-malta/Makefile b/arch/mips/mti-malta/Makefile
index 0388fc8b5613..72fdedbf76db 100644
--- a/arch/mips/mti-malta/Makefile
+++ b/arch/mips/mti-malta/Makefile
@@ -10,7 +10,6 @@ obj-y				:= malta-amon.o malta-display.o malta-init.o \
                                    malta-reset.o malta-setup.o malta-time.o
 
 obj-$(CONFIG_EARLY_PRINTK)      += malta-console.o
-obj-$(CONFIG_PCI)               += malta-pci.o
 
 # FIXME FIXME FIXME
 obj-$(CONFIG_MIPS_MT_SMTC)      += malta-smtc.o
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 0a1339ac3ec8..c69da3734699 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -422,8 +422,10 @@ static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {
  */
 int __init gcmp_probe(unsigned long addr, unsigned long size)
 {
-        if (mips_revision_sconid != MIPS_REVISION_SCON_ROCIT) {
+        if ((mips_revision_sconid != MIPS_REVISION_SCON_ROCIT)  &&
+            (mips_revision_sconid != MIPS_REVISION_SCON_GT64120)) {
                 gcmp_present = 0;
+                pr_debug("GCMP NOT present\n");
                 return gcmp_present;
         }
 
diff --git a/arch/mips/mti-malta/malta-reset.c b/arch/mips/mti-malta/malta-reset.c
index 329420536241..d627d4b2b47f 100644
--- a/arch/mips/mti-malta/malta-reset.c
+++ b/arch/mips/mti-malta/malta-reset.c
@@ -1,33 +1,18 @@
 /*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
  * Carsten Langgaard, carstenl@mips.com
  * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
- *
- * ########################################################################
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Reset the MIPS boards.
- *
  */
-#include <linux/init.h>
+#include <linux/io.h>
 #include <linux/pm.h>
 
-#include <asm/io.h>
 #include <asm/reboot.h>
-#include <asm/mips-boards/generic.h>
+
+#define SOFTRES_REG     0x1f000500
+#define GORESET         0x42
 
 static void mips_machine_restart(char *command)
 {
@@ -45,7 +30,6 @@ static void mips_machine_halt(void)
         __raw_writel(GORESET, softres_reg);
 }
 
-
 static int __init mips_reboot_setup(void)
 {
         _machine_restart = mips_machine_restart;
@@ -54,5 +38,4 @@ static int __init mips_reboot_setup(void)
 
         return 0;
 }
-
 arch_initcall(mips_reboot_setup);
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index becbf47506a5..c4849904f013 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -32,7 +32,7 @@ static void msmtc_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 /*
  * Post-config but pre-boot cleanup entry point
  */
-static void __cpuinit msmtc_init_secondary(void)
+static void msmtc_init_secondary(void)
 {
         int myvpe;
 
@@ -53,7 +53,7 @@ static void __cpuinit msmtc_init_secondary(void)
 /*
  * Platform "CPU" startup hook
  */
-static void __cpuinit msmtc_boot_secondary(int cpu, struct task_struct *idle)
+static void msmtc_boot_secondary(int cpu, struct task_struct *idle)
 {
         smtc_boot_secondary(cpu, idle);
 }
@@ -61,7 +61,7 @@ static void __cpuinit msmtc_boot_secondary(int cpu, struct task_struct *idle)
 /*
  * SMP initialization finalization entry point
  */
-static void __cpuinit msmtc_smp_finish(void)
+static void msmtc_smp_finish(void)
 {
         smtc_smp_finish();
 }
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 0ad305f75802..53aad4a35375 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -150,7 +150,7 @@ static void __init plat_perf_setup(void)
         }
 }
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
 #ifdef MSC01E_INT_BASE
         if (cpu_has_veic) {
diff --git a/arch/mips/mti-sead3/sead3-reset.c b/arch/mips/mti-sead3/sead3-reset.c
index 20475c5e7b9c..e6fb24414a70 100644
--- a/arch/mips/mti-sead3/sead3-reset.c
+++ b/arch/mips/mti-sead3/sead3-reset.c
@@ -9,7 +9,9 @@
 #include <linux/pm.h>
 
 #include <asm/reboot.h>
-#include <asm/mips-boards/generic.h>
+
+#define SOFTRES_REG     0x1f000050
+#define GORESET         0x4d
 
 static void mips_machine_restart(char *command)
 {
@@ -35,5 +37,4 @@ static int __init mips_reboot_setup(void)
 
         return 0;
 }
-
 arch_initcall(mips_reboot_setup);
diff --git a/arch/mips/mti-sead3/sead3-time.c b/arch/mips/mti-sead3/sead3-time.c
index 96b42eb9b5e2..a43ea3cc0a3b 100644
--- a/arch/mips/mti-sead3/sead3-time.c
+++ b/arch/mips/mti-sead3/sead3-time.c
@@ -91,7 +91,7 @@ static void __init plat_perf_setup(void)
         }
 }
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
         if (cpu_has_vint)
                 set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
diff --git a/arch/mips/netlogic/Kconfig b/arch/mips/netlogic/Kconfig
index e0873a31ebaa..2447bf97d35a 100644
--- a/arch/mips/netlogic/Kconfig
+++ b/arch/mips/netlogic/Kconfig
@@ -51,4 +51,15 @@ endif
 config NLM_COMMON
         bool
 
+config IOMMU_HELPER
+        bool
+
+config NEED_SG_DMA_LENGTH
+        bool
+
+config SWIOTLB
+        def_bool y
+        select NEED_SG_DMA_LENGTH
+        select IOMMU_HELPER
+
 endif
diff --git a/arch/mips/netlogic/common/Makefile b/arch/mips/netlogic/common/Makefile
index 291372a086f5..362739d62b1d 100644
--- a/arch/mips/netlogic/common/Makefile
+++ b/arch/mips/netlogic/common/Makefile
@@ -1,3 +1,5 @@
 obj-y                           += irq.o time.o
+obj-y                           += nlm-dma.o
+obj-y                           += reset.o
 obj-$(CONFIG_SMP)               += smp.o smpboot.o
 obj-$(CONFIG_EARLY_PRINTK)      += earlycons.o
diff --git a/arch/mips/netlogic/common/irq.c b/arch/mips/netlogic/common/irq.c
index 9f84c60bf535..1c7e3a1b81ab 100644
--- a/arch/mips/netlogic/common/irq.c
+++ b/arch/mips/netlogic/common/irq.c
@@ -40,6 +40,10 @@
 #include <linux/slab.h>
 #include <linux/irq.h>
 
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
 #include <asm/errno.h>
 #include <asm/signal.h>
 #include <asm/ptrace.h>
@@ -223,17 +227,6 @@ static void nlm_init_node_irqs(int node)
         nodep->irqmask = irqmask;
 }
 
-void __init arch_init_irq(void)
-{
-        /* Initialize the irq descriptors */
-        nlm_init_percpu_irqs();
-        nlm_init_node_irqs(0);
-        write_c0_eimr(nlm_current_node()->irqmask);
-#if defined(CONFIG_CPU_XLR)
-        nlm_setup_fmn_irq();
-#endif
-}
-
 void nlm_smp_irq_init(int hwcpuid)
 {
         int node, cpu;
@@ -253,13 +246,12 @@ asmlinkage void plat_irq_dispatch(void)
 
         node = nlm_nodeid();
         eirr = read_c0_eirr_and_eimr();
-
-        i = __ilog2_u64(eirr);
-        if (i == -1)
+        if (eirr == 0)
                 return;
 
+        i = __ffs64(eirr);
         /* per-CPU IRQs don't need translation */
-        if (eirr & PERCPU_IRQ_MASK) {
+        if (i < PIC_IRQ_BASE) {
                 do_IRQ(i);
                 return;
         }
@@ -267,3 +259,56 @@ asmlinkage void plat_irq_dispatch(void)
         /* top level irq handling */
         do_IRQ(nlm_irq_to_xirq(node, i));
 }
+
+#ifdef CONFIG_OF
+static struct irq_domain *xlp_pic_domain;
+
+static const struct irq_domain_ops xlp_pic_irq_domain_ops = {
+        .xlate = irq_domain_xlate_onetwocell,
+};
+
+static int __init xlp_of_pic_init(struct device_node *node,
+                                        struct device_node *parent)
+{
+        const int n_picirqs = PIC_IRT_LAST_IRQ - PIC_IRQ_BASE + 1;
+        struct resource res;
+        int socid, ret;
+
+        /* we need a hack to get the PIC's SoC chip id */
+        ret = of_address_to_resource(node, 0, &res);
+        if (ret < 0) {
+                pr_err("PIC %s: reg property not found!\n", node->name);
+                return -EINVAL;
+        }
+        socid = (res.start >> 18) & 0x3;
+        xlp_pic_domain = irq_domain_add_legacy(node, n_picirqs,
+                nlm_irq_to_xirq(socid, PIC_IRQ_BASE), PIC_IRQ_BASE,
+                &xlp_pic_irq_domain_ops, NULL);
+        if (xlp_pic_domain == NULL) {
+                pr_err("PIC %s: Creating legacy domain failed!\n", node->name);
+                return -EINVAL;
+        }
+        pr_info("Node %d: IRQ domain created for PIC@%pa\n", socid,
+                                                        &res.start);
+        return 0;
+}
+
+static struct of_device_id __initdata xlp_pic_irq_ids[] = {
+        { .compatible = "netlogic,xlp-pic", .data = xlp_of_pic_init },
+        {},
+};
+#endif
+
+void __init arch_init_irq(void)
+{
+        /* Initialize the irq descriptors */
+        nlm_init_percpu_irqs();
+        nlm_init_node_irqs(0);
+        write_c0_eimr(nlm_current_node()->irqmask);
+#if defined(CONFIG_CPU_XLR)
+        nlm_setup_fmn_irq();
+#endif
+#if defined(CONFIG_OF)
+        of_irq_init(xlp_pic_irq_ids);
+#endif
+}
diff --git a/arch/mips/netlogic/common/nlm-dma.c b/arch/mips/netlogic/common/nlm-dma.c
new file mode 100644
index 000000000000..f3d4ae87abc7
--- /dev/null
+++ b/arch/mips/netlogic/common/nlm-dma.c
@@ -0,0 +1,107 @@
+/*
+*  Copyright (C) 2003-2013 Broadcom Corporation
+*  All Rights Reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the Broadcom
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <linux/dma-mapping.h>
+#include <linux/scatterlist.h>
+#include <linux/bootmem.h>
+#include <linux/export.h>
+#include <linux/swiotlb.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+
+#include <asm/bootinfo.h>
+
+static char *nlm_swiotlb;
+
+static void *nlm_dma_alloc_coherent(struct device *dev, size_t size,
+        dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)
+{
+        void *ret;
+
+        if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
+                return ret;
+
+        /* ignore region specifiers */
+        gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
+
+#ifdef CONFIG_ZONE_DMA32
+        if (dev->coherent_dma_mask <= DMA_BIT_MASK(32))
+                gfp |= __GFP_DMA32;
+#endif
+
+        /* Don't invoke OOM killer */
+        gfp |= __GFP_NORETRY;
+
+        return swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
+}
+
+static void nlm_dma_free_coherent(struct device *dev, size_t size,
+        void *vaddr, dma_addr_t dma_handle, struct dma_attrs *attrs)
+{
+        int order = get_order(size);
+
+        if (dma_release_from_coherent(dev, order, vaddr))
+                return;
+
+        swiotlb_free_coherent(dev, size, vaddr, dma_handle);
+}
+
+struct dma_map_ops nlm_swiotlb_dma_ops = {
+        .alloc = nlm_dma_alloc_coherent,
+        .free = nlm_dma_free_coherent,
+        .map_page = swiotlb_map_page,
+        .unmap_page = swiotlb_unmap_page,
+        .map_sg = swiotlb_map_sg_attrs,
+        .unmap_sg = swiotlb_unmap_sg_attrs,
+        .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
+        .sync_single_for_device = swiotlb_sync_single_for_device,
+        .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
+        .sync_sg_for_device = swiotlb_sync_sg_for_device,
+        .mapping_error = swiotlb_dma_mapping_error,
+        .dma_supported = swiotlb_dma_supported
+};
+
+void __init plat_swiotlb_setup(void)
+{
+        size_t swiotlbsize;
+        unsigned long swiotlb_nslabs;
+
+        swiotlbsize = 1 << 20; /* 1 MB for now */
+        swiotlb_nslabs = swiotlbsize >> IO_TLB_SHIFT;
+        swiotlb_nslabs = ALIGN(swiotlb_nslabs, IO_TLB_SEGSIZE);
+        swiotlbsize = swiotlb_nslabs << IO_TLB_SHIFT;
+
+        nlm_swiotlb = alloc_bootmem_low_pages(swiotlbsize);
+        swiotlb_init_with_tbl(nlm_swiotlb, swiotlb_nslabs, 1);
+}
diff --git a/arch/mips/netlogic/common/reset.S b/arch/mips/netlogic/common/reset.S
new file mode 100644
index 000000000000..adb18288a6c0
--- /dev/null
+++ b/arch/mips/netlogic/common/reset.S
@@ -0,0 +1,230 @@
+/*
+ * Copyright 2003-2013 Broadcom Corporation.
+ * All Rights Reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the Broadcom
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/init.h>
+
+#include <asm/asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+#include <asm/stackframe.h>
+#include <asm/asmmacro.h>
+#include <asm/addrspace.h>
+
+#include <asm/netlogic/common.h>
+
+#include <asm/netlogic/xlp-hal/iomap.h>
+#include <asm/netlogic/xlp-hal/xlp.h>
+#include <asm/netlogic/xlp-hal/sys.h>
+#include <asm/netlogic/xlp-hal/cpucontrol.h>
+
+#define CP0_EBASE       $15
+#define SYS_CPU_COHERENT_BASE(node)     CKSEG1ADDR(XLP_DEFAULT_IO_BASE) + \
+                        XLP_IO_SYS_OFFSET(node) + XLP_IO_PCI_HDRSZ + \
+                        SYS_CPU_NONCOHERENT_MODE * 4
+
+/* Enable XLP features and workarounds in the LSU */
+.macro xlp_config_lsu
+        li      t0, LSU_DEFEATURE
+        mfcr    t1, t0
+
+        lui     t2, 0xc080      /* SUE, Enable Unaligned Access, L2HPE */
+        or      t1, t1, t2
+        mtcr    t1, t0
+
+        li      t0, ICU_DEFEATURE
+        mfcr    t1, t0
+        ori     t1, 0x1000      /* Enable Icache partitioning */
+        mtcr    t1, t0
+
+        li      t0, SCHED_DEFEATURE
+        lui     t1, 0x0100      /* Disable BRU accepting ALU ops */
+        mtcr    t1, t0
+.endm
+
+/*
+ * Low level flush for L1D cache on XLP, the normal cache ops does
+ * not do the complete and correct cache flush.
+ */
+.macro  xlp_flush_l1_dcache
+        li      t0, LSU_DEBUG_DATA0
+        li      t1, LSU_DEBUG_ADDR
+        li      t2, 0           /* index */
+        li      t3, 0x1000      /* loop count */
+1:
+        sll     v0, t2, 5
+        mtcr    zero, t0
+        ori     v1, v0, 0x3     /* way0 | write_enable | write_active */
+        mtcr    v1, t1
+2:
+        mfcr    v1, t1
+        andi    v1, 0x1         /* wait for write_active == 0 */
+        bnez    v1, 2b
+        nop
+        mtcr    zero, t0
+        ori     v1, v0, 0x7     /* way1 | write_enable | write_active */
+        mtcr    v1, t1
+3:
+        mfcr    v1, t1
+        andi    v1, 0x1         /* wait for write_active == 0 */
+        bnez    v1, 3b
+        nop
+        addi    t2, 1
+        bne     t3, t2, 1b
+        nop
+.endm
+
+/*
+ * nlm_reset_entry will be copied to the reset entry point for
+ * XLR and XLP. The XLP cores start here when they are woken up. This
+ * is also the NMI entry point.
+ *
+ * We use scratch reg 6/7 to save k0/k1 and check for NMI first.
+ *
+ * The data corresponding to reset/NMI is stored at RESET_DATA_PHYS
+ * location, this will have the thread mask (used when core is woken up)
+ * and the current NMI handler in case we reached here for an NMI.
+ *
+ * When a core or thread is newly woken up, it marks itself ready and
+ * loops in a 'wait'. When the CPU really needs waking up, we send an NMI
+ * IPI to it, with the NMI handler set to prom_boot_secondary_cpus
+ */
+        .set    noreorder
+        .set    noat
+        .set    arch=xlr        /* for mfcr/mtcr, XLR is sufficient */
+
+FEXPORT(nlm_reset_entry)
+        dmtc0   k0, $22, 6
+        dmtc0   k1, $22, 7
+        mfc0    k0, CP0_STATUS
+        li      k1, 0x80000
+        and     k1, k0, k1
+        beqz    k1, 1f          /* go to real reset entry */
+        nop
+        li      k1, CKSEG1ADDR(RESET_DATA_PHYS) /* NMI */
+        ld      k0, BOOT_NMI_HANDLER(k1)
+        jr      k0
+        nop
+
+1:      /* Entry point on core wakeup */
+        mfc0    t0, CP0_EBASE, 1
+        mfc0    t1, CP0_EBASE, 1
+        srl     t1, 5
+        andi    t1, 0x3                 /* t1 <- node */
+        li      t2, 0x40000
+        mul     t3, t2, t1              /* t3 = node * 0x40000 */
+        srl     t0, t0, 2
+        and     t0, t0, 0x7             /* t0 <- core */
+        li      t1, 0x1
+        sll     t0, t1, t0
+        nor     t0, t0, zero            /* t0 <- ~(1 << core) */
+        li      t2, SYS_CPU_COHERENT_BASE(0)
+        add     t2, t2, t3              /* t2 <- SYS offset for node */
+        lw      t1, 0(t2)
+        and     t1, t1, t0
+        sw      t1, 0(t2)
+
+        /* read back to ensure complete */
+        lw      t1, 0(t2)
+        sync
+
+        /* Configure LSU on Non-0 Cores. */
+        xlp_config_lsu
+        /* FALL THROUGH */
+
+/*
+ * Wake up sibling threads from the initial thread in
+ * a core.
+ */
+EXPORT(nlm_boot_siblings)
+        /* core L1D flush before enable threads */
+        xlp_flush_l1_dcache
+        /* Enable hw threads by writing to MAP_THREADMODE of the core */
+        li      t0, CKSEG1ADDR(RESET_DATA_PHYS)
+        lw      t1, BOOT_THREAD_MODE(t0)        /* t1 <- thread mode */
+        li      t0, ((CPU_BLOCKID_MAP << 8) | MAP_THREADMODE)
+        mfcr    t2, t0
+        or      t2, t2, t1
+        mtcr    t2, t0
+
+        /*
+         * The new hardware thread starts at the next instruction
+         * For all the cases other than core 0 thread 0, we will
+        * jump to the secondary wait function.
+        */
+        mfc0    v0, CP0_EBASE, 1
+        andi    v0, 0x3ff               /* v0 <- node/core */
+
+        beqz    v0, 4f          /* boot cpu (cpuid == 0)? */
+        nop
+
+        /* setup status reg */
+        move    t1, zero
+#ifdef CONFIG_64BIT
+        ori     t1, ST0_KX
+#endif
+        mtc0    t1, CP0_STATUS
+
+        /* mark CPU ready, careful here, previous mtcr trashed registers */
+        li      t3, CKSEG1ADDR(RESET_DATA_PHYS)
+        ADDIU   t1, t3, BOOT_CPU_READY
+        sll     v1, v0, 2
+        PTR_ADDU t1, v1
+        li      t2, 1
+        sw      t2, 0(t1)
+        /* Wait until NMI hits */
+3:      wait
+        b       3b
+        nop
+
+        /*
+         * For the boot CPU, we have to restore registers and
+         * return
+         */
+4:      dmfc0   t0, $4, 2       /* restore SP from UserLocal */
+        li      t1, 0xfadebeef
+        dmtc0   t1, $4, 2       /* restore SP from UserLocal */
+        PTR_SUBU sp, t0, PT_SIZE
+        RESTORE_ALL
+        jr      ra
+        nop
+EXPORT(nlm_reset_entry_end)
+
+LEAF(nlm_init_boot_cpu)
+#ifdef CONFIG_CPU_XLP
+        xlp_config_lsu
+#endif
+        jr      ra
+        nop
+END(nlm_init_boot_cpu)
diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index ffba52489bef..4e35d9c453e2 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -116,7 +116,7 @@ void nlm_early_init_secondary(int cpu)
 /*
  * Code to run on secondary just after probing the CPU
  */
-static void __cpuinit nlm_init_secondary(void)
+static void nlm_init_secondary(void)
 {
         int hwtid;
 
@@ -145,7 +145,6 @@ void nlm_cpus_done(void)
  * Boot all other cpus in the system, initialize them, and bring them into
  * the boot function
  */
-int nlm_cpu_ready[NR_CPUS];
 unsigned long nlm_next_gp;
 unsigned long nlm_next_sp;
 static cpumask_t phys_cpu_present_mask;
@@ -168,6 +167,7 @@ void __init nlm_smp_setup(void)
 {
         unsigned int boot_cpu;
         int num_cpus, i, ncore;
+        volatile u32 *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY);
         char buf[64];
 
         boot_cpu = hard_smp_processor_id();
@@ -181,10 +181,10 @@ void __init nlm_smp_setup(void)
         num_cpus = 1;
         for (i = 0; i < NR_CPUS; i++) {
                 /*
-                 * nlm_cpu_ready array is not set for the boot_cpu,
+                 * cpu_ready array is not set for the boot_cpu,
                  * it is only set for ASPs (see smpboot.S)
                  */
-                if (nlm_cpu_ready[i]) {
+                if (cpu_ready[i]) {
                         cpumask_set_cpu(i, &phys_cpu_present_mask);
                         __cpu_number_map[i] = num_cpus;
                         __cpu_logical_map[num_cpus] = i;
@@ -252,23 +252,17 @@ unsupp:
         return 0;
 }
 
-int __cpuinit nlm_wakeup_secondary_cpus(void)
+int nlm_wakeup_secondary_cpus(void)
 {
-        unsigned long reset_vec;
-        char *reset_data;
+        u32 *reset_data;
         int threadmode;
 
-        /* Update reset entry point with CPU init code */
-        reset_vec = CKSEG1ADDR(RESET_VEC_PHYS);
-        memcpy((void *)reset_vec, (void *)nlm_reset_entry,
-                        (nlm_reset_entry_end - nlm_reset_entry));
-
         /* verify the mask and setup core config variables */
         threadmode = nlm_parse_cpumask(&nlm_cpumask);
 
         /* Setup CPU init parameters */
-        reset_data = (char *)CKSEG1ADDR(RESET_DATA_PHYS);
-        *(int *)(reset_data + BOOT_THREAD_MODE) = threadmode;
+        reset_data = nlm_get_boot_data(BOOT_THREAD_MODE);
+        *reset_data = threadmode;
 
 #ifdef CONFIG_CPU_XLP
         xlp_wakeup_secondary_cpus();
diff --git a/arch/mips/netlogic/common/smpboot.S b/arch/mips/netlogic/common/smpboot.S
index 026517488584..aa6cff0a229b 100644
--- a/arch/mips/netlogic/common/smpboot.S
+++ b/arch/mips/netlogic/common/smpboot.S
@@ -50,197 +50,12 @@
 #include <asm/netlogic/xlp-hal/cpucontrol.h>
 
 #define CP0_EBASE       $15
-#define SYS_CPU_COHERENT_BASE(node)     CKSEG1ADDR(XLP_DEFAULT_IO_BASE) + \
-                        XLP_IO_SYS_OFFSET(node) + XLP_IO_PCI_HDRSZ + \
-                        SYS_CPU_NONCOHERENT_MODE * 4
-
-#define XLP_AX_WORKAROUND       /* enable Ax silicon workarounds */
-
-/* Enable XLP features and workarounds in the LSU */
-.macro xlp_config_lsu
-        li      t0, LSU_DEFEATURE
-        mfcr    t1, t0
-
-        lui     t2, 0xc080      /* SUE, Enable Unaligned Access, L2HPE */
-        or      t1, t1, t2
-#ifdef XLP_AX_WORKAROUND
-        li      t2, ~0xe        /* S1RCM */
-        and     t1, t1, t2
-#endif
-        mtcr    t1, t0
-
-        li      t0, ICU_DEFEATURE
-        mfcr    t1, t0
-        ori     t1, 0x1000      /* Enable Icache partitioning */
-        mtcr    t1, t0
-
-
-#ifdef XLP_AX_WORKAROUND
-        li      t0, SCHED_DEFEATURE
-        lui     t1, 0x0100      /* Disable BRU accepting ALU ops */
-        mtcr    t1, t0
-#endif
-.endm
-
-/*
- * This is the code that will be copied to the reset entry point for
- * XLR and XLP. The XLP cores start here when they are woken up. This
- * is also the NMI entry point.
- */
-.macro  xlp_flush_l1_dcache
-        li      t0, LSU_DEBUG_DATA0
-        li      t1, LSU_DEBUG_ADDR
-        li      t2, 0           /* index */
-        li      t3, 0x1000      /* loop count */
-1:
-        sll     v0, t2, 5
-        mtcr    zero, t0
-        ori     v1, v0, 0x3     /* way0 | write_enable | write_active */
-        mtcr    v1, t1
-2:
-        mfcr    v1, t1
-        andi    v1, 0x1         /* wait for write_active == 0 */
-        bnez    v1, 2b
-        nop
-        mtcr    zero, t0
-        ori     v1, v0, 0x7     /* way1 | write_enable | write_active */
-        mtcr    v1, t1
-3:
-        mfcr    v1, t1
-        andi    v1, 0x1         /* wait for write_active == 0 */
-        bnez    v1, 3b
-        nop
-        addi    t2, 1
-        bne     t3, t2, 1b
-        nop
-.endm
-
-/*
- * The cores can come start when they are woken up. This is also the NMI
- * entry, so check that first.
- *
- * The data corresponding to reset/NMI is stored at RESET_DATA_PHYS
- * location, this will have the thread mask (used when core is woken up)
- * and the current NMI handler in case we reached here for an NMI.
- *
- * When a core or thread is newly woken up, it loops in a 'wait'. When
- * the CPU really needs waking up, we send an NMI to it, with the NMI
- * handler set to prom_boot_secondary_cpus
- */
 
         .set    noreorder
         .set    noat
-        .set    arch=xlr        /* for mfcr/mtcr, XLR is sufficient */
-
-FEXPORT(nlm_reset_entry)
-        dmtc0   k0, $22, 6
-        dmtc0   k1, $22, 7
-        mfc0    k0, CP0_STATUS
-        li      k1, 0x80000
-        and     k1, k0, k1
-        beqz    k1, 1f          /* go to real reset entry */
-        nop
-        li      k1, CKSEG1ADDR(RESET_DATA_PHYS) /* NMI */
-        ld      k0, BOOT_NMI_HANDLER(k1)
-        jr      k0
-        nop
-
-1:      /* Entry point on core wakeup */
-        mfc0    t0, CP0_EBASE, 1
-        mfc0    t1, CP0_EBASE, 1
-        srl     t1, 5
-        andi    t1, 0x3                 /* t1 <- node */
-        li      t2, 0x40000
-        mul     t3, t2, t1              /* t3 = node * 0x40000 */
-        srl     t0, t0, 2
-        and     t0, t0, 0x7             /* t0 <- core */
-        li      t1, 0x1
-        sll     t0, t1, t0
-        nor     t0, t0, zero            /* t0 <- ~(1 << core) */
-        li      t2, SYS_CPU_COHERENT_BASE(0)
-        add     t2, t2, t3              /* t2 <- SYS offset for node */
-        lw      t1, 0(t2)
-        and     t1, t1, t0
-        sw      t1, 0(t2)
-
-        /* read back to ensure complete */
-        lw      t1, 0(t2)
-        sync
-
-        /* Configure LSU on Non-0 Cores. */
-        xlp_config_lsu
-        /* FALL THROUGH */
-
-/*
- * Wake up sibling threads from the initial thread in
- * a core.
- */
-EXPORT(nlm_boot_siblings)
-        /* core L1D flush before enable threads */
-        xlp_flush_l1_dcache
-        /* Enable hw threads by writing to MAP_THREADMODE of the core */
-        li      t0, CKSEG1ADDR(RESET_DATA_PHYS)
-        lw      t1, BOOT_THREAD_MODE(t0)        /* t1 <- thread mode */
-        li      t0, ((CPU_BLOCKID_MAP << 8) | MAP_THREADMODE)
-        mfcr    t2, t0
-        or      t2, t2, t1
-        mtcr    t2, t0
-
-        /*
-         * The new hardware thread starts at the next instruction
-         * For all the cases other than core 0 thread 0, we will
-        * jump to the secondary wait function.
-        */
-        mfc0    v0, CP0_EBASE, 1
-        andi    v0, 0x3ff               /* v0 <- node/core */
-
-        /* Init MMU in the first thread after changing THREAD_MODE
-         * register (Ax Errata?)
-         */
-        andi    v1, v0, 0x3             /* v1 <- thread id */
-        bnez    v1, 2f
-        nop
-
-        li      t0, MMU_SETUP
-        li      t1, 0
-        mtcr    t1, t0
-        _ehb
-
-2:      beqz    v0, 4f          /* boot cpu (cpuid == 0)? */
-        nop
-
-        /* setup status reg */
-        move    t1, zero
-#ifdef CONFIG_64BIT
-        ori     t1, ST0_KX
-#endif
-        mtc0    t1, CP0_STATUS
-        /* mark CPU ready */
-        PTR_LA  t1, nlm_cpu_ready
-        sll     v1, v0, 2
-        PTR_ADDU t1, v1
-        li      t2, 1
-        sw      t2, 0(t1)
-        /* Wait until NMI hits */
-3:      wait
-        j       3b
-        nop
-
-        /*
-         * For the boot CPU, we have to restore registers and
-         * return
-         */
-4:      dmfc0   t0, $4, 2       /* restore SP from UserLocal */
-        li      t1, 0xfadebeef
-        dmtc0   t1, $4, 2       /* restore SP from UserLocal */
-        PTR_SUBU sp, t0, PT_SIZE
-        RESTORE_ALL
-        jr   ra
-        nop
-EXPORT(nlm_reset_entry_end)
+        .set    arch=xlr                /* for mfcr/mtcr, XLR is sufficient */
 
 FEXPORT(xlp_boot_core0_siblings)        /* "Master" cpu starts from here */
-        xlp_config_lsu
         dmtc0   sp, $4, 2               /* SP saved in UserLocal */
         SAVE_ALL
         sync
@@ -255,7 +70,6 @@ FEXPORT(xlp_boot_core0_siblings)	/* "Master" cpu starts from here */
         nop
         /* not reached */
 
-        __CPUINIT
 NESTED(nlm_boot_secondary_cpus, 16, sp)
         /* Initialize CP0 Status */
         move    t1, zero
@@ -279,7 +93,6 @@ NESTED(nlm_boot_secondary_cpus, 16, sp)
         jr      t0
         nop
 END(nlm_boot_secondary_cpus)
-        __FINIT
 
 /*
  * In case of RMIboot bootloader which is used on XLR boards, the CPUs
@@ -287,15 +100,15 @@ END(nlm_boot_secondary_cpus)
  * This will get them out of the bootloader code and into linux. Needed
  *  because the bootloader area will be taken and initialized by linux.
  */
-        __CPUINIT
 NESTED(nlm_rmiboot_preboot, 16, sp)
         mfc0    t0, $15, 1      /* read ebase */
         andi    t0, 0x1f        /* t0 has the processor_id() */
         andi    t2, t0, 0x3     /* thread num */
         sll     t0, 2           /* offset in cpu array */
 
-        PTR_LA  t1, nlm_cpu_ready /* mark CPU ready */
-        PTR_ADDU t1, t0
+        li      t3, CKSEG1ADDR(RESET_DATA_PHYS)
+        ADDIU   t1, t3, BOOT_CPU_READY
+        ADDU    t1, t0
         li      t3, 1
         sw      t3, 0(t1)
 
@@ -321,7 +134,6 @@ NESTED(nlm_rmiboot_preboot, 16, sp)
         mtcr    t1, t0          /* update core control */
 
 1:      wait
-        j       1b
+        b       1b
         nop
 END(nlm_rmiboot_preboot)
-        __FINIT
diff --git a/arch/mips/netlogic/common/time.c b/arch/mips/netlogic/common/time.c
index 5c56555380bb..045a396c57ce 100644
--- a/arch/mips/netlogic/common/time.c
+++ b/arch/mips/netlogic/common/time.c
@@ -54,7 +54,7 @@
 #error "Unknown CPU"
 #endif
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
         return IRQ_TIMER;
 }
diff --git a/arch/mips/netlogic/dts/xlp_evp.dts b/arch/mips/netlogic/dts/xlp_evp.dts
index e14f42308064..06407033678e 100644
--- a/arch/mips/netlogic/dts/xlp_evp.dts
+++ b/arch/mips/netlogic/dts/xlp_evp.dts
@@ -76,10 +76,11 @@
                         };
                 };
                 pic: pic@4000 {
-                        interrupt-controller;
+                        compatible = "netlogic,xlp-pic";
                         #address-cells = <0>;
                         #interrupt-cells = <1>;
                         reg = <0 0x4000 0x200>;
+                        interrupt-controller;
                 };
 
                 nor_flash@1,0 {
diff --git a/arch/mips/netlogic/dts/xlp_svp.dts b/arch/mips/netlogic/dts/xlp_svp.dts
index 8af4bdbe5d99..9c5db102df53 100644
--- a/arch/mips/netlogic/dts/xlp_svp.dts
+++ b/arch/mips/netlogic/dts/xlp_svp.dts
@@ -76,10 +76,11 @@
                         };
                 };
                 pic: pic@4000 {
-                        interrupt-controller;
+                        compatible = "netlogic,xlp-pic";
                         #address-cells = <0>;
                         #interrupt-cells = <1>;
                         reg = <0 0x4000 0x200>;
+                        interrupt-controller;
                 };
 
                 nor_flash@1,0 {
diff --git a/arch/mips/netlogic/xlp/Makefile b/arch/mips/netlogic/xlp/Makefile
index a84d6ed3746c..85ac4a892ced 100644
--- a/arch/mips/netlogic/xlp/Makefile
+++ b/arch/mips/netlogic/xlp/Makefile
@@ -1,3 +1,3 @@
-obj-y                           += setup.o nlm_hal.o
+obj-y                           += setup.o nlm_hal.o cop2-ex.o dt.o
 obj-$(CONFIG_SMP)               += wakeup.o
 obj-$(CONFIG_USB)               += usb-init.o
diff --git a/arch/mips/netlogic/xlp/cop2-ex.c b/arch/mips/netlogic/xlp/cop2-ex.c
new file mode 100644
index 000000000000..52bc5de42005
--- /dev/null
+++ b/arch/mips/netlogic/xlp/cop2-ex.c
@@ -0,0 +1,118 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2013 Broadcom Corporation.
+ *
+ * based on arch/mips/cavium-octeon/cpu.c
+ * Copyright (C) 2009 Wind River Systems,
+ *   written by Ralf Baechle <ralf@linux-mips.org>
+ */
+#include <linux/init.h>
+#include <linux/irqflags.h>
+#include <linux/notifier.h>
+#include <linux/prefetch.h>
+#include <linux/sched.h>
+
+#include <asm/cop2.h>
+#include <asm/current.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+
+#include <asm/netlogic/mips-extns.h>
+
+/*
+ * 64 bit ops are done in inline assembly to support 32 bit
+ * compilation
+ */
+void nlm_cop2_save(struct nlm_cop2_state *r)
+{
+        asm volatile(
+                ".set   push\n"
+                ".set   noat\n"
+                "dmfc2  $1, $0, 0\n"
+                "sd     $1, 0(%1)\n"
+                "dmfc2  $1, $0, 1\n"
+                "sd     $1, 8(%1)\n"
+                "dmfc2  $1, $0, 2\n"
+                "sd     $1, 16(%1)\n"
+                "dmfc2  $1, $0, 3\n"
+                "sd     $1, 24(%1)\n"
+                "dmfc2  $1, $1, 0\n"
+                "sd     $1, 0(%2)\n"
+                "dmfc2  $1, $1, 1\n"
+                "sd     $1, 8(%2)\n"
+                "dmfc2  $1, $1, 2\n"
+                "sd     $1, 16(%2)\n"
+                "dmfc2  $1, $1, 3\n"
+                "sd     $1, 24(%2)\n"
+                ".set   pop\n"
+                : "=m"(*r)
+                : "r"(r->tx), "r"(r->rx));
+
+        r->tx_msg_status = __read_32bit_c2_register($2, 0);
+        r->rx_msg_status = __read_32bit_c2_register($3, 0) & 0x0fffffff;
+}
+
+void nlm_cop2_restore(struct nlm_cop2_state *r)
+{
+        u32 rstat;
+
+        asm volatile(
+                ".set   push\n"
+                ".set   noat\n"
+                "ld     $1, 0(%1)\n"
+                "dmtc2  $1, $0, 0\n"
+                "ld     $1, 8(%1)\n"
+                "dmtc2  $1, $0, 1\n"
+                "ld     $1, 16(%1)\n"
+                "dmtc2  $1, $0, 2\n"
+                "ld     $1, 24(%1)\n"
+                "dmtc2  $1, $0, 3\n"
+                "ld     $1, 0(%2)\n"
+                "dmtc2  $1, $1, 0\n"
+                "ld     $1, 8(%2)\n"
+                "dmtc2  $1, $1, 1\n"
+                "ld     $1, 16(%2)\n"
+                "dmtc2  $1, $1, 2\n"
+                "ld     $1, 24(%2)\n"
+                "dmtc2  $1, $1, 3\n"
+                ".set   pop\n"
+                : : "m"(*r), "r"(r->tx), "r"(r->rx));
+
+        __write_32bit_c2_register($2, 0, r->tx_msg_status);
+        rstat = __read_32bit_c2_register($3, 0) & 0xf0000000u;
+        __write_32bit_c2_register($3, 0, r->rx_msg_status | rstat);
+}
+
+static int nlm_cu2_call(struct notifier_block *nfb, unsigned long action,
+        void *data)
+{
+        unsigned long flags;
+        unsigned int status;
+
+        switch (action) {
+        case CU2_EXCEPTION:
+                if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
+                        break;
+                local_irq_save(flags);
+                KSTK_STATUS(current) |= ST0_CU2;
+                status = read_c0_status();
+                write_c0_status(status | ST0_CU2);
+                nlm_cop2_restore(&(current->thread.cp2));
+                write_c0_status(status & ~ST0_CU2);
+                local_irq_restore(flags);
+                pr_info("COP2 access enabled for pid %d (%s)\n",
+                                        current->pid, current->comm);
+                return NOTIFY_BAD;      /* Don't call default notifier */
+        }
+
+        return NOTIFY_OK;               /* Let default notifier send signals */
+}
+
+static int __init nlm_cu2_setup(void)
+{
+        return cu2_notifier(nlm_cu2_call, 0);
+}
+early_initcall(nlm_cu2_setup);
diff --git a/arch/mips/netlogic/xlp/dt.c b/arch/mips/netlogic/xlp/dt.c
new file mode 100644
index 000000000000..a15cdbb8d0bd
--- /dev/null
+++ b/arch/mips/netlogic/xlp/dt.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright 2003-2013 Broadcom Corporation.
+ * All Rights Reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the Broadcom
+ * license below:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/bootmem.h>
+
+#include <linux/of_fdt.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
+
+extern u32 __dtb_xlp_evp_begin[], __dtb_xlp_svp_begin[], __dtb_start[];
+
+void __init *xlp_dt_init(void *fdtp)
+{
+        if (!fdtp) {
+                switch (current_cpu_data.processor_id & 0xff00) {
+#ifdef CONFIG_DT_XLP_SVP
+                case PRID_IMP_NETLOGIC_XLP3XX:
+                        fdtp = __dtb_xlp_svp_begin;
+                        break;
+#endif
+#ifdef CONFIG_DT_XLP_EVP
+                case PRID_IMP_NETLOGIC_XLP8XX:
+                        fdtp = __dtb_xlp_evp_begin;
+                        break;
+#endif
+                default:
+                        /* Pick a built-in if any, and hope for the best */
+                        fdtp = __dtb_start;
+                        break;
+                }
+        }
+        initial_boot_params = fdtp;
+        return fdtp;
+}
+
+void __init device_tree_init(void)
+{
+        unsigned long base, size;
+
+        if (!initial_boot_params)
+                return;
+
+        base = virt_to_phys((void *)initial_boot_params);
+        size = be32_to_cpu(initial_boot_params->totalsize);
+
+        /* Before we do anything, lets reserve the dt blob */
+        reserve_bootmem(base, size, BOOTMEM_DEFAULT);
+
+        unflatten_device_tree();
+
+        /* free the space reserved for the dt blob */
+        free_bootmem(base, size);
+}
+
+static struct of_device_id __initdata xlp_ids[] = {
+        { .compatible = "simple-bus", },
+        {},
+};
+
+int __init xlp8xx_ds_publish_devices(void)
+{
+        if (!of_have_populated_dt())
+                return 0;
+        return of_platform_bus_probe(NULL, xlp_ids, NULL);
+}
+
+device_initcall(xlp8xx_ds_publish_devices);
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index eaa99d28cb8e..7b638f7be491 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -33,19 +33,13 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/serial_8250.h>
-#include <linux/pm.h>
-#include <linux/bootmem.h>
+#include <linux/of_fdt.h>
 
 #include <asm/idle.h>
 #include <asm/reboot.h>
 #include <asm/time.h>
 #include <asm/bootinfo.h>
 
-#include <linux/of_fdt.h>
-#include <linux/of_platform.h>
-#include <linux/of_device.h>
-
 #include <asm/netlogic/haldefs.h>
 #include <asm/netlogic/common.h>
 
@@ -57,7 +51,6 @@ uint64_t nlm_io_base;
 struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
 cpumask_t nlm_cpumask = CPU_MASK_CPU0;
 unsigned int nlm_threads_per_core;
-extern u32 __dtb_xlp_evp_begin[], __dtb_xlp_svp_begin[], __dtb_start[];
 
 static void nlm_linux_exit(void)
 {
@@ -68,41 +61,28 @@ static void nlm_linux_exit(void)
                 cpu_wait();
 }
 
-void __init plat_mem_setup(void)
+static void nlm_fixup_mem(void)
 {
-        void *fdtp;
+        const int pref_backup = 512;
+        int i;
+
+        for (i = 0; i < boot_mem_map.nr_map; i++) {
+                if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
+                        continue;
+                boot_mem_map.map[i].size -= pref_backup;
+        }
+}
 
+void __init plat_mem_setup(void)
+{
         panic_timeout   = 5;
         _machine_restart = (void (*)(char *))nlm_linux_exit;
         _machine_halt   = nlm_linux_exit;
         pm_power_off    = nlm_linux_exit;
 
-        /*
-         * If no FDT pointer is passed in, use the built-in FDT.
-         * device_tree_init() does not handle CKSEG0 pointers in
-         * 64-bit, so convert pointer.
-         */
-        fdtp = (void *)(long)fw_arg0;
-        if (!fdtp) {
-                switch (current_cpu_data.processor_id & 0xff00) {
-#ifdef CONFIG_DT_XLP_SVP
-                case PRID_IMP_NETLOGIC_XLP3XX:
-                        fdtp = __dtb_xlp_svp_begin;
-                        break;
-#endif
-#ifdef CONFIG_DT_XLP_EVP
-                case PRID_IMP_NETLOGIC_XLP8XX:
-                        fdtp = __dtb_xlp_evp_begin;
-                        break;
-#endif
-                default:
-                        /* Pick a built-in if any, and hope for the best */
-                        fdtp = __dtb_start;
-                        break;
-                }
-        }
-        fdtp = phys_to_virt(__pa(fdtp));
-        early_init_devtree(fdtp);
+        /* memory and bootargs from DT */
+        early_init_devtree(initial_boot_params);
+        nlm_fixup_mem();
 }
 
 const char *get_system_type(void)
@@ -131,9 +111,19 @@ void nlm_percpu_init(int hwcpuid)
 
 void __init prom_init(void)
 {
+        void *reset_vec;
+
         nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
+        nlm_init_boot_cpu();
         xlp_mmu_init();
         nlm_node_init(0);
+        xlp_dt_init((void *)(long)fw_arg0);
+
+        /* Update reset entry point with CPU init code */
+        reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
+        memset(reset_vec, 0, RESET_VEC_SIZE);
+        memcpy(reset_vec, (void *)nlm_reset_entry,
+                        (nlm_reset_entry_end - nlm_reset_entry));
 
 #ifdef CONFIG_SMP
         cpumask_setall(&nlm_cpumask);
@@ -145,36 +135,3 @@ void __init prom_init(void)
         register_smp_ops(&nlm_smp_ops);
 #endif
 }
-
-void __init device_tree_init(void)
-{
-        unsigned long base, size;
-
-        if (!initial_boot_params)
-                return;
-
-        base = virt_to_phys((void *)initial_boot_params);
-        size = be32_to_cpu(initial_boot_params->totalsize);
-
-        /* Before we do anything, lets reserve the dt blob */
-        reserve_bootmem(base, size, BOOTMEM_DEFAULT);
-
-        unflatten_device_tree();
-
-        /* free the space reserved for the dt blob */
-        free_bootmem(base, size);
-}
-
-static struct of_device_id __initdata xlp_ids[] = {
-        { .compatible = "simple-bus", },
-        {},
-};
-
-int __init xlp8xx_ds_publish_devices(void)
-{
-        if (!of_have_populated_dt())
-                return 0;
-        return of_platform_bus_probe(NULL, xlp_ids, NULL);
-}
-
-device_initcall(xlp8xx_ds_publish_devices);
diff --git a/arch/mips/netlogic/xlp/usb-init.c b/arch/mips/netlogic/xlp/usb-init.c
index 9c401dd78337..ef3897ef0dc7 100644
--- a/arch/mips/netlogic/xlp/usb-init.c
+++ b/arch/mips/netlogic/xlp/usb-init.c
@@ -119,7 +119,7 @@ static u64 xlp_usb_dmamask = ~(u32)0;
 static void nlm_usb_fixup_final(struct pci_dev *dev)
 {
         dev->dev.dma_mask               = &xlp_usb_dmamask;
-        dev->dev.coherent_dma_mask      = DMA_BIT_MASK(64);
+        dev->dev.coherent_dma_mask      = DMA_BIT_MASK(32);
         switch (dev->devfn) {
         case 0x10:
                 dev->irq = PIC_EHCI_0_IRQ;
diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c
index abb3e08cc052..0cce37cbffef 100644
--- a/arch/mips/netlogic/xlp/wakeup.c
+++ b/arch/mips/netlogic/xlp/wakeup.c
@@ -77,12 +77,28 @@ static int xlp_wakeup_core(uint64_t sysbase, int node, int core)
         return count != 0;
 }
 
+static int wait_for_cpus(int cpu, int bootcpu)
+{
+        volatile uint32_t *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY);
+        int i, count, notready;
+
+        count = 0x20000000;
+        do {
+                notready = nlm_threads_per_core;
+                for (i = 0; i < nlm_threads_per_core; i++)
+                        if (cpu_ready[cpu + i] || cpu == bootcpu)
+                                --notready;
+        } while (notready != 0 && --count > 0);
+
+        return count != 0;
+}
+
 static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
 {
         struct nlm_soc_info *nodep;
         uint64_t syspcibase;
         uint32_t syscoremask;
-        int core, n, cpu, count, val;
+        int core, n, cpu;
 
         for (n = 0; n < NLM_NR_NODES; n++) {
                 syspcibase = nlm_get_sys_pcibase(n);
@@ -122,11 +138,8 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
                         /* core is up */
                         nodep->coremask |= 1u << core;
 
-                        /* spin until the first hw thread sets its ready */
-                        count = 0x20000000;
-                        do {
-                                val = *(volatile int *)&nlm_cpu_ready[cpu];
-                        } while (val == 0 && --count > 0);
+                        /* spin until the hw threads sets their ready */
+                        wait_for_cpus(cpu, 0);
                 }
         }
 }
@@ -138,6 +151,7 @@ void xlp_wakeup_secondary_cpus()
          * first wakeup core 0 threads
          */
         xlp_boot_core0_siblings();
+        wait_for_cpus(0, 0);
 
         /* now get other cores out of reset */
         xlp_enable_secondary_cores(&nlm_cpumask);
diff --git a/arch/mips/netlogic/xlr/fmn.c b/arch/mips/netlogic/xlr/fmn.c
index 4d74f03de506..d428e8471eec 100644
--- a/arch/mips/netlogic/xlr/fmn.c
+++ b/arch/mips/netlogic/xlr/fmn.c
@@ -74,13 +74,13 @@ static irqreturn_t fmn_message_handler(int irq, void *data)
         struct nlm_fmn_msg msg;
         uint32_t mflags, bkt_status;
 
-        mflags = nlm_cop2_enable();
+        mflags = nlm_cop2_enable_irqsave();
         /* Disable message ring interrupt */
         nlm_fmn_setup_intr(irq, 0);
         while (1) {
                 /* 8 bkts per core, [24:31] each bit represents one bucket
                  * Bit is Zero if bucket is not empty */
-                bkt_status = (nlm_read_c2_status() >> 24) & 0xff;
+                bkt_status = (nlm_read_c2_status0() >> 24) & 0xff;
                 if (bkt_status == 0xff)
                         break;
                 for (bucket = 0; bucket < 8; bucket++) {
@@ -97,16 +97,16 @@ static irqreturn_t fmn_message_handler(int irq, void *data)
                                 pr_warn("No msgring handler for stnid %d\n",
                                                 src_stnid);
                         else {
-                                nlm_cop2_restore(mflags);
+                                nlm_cop2_disable_irqrestore(mflags);
                                 hndlr->action(bucket, src_stnid, size, code,
                                         &msg, hndlr->arg);
-                                mflags = nlm_cop2_enable();
+                                mflags = nlm_cop2_enable_irqsave();
                         }
                 }
         };
         /* Enable message ring intr, to any thread in core */
         nlm_fmn_setup_intr(irq, (1 << nlm_threads_per_core) - 1);
-        nlm_cop2_restore(mflags);
+        nlm_cop2_disable_irqrestore(mflags);
         return IRQ_HANDLED;
 }
 
@@ -128,7 +128,7 @@ void xlr_percpu_fmn_init(void)
 
         bucket_sizes = xlr_board_fmn_config.bucket_size;
         cpu_fmn_info = &xlr_board_fmn_config.cpu[id];
-        flags = nlm_cop2_enable();
+        flags = nlm_cop2_enable_irqsave();
 
         /* Setup bucket sizes for the core. */
         nlm_write_c2_bucksize(0, bucket_sizes[id * 8 + 0]);
@@ -166,7 +166,7 @@ void xlr_percpu_fmn_init(void)
 
         /* enable FMN interrupts on this CPU */
         nlm_fmn_setup_intr(IRQ_FMN, (1 << nlm_threads_per_core) - 1);
-        nlm_cop2_restore(flags);
+        nlm_cop2_disable_irqrestore(flags);
 }
 
 
@@ -198,7 +198,7 @@ void nlm_setup_fmn_irq(void)
         /* setup irq only once */
         setup_irq(IRQ_FMN, &fmn_irqaction);
 
-        flags = nlm_cop2_enable();
+        flags = nlm_cop2_enable_irqsave();
         nlm_fmn_setup_intr(IRQ_FMN, (1 << nlm_threads_per_core) - 1);
-        nlm_cop2_restore(flags);
+        nlm_cop2_disable_irqrestore(flags);
 }
diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c
index 89c8c1066632..214d123b79fa 100644
--- a/arch/mips/netlogic/xlr/setup.c
+++ b/arch/mips/netlogic/xlr/setup.c
@@ -196,6 +196,7 @@ void __init prom_init(void)
 {
         int *argv, *envp;               /* passed as 32 bit ptrs */
         struct psb_info *prom_infop;
+        void *reset_vec;
 #ifdef CONFIG_SMP
         int i;
 #endif
@@ -208,6 +209,12 @@ void __init prom_init(void)
         nlm_prom_info = *prom_infop;
         nlm_init_node();
 
+        /* Update reset entry point with CPU init code */
+        reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
+        memset(reset_vec, 0, RESET_VEC_SIZE);
+        memcpy(reset_vec, (void *)nlm_reset_entry,
+                        (nlm_reset_entry_end - nlm_reset_entry));
+
         nlm_early_serial_setup();
         build_arcs_cmdline(argv);
         prom_add_memory();
diff --git a/arch/mips/netlogic/xlr/wakeup.c b/arch/mips/netlogic/xlr/wakeup.c
index 3ebf7411d67b..9fb81fa6272a 100644
--- a/arch/mips/netlogic/xlr/wakeup.c
+++ b/arch/mips/netlogic/xlr/wakeup.c
@@ -49,10 +49,11 @@
 #include <asm/netlogic/xlr/iomap.h>
 #include <asm/netlogic/xlr/pic.h>
 
-int __cpuinit xlr_wakeup_secondary_cpus(void)
+int xlr_wakeup_secondary_cpus(void)
 {
         struct nlm_soc_info *nodep;
         unsigned int i, j, boot_cpu;
+        volatile u32 *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY);
 
         /*
          *  In case of RMI boot, hit with NMI to get the cores
@@ -71,7 +72,7 @@ int __cpuinit xlr_wakeup_secondary_cpus(void)
         nodep->coremask = 1;
         for (i = 1; i < NLM_CORES_PER_NODE; i++) {
                 for (j = 1000000; j > 0; j--) {
-                        if (nlm_cpu_ready[i * NLM_THREADS_PER_CORE])
+                        if (cpu_ready[i * NLM_THREADS_PER_CORE])
                                 break;
                         udelay(10);
                 }
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 2cb1d315d225..c382042911dd 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_LASAT)		+= pci-lasat.o
 obj-$(CONFIG_MIPS_COBALT)       += fixup-cobalt.o
 obj-$(CONFIG_LEMOTE_FULOONG2E)  += fixup-fuloong2e.o ops-loongson2.o
 obj-$(CONFIG_LEMOTE_MACH2F)     += fixup-lemote2f.o ops-loongson2.o
-obj-$(CONFIG_MIPS_MALTA)        += fixup-malta.o
+obj-$(CONFIG_MIPS_MALTA)        += fixup-malta.o pci-malta.o
 obj-$(CONFIG_PMC_MSP7120_GW)    += fixup-pmcmsp.o ops-pmcmsp.o
 obj-$(CONFIG_PMC_MSP7120_EVAL)  += fixup-pmcmsp.o ops-pmcmsp.o
 obj-$(CONFIG_PMC_MSP7120_FPGA)  += fixup-pmcmsp.o ops-pmcmsp.o
@@ -52,12 +52,11 @@ obj-$(CONFIG_TOSHIBA_RBTX4927)	+= fixup-rbtx4927.o
 obj-$(CONFIG_TOSHIBA_RBTX4938)  += fixup-rbtx4938.o
 obj-$(CONFIG_VICTOR_MPC30X)     += fixup-mpc30x.o
 obj-$(CONFIG_ZAO_CAPCELLA)      += fixup-capcella.o
-obj-$(CONFIG_WR_PPMC)           += fixup-wrppmc.o
 obj-$(CONFIG_MIKROTIK_RB532)    += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
-obj-$(CONFIG_CPU_CAVIUM_OCTEON) += pci-octeon.o pcie-octeon.o
+obj-$(CONFIG_CAVIUM_OCTEON_SOC) += pci-octeon.o pcie-octeon.o
 obj-$(CONFIG_CPU_XLR)           += pci-xlr.o
 obj-$(CONFIG_CPU_XLP)           += pci-xlp.o
 
 ifdef CONFIG_PCI_MSI
-obj-$(CONFIG_CPU_CAVIUM_OCTEON) += msi-octeon.o
+obj-$(CONFIG_CAVIUM_OCTEON_SOC) += msi-octeon.o
 endif
diff --git a/arch/mips/pci/fixup-wrppmc.c b/arch/mips/pci/fixup-wrppmc.c
deleted file mode 100644
index 29737edd121f..000000000000
--- a/arch/mips/pci/fixup-wrppmc.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * fixup-wrppmc.c: PPMC board specific PCI fixup
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2006, Wind River Inc. Rongkai.zhan (rongkai.zhan@windriver.com)
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/gt64120.h>
-
-/* PCI interrupt pins */
-#define PCI_INTA                1
-#define PCI_INTB                2
-#define PCI_INTC                3
-#define PCI_INTD                4
-
-#define PCI_SLOT_MAXNR  32 /* Each PCI bus has 32 physical slots */
-
-static char pci_irq_tab[PCI_SLOT_MAXNR][5] __initdata = {
-        /* 0    INTA   INTB   INTC   INTD */
-        [0] = {0, 0, 0, 0, 0},          /* Slot 0: GT64120 PCI bridge */
-        [6] = {0, WRPPMC_PCI_INTA_IRQ, 0, 0, 0},
-};
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
-        return pci_irq_tab[slot][pin];
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
-        return 0;
-}
diff --git a/arch/mips/pci/pci-bcm63xx.c b/arch/mips/pci/pci-bcm63xx.c
index 2eb954239bc5..151d9b5870bb 100644
--- a/arch/mips/pci/pci-bcm63xx.c
+++ b/arch/mips/pci/pci-bcm63xx.c
@@ -266,7 +266,7 @@ static int __init bcm63xx_register_pci(void)
         /* setup PCI to local bus access, used by PCI device to target
          * local RAM while bus mastering */
         bcm63xx_int_cfg_writel(0, PCI_BASE_ADDRESS_3);
-        if (BCMCPU_IS_6358() || BCMCPU_IS_6368())
+        if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6368())
                 val = MPI_SP0_REMAP_ENABLE_MASK;
         else
                 val = 0;
@@ -338,6 +338,7 @@ static int __init bcm63xx_pci_init(void)
         case BCM6328_CPU_ID:
         case BCM6362_CPU_ID:
                 return bcm63xx_register_pcie();
+        case BCM3368_CPU_ID:
         case BCM6348_CPU_ID:
         case BCM6358_CPU_ID:
         case BCM6368_CPU_ID:
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 6eb65e44d9e4..162b4cb29dba 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -42,7 +42,7 @@ int irq_to_slot[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
 
 extern struct pci_ops bridge_pci_ops;
 
-int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
+int bridge_probe(nasid_t nasid, int widget_id, int masterwid)
 {
         unsigned long offset = NODE_OFFSET(nasid);
         struct bridge_controller *bc;
@@ -217,6 +217,7 @@ static void pci_fixup_ioc3(struct pci_dev *d)
         pci_disable_swapping(d);
 }
 
+#ifdef CONFIG_NUMA
 int pcibus_to_node(struct pci_bus *bus)
 {
         struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
@@ -224,6 +225,7 @@ int pcibus_to_node(struct pci_bus *bus)
         return bc->nasid;
 }
 EXPORT_SYMBOL(pcibus_to_node);
+#endif /* CONFIG_NUMA */
 
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
         pci_fixup_ioc3);
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/pci/pci-malta.c
index 37134ddfeaa5..37134ddfeaa5 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/pci/pci-malta.c
diff --git a/arch/mips/pmcs-msp71xx/Makefile b/arch/mips/pmcs-msp71xx/Makefile
index cefba7733b73..9201c8b3858d 100644
--- a/arch/mips/pmcs-msp71xx/Makefile
+++ b/arch/mips/pmcs-msp71xx/Makefile
@@ -3,7 +3,6 @@
 #
 obj-y += msp_prom.o msp_setup.o msp_irq.o \
          msp_time.o msp_serial.o msp_elb.o
-obj-$(CONFIG_HAVE_GPIO_LIB) += gpio.o gpio_extended.o
 obj-$(CONFIG_PMC_MSP7120_GW) += msp_hwbutton.o
 obj-$(CONFIG_IRQ_MSP_SLP) += msp_irq_slp.o
 obj-$(CONFIG_IRQ_MSP_CIC) += msp_irq_cic.o msp_irq_per.o
diff --git a/arch/mips/pmcs-msp71xx/gpio.c b/arch/mips/pmcs-msp71xx/gpio.c
deleted file mode 100644
index aaccbe524386..000000000000
--- a/arch/mips/pmcs-msp71xx/gpio.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- * Generic PMC MSP71xx GPIO handling. These base gpio are controlled by two
- * types of registers. The data register sets the output level when in output
- * mode and when in input mode will contain the value at the input. The config
- * register sets the various modes for each gpio.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * @author Patrick Glass <patrickglass@gmail.com>
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/gpio.h>
-#include <linux/spinlock.h>
-#include <linux/io.h>
-
-#define MSP71XX_CFG_OFFSET(gpio)        (4 * (gpio))
-#define CONF_MASK                       0x0F
-#define MSP71XX_GPIO_INPUT              0x01
-#define MSP71XX_GPIO_OUTPUT             0x08
-
-#define MSP71XX_GPIO_BASE               0x0B8400000L
-
-#define to_msp71xx_gpio_chip(c) container_of(c, struct msp71xx_gpio_chip, chip)
-
-static spinlock_t gpio_lock;
-
-/*
- * struct msp71xx_gpio_chip - container for gpio chip and registers
- * @chip: chip structure for the specified gpio bank
- * @data_reg: register for reading and writing the gpio pin value
- * @config_reg: register to set the mode for the gpio pin bank
- * @out_drive_reg: register to set the output drive mode for the gpio pin bank
- */
-struct msp71xx_gpio_chip {
-        struct gpio_chip chip;
-        void __iomem *data_reg;
-        void __iomem *config_reg;
-        void __iomem *out_drive_reg;
-};
-
-/*
- * msp71xx_gpio_get() - return the chip's gpio value
- * @chip: chip structure which controls the specified gpio
- * @offset: gpio whose value will be returned
- *
- * It will return 0 if gpio value is low and other if high.
- */
-static int msp71xx_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip);
-
-        return __raw_readl(msp_chip->data_reg) & (1 << offset);
-}
-
-/*
- * msp71xx_gpio_set() - set the output value for the gpio
- * @chip: chip structure who controls the specified gpio
- * @offset: gpio whose value will be assigned
- * @value: logic level to assign to the gpio initially
- *
- * This will set the gpio bit specified to the desired value. It will set the
- * gpio pin low if value is 0 otherwise it will be high.
- */
-static void msp71xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
-        struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip);
-        unsigned long flags;
-        u32 data;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        data = __raw_readl(msp_chip->data_reg);
-        if (value)
-                data |= (1 << offset);
-        else
-                data &= ~(1 << offset);
-        __raw_writel(data, msp_chip->data_reg);
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-
-/*
- * msp71xx_set_gpio_mode() - declare the mode for a gpio
- * @chip: chip structure which controls the specified gpio
- * @offset: gpio whose value will be assigned
- * @mode: desired configuration for the gpio (see datasheet)
- *
- * It will set the gpio pin config to the @mode value passed in.
- */
-static int msp71xx_set_gpio_mode(struct gpio_chip *chip,
-                                 unsigned offset, int mode)
-{
-        struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip);
-        const unsigned bit_offset = MSP71XX_CFG_OFFSET(offset);
-        unsigned long flags;
-        u32 cfg;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        cfg = __raw_readl(msp_chip->config_reg);
-        cfg &= ~(CONF_MASK << bit_offset);
-        cfg |= (mode << bit_offset);
-        __raw_writel(cfg, msp_chip->config_reg);
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-
-        return 0;
-}
-
-/*
- * msp71xx_direction_output() - declare the direction mode for a gpio
- * @chip: chip structure which controls the specified gpio
- * @offset: gpio whose value will be assigned
- * @value: logic level to assign to the gpio initially
- *
- * This call will set the mode for the @gpio to output. It will set the
- * gpio pin low if value is 0 otherwise it will be high.
- */
-static int msp71xx_direction_output(struct gpio_chip *chip,
-                                    unsigned offset, int value)
-{
-        msp71xx_gpio_set(chip, offset, value);
-
-        return msp71xx_set_gpio_mode(chip, offset, MSP71XX_GPIO_OUTPUT);
-}
-
-/*
- * msp71xx_direction_input() - declare the direction mode for a gpio
- * @chip: chip structure which controls the specified gpio
- * @offset: gpio whose to which the value will be assigned
- *
- * This call will set the mode for the @gpio to input.
- */
-static int msp71xx_direction_input(struct gpio_chip *chip, unsigned offset)
-{
-        return msp71xx_set_gpio_mode(chip, offset, MSP71XX_GPIO_INPUT);
-}
-
-/*
- * msp71xx_set_output_drive() - declare the output drive for the gpio line
- * @gpio: gpio pin whose output drive you wish to modify
- * @value: zero for active drain 1 for open drain drive
- *
- * This call will set the output drive mode for the @gpio to output.
- */
-int msp71xx_set_output_drive(unsigned gpio, int value)
-{
-        unsigned long flags;
-        u32 data;
-
-        if (gpio > 15 || gpio < 0)
-                return -EINVAL;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        data = __raw_readl((void __iomem *)(MSP71XX_GPIO_BASE + 0x190));
-        if (value)
-                data |= (1 << gpio);
-        else
-                data &= ~(1 << gpio);
-        __raw_writel(data, (void __iomem *)(MSP71XX_GPIO_BASE + 0x190));
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-
-        return 0;
-}
-EXPORT_SYMBOL(msp71xx_set_output_drive);
-
-#define MSP71XX_GPIO_BANK(name, dr, cr, base_gpio, num_gpio) \
-{ \
-        .chip = { \
-                .label            = name, \
-                .direction_input  = msp71xx_direction_input, \
-                .direction_output = msp71xx_direction_output, \
-                .get              = msp71xx_gpio_get, \
-                .set              = msp71xx_gpio_set, \
-                .base             = base_gpio, \
-                .ngpio            = num_gpio \
-        }, \
-        .data_reg       = (void __iomem *)(MSP71XX_GPIO_BASE + dr), \
-        .config_reg     = (void __iomem *)(MSP71XX_GPIO_BASE + cr), \
-        .out_drive_reg  = (void __iomem *)(MSP71XX_GPIO_BASE + 0x190), \
-}
-
-/*
- * struct msp71xx_gpio_banks[] - container array of gpio banks
- * @chip: chip structure for the specified gpio bank
- * @data_reg: register for reading and writing the gpio pin value
- * @config_reg: register to set the mode for the gpio pin bank
- *
- * This array structure defines the gpio banks for the PMC MIPS Processor.
- * We specify the bank name, the data register, the config register, base
- * starting gpio number, and the number of gpios exposed by the bank.
- */
-static struct msp71xx_gpio_chip msp71xx_gpio_banks[] = {
-
-        MSP71XX_GPIO_BANK("GPIO_1_0", 0x170, 0x180, 0, 2),
-        MSP71XX_GPIO_BANK("GPIO_5_2", 0x174, 0x184, 2, 4),
-        MSP71XX_GPIO_BANK("GPIO_9_6", 0x178, 0x188, 6, 4),
-        MSP71XX_GPIO_BANK("GPIO_15_10", 0x17C, 0x18C, 10, 6),
-};
-
-void __init msp71xx_init_gpio(void)
-{
-        int i;
-
-        spin_lock_init(&gpio_lock);
-
-        for (i = 0; i < ARRAY_SIZE(msp71xx_gpio_banks); i++)
-                gpiochip_add(&msp71xx_gpio_banks[i].chip);
-}
diff --git a/arch/mips/pmcs-msp71xx/gpio_extended.c b/arch/mips/pmcs-msp71xx/gpio_extended.c
deleted file mode 100644
index 2a99f360fae4..000000000000
--- a/arch/mips/pmcs-msp71xx/gpio_extended.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is
- * a set of hardware registers that have no need for explicit locking as
- * it is handled by unique method of writing individual set/clr bits.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * @author Patrick Glass <patrickglass@gmail.com>
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/gpio.h>
-#include <linux/io.h>
-
-#define MSP71XX_DATA_OFFSET(gpio)       (2 * (gpio))
-#define MSP71XX_READ_OFFSET(gpio)       (MSP71XX_DATA_OFFSET(gpio) + 1)
-#define MSP71XX_CFG_OUT_OFFSET(gpio)    (MSP71XX_DATA_OFFSET(gpio) + 16)
-#define MSP71XX_CFG_IN_OFFSET(gpio)     (MSP71XX_CFG_OUT_OFFSET(gpio) + 1)
-
-#define MSP71XX_EXD_GPIO_BASE   0x0BC000000L
-
-#define to_msp71xx_exd_gpio_chip(c) \
-                        container_of(c, struct msp71xx_exd_gpio_chip, chip)
-
-/*
- * struct msp71xx_exd_gpio_chip - container for gpio chip and registers
- * @chip: chip structure for the specified gpio bank
- * @reg: register for control and data of gpio pin
- */
-struct msp71xx_exd_gpio_chip {
-        struct gpio_chip chip;
-        void __iomem *reg;
-};
-
-/*
- * msp71xx_exd_gpio_get() - return the chip's gpio value
- * @chip: chip structure which controls the specified gpio
- * @offset: gpio whose value will be returned
- *
- * It will return 0 if gpio value is low and other if high.
- */
-static int msp71xx_exd_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        struct msp71xx_exd_gpio_chip *msp71xx_chip =
-            to_msp71xx_exd_gpio_chip(chip);
-        const unsigned bit = MSP71XX_READ_OFFSET(offset);
-
-        return __raw_readl(msp71xx_chip->reg) & (1 << bit);
-}
-
-/*
- * msp71xx_exd_gpio_set() - set the output value for the gpio
- * @chip: chip structure who controls the specified gpio
- * @offset: gpio whose value will be assigned
- * @value: logic level to assign to the gpio initially
- *
- * This will set the gpio bit specified to the desired value. It will set the
- * gpio pin low if value is 0 otherwise it will be high.
- */
-static void msp71xx_exd_gpio_set(struct gpio_chip *chip,
-                                 unsigned offset, int value)
-{
-        struct msp71xx_exd_gpio_chip *msp71xx_chip =
-            to_msp71xx_exd_gpio_chip(chip);
-        const unsigned bit = MSP71XX_DATA_OFFSET(offset);
-
-        __raw_writel(1 << (bit + (value ? 1 : 0)), msp71xx_chip->reg);
-}
-
-/*
- * msp71xx_exd_direction_output() - declare the direction mode for a gpio
- * @chip: chip structure which controls the specified gpio
- * @offset: gpio whose value will be assigned
- * @value: logic level to assign to the gpio initially
- *
- * This call will set the mode for the @gpio to output. It will set the
- * gpio pin low if value is 0 otherwise it will be high.
- */
-static int msp71xx_exd_direction_output(struct gpio_chip *chip,
-                                        unsigned offset, int value)
-{
-        struct msp71xx_exd_gpio_chip *msp71xx_chip =
-            to_msp71xx_exd_gpio_chip(chip);
-
-        msp71xx_exd_gpio_set(chip, offset, value);
-        __raw_writel(1 << MSP71XX_CFG_OUT_OFFSET(offset), msp71xx_chip->reg);
-        return 0;
-}
-
-/*
- * msp71xx_exd_direction_input() - declare the direction mode for a gpio
- * @chip: chip structure which controls the specified gpio
- * @offset: gpio whose to which the value will be assigned
- *
- * This call will set the mode for the @gpio to input.
- */
-static int msp71xx_exd_direction_input(struct gpio_chip *chip, unsigned offset)
-{
-        struct msp71xx_exd_gpio_chip *msp71xx_chip =
-            to_msp71xx_exd_gpio_chip(chip);
-
-        __raw_writel(1 << MSP71XX_CFG_IN_OFFSET(offset), msp71xx_chip->reg);
-        return 0;
-}
-
-#define MSP71XX_EXD_GPIO_BANK(name, exd_reg, base_gpio, num_gpio) \
-{ \
-        .chip = { \
-                .label            = name, \
-                .direction_input  = msp71xx_exd_direction_input, \
-                .direction_output = msp71xx_exd_direction_output, \
-                .get              = msp71xx_exd_gpio_get, \
-                .set              = msp71xx_exd_gpio_set, \
-                .base             = base_gpio, \
-                .ngpio            = num_gpio, \
-        }, \
-        .reg    = (void __iomem *)(MSP71XX_EXD_GPIO_BASE + exd_reg), \
-}
-
-/*
- * struct msp71xx_exd_gpio_banks[] - container array of gpio banks
- * @chip: chip structure for the specified gpio bank
- * @reg: register for reading and writing the gpio pin value
- *
- * This array structure defines the extended gpio banks for the
- * PMC MIPS Processor. We specify the bank name, the data/config
- * register,the base starting gpio number, and the number of
- * gpios exposed by the bank of gpios.
- */
-static struct msp71xx_exd_gpio_chip msp71xx_exd_gpio_banks[] = {
-
-        MSP71XX_EXD_GPIO_BANK("GPIO_23_16", 0x188, 16, 8),
-        MSP71XX_EXD_GPIO_BANK("GPIO_27_24", 0x18C, 24, 4),
-};
-
-void __init msp71xx_init_gpio_extended(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(msp71xx_exd_gpio_banks); i++)
-                gpiochip_add(&msp71xx_exd_gpio_banks[i].chip);
-}
diff --git a/arch/mips/pmcs-msp71xx/msp_smtc.c b/arch/mips/pmcs-msp71xx/msp_smtc.c
index c8dcc1c01e18..6b5607fce279 100644
--- a/arch/mips/pmcs-msp71xx/msp_smtc.c
+++ b/arch/mips/pmcs-msp71xx/msp_smtc.c
@@ -33,7 +33,7 @@ static void msp_smtc_send_ipi_mask(const struct cpumask *mask,
 /*
  * Post-config but pre-boot cleanup entry point
  */
-static void __cpuinit msp_smtc_init_secondary(void)
+static void msp_smtc_init_secondary(void)
 {
         int myvpe;
 
@@ -48,8 +48,7 @@ static void __cpuinit msp_smtc_init_secondary(void)
 /*
  * Platform "CPU" startup hook
  */
-static void __cpuinit msp_smtc_boot_secondary(int cpu,
-                                        struct task_struct *idle)
+static void msp_smtc_boot_secondary(int cpu, struct task_struct *idle)
 {
         smtc_boot_secondary(cpu, idle);
 }
@@ -57,7 +56,7 @@ static void __cpuinit msp_smtc_boot_secondary(int cpu,
 /*
  * SMP initialization finalization entry point
  */
-static void __cpuinit msp_smtc_smp_finish(void)
+static void msp_smtc_smp_finish(void)
 {
         smtc_smp_finish();
 }
diff --git a/arch/mips/pmcs-msp71xx/msp_time.c b/arch/mips/pmcs-msp71xx/msp_time.c
index 8f12ecc55ace..fea917be0ff1 100644
--- a/arch/mips/pmcs-msp71xx/msp_time.c
+++ b/arch/mips/pmcs-msp71xx/msp_time.c
@@ -88,7 +88,7 @@ void __init plat_time_init(void)
         mips_hpt_frequency = cpu_rate/2;
 }
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
         /* MIPS_MT modes may want timer for second VPE */
         if ((get_current_vpe()) && !tim_installed) {
diff --git a/arch/mips/pnx833x/common/interrupts.c b/arch/mips/pnx833x/common/interrupts.c
index a4a90596c0ad..e460865873c1 100644
--- a/arch/mips/pnx833x/common/interrupts.c
+++ b/arch/mips/pnx833x/common/interrupts.c
@@ -281,7 +281,7 @@ void __init arch_init_irq(void)
         write_c0_status(read_c0_status() | IE_IRQ2);
 }
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
         if (cpu_has_vint)
                 set_vi_handler(cp0_compare_irq, pnx833x_timer_dispatch);
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index d38b095fd0d0..9f64c2387808 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -529,17 +529,8 @@ EXPORT_SYMBOL(asic_resource_get);
  */
 void platform_release_memory(void *ptr, int size)
 {
-        unsigned long addr;
-        unsigned long end;
-
-        addr = ((unsigned long)ptr + (PAGE_SIZE - 1)) & PAGE_MASK;
-        end = ((unsigned long)ptr + size) & PAGE_MASK;
-
-        for (; addr < end; addr += PAGE_SIZE) {
-                ClearPageReserved(virt_to_page(__va(addr)));
-                init_page_count(virt_to_page(__va(addr)));
-                free_page((unsigned long)__va(addr));
-        }
+        free_reserved_area((unsigned long)ptr, (unsigned long)(ptr + size),
+                           -1, NULL);
 }
 EXPORT_SYMBOL(platform_release_memory);
 
diff --git a/arch/mips/powertv/time.c b/arch/mips/powertv/time.c
index 9fd7b67f2af7..f38b0d45eca9 100644
--- a/arch/mips/powertv/time.c
+++ b/arch/mips/powertv/time.c
@@ -25,7 +25,7 @@
 
 #include "powertv-clock.h"
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
         return irq_mips_timer;
 }
diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c
index 320b1f1043ff..781b3d14a489 100644
--- a/arch/mips/ralink/irq.c
+++ b/arch/mips/ralink/irq.c
@@ -73,7 +73,7 @@ static struct irq_chip ralink_intc_irq_chip = {
         .irq_mask_ack   = ralink_intc_irq_mask,
 };
 
-unsigned int __cpuinit get_c0_compare_int(void)
+unsigned int get_c0_compare_int(void)
 {
         return CP0_LEGACY_COMPARE_IRQ;
 }
diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c
index 6b5f3406f414..f25ea5b45051 100644
--- a/arch/mips/ralink/of.c
+++ b/arch/mips/ralink/of.c
@@ -104,7 +104,7 @@ static int __init plat_of_setup(void)
         if (!of_have_populated_dt())
                 panic("device tree not present");
 
-        strncpy(of_ids[0].compatible, soc_info.compatible, len);
+        strlcpy(of_ids[0].compatible, soc_info.compatible, len);
         strncpy(of_ids[1].compatible, "palmbus", len);
 
         if (of_platform_populate(NULL, of_ids, NULL, NULL))
diff --git a/arch/mips/sgi-ip27/Makefile b/arch/mips/sgi-ip27/Makefile
index 1f29e761d691..da8f6816d346 100644
--- a/arch/mips/sgi-ip27/Makefile
+++ b/arch/mips/sgi-ip27/Makefile
@@ -7,4 +7,5 @@ obj-y	:= ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o ip27-klnuma.o \
            ip27-xtalk.o
 
 obj-$(CONFIG_EARLY_PRINTK)      += ip27-console.o
+obj-$(CONFIG_PCI)               += ip27-irq-pci.o
 obj-$(CONFIG_SMP)               += ip27-smp.o
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index d41b1c6fb032..ee736bd103f8 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -54,7 +54,7 @@ extern void pcibr_setup(cnodeid_t);
 
 extern void xtalk_probe_node(cnodeid_t nid);
 
-static void __cpuinit per_hub_init(cnodeid_t cnode)
+static void per_hub_init(cnodeid_t cnode)
 {
         struct hub_data *hub = hub_data(cnode);
         nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
@@ -110,7 +110,7 @@ static void __cpuinit per_hub_init(cnodeid_t cnode)
         }
 }
 
-void __cpuinit per_cpu_init(void)
+void per_cpu_init(void)
 {
         int cpu = smp_processor_id();
         int slice = LOCAL_HUB_L(PI_CPU_NUM);
diff --git a/arch/mips/sgi-ip27/ip27-irq-pci.c b/arch/mips/sgi-ip27/ip27-irq-pci.c
new file mode 100644
index 000000000000..ec22ec5600f3
--- /dev/null
+++ b/arch/mips/sgi-ip27/ip27-irq-pci.c
@@ -0,0 +1,266 @@
+/*
+ * ip27-irq.c: Highlevel interrupt handling for IP27 architecture.
+ *
+ * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 1999 - 2001 Kanoj Sarcar
+ */
+
+#undef DEBUG
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/smp.h>
+#include <linux/random.h>
+#include <linux/kernel.h>
+#include <linux/kernel_stat.h>
+#include <linux/delay.h>
+#include <linux/bitops.h>
+
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+
+#include <asm/processor.h>
+#include <asm/pci/bridge.h>
+#include <asm/sn/addrs.h>
+#include <asm/sn/agent.h>
+#include <asm/sn/arch.h>
+#include <asm/sn/hub.h>
+#include <asm/sn/intr.h>
+
+/*
+ * Linux has a controller-independent x86 interrupt architecture.
+ * every controller has a 'controller-template', that is used
+ * by the main code to do the right thing. Each driver-visible
+ * interrupt source is transparently wired to the appropriate
+ * controller. Thus drivers need not be aware of the
+ * interrupt-controller.
+ *
+ * Various interrupt controllers we handle: 8259 PIC, SMP IO-APIC,
+ * PIIX4's internal 8259 PIC and SGI's Visual Workstation Cobalt (IO-)APIC.
+ * (IO-APICs assumed to be messaging to Pentium local-APICs)
+ *
+ * the code is designed to be easily extended with new/different
+ * interrupt controllers, without having to do assembly magic.
+ */
+
+extern struct bridge_controller *irq_to_bridge[];
+extern int irq_to_slot[];
+
+/*
+ * use these macros to get the encoded nasid and widget id
+ * from the irq value
+ */
+#define IRQ_TO_BRIDGE(i)                irq_to_bridge[(i)]
+#define SLOT_FROM_PCI_IRQ(i)            irq_to_slot[i]
+
+static inline int alloc_level(int cpu, int irq)
+{
+        struct hub_data *hub = hub_data(cpu_to_node(cpu));
+        struct slice_data *si = cpu_data[cpu].data;
+        int level;
+
+        level = find_first_zero_bit(hub->irq_alloc_mask, LEVELS_PER_SLICE);
+        if (level >= LEVELS_PER_SLICE)
+                panic("Cpu %d flooded with devices", cpu);
+
+        __set_bit(level, hub->irq_alloc_mask);
+        si->level_to_irq[level] = irq;
+
+        return level;
+}
+
+static inline int find_level(cpuid_t *cpunum, int irq)
+{
+        int cpu, i;
+
+        for_each_online_cpu(cpu) {
+                struct slice_data *si = cpu_data[cpu].data;
+
+                for (i = BASE_PCI_IRQ; i < LEVELS_PER_SLICE; i++)
+                        if (si->level_to_irq[i] == irq) {
+                                *cpunum = cpu;
+
+                                return i;
+                        }
+        }
+
+        panic("Could not identify cpu/level for irq %d", irq);
+}
+
+static int intr_connect_level(int cpu, int bit)
+{
+        nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
+        struct slice_data *si = cpu_data[cpu].data;
+
+        set_bit(bit, si->irq_enable_mask);
+
+        if (!cputoslice(cpu)) {
+                REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
+                REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
+        } else {
+                REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
+                REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
+        }
+
+        return 0;
+}
+
+static int intr_disconnect_level(int cpu, int bit)
+{
+        nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
+        struct slice_data *si = cpu_data[cpu].data;
+
+        clear_bit(bit, si->irq_enable_mask);
+
+        if (!cputoslice(cpu)) {
+                REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
+                REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
+        } else {
+                REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
+                REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
+        }
+
+        return 0;
+}
+
+/* Startup one of the (PCI ...) IRQs routes over a bridge.  */
+static unsigned int startup_bridge_irq(struct irq_data *d)
+{
+        struct bridge_controller *bc;
+        bridgereg_t device;
+        bridge_t *bridge;
+        int pin, swlevel;
+        cpuid_t cpu;
+
+        pin = SLOT_FROM_PCI_IRQ(d->irq);
+        bc = IRQ_TO_BRIDGE(d->irq);
+        bridge = bc->base;
+
+        pr_debug("bridge_startup(): irq= 0x%x  pin=%d\n", d->irq, pin);
+        /*
+         * "map" irq to a swlevel greater than 6 since the first 6 bits
+         * of INT_PEND0 are taken
+         */
+        swlevel = find_level(&cpu, d->irq);
+        bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (bc->nasid << 8));
+        bridge->b_int_enable |= (1 << pin);
+        bridge->b_int_enable |= 0x7ffffe00;     /* more stuff in int_enable */
+
+        /*
+         * Enable sending of an interrupt clear packt to the hub on a high to
+         * low transition of the interrupt pin.
+         *
+         * IRIX sets additional bits in the address which are documented as
+         * reserved in the bridge docs.
+         */
+        bridge->b_int_mode |= (1UL << pin);
+
+        /*
+         * We assume the bridge to have a 1:1 mapping between devices
+         * (slots) and intr pins.
+         */
+        device = bridge->b_int_device;
+        device &= ~(7 << (pin*3));
+        device |= (pin << (pin*3));
+        bridge->b_int_device = device;
+
+        bridge->b_wid_tflush;
+
+        intr_connect_level(cpu, swlevel);
+
+        return 0;       /* Never anything pending.  */
+}
+
+/* Shutdown one of the (PCI ...) IRQs routes over a bridge.  */
+static void shutdown_bridge_irq(struct irq_data *d)
+{
+        struct bridge_controller *bc = IRQ_TO_BRIDGE(d->irq);
+        bridge_t *bridge = bc->base;
+        int pin, swlevel;
+        cpuid_t cpu;
+
+        pr_debug("bridge_shutdown: irq 0x%x\n", d->irq);
+        pin = SLOT_FROM_PCI_IRQ(d->irq);
+
+        /*
+         * map irq to a swlevel greater than 6 since the first 6 bits
+         * of INT_PEND0 are taken
+         */
+        swlevel = find_level(&cpu, d->irq);
+        intr_disconnect_level(cpu, swlevel);
+
+        bridge->b_int_enable &= ~(1 << pin);
+        bridge->b_wid_tflush;
+}
+
+static inline void enable_bridge_irq(struct irq_data *d)
+{
+        cpuid_t cpu;
+        int swlevel;
+
+        swlevel = find_level(&cpu, d->irq);     /* Criminal offence */
+        intr_connect_level(cpu, swlevel);
+}
+
+static inline void disable_bridge_irq(struct irq_data *d)
+{
+        cpuid_t cpu;
+        int swlevel;
+
+        swlevel = find_level(&cpu, d->irq);     /* Criminal offence */
+        intr_disconnect_level(cpu, swlevel);
+}
+
+static struct irq_chip bridge_irq_type = {
+        .name           = "bridge",
+        .irq_startup    = startup_bridge_irq,
+        .irq_shutdown   = shutdown_bridge_irq,
+        .irq_mask       = disable_bridge_irq,
+        .irq_unmask     = enable_bridge_irq,
+};
+
+void register_bridge_irq(unsigned int irq)
+{
+        irq_set_chip_and_handler(irq, &bridge_irq_type, handle_level_irq);
+}
+
+int request_bridge_irq(struct bridge_controller *bc)
+{
+        int irq = allocate_irqno();
+        int swlevel, cpu;
+        nasid_t nasid;
+
+        if (irq < 0)
+                return irq;
+
+        /*
+         * "map" irq to a swlevel greater than 6 since the first 6 bits
+         * of INT_PEND0 are taken
+         */
+        cpu = bc->irq_cpu;
+        swlevel = alloc_level(cpu, irq);
+        if (unlikely(swlevel < 0)) {
+                free_irqno(irq);
+
+                return -EAGAIN;
+        }
+
+        /* Make sure it's not already pending when we connect it. */
+        nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
+        REMOTE_HUB_CLR_INTR(nasid, swlevel);
+
+        intr_connect_level(cpu, swlevel);
+
+        register_bridge_irq(irq);
+
+        return irq;
+}
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 2315cfeb2687..3fbaef97a1b8 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -29,7 +29,6 @@
 #include <asm/mipsregs.h>
 
 #include <asm/processor.h>
-#include <asm/pci/bridge.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/agent.h>
 #include <asm/sn/arch.h>
@@ -54,50 +53,6 @@
 
 extern asmlinkage void ip27_irq(void);
 
-extern struct bridge_controller *irq_to_bridge[];
-extern int irq_to_slot[];
-
-/*
- * use these macros to get the encoded nasid and widget id
- * from the irq value
- */
-#define IRQ_TO_BRIDGE(i)                irq_to_bridge[(i)]
-#define SLOT_FROM_PCI_IRQ(i)            irq_to_slot[i]
-
-static inline int alloc_level(int cpu, int irq)
-{
-        struct hub_data *hub = hub_data(cpu_to_node(cpu));
-        struct slice_data *si = cpu_data[cpu].data;
-        int level;
-
-        level = find_first_zero_bit(hub->irq_alloc_mask, LEVELS_PER_SLICE);
-        if (level >= LEVELS_PER_SLICE)
-                panic("Cpu %d flooded with devices", cpu);
-
-        __set_bit(level, hub->irq_alloc_mask);
-        si->level_to_irq[level] = irq;
-
-        return level;
-}
-
-static inline int find_level(cpuid_t *cpunum, int irq)
-{
-        int cpu, i;
-
-        for_each_online_cpu(cpu) {
-                struct slice_data *si = cpu_data[cpu].data;
-
-                for (i = BASE_PCI_IRQ; i < LEVELS_PER_SLICE; i++)
-                        if (si->level_to_irq[i] == irq) {
-                                *cpunum = cpu;
-
-                                return i;
-                        }
-        }
-
-        panic("Could not identify cpu/level for irq %d", irq);
-}
-
 /*
  * Find first bit set
  */
@@ -204,175 +159,6 @@ static void ip27_hub_error(void)
         panic("CPU %d got a hub error interrupt", smp_processor_id());
 }
 
-static int intr_connect_level(int cpu, int bit)
-{
-        nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
-        struct slice_data *si = cpu_data[cpu].data;
-
-        set_bit(bit, si->irq_enable_mask);
-
-        if (!cputoslice(cpu)) {
-                REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
-                REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
-        } else {
-                REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
-                REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
-        }
-
-        return 0;
-}
-
-static int intr_disconnect_level(int cpu, int bit)
-{
-        nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
-        struct slice_data *si = cpu_data[cpu].data;
-
-        clear_bit(bit, si->irq_enable_mask);
-
-        if (!cputoslice(cpu)) {
-                REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
-                REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
-        } else {
-                REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
-                REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
-        }
-
-        return 0;
-}
-
-/* Startup one of the (PCI ...) IRQs routes over a bridge.  */
-static unsigned int startup_bridge_irq(struct irq_data *d)
-{
-        struct bridge_controller *bc;
-        bridgereg_t device;
-        bridge_t *bridge;
-        int pin, swlevel;
-        cpuid_t cpu;
-
-        pin = SLOT_FROM_PCI_IRQ(d->irq);
-        bc = IRQ_TO_BRIDGE(d->irq);
-        bridge = bc->base;
-
-        pr_debug("bridge_startup(): irq= 0x%x  pin=%d\n", d->irq, pin);
-        /*
-         * "map" irq to a swlevel greater than 6 since the first 6 bits
-         * of INT_PEND0 are taken
-         */
-        swlevel = find_level(&cpu, d->irq);
-        bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (bc->nasid << 8));
-        bridge->b_int_enable |= (1 << pin);
-        bridge->b_int_enable |= 0x7ffffe00;     /* more stuff in int_enable */
-
-        /*
-         * Enable sending of an interrupt clear packt to the hub on a high to
-         * low transition of the interrupt pin.
-         *
-         * IRIX sets additional bits in the address which are documented as
-         * reserved in the bridge docs.
-         */
-        bridge->b_int_mode |= (1UL << pin);
-
-        /*
-         * We assume the bridge to have a 1:1 mapping between devices
-         * (slots) and intr pins.
-         */
-        device = bridge->b_int_device;
-        device &= ~(7 << (pin*3));
-        device |= (pin << (pin*3));
-        bridge->b_int_device = device;
-
-        bridge->b_wid_tflush;
-
-        intr_connect_level(cpu, swlevel);
-
-        return 0;       /* Never anything pending.  */
-}
-
-/* Shutdown one of the (PCI ...) IRQs routes over a bridge.  */
-static void shutdown_bridge_irq(struct irq_data *d)
-{
-        struct bridge_controller *bc = IRQ_TO_BRIDGE(d->irq);
-        bridge_t *bridge = bc->base;
-        int pin, swlevel;
-        cpuid_t cpu;
-
-        pr_debug("bridge_shutdown: irq 0x%x\n", d->irq);
-        pin = SLOT_FROM_PCI_IRQ(d->irq);
-
-        /*
-         * map irq to a swlevel greater than 6 since the first 6 bits
-         * of INT_PEND0 are taken
-         */
-        swlevel = find_level(&cpu, d->irq);
-        intr_disconnect_level(cpu, swlevel);
-
-        bridge->b_int_enable &= ~(1 << pin);
-        bridge->b_wid_tflush;
-}
-
-static inline void enable_bridge_irq(struct irq_data *d)
-{
-        cpuid_t cpu;
-        int swlevel;
-
-        swlevel = find_level(&cpu, d->irq);     /* Criminal offence */
-        intr_connect_level(cpu, swlevel);
-}
-
-static inline void disable_bridge_irq(struct irq_data *d)
-{
-        cpuid_t cpu;
-        int swlevel;
-
-        swlevel = find_level(&cpu, d->irq);     /* Criminal offence */
-        intr_disconnect_level(cpu, swlevel);
-}
-
-static struct irq_chip bridge_irq_type = {
-        .name           = "bridge",
-        .irq_startup    = startup_bridge_irq,
-        .irq_shutdown   = shutdown_bridge_irq,
-        .irq_mask       = disable_bridge_irq,
-        .irq_unmask     = enable_bridge_irq,
-};
-
-void register_bridge_irq(unsigned int irq)
-{
-        irq_set_chip_and_handler(irq, &bridge_irq_type, handle_level_irq);
-}
-
-int request_bridge_irq(struct bridge_controller *bc)
-{
-        int irq = allocate_irqno();
-        int swlevel, cpu;
-        nasid_t nasid;
-
-        if (irq < 0)
-                return irq;
-
-        /*
-         * "map" irq to a swlevel greater than 6 since the first 6 bits
-         * of INT_PEND0 are taken
-         */
-        cpu = bc->irq_cpu;
-        swlevel = alloc_level(cpu, irq);
-        if (unlikely(swlevel < 0)) {
-                free_irqno(irq);
-
-                return -EAGAIN;
-        }
-
-        /* Make sure it's not already pending when we connect it. */
-        nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
-        REMOTE_HUB_CLR_INTR(nasid, swlevel);
-
-        intr_connect_level(cpu, swlevel);
-
-        register_bridge_irq(irq);
-
-        return irq;
-}
-
 asmlinkage void plat_irq_dispatch(void)
 {
         unsigned long pending = read_c0_cause() & read_c0_status();
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index f94638141b20..f4ea8aa79ba2 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -173,12 +173,12 @@ static void ip27_send_ipi_mask(const struct cpumask *mask, unsigned int action)
                 ip27_send_ipi_single(i, action);
 }
 
-static void __cpuinit ip27_init_secondary(void)
+static void ip27_init_secondary(void)
 {
         per_cpu_init();
 }
 
-static void __cpuinit ip27_smp_finish(void)
+static void ip27_smp_finish(void)
 {
         extern void hub_rt_clock_event_init(void);
 
@@ -195,7 +195,7 @@ static void __init ip27_cpus_done(void)
  * set sp to the kernel stack of the newly created idle process, gp to the proc
  * struct so that current_thread_info() will work.
  */
-static void __cpuinit ip27_boot_secondary(int cpu, struct task_struct *idle)
+static void ip27_boot_secondary(int cpu, struct task_struct *idle)
 {
         unsigned long gp = (unsigned long)task_thread_info(idle);
         unsigned long sp = __KSTK_TOS(idle);
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 2e21b761cb9c..1d97eaba0c5f 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -106,7 +106,7 @@ struct irqaction hub_rt_irqaction = {
 #define NSEC_PER_CYCLE          800
 #define CYCLES_PER_SEC          (NSEC_PER_SEC / NSEC_PER_CYCLE)
 
-void __cpuinit hub_rt_clock_event_init(void)
+void hub_rt_clock_event_init(void)
 {
         unsigned int cpu = smp_processor_id();
         struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu);
@@ -173,7 +173,7 @@ void __init plat_time_init(void)
         hub_rt_clock_event_init();
 }
 
-void __cpuinit cpu_time_init(void)
+void cpu_time_init(void)
 {
         lboard_t *board;
         klcpu_t *cpu;
@@ -194,7 +194,7 @@ void __cpuinit cpu_time_init(void)
         set_c0_status(SRB_TIMOCLK);
 }
 
-void __cpuinit hub_rtc_init(cnodeid_t cnode)
+void hub_rtc_init(cnodeid_t cnode)
 {
 
         /*
diff --git a/arch/mips/sgi-ip27/ip27-xtalk.c b/arch/mips/sgi-ip27/ip27-xtalk.c
index a4df7d0f6f12..d59b820f528d 100644
--- a/arch/mips/sgi-ip27/ip27-xtalk.c
+++ b/arch/mips/sgi-ip27/ip27-xtalk.c
@@ -23,7 +23,7 @@
 
 extern int bridge_probe(nasid_t nasid, int widget, int masterwid);
 
-static int __cpuinit probe_one_port(nasid_t nasid, int widget, int masterwid)
+static int probe_one_port(nasid_t nasid, int widget, int masterwid)
 {
         widgetreg_t             widget_id;
         xwidget_part_num_t      partnum;
@@ -47,7 +47,7 @@ static int __cpuinit probe_one_port(nasid_t nasid, int widget, int masterwid)
         return 0;
 }
 
-static int __cpuinit xbow_probe(nasid_t nasid)
+static int xbow_probe(nasid_t nasid)
 {
         lboard_t *brd;
         klxbow_t *xbow_p;
@@ -100,7 +100,7 @@ static int __cpuinit xbow_probe(nasid_t nasid)
         return 0;
 }
 
-void __cpuinit xtalk_probe_node(cnodeid_t nid)
+void xtalk_probe_node(cnodeid_t nid)
 {
         volatile u64            hubreg;
         nasid_t                 nasid;
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index 01cc1a749c73..5fbd3605d24f 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -147,7 +147,8 @@ config SIBYTE_CFE_CONSOLE
 
 config SIBYTE_BUS_WATCHER
         bool "Support for Bus Watcher statistics"
-        depends on SIBYTE_SB1xxx_SOC
+        depends on SIBYTE_SB1xxx_SOC && \
+                (SIBYTE_BCM112X || SIBYTE_SB1250)
         help
           Handle and keep statistics on the bus error interrupts (COR_ECC,
           BAD_ECC, IO_BUS).
diff --git a/arch/mips/sibyte/Platform b/arch/mips/sibyte/Platform
index d03a07516f83..af117330ce14 100644
--- a/arch/mips/sibyte/Platform
+++ b/arch/mips/sibyte/Platform
@@ -13,7 +13,6 @@ cflags-$(CONFIG_SIBYTE_BCM112X) +=					\
                 -I$(srctree)/arch/mips/include/asm/mach-sibyte          \
                 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
 
-platform-$(CONFIG_SIBYTE_SB1250)        += sibyte/
 cflags-$(CONFIG_SIBYTE_SB1250)  +=                                      \
                 -I$(srctree)/arch/mips/include/asm/mach-sibyte          \
                 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
@@ -31,7 +30,8 @@ cflags-$(CONFIG_SIBYTE_BCM1x80) +=					\
 # Sibyte BCM91120C (CRhine) board
 # Sibyte BCM91125C (CRhone) board
 # Sibyte BCM91125E (Rhone) board
-# Sibyte SWARM board
+# Sibyte BCM91250A (SWARM) board
+# Sibyte BCM91250C2 (LittleSur) board
 # Sibyte BCM91x80 (BigSur) board
 #
 load-$(CONFIG_SIBYTE_CARMEL)    := 0xffffffff80100000
@@ -41,3 +41,4 @@ load-$(CONFIG_SIBYTE_RHONE)	:= 0xffffffff80100000
 load-$(CONFIG_SIBYTE_SENTOSA)   := 0xffffffff80100000
 load-$(CONFIG_SIBYTE_SWARM)     := 0xffffffff80100000
 load-$(CONFIG_SIBYTE_BIGSUR)    := 0xffffffff80100000
+load-$(CONFIG_SIBYTE_LITTLESUR) := 0xffffffff80100000
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index de88e22694a0..54e2c4de15c1 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -60,7 +60,7 @@ static void *mailbox_0_regs[] = {
 /*
  * SMP init and finish on secondary CPUs
  */
-void __cpuinit bcm1480_smp_init(void)
+void bcm1480_smp_init(void)
 {
         unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
                 STATUSF_IP1 | STATUSF_IP0;
@@ -95,7 +95,7 @@ static void bcm1480_send_ipi_mask(const struct cpumask *mask,
 /*
  * Code to run on secondary just after probing the CPU
  */
-static void __cpuinit bcm1480_init_secondary(void)
+static void bcm1480_init_secondary(void)
 {
         extern void bcm1480_smp_init(void);
 
@@ -106,7 +106,7 @@ static void __cpuinit bcm1480_init_secondary(void)
  * Do any tidying up before marking online and running the idle
  * loop
  */
-static void __cpuinit bcm1480_smp_finish(void)
+static void bcm1480_smp_finish(void)
 {
         extern void sb1480_clockevent_init(void);
 
@@ -125,7 +125,7 @@ static void bcm1480_cpus_done(void)
  * Setup the PC, SP, and GP of a secondary processor and start it
  * running!
  */
-static void __cpuinit bcm1480_boot_secondary(int cpu, struct task_struct *idle)
+static void bcm1480_boot_secondary(int cpu, struct task_struct *idle)
 {
         int retval;
 
diff --git a/arch/mips/sibyte/common/Makefile b/arch/mips/sibyte/common/Makefile
index 36aa700cc40c..b3d6bf23a662 100644
--- a/arch/mips/sibyte/common/Makefile
+++ b/arch/mips/sibyte/common/Makefile
@@ -1,3 +1,4 @@
 obj-y := cfe.o
+obj-$(CONFIG_SIBYTE_BUS_WATCHER)        += bus_watcher.o
 obj-$(CONFIG_SIBYTE_CFE_CONSOLE)        += cfe_console.o
 obj-$(CONFIG_SIBYTE_TBPROF)             += sb_tbprof.o
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/common/bus_watcher.c
index 8871e3345bff..5581844c9194 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/common/bus_watcher.c
@@ -37,6 +37,9 @@
 #include <asm/sibyte/sb1250_regs.h>
 #include <asm/sibyte/sb1250_int.h>
 #include <asm/sibyte/sb1250_scd.h>
+#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
+#include <asm/sibyte/bcm1480_regs.h>
+#endif
 
 
 struct bw_stats_struct {
@@ -81,9 +84,15 @@ void check_bus_watcher(void)
 #ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
         /* Destructive read, clears register and interrupt */
         status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
-#else
+#elif defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250)
         /* Use non-destructive register */
         status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG));
+#elif defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
+        /* Use non-destructive register */
+        /* Same as 1250 except BUS_ERR_STATUS_DEBUG is in a different place. */
+        status = csr_in32(IOADDR(A_BCM1480_BUS_ERR_STATUS_DEBUG));
+#else
+#error bus watcher being built for unknown Sibyte SOC!
 #endif
         if (!(status & 0x7fffffff)) {
                 printk("Using last values reaped by bus watcher driver\n");
@@ -175,9 +184,6 @@ static irqreturn_t sibyte_bw_int(int irq, void *data)
 #ifdef CONFIG_SIBYTE_BW_TRACE
         int i;
 #endif
-#ifndef CONFIG_PROC_FS
-        char bw_buf[1024];
-#endif
 
 #ifdef CONFIG_SIBYTE_BW_TRACE
         csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG));
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 2188b39a1251..059e28c8fd97 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -27,6 +27,7 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/sched.h>
 #include <linux/vmalloc.h>
 #include <linux/fs.h>
 #include <linux/errno.h>
diff --git a/arch/mips/sibyte/sb1250/Makefile b/arch/mips/sibyte/sb1250/Makefile
index d3d969de407b..cdc4c56c3e29 100644
--- a/arch/mips/sibyte/sb1250/Makefile
+++ b/arch/mips/sibyte/sb1250/Makefile
@@ -1,4 +1,3 @@
 obj-y := setup.o irq.o time.o
 
 obj-$(CONFIG_SMP)                       += smp.o
-obj-$(CONFIG_SIBYTE_BUS_WATCHER)        += bus_watcher.o
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index 285cfef4ebc0..d7b942db0ea5 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -48,7 +48,7 @@ static void *mailbox_regs[] = {
 /*
  * SMP init and finish on secondary CPUs
  */
-void __cpuinit sb1250_smp_init(void)
+void sb1250_smp_init(void)
 {
         unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
                 STATUSF_IP1 | STATUSF_IP0;
@@ -83,7 +83,7 @@ static inline void sb1250_send_ipi_mask(const struct cpumask *mask,
 /*
  * Code to run on secondary just after probing the CPU
  */
-static void __cpuinit sb1250_init_secondary(void)
+static void sb1250_init_secondary(void)
 {
         extern void sb1250_smp_init(void);
 
@@ -94,7 +94,7 @@ static void __cpuinit sb1250_init_secondary(void)
  * Do any tidying up before marking online and running the idle
  * loop
  */
-static void __cpuinit sb1250_smp_finish(void)
+static void sb1250_smp_finish(void)
 {
         extern void sb1250_clockevent_init(void);
 
@@ -113,7 +113,7 @@ static void sb1250_cpus_done(void)
  * Setup the PC, SP, and GP of a secondary processor and start it
  * running!
  */
-static void __cpuinit sb1250_boot_secondary(int cpu, struct task_struct *idle)
+static void sb1250_boot_secondary(int cpu, struct task_struct *idle)
 {
         int retval;
 
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index cec4b8ca1438..12336c2a649c 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -185,6 +185,7 @@ static void __init sni_pcimt_resource_init(void)
 
 extern struct pci_ops sni_pcimt_ops;
 
+#ifdef CONFIG_PCI
 static struct pci_controller sni_controller = {
         .pci_ops        = &sni_pcimt_ops,
         .mem_resource   = &sni_mem_resource,
@@ -193,6 +194,7 @@ static struct pci_controller sni_controller = {
         .io_offset      = 0x00000000UL,
         .io_map_base    = SNI_PORT_BASE
 };
+#endif
 
 static void enable_pcimt_irq(struct irq_data *d)
 {
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index 7cddd03d1fea..05bb51676e82 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -128,13 +128,6 @@ static struct resource pcit_io_resources[] = {
         }
 };
 
-static struct resource sni_mem_resource = {
-        .start  = 0x18000000UL,
-        .end    = 0x1fbfffffUL,
-        .name   = "PCIT PCI MEM",
-        .flags  = IORESOURCE_MEM
-};
-
 static void __init sni_pcit_resource_init(void)
 {
         int i;
@@ -147,6 +140,14 @@ static void __init sni_pcit_resource_init(void)
 
 extern struct pci_ops sni_pcit_ops;
 
+#ifdef CONFIG_PCI
+static struct resource sni_mem_resource = {
+        .start  = 0x18000000UL,
+        .end    = 0x1fbfffffUL,
+        .name   = "PCIT PCI MEM",
+        .flags  = IORESOURCE_MEM
+};
+
 static struct pci_controller sni_pcit_controller = {
         .pci_ops        = &sni_pcit_ops,
         .mem_resource   = &sni_mem_resource,
@@ -155,6 +156,7 @@ static struct pci_controller sni_pcit_controller = {
         .io_offset      = 0x00000000UL,
         .io_map_base    = SNI_PORT_BASE
 };
+#endif /* CONFIG_PCI */
 
 static void enable_pcit_irq(struct irq_data *d)
 {
diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c
index 729a50991780..b7eccbd17bf7 100644
--- a/arch/mips/txx9/generic/setup_tx4939.c
+++ b/arch/mips/txx9/generic/setup_tx4939.c
@@ -331,7 +331,8 @@ static int tx4939_netdev_event(struct notifier_block *this,
                                unsigned long event,
                                void *ptr)
 {
-        struct net_device *dev = ptr;
+        struct net_device *dev = netdev_notifier_info_to_dev(ptr);
+
         if (event == NETDEV_CHANGE && netif_carrier_ok(dev)) {
                 __u64 bit = 0;
                 if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(0))
diff --git a/arch/mips/wrppmc/Makefile b/arch/mips/wrppmc/Makefile
deleted file mode 100644
index 307cc6920ce6..000000000000
--- a/arch/mips/wrppmc/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License.  See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright 2006 Wind River System, Inc.
-# Author: Rongkai.Zhan <rongkai.zhan@windriver.com>
-#
-# Makefile for the Wind River MIPS 4Kc PPMC Eval Board
-#
-
-obj-y += irq.o pci.o reset.o serial.o setup.o time.o
diff --git a/arch/mips/wrppmc/Platform b/arch/mips/wrppmc/Platform
deleted file mode 100644
index dc78b25b95fe..000000000000
--- a/arch/mips/wrppmc/Platform
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Wind River PPMC Board (4KC + GT64120)
-#
-platform-$(CONFIG_WR_PPMC)      += wrppmc/
-cflags-$(CONFIG_WR_PPMC)        +=                                      \
-                -I$(srctree)/arch/mips/include/asm/mach-wrppmc
-load-$(CONFIG_WR_PPMC)          += 0xffffffff80100000
diff --git a/arch/mips/wrppmc/irq.c b/arch/mips/wrppmc/irq.c
deleted file mode 100644
index f237bf4d5c3a..000000000000
--- a/arch/mips/wrppmc/irq.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * irq.c: GT64120 Interrupt Controller
- *
- * Copyright (C) 2006, Wind River System Inc.
- * Author: Rongkai.Zhan, <rongkai.zhan@windriver.com>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-#include <linux/hardirq.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-
-#include <asm/gt64120.h>
-#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-
-asmlinkage void plat_irq_dispatch(void)
-{
-        unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
-
-        if (pending & STATUSF_IP7)
-                do_IRQ(WRPPMC_MIPS_TIMER_IRQ);  /* CPU Compare/Count internal timer */
-        else if (pending & STATUSF_IP6)
-                do_IRQ(WRPPMC_UART16550_IRQ);   /* UART 16550 port */
-        else if (pending & STATUSF_IP3)
-                do_IRQ(WRPPMC_PCI_INTA_IRQ);    /* PCI INT_A */
-        else
-                spurious_interrupt();
-}
-
-/**
- * Initialize GT64120 Interrupt Controller
- */
-void gt64120_init_pic(void)
-{
-        /* clear CPU Interrupt Cause Registers */
-        GT_WRITE(GT_INTRCAUSE_OFS, (0x1F << 21));
-        GT_WRITE(GT_HINTRCAUSE_OFS, 0x00);
-
-        /* Disable all interrupts from GT64120 bridge chip */
-        GT_WRITE(GT_INTRMASK_OFS, 0x00);
-        GT_WRITE(GT_HINTRMASK_OFS, 0x00);
-        GT_WRITE(GT_PCI0_ICMASK_OFS, 0x00);
-        GT_WRITE(GT_PCI0_HICMASK_OFS, 0x00);
-}
-
-void __init arch_init_irq(void)
-{
-        /* IRQ 0 - 7 are for MIPS common irq_cpu controller */
-        mips_cpu_irq_init();
-
-        gt64120_init_pic();
-}
diff --git a/arch/mips/wrppmc/pci.c b/arch/mips/wrppmc/pci.c
deleted file mode 100644
index 8b8a0e1a40ca..000000000000
--- a/arch/mips/wrppmc/pci.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * pci.c: GT64120 PCI support.
- *
- * Copyright (C) 2006, Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-
-#include <asm/gt64120.h>
-
-extern struct pci_ops gt64xxx_pci0_ops;
-
-static struct resource pci0_io_resource = {
-        .name  = "pci_0 io",
-        .start = GT_PCI_IO_BASE,
-        .end   = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1,
-        .flags = IORESOURCE_IO,
-};
-
-static struct resource pci0_mem_resource = {
-        .name  = "pci_0 memory",
-        .start = GT_PCI_MEM_BASE,
-        .end   = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1,
-        .flags = IORESOURCE_MEM,
-};
-
-static struct pci_controller hose_0 = {
-        .pci_ops        = &gt64xxx_pci0_ops,
-        .io_resource    = &pci0_io_resource,
-        .mem_resource   = &pci0_mem_resource,
-};
-
-static int __init gt64120_pci_init(void)
-{
-        (void) GT_READ(GT_PCI0_CMD_OFS);        /* Huh??? -- Ralf  */
-        (void) GT_READ(GT_PCI0_BARE_OFS);
-
-        /* reset the whole PCI I/O space range */
-        ioport_resource.start = GT_PCI_IO_BASE;
-        ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
-
-        register_pci_controller(&hose_0);
-        return 0;
-}
-
-arch_initcall(gt64120_pci_init);
diff --git a/arch/mips/wrppmc/reset.c b/arch/mips/wrppmc/reset.c
deleted file mode 100644
index 80beb188ed47..000000000000
--- a/arch/mips/wrppmc/reset.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997 Ralf Baechle
- */
-#include <linux/irqflags.h>
-#include <linux/kernel.h>
-
-#include <asm/cacheflush.h>
-#include <asm/idle.h>
-#include <asm/mipsregs.h>
-#include <asm/processor.h>
-
-void wrppmc_machine_restart(char *command)
-{
-        /*
-         * Ouch, we're still alive ... This time we take the silver bullet ...
-         * ... and find that we leave the hardware in a state in which the
-         * kernel in the flush locks up somewhen during of after the PCI
-         * detection stuff.
-         */
-        local_irq_disable();
-        set_c0_status(ST0_BEV | ST0_ERL);
-        change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
-        flush_cache_all();
-        write_c0_wired(0);
-        __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
-}
-
-void wrppmc_machine_halt(void)
-{
-        local_irq_disable();
-
-        printk(KERN_NOTICE "You can safely turn off the power\n");
-        while (1) {
-                if (cpu_wait)
-                        cpu_wait();
-        }
-}
diff --git a/arch/mips/wrppmc/serial.c b/arch/mips/wrppmc/serial.c
deleted file mode 100644
index 83f0f7d05187..000000000000
--- a/arch/mips/wrppmc/serial.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- *  Registration of WRPPMC UART platform device.
- *
- *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
- */
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/platform_device.h>
-#include <linux/serial_8250.h>
-
-#include <asm/gt64120.h>
-
-static struct resource wrppmc_uart_resource[] __initdata = {
-        {
-                .start  = WRPPMC_UART16550_BASE,
-                .end    = WRPPMC_UART16550_BASE + 7,
-                .flags  = IORESOURCE_MEM,
-        },
-        {
-                .start  = WRPPMC_UART16550_IRQ,
-                .end    = WRPPMC_UART16550_IRQ,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct plat_serial8250_port wrppmc_serial8250_port[] = {
-        {
-                .irq            = WRPPMC_UART16550_IRQ,
-                .uartclk        = WRPPMC_UART16550_CLOCK,
-                .iotype         = UPIO_MEM,
-                .flags          = UPF_IOREMAP | UPF_SKIP_TEST,
-                .mapbase        = WRPPMC_UART16550_BASE,
-        },
-        {},
-};
-
-static __init int wrppmc_uart_add(void)
-{
-        struct platform_device *pdev;
-        int retval;
-
-        pdev = platform_device_alloc("serial8250", -1);
-        if (!pdev)
-                return -ENOMEM;
-
-        pdev->id = PLAT8250_DEV_PLATFORM;
-        pdev->dev.platform_data = wrppmc_serial8250_port;
-
-        retval = platform_device_add_resources(pdev, wrppmc_uart_resource,
-                                        ARRAY_SIZE(wrppmc_uart_resource));
-        if (retval)
-                goto err_free_device;
-
-        retval = platform_device_add(pdev);
-        if (retval)
-                goto err_free_device;
-
-        return 0;
-
-err_free_device:
-        platform_device_put(pdev);
-
-        return retval;
-}
-device_initcall(wrppmc_uart_add);
diff --git a/arch/mips/wrppmc/setup.c b/arch/mips/wrppmc/setup.c
deleted file mode 100644
index ca65c84031a7..000000000000
--- a/arch/mips/wrppmc/setup.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * setup.c: Setup pointers to hardware dependent routines.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2006, Wind River System Inc. Rongkai.zhan <rongkai.zhan@windriver.com>
- */
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/pm.h>
-
-#include <asm/io.h>
-#include <asm/bootinfo.h>
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/gt64120.h>
-
-unsigned long gt64120_base = KSEG1ADDR(0x14000000);
-
-#ifdef WRPPMC_EARLY_DEBUG
-
-static volatile unsigned char * wrppmc_led = \
-        (volatile unsigned char *)KSEG1ADDR(WRPPMC_LED_BASE);
-
-/*
- * PPMC LED control register:
- * -) bit[0] controls DS1 LED (1 - OFF, 0 - ON)
- * -) bit[1] controls DS2 LED (1 - OFF, 0 - ON)
- * -) bit[2] controls DS4 LED (1 - OFF, 0 - ON)
- */
-void wrppmc_led_on(int mask)
-{
-        unsigned char value = *wrppmc_led;
-
-        value &= (0xF8 | mask);
-        *wrppmc_led = value;
-}
-
-/* If mask = 0, turn off all LEDs */
-void wrppmc_led_off(int mask)
-{
-        unsigned char value = *wrppmc_led;
-
-        value |= (0x7 & mask);
-        *wrppmc_led = value;
-}
-
-/*
- * We assume that bootloader has initialized UART16550 correctly
- */
-void __init wrppmc_early_putc(char ch)
-{
-        static volatile unsigned char *wrppmc_uart = \
-                (volatile unsigned char *)KSEG1ADDR(WRPPMC_UART16550_BASE);
-        unsigned char value;
-
-        /* Wait until Transmit-Holding-Register is empty */
-        while (1) {
-                value = *(wrppmc_uart + 5);
-                if (value & 0x20)
-                        break;
-        }
-
-        *wrppmc_uart = ch;
-}
-
-void __init wrppmc_early_printk(const char *fmt, ...)
-{
-        static char pbuf[256] = {'\0', };
-        char *ch = pbuf;
-        va_list args;
-        unsigned int i;
-
-        memset(pbuf, 0, 256);
-        va_start(args, fmt);
-        i = vsprintf(pbuf, fmt, args);
-        va_end(args);
-
-        /* Print the string */
-        while (*ch != '\0') {
-                wrppmc_early_putc(*ch);
-                /* if print '\n', also print '\r' */
-                if (*ch++ == '\n')
-                        wrppmc_early_putc('\r');
-        }
-}
-#endif /* WRPPMC_EARLY_DEBUG */
-
-void __init prom_free_prom_memory(void)
-{
-}
-
-void __init plat_mem_setup(void)
-{
-        extern void wrppmc_machine_restart(char *command);
-        extern void wrppmc_machine_halt(void);
-
-        _machine_restart = wrppmc_machine_restart;
-        _machine_halt    = wrppmc_machine_halt;
-        pm_power_off     = wrppmc_machine_halt;
-
-        /* This makes the operations of 'in/out[bwl]' to the
-         * physical address ( < KSEG0) can work via KSEG1
-         */
-        set_io_port_base(KSEG1);
-}
-
-const char *get_system_type(void)
-{
-        return "Wind River PPMC (GT64120)";
-}
-
-/*
- * Initializes basic routines and structures pointers, memory size (as
- * given by the bios and saves the command line.
- */
-void __init prom_init(void)
-{
-        add_memory_region(WRPPMC_SDRAM_SCS0_BASE, WRPPMC_SDRAM_SCS0_SIZE, BOOT_MEM_RAM);
-        add_memory_region(WRPPMC_BOOTROM_BASE, WRPPMC_BOOTROM_SIZE, BOOT_MEM_ROM_DATA);
-
-        wrppmc_early_printk("prom_init: GT64120 SDRAM Bank 0: 0x%x - 0x%08lx\n",
-                        WRPPMC_SDRAM_SCS0_BASE, (WRPPMC_SDRAM_SCS0_BASE + WRPPMC_SDRAM_SCS0_SIZE));
-}
diff --git a/arch/mips/wrppmc/time.c b/arch/mips/wrppmc/time.c
deleted file mode 100644
index 668dbd5f12c5..000000000000
--- a/arch/mips/wrppmc/time.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * time.c: MIPS CPU Count/Compare timer hookup
- *
- * Author: Mark.Zhan, <rongkai.zhan@windriver.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2006, Wind River System Inc.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-
-#include <asm/gt64120.h>
-#include <asm/time.h>
-
-#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */
-
-/*
- * Estimate CPU frequency.  Sets mips_hpt_frequency as a side-effect
- *
- * NOTE: We disable all GT64120 timers, and use MIPS processor internal
- * timer as the source of kernel clock tick.
- */
-void __init plat_time_init(void)
-{
-        /* Disable GT64120 timers */
-        GT_WRITE(GT_TC_CONTROL_OFS, 0x00);
-        GT_WRITE(GT_TC0_OFS, 0x00);
-        GT_WRITE(GT_TC1_OFS, 0x00);
-        GT_WRITE(GT_TC2_OFS, 0x00);
-        GT_WRITE(GT_TC3_OFS, 0x00);
-
-        /* Use MIPS compare/count internal timer */
-        mips_hpt_frequency = WRPPMC_CPU_CLK_FREQ;
-}
diff --git a/arch/mn10300/include/uapi/asm/socket.h b/arch/mn10300/include/uapi/asm/socket.h
index b4ce844c9391..e2a2b203eb00 100644
--- a/arch/mn10300/include/uapi/asm/socket.h
+++ b/arch/mn10300/include/uapi/asm/socket.h
@@ -74,4 +74,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/mn10300/mm/fault.c b/arch/mn10300/mm/fault.c
index d48a84fd7fae..8a2e6ded9a44 100644
--- a/arch/mn10300/mm/fault.c
+++ b/arch/mn10300/mm/fault.c
@@ -345,9 +345,10 @@ no_context:
  */
 out_of_memory:
         up_read(&mm->mmap_sem);
-        printk(KERN_ALERT "VM: killing process %s\n", tsk->comm);
-        if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR)
-                do_exit(SIGKILL);
+        if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) {
+                pagefault_out_of_memory();
+                return;
+        }
         goto no_context;
 
 do_sigbus:
diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index f4d5bedc3b4f..d7359ffbcbdd 100644
--- a/arch/openrisc/kernel/setup.c
+++ b/arch/openrisc/kernel/setup.c
@@ -267,7 +267,7 @@ void __init detect_unit_config(unsigned long upr, unsigned long mask,
  *
  */
 
-void __cpuinit calibrate_delay(void)
+void calibrate_delay(void)
 {
         const int *val;
         struct device_node *cpu = NULL;
diff --git a/arch/openrisc/mm/fault.c b/arch/openrisc/mm/fault.c
index e2bfafce66c5..4a41f8493ab0 100644
--- a/arch/openrisc/mm/fault.c
+++ b/arch/openrisc/mm/fault.c
@@ -267,10 +267,10 @@ out_of_memory:
         __asm__ __volatile__("l.nop 1");
 
         up_read(&mm->mmap_sem);
-        printk("VM: killing process %s\n", tsk->comm);
-        if (user_mode(regs))
-                do_exit(SIGKILL);
-        goto no_context;
+        if (!user_mode(regs))
+                goto no_context;
+        pagefault_out_of_memory();
+        return;
 
 do_sigbus:
         up_read(&mm->mmap_sem);
diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile
index 96ec3982be8d..e02f665f804a 100644
--- a/arch/parisc/Makefile
+++ b/arch/parisc/Makefile
@@ -17,6 +17,8 @@
 # Mike Shaver, Helge Deller and Martin K. Petersen
 #
 
+KBUILD_IMAGE := vmlinuz
+
 KBUILD_DEFCONFIG := default_defconfig
 
 NM              = sh $(srctree)/arch/parisc/nm
@@ -92,7 +94,7 @@ PALOCONF := $(shell if [ -f $(src)/palo.conf ]; then echo $(src)/palo.conf; \
         else echo $(obj)/palo.conf; \
         fi)
 
-palo: vmlinux
+palo: vmlinuz
         @if test ! -x "$(PALO)"; then \
                 echo 'ERROR: Please install palo first (apt-get install palo)';\
                 echo 'or build it from source and install it somewhere in your $$PATH';\
@@ -107,10 +109,14 @@ palo: vmlinux
         fi
         $(PALO) -f $(PALOCONF)
 
-# Shorthands for known targets not supported by parisc, use vmlinux as default
-Image zImage bzImage: vmlinux
+# Shorthands for known targets not supported by parisc, use vmlinux/vmlinuz as default
+Image: vmlinux
+zImage bzImage: vmlinuz
+
+vmlinuz: vmlinux
+        @gzip -cf -9 $< > $@
 
-install: vmlinux
+install: vmlinuz
         sh $(src)/arch/parisc/install.sh \
                         $(KERNELRELEASE) $< System.map "$(INSTALL_PATH)"
 
@@ -119,6 +125,7 @@ MRPROPER_FILES	+= palo.conf
 
 define archhelp
         @echo  '* vmlinux       - Uncompressed kernel image (./vmlinux)'
+        @echo  '  vmlinuz       - Compressed kernel image (./vmlinuz)'
         @echo  '  palo          - Bootable image (./lifimage)'
         @echo  '  install       - Install kernel using'
         @echo  '                  (your) ~/bin/$(INSTALLKERNEL) or'
diff --git a/arch/parisc/defpalo.conf b/arch/parisc/defpalo.conf
index 4e1ae25b08d1..208ff3b41487 100644
--- a/arch/parisc/defpalo.conf
+++ b/arch/parisc/defpalo.conf
@@ -4,7 +4,7 @@
 # Most people using 'make palo' want a bootable file, usable for
 # network or tape booting for example.
 --init-tape=lifimage
---recoverykernel=vmlinux
+--recoverykernel=vmlinuz
 
 ########## Pick your ROOT here! ##########
 # You need at least one 'root='!
@@ -12,10 +12,10 @@
 # If you want a root ramdisk, use the next 2 lines
 #   (Edit the ramdisk image name!!!!)
 --ramdisk=ram-disk-image-file
---commandline=0/vmlinux HOME=/ root=/dev/ram initrd=0/ramdisk
+--commandline=0/vmlinuz HOME=/ root=/dev/ram initrd=0/ramdisk panic_timeout=60 panic=-1
 
 # If you want NFS root, use the following command line (Edit the HOSTNAME!!!)
-#--commandline=0/vmlinux HOME=/ root=/dev/nfs nfsroot=HOSTNAME ip=bootp
+#--commandline=0/vmlinuz HOME=/ root=/dev/nfs nfsroot=HOSTNAME ip=bootp
 
 # If you have root on a disk partition, use this (Edit the partition name!!!)
-#--commandline=0/vmlinux HOME=/ root=/dev/sda1
+#--commandline=0/vmlinuz HOME=/ root=/dev/sda1
diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h
index d306b75bc77f..e1509308899f 100644
--- a/arch/parisc/include/asm/special_insns.h
+++ b/arch/parisc/include/asm/special_insns.h
@@ -32,9 +32,12 @@ static inline void set_eiem(unsigned long val)
         cr;                             \
 })
 
-#define mtsp(gr, cr) \
-        __asm__ __volatile__("mtsp %0,%1" \
+#define mtsp(val, cr) \
+        { if (__builtin_constant_p(val) && ((val) == 0)) \
+         __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \
+        else \
+         __asm__ __volatile__("mtsp %0,%1" \
                 : /* no outputs */ \
-                : "r" (gr), "i" (cr) : "memory")
+                : "r" (val), "i" (cr) : "memory"); }
 
 #endif /* __PARISC_SPECIAL_INSNS_H */
diff --git a/arch/parisc/include/asm/tlbflush.h b/arch/parisc/include/asm/tlbflush.h
index 5273da991e06..9d086a599fa0 100644
--- a/arch/parisc/include/asm/tlbflush.h
+++ b/arch/parisc/include/asm/tlbflush.h
@@ -63,13 +63,14 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
 static inline void flush_tlb_page(struct vm_area_struct *vma,
         unsigned long addr)
 {
-        unsigned long flags;
+        unsigned long flags, sid;
 
         /* For one page, it's not worth testing the split_tlb variable */
 
         mb();
-        mtsp(vma->vm_mm->context,1);
+        sid = vma->vm_mm->context;
         purge_tlb_start(flags);
+        mtsp(sid, 1);
         pdtlb(addr);
         pitlb(addr);
         purge_tlb_end(flags);
diff --git a/arch/parisc/include/uapi/asm/fcntl.h b/arch/parisc/include/uapi/asm/fcntl.h
index cc61c475f277..34a46cbc76ed 100644
--- a/arch/parisc/include/uapi/asm/fcntl.h
+++ b/arch/parisc/include/uapi/asm/fcntl.h
@@ -20,7 +20,7 @@
 #define O_INVISIBLE     004000000 /* invisible I/O, for DMAPI/XDSM */
 
 #define O_PATH          020000000
-#define O_TMPFILE       040000000
+#define __O_TMPFILE     040000000
 
 #define F_GETLK64       8
 #define F_SETLK64       9
diff --git a/arch/parisc/include/uapi/asm/socket.h b/arch/parisc/include/uapi/asm/socket.h
index 70c512a386f7..71700e636a8e 100644
--- a/arch/parisc/include/uapi/asm/socket.h
+++ b/arch/parisc/include/uapi/asm/socket.h
@@ -73,6 +73,8 @@
 
 #define SO_SELECT_ERR_QUEUE     0x4026
 
+#define SO_BUSY_POLL            0x4027
+
 /* O_NONBLOCK clashes with the bits used for socket types.  Therefore we
  * have to define SOCK_NONBLOCK to a different value here.
  */
diff --git a/arch/parisc/install.sh b/arch/parisc/install.sh
index e593fc8d58bc..4da682b466d0 100644
--- a/arch/parisc/install.sh
+++ b/arch/parisc/install.sh
@@ -26,13 +26,13 @@ if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 # Default install
 
-if [ -f $4/vmlinux ]; then
-        mv $4/vmlinux $4/vmlinux.old
+if [ -f $4/vmlinuz ]; then
+        mv $4/vmlinuz $4/vmlinuz.old
 fi
 
 if [ -f $4/System.map ]; then
         mv $4/System.map $4/System.old
 fi
 
-cat $2 > $4/vmlinux
+cat $2 > $4/vmlinuz
 cp $3 $4/System.map
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 65fb4cbc3a0f..2e65aa54bd10 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -440,8 +440,8 @@ void __flush_tlb_range(unsigned long sid, unsigned long start,
         else {
                 unsigned long flags;
 
-                mtsp(sid, 1);
                 purge_tlb_start(flags);
+                mtsp(sid, 1);
                 if (split_tlb) {
                         while (npages--) {
                                 pdtlb(start);
diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c
index f65fa480c905..22395901d47b 100644
--- a/arch/parisc/kernel/firmware.c
+++ b/arch/parisc/kernel/firmware.c
@@ -150,7 +150,7 @@ static void convert_to_wide(unsigned long *addr)
 }
 
 #ifdef CONFIG_64BIT
-void __cpuinit set_firmware_width_unlocked(void)
+void set_firmware_width_unlocked(void)
 {
         int ret;
 
@@ -167,7 +167,7 @@ void __cpuinit set_firmware_width_unlocked(void)
  * This function must be called before any pdc_* function that uses the
  * convert_to_wide function.
  */
-void __cpuinit set_firmware_width(void)
+void set_firmware_width(void)
 {
         unsigned long flags;
         spin_lock_irqsave(&pdc_lock, flags);
@@ -175,11 +175,13 @@ void __cpuinit set_firmware_width(void)
         spin_unlock_irqrestore(&pdc_lock, flags);
 }
 #else
-void __cpuinit set_firmware_width_unlocked(void) {
+void set_firmware_width_unlocked(void)
+{
         return;
 }
 
-void __cpuinit set_firmware_width(void) {
+void set_firmware_width(void)
+{
         return;
 }
 #endif /*CONFIG_64BIT*/
@@ -301,7 +303,7 @@ int pdc_chassis_warn(unsigned long *warn)
         return retval;
 }
 
-int __cpuinit pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
+int pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
 {
         int ret;
 
@@ -322,7 +324,7 @@ int __cpuinit pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
  * This PDC call returns the presence and status of all the coprocessors
  * attached to the processor.
  */
-int __cpuinit pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
+int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
 {
         int ret;
         unsigned long flags;
diff --git a/arch/parisc/kernel/hardware.c b/arch/parisc/kernel/hardware.c
index 872275659d98..06cb3992907e 100644
--- a/arch/parisc/kernel/hardware.c
+++ b/arch/parisc/kernel/hardware.c
@@ -1367,7 +1367,7 @@ const char *parisc_hardware_description(struct parisc_device_id *id)
 
 
 /* Interpret hversion (ret[0]) from PDC_MODEL(4)/PDC_MODEL_INFO(0) */
-enum cpu_type __cpuinit
+enum cpu_type
 parisc_get_cpu_type(unsigned long hversion)
 {
         struct hp_cpu_type_mask *ptr;
diff --git a/arch/parisc/kernel/processor.c b/arch/parisc/kernel/processor.c
index c8fb61ed32f4..b68d977ce30f 100644
--- a/arch/parisc/kernel/processor.c
+++ b/arch/parisc/kernel/processor.c
@@ -73,7 +73,7 @@ extern int update_cr16_clocksource(void);	/* from time.c */
  *
  * FIXME: doesn't do much yet...
  */
-static void __cpuinit
+static void
 init_percpu_prof(unsigned long cpunum)
 {
         struct cpuinfo_parisc *p;
@@ -92,7 +92,7 @@ init_percpu_prof(unsigned long cpunum)
  * (return 1).  If so, initialize the chip and tell other partners in crime 
  * they have work to do.
  */
-static int __cpuinit processor_probe(struct parisc_device *dev)
+static int processor_probe(struct parisc_device *dev)
 {
         unsigned long txn_addr;
         unsigned long cpuid;
@@ -299,7 +299,7 @@ void __init collect_boot_cpu_data(void)
  *
  * o Enable CPU profiling hooks.
  */
-int __cpuinit init_per_cpu(int cpunum)
+int init_per_cpu(int cpunum)
 {
         int ret;
         struct pdc_coproc_cfg coproc_cfg;
@@ -371,10 +371,23 @@ show_cpuinfo (struct seq_file *m, void *v)
 
                 seq_printf(m, "capabilities\t:");
                 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
-                        seq_printf(m, " os32");
+                        seq_puts(m, " os32");
                 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
-                        seq_printf(m, " os64");
-                seq_printf(m, "\n");
+                        seq_puts(m, " os64");
+                if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
+                        seq_puts(m, " iopdir_fdc");
+                switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
+                case PDC_MODEL_NVA_SUPPORTED:
+                        seq_puts(m, " nva_supported");
+                        break;
+                case PDC_MODEL_NVA_SLOW:
+                        seq_puts(m, " nva_slow");
+                        break;
+                case PDC_MODEL_NVA_UNSUPPORTED:
+                        seq_puts(m, " needs_equivalent_aliasing");
+                        break;
+                }
+                seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
 
                 seq_printf(m, "model\t\t: %s\n"
                                 "model name\t: %s\n",
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index e3614fb343e5..8a252f2d6c08 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -62,9 +62,9 @@ static int smp_debug_lvl = 0;
 volatile struct task_struct *smp_init_current_idle_task;
 
 /* track which CPU is booting */
-static volatile int cpu_now_booting __cpuinitdata;
+static volatile int cpu_now_booting;
 
-static int parisc_max_cpus __cpuinitdata = 1;
+static int parisc_max_cpus = 1;
 
 static DEFINE_PER_CPU(spinlock_t, ipi_lock);
 
@@ -328,7 +328,7 @@ void __init smp_callin(void)
 /*
  * Bring one cpu online.
  */
-int __cpuinit smp_boot_one_cpu(int cpuid, struct task_struct *idle)
+int smp_boot_one_cpu(int cpuid, struct task_struct *idle)
 {
         const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid);
         long timeout;
@@ -424,7 +424,7 @@ void smp_cpus_done(unsigned int cpu_max)
 }
 
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         if (cpu != 0 && cpu < parisc_max_cpus)
                 smp_boot_one_cpu(cpu, tidle);
diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c
index a49cc812df8a..ac4370b1ca40 100644
--- a/arch/parisc/lib/memcpy.c
+++ b/arch/parisc/lib/memcpy.c
@@ -2,6 +2,7 @@
  *    Optimized memory copy routines.
  *
  *    Copyright (C) 2004 Randolph Chung <tausq@debian.org>
+ *    Copyright (C) 2013 Helge Deller <deller@gmx.de>
  *
  *    This program is free software; you can redistribute it and/or modify
  *    it under the terms of the GNU General Public License as published by
@@ -153,17 +154,21 @@ static inline void prefetch_dst(const void *addr)
 #define prefetch_dst(addr) do { } while(0)
 #endif
 
+#define PA_MEMCPY_OK            0
+#define PA_MEMCPY_LOAD_ERROR    1
+#define PA_MEMCPY_STORE_ERROR   2
+
 /* Copy from a not-aligned src to an aligned dst, using shifts. Handles 4 words
  * per loop.  This code is derived from glibc. 
  */
-static inline unsigned long copy_dstaligned(unsigned long dst, unsigned long src, unsigned long len, unsigned long o_dst, unsigned long o_src, unsigned long o_len)
+static inline unsigned long copy_dstaligned(unsigned long dst,
+                                        unsigned long src, unsigned long len)
 {
         /* gcc complains that a2 and a3 may be uninitialized, but actually
          * they cannot be.  Initialize a2/a3 to shut gcc up.
          */
         register unsigned int a0, a1, a2 = 0, a3 = 0;
         int sh_1, sh_2;
-        struct exception_data *d;
 
         /* prefetch_src((const void *)src); */
 
@@ -197,7 +202,7 @@ static inline unsigned long copy_dstaligned(unsigned long dst, unsigned long src
                         goto do2;
                 case 0:
                         if (len == 0)
-                                return 0;
+                                return PA_MEMCPY_OK;
                         /* a3 = ((unsigned int *) src)[0];
                            a0 = ((unsigned int *) src)[1]; */
                         ldw(s_space, 0, src, a3, cda_ldw_exc);
@@ -256,42 +261,35 @@ do0:
         preserve_branch(handle_load_error);
         preserve_branch(handle_store_error);
 
-        return 0;
+        return PA_MEMCPY_OK;
 
 handle_load_error:
         __asm__ __volatile__ ("cda_ldw_exc:\n");
-        d = &__get_cpu_var(exception_data);
-        DPRINTF("cda_ldw_exc: o_len=%lu fault_addr=%lu o_src=%lu ret=%lu\n",
-                o_len, d->fault_addr, o_src, o_len - d->fault_addr + o_src);
-        return o_len * 4 - d->fault_addr + o_src;
+        return PA_MEMCPY_LOAD_ERROR;
 
 handle_store_error:
         __asm__ __volatile__ ("cda_stw_exc:\n");
-        d = &__get_cpu_var(exception_data);
-        DPRINTF("cda_stw_exc: o_len=%lu fault_addr=%lu o_dst=%lu ret=%lu\n",
-                o_len, d->fault_addr, o_dst, o_len - d->fault_addr + o_dst);
-        return o_len * 4 - d->fault_addr + o_dst;
+        return PA_MEMCPY_STORE_ERROR;
 }
 
 
-/* Returns 0 for success, otherwise, returns number of bytes not transferred. */
-static unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len)
+/* Returns PA_MEMCPY_OK, PA_MEMCPY_LOAD_ERROR or PA_MEMCPY_STORE_ERROR.
+ * In case of an access fault the faulty address can be read from the per_cpu
+ * exception data struct. */
+static unsigned long pa_memcpy_internal(void *dstp, const void *srcp,
+                                        unsigned long len)
 {
         register unsigned long src, dst, t1, t2, t3;
         register unsigned char *pcs, *pcd;
         register unsigned int *pws, *pwd;
         register double *pds, *pdd;
-        unsigned long ret = 0;
-        unsigned long o_dst, o_src, o_len;
-        struct exception_data *d;
+        unsigned long ret;
 
         src = (unsigned long)srcp;
         dst = (unsigned long)dstp;
         pcs = (unsigned char *)srcp;
         pcd = (unsigned char *)dstp;
 
-        o_dst = dst; o_src = src; o_len = len;
-
         /* prefetch_src((const void *)srcp); */
 
         if (len < THRESHOLD)
@@ -401,7 +399,7 @@ byte_copy:
                 len--;
         }
 
-        return 0;
+        return PA_MEMCPY_OK;
 
 unaligned_copy:
         /* possibly we are aligned on a word, but not on a double... */
@@ -438,8 +436,7 @@ unaligned_copy:
                 src = (unsigned long)pcs;
         }
 
-        ret = copy_dstaligned(dst, src, len / sizeof(unsigned int), 
-                o_dst, o_src, o_len);
+        ret = copy_dstaligned(dst, src, len / sizeof(unsigned int));
         if (ret)
                 return ret;
 
@@ -454,17 +451,41 @@ unaligned_copy:
 
 handle_load_error:
         __asm__ __volatile__ ("pmc_load_exc:\n");
-        d = &__get_cpu_var(exception_data);
-        DPRINTF("pmc_load_exc: o_len=%lu fault_addr=%lu o_src=%lu ret=%lu\n",
-                o_len, d->fault_addr, o_src, o_len - d->fault_addr + o_src);
-        return o_len - d->fault_addr + o_src;
+        return PA_MEMCPY_LOAD_ERROR;
 
 handle_store_error:
         __asm__ __volatile__ ("pmc_store_exc:\n");
+        return PA_MEMCPY_STORE_ERROR;
+}
+
+
+/* Returns 0 for success, otherwise, returns number of bytes not transferred. */
+static unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len)
+{
+        unsigned long ret, fault_addr, reference;
+        struct exception_data *d;
+
+        ret = pa_memcpy_internal(dstp, srcp, len);
+        if (likely(ret == PA_MEMCPY_OK))
+                return 0;
+
+        /* if a load or store fault occured we can get the faulty addr */
         d = &__get_cpu_var(exception_data);
-        DPRINTF("pmc_store_exc: o_len=%lu fault_addr=%lu o_dst=%lu ret=%lu\n",
-                o_len, d->fault_addr, o_dst, o_len - d->fault_addr + o_dst);
-        return o_len - d->fault_addr + o_dst;
+        fault_addr = d->fault_addr;
+
+        /* error in load or store? */
+        if (ret == PA_MEMCPY_LOAD_ERROR)
+                reference = (unsigned long) srcp;
+        else
+                reference = (unsigned long) dstp;
+
+        DPRINTF("pa_memcpy: fault type = %lu, len=%lu fault_addr=%lu ref=%lu\n",
+                ret, len, fault_addr, reference);
+
+        if (fault_addr >= reference)
+                return len - (fault_addr - reference);
+        else
+                return len;
 }
 
 #ifdef __KERNEL__
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index bc3a0ebf16a7..3bf72cd2c8fc 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -668,7 +668,6 @@ config SBUS
 
 config FSL_SOC
         bool
-        select HAVE_CAN_FLEXCAN if NET && CAN
 
 config FSL_PCI
         bool
diff --git a/arch/powerpc/include/uapi/asm/socket.h b/arch/powerpc/include/uapi/asm/socket.h
index a36daf3c6f9a..a6d74467c9ed 100644
--- a/arch/powerpc/include/uapi/asm/socket.h
+++ b/arch/powerpc/include/uapi/asm/socket.h
@@ -81,4 +81,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif  /* _ASM_POWERPC_SOCKET_H */
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 64f7bd5b1b0f..9a0d24c390a3 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -975,16 +975,12 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
         hw_brk.type = (data & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
         hw_brk.len = 8;
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
-        if (ptrace_get_breakpoints(task) < 0)
-                return -ESRCH;
-
         bp = thread->ptrace_bps[0];
         if ((!data) || !(hw_brk.type & HW_BRK_TYPE_RDWR)) {
                 if (bp) {
                         unregister_hw_breakpoint(bp);
                         thread->ptrace_bps[0] = NULL;
                 }
-                ptrace_put_breakpoints(task);
                 return 0;
         }
         if (bp) {
@@ -997,11 +993,9 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
 
                 ret =  modify_user_hw_breakpoint(bp, &attr);
                 if (ret) {
-                        ptrace_put_breakpoints(task);
                         return ret;
                 }
                 thread->ptrace_bps[0] = bp;
-                ptrace_put_breakpoints(task);
                 thread->hw_brk = hw_brk;
                 return 0;
         }
@@ -1016,12 +1010,9 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
                                                ptrace_triggered, NULL, task);
         if (IS_ERR(bp)) {
                 thread->ptrace_bps[0] = NULL;
-                ptrace_put_breakpoints(task);
                 return PTR_ERR(bp);
         }
 
-        ptrace_put_breakpoints(task);
-
 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
         task->thread.hw_brk = hw_brk;
 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
@@ -1440,26 +1431,19 @@ static long ppc_set_hwdebug(struct task_struct *child,
         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
                 brk.type |= HW_BRK_TYPE_WRITE;
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
-        if (ptrace_get_breakpoints(child) < 0)
-                return -ESRCH;
-
         /*
          * Check if the request is for 'range' breakpoints. We can
          * support it if range < 8 bytes.
          */
-        if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE) {
+        if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
                 len = bp_info->addr2 - bp_info->addr;
-        } else if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
+        else if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
                 len = 1;
-        else {
-                ptrace_put_breakpoints(child);
+        else
                 return -EINVAL;
-        }
         bp = thread->ptrace_bps[0];
-        if (bp) {
-                ptrace_put_breakpoints(child);
+        if (bp)
                 return -ENOSPC;
-        }
 
         /* Create a new breakpoint request if one doesn't exist already */
         hw_breakpoint_init(&attr);
@@ -1471,11 +1455,9 @@ static long ppc_set_hwdebug(struct task_struct *child,
                                                ptrace_triggered, NULL, child);
         if (IS_ERR(bp)) {
                 thread->ptrace_bps[0] = NULL;
-                ptrace_put_breakpoints(child);
                 return PTR_ERR(bp);
         }
 
-        ptrace_put_breakpoints(child);
         return 1;
 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 
@@ -1519,16 +1501,12 @@ static long ppc_del_hwdebug(struct task_struct *child, long data)
                 return -EINVAL;
 
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
-        if (ptrace_get_breakpoints(child) < 0)
-                return -ESRCH;
-
         bp = thread->ptrace_bps[0];
         if (bp) {
                 unregister_hw_breakpoint(bp);
                 thread->ptrace_bps[0] = NULL;
         } else
                 ret = -ENOENT;
-        ptrace_put_breakpoints(child);
         return ret;
 #else /* CONFIG_HAVE_HW_BREAKPOINT */
         if (child->thread.hw_brk.address == 0)
diff --git a/arch/powerpc/mm/mmap.c b/arch/powerpc/mm/mmap.c
index 67a42ed0d2fc..cb8bdbe4972f 100644
--- a/arch/powerpc/mm/mmap.c
+++ b/arch/powerpc/mm/mmap.c
@@ -92,10 +92,8 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
         if (mmap_is_legacy()) {
                 mm->mmap_base = TASK_UNMAPPED_BASE;
                 mm->get_unmapped_area = arch_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 mm->mmap_base = mmap_base();
                 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index c427ae36374a..bf56e33f8257 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -650,8 +650,7 @@ void bpf_jit_compile(struct sk_filter *fp)
 
         proglen = cgctx.idx * 4;
         alloclen = proglen + FUNCTION_DESCR_SIZE;
-        image = module_alloc(max_t(unsigned int, alloclen,
-                                   sizeof(struct work_struct)));
+        image = module_alloc(alloclen);
         if (!image)
                 goto out;
 
@@ -688,20 +687,8 @@ out:
         return;
 }
 
-static void jit_free_defer(struct work_struct *arg)
-{
-        module_free(NULL, arg);
-}
-
-/* run from softirq, we must use a work_struct to call
- * module_free() from process context
- */
 void bpf_jit_free(struct sk_filter *fp)
 {
-        if (fp->bpf_func != sk_run_filter) {
-                struct work_struct *work = (struct work_struct *)fp->bpf_func;
-
-                INIT_WORK(work, jit_free_defer);
-                schedule_work(work);
-        }
+        if (fp->bpf_func != sk_run_filter)
+                module_free(NULL, fp->bpf_func);
 }
diff --git a/arch/powerpc/perf/power7-pmu.c b/arch/powerpc/perf/power7-pmu.c
index 13c3f0e547a2..d1821b8bbc4c 100644
--- a/arch/powerpc/perf/power7-pmu.c
+++ b/arch/powerpc/perf/power7-pmu.c
@@ -60,7 +60,7 @@
 #define PME_PM_LD_REF_L1                0xc880
 #define PME_PM_LD_MISS_L1               0x400f0
 #define PME_PM_BRU_FIN                  0x10068
-#define PME_PM_BRU_MPRED                0x400f6
+#define PME_PM_BR_MPRED                 0x400f6
 
 #define PME_PM_CMPLU_STALL_FXU                  0x20014
 #define PME_PM_CMPLU_STALL_DIV                  0x40014
@@ -349,7 +349,7 @@ static int power7_generic_events[] = {
         [PERF_COUNT_HW_CACHE_REFERENCES] =              PME_PM_LD_REF_L1,
         [PERF_COUNT_HW_CACHE_MISSES] =                  PME_PM_LD_MISS_L1,
         [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =           PME_PM_BRU_FIN,
-        [PERF_COUNT_HW_BRANCH_MISSES] =                 PME_PM_BRU_MPRED,
+        [PERF_COUNT_HW_BRANCH_MISSES] =                 PME_PM_BR_MPRED,
 };
 
 #define C(x)    PERF_COUNT_HW_CACHE_##x
@@ -405,7 +405,7 @@ GENERIC_EVENT_ATTR(instructions,		INST_CMPL);
 GENERIC_EVENT_ATTR(cache-references,            LD_REF_L1);
 GENERIC_EVENT_ATTR(cache-misses,                LD_MISS_L1);
 GENERIC_EVENT_ATTR(branch-instructions,         BRU_FIN);
-GENERIC_EVENT_ATTR(branch-misses,               BRU_MPRED);
+GENERIC_EVENT_ATTR(branch-misses,               BR_MPRED);
 
 POWER_EVENT_ATTR(CYC,                           CYC);
 POWER_EVENT_ATTR(GCT_NOSLOT_CYC,                GCT_NOSLOT_CYC);
@@ -414,7 +414,7 @@ POWER_EVENT_ATTR(INST_CMPL,			INST_CMPL);
 POWER_EVENT_ATTR(LD_REF_L1,                     LD_REF_L1);
 POWER_EVENT_ATTR(LD_MISS_L1,                    LD_MISS_L1);
 POWER_EVENT_ATTR(BRU_FIN,                       BRU_FIN)
-POWER_EVENT_ATTR(BRU_MPRED,                     BRU_MPRED);
+POWER_EVENT_ATTR(BR_MPRED,                      BR_MPRED);
 
 POWER_EVENT_ATTR(CMPLU_STALL_FXU,               CMPLU_STALL_FXU);
 POWER_EVENT_ATTR(CMPLU_STALL_DIV,               CMPLU_STALL_DIV);
@@ -449,7 +449,7 @@ static struct attribute *power7_events_attr[] = {
         GENERIC_EVENT_PTR(LD_REF_L1),
         GENERIC_EVENT_PTR(LD_MISS_L1),
         GENERIC_EVENT_PTR(BRU_FIN),
-        GENERIC_EVENT_PTR(BRU_MPRED),
+        GENERIC_EVENT_PTR(BR_MPRED),
 
         POWER_EVENT_PTR(CYC),
         POWER_EVENT_PTR(GCT_NOSLOT_CYC),
@@ -458,7 +458,7 @@ static struct attribute *power7_events_attr[] = {
         POWER_EVENT_PTR(LD_REF_L1),
         POWER_EVENT_PTR(LD_MISS_L1),
         POWER_EVENT_PTR(BRU_FIN),
-        POWER_EVENT_PTR(BRU_MPRED),
+        POWER_EVENT_PTR(BR_MPRED),
 
         POWER_EVENT_PTR(CMPLU_STALL_FXU),
         POWER_EVENT_PTR(CMPLU_STALL_DIV),
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index 8c6dc42ecf65..9e5dfbcc00af 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -239,7 +239,7 @@ void __init beatic_init_IRQ(void)
         ppc_md.get_irq = beatic_get_irq;
 
         /* Allocate an irq host */
-        beatic_host = irq_domain_add_nomap(NULL, 0, &beatic_pic_host_ops, NULL);
+        beatic_host = irq_domain_add_nomap(NULL, ~0, &beatic_pic_host_ops, NULL);
         BUG_ON(beatic_host == NULL);
         irq_set_default_host(beatic_host);
 }
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 49c9f9501c21..5cbd4d67d5c4 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -192,7 +192,7 @@ static int psurge_secondary_ipi_init(void)
 {
         int rc = -ENOMEM;
 
-        psurge_host = irq_domain_add_nomap(NULL, 0, &psurge_host_ops, NULL);
+        psurge_host = irq_domain_add_nomap(NULL, ~0, &psurge_host_ops, NULL);
 
         if (psurge_host)
                 psurge_secondary_virq = irq_create_direct_mapping(psurge_host);
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 6b499870662f..b0e6435b2f02 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -91,7 +91,15 @@ struct thread_struct {
 #endif
 };
 
-#define PER_FLAG_NO_TE          1UL     /* Flag to disable transactions. */
+/* Flag to disable transactions. */
+#define PER_FLAG_NO_TE                  1UL
+/* Flag to enable random transaction aborts. */
+#define PER_FLAG_TE_ABORT_RAND          2UL
+/* Flag to specify random transaction abort mode:
+ * - abort each transaction at a random instruction before TEND if set.
+ * - abort random transactions at a random instruction if cleared.
+ */
+#define PER_FLAG_TE_ABORT_RAND_TEND     4UL
 
 typedef struct thread_struct thread_struct;
 
diff --git a/arch/s390/include/asm/switch_to.h b/arch/s390/include/asm/switch_to.h
index f3a9e0f92704..80b6f11263c4 100644
--- a/arch/s390/include/asm/switch_to.h
+++ b/arch/s390/include/asm/switch_to.h
@@ -10,7 +10,7 @@
 #include <linux/thread_info.h>
 
 extern struct task_struct *__switch_to(void *, void *);
-extern void update_per_regs(struct task_struct *task);
+extern void update_cr_regs(struct task_struct *task);
 
 static inline void save_fp_regs(s390_fp_regs *fpregs)
 {
@@ -86,7 +86,7 @@ static inline void restore_access_regs(unsigned int *acrs)
                 restore_fp_regs(&next->thread.fp_regs);                 \
                 restore_access_regs(&next->thread.acrs[0]);             \
                 restore_ri_cb(next->thread.ri_cb, prev->thread.ri_cb);  \
-                update_per_regs(next);                                  \
+                update_cr_regs(next);                                   \
         }                                                               \
         prev = __switch_to(prev,next);                                  \
 } while (0)
diff --git a/arch/s390/include/uapi/asm/ptrace.h b/arch/s390/include/uapi/asm/ptrace.h
index 3aa9f1ec5b29..7a84619e315e 100644
--- a/arch/s390/include/uapi/asm/ptrace.h
+++ b/arch/s390/include/uapi/asm/ptrace.h
@@ -400,6 +400,7 @@ typedef struct
 #define PTRACE_POKE_SYSTEM_CALL       0x5008
 #define PTRACE_ENABLE_TE              0x5009
 #define PTRACE_DISABLE_TE             0x5010
+#define PTRACE_TE_ABORT_RAND          0x5011
 
 /*
  * PT_PROT definition is loosely based on hppa bsd definition in
diff --git a/arch/s390/include/uapi/asm/socket.h b/arch/s390/include/uapi/asm/socket.h
index 2dacb306835c..92494494692e 100644
--- a/arch/s390/include/uapi/asm/socket.h
+++ b/arch/s390/include/uapi/asm/socket.h
@@ -80,4 +80,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/s390/kernel/cache.c b/arch/s390/kernel/cache.c
index 64b24650e4f8..dd62071624be 100644
--- a/arch/s390/kernel/cache.c
+++ b/arch/s390/kernel/cache.c
@@ -173,7 +173,7 @@ error:
         }
 }
 
-static struct cache_dir *__cpuinit cache_create_cache_dir(int cpu)
+static struct cache_dir *cache_create_cache_dir(int cpu)
 {
         struct cache_dir *cache_dir;
         struct kobject *kobj = NULL;
@@ -289,9 +289,8 @@ static struct kobj_type cache_index_type = {
         .default_attrs = cache_index_default_attrs,
 };
 
-static int __cpuinit cache_create_index_dir(struct cache_dir *cache_dir,
-                                            struct cache *cache, int index,
-                                            int cpu)
+static int cache_create_index_dir(struct cache_dir *cache_dir,
+                                  struct cache *cache, int index, int cpu)
 {
         struct cache_index_dir *index_dir;
         int rc;
@@ -313,7 +312,7 @@ out:
         return rc;
 }
 
-static int __cpuinit cache_add_cpu(int cpu)
+static int cache_add_cpu(int cpu)
 {
         struct cache_dir *cache_dir;
         struct cache *cache;
@@ -335,7 +334,7 @@ static int __cpuinit cache_add_cpu(int cpu)
         return 0;
 }
 
-static void __cpuinit cache_remove_cpu(int cpu)
+static void cache_remove_cpu(int cpu)
 {
         struct cache_index_dir *index, *next;
         struct cache_dir *cache_dir;
@@ -354,8 +353,8 @@ static void __cpuinit cache_remove_cpu(int cpu)
         cache_dir_cpu[cpu] = NULL;
 }
 
-static int __cpuinit cache_hotplug(struct notifier_block *nfb,
-                                   unsigned long action, void *hcpu)
+static int cache_hotplug(struct notifier_block *nfb, unsigned long action,
+                         void *hcpu)
 {
         int cpu = (long)hcpu;
         int rc = 0;
diff --git a/arch/s390/kernel/crash_dump.c b/arch/s390/kernel/crash_dump.c
index f703d91bf720..d8f355657171 100644
--- a/arch/s390/kernel/crash_dump.c
+++ b/arch/s390/kernel/crash_dump.c
@@ -21,6 +21,48 @@
 #define PTR_SUB(x, y) (((char *) (x)) - ((unsigned long) (y)))
 #define PTR_DIFF(x, y) ((unsigned long)(((char *) (x)) - ((unsigned long) (y))))
 
+
+/*
+ * Return physical address for virtual address
+ */
+static inline void *load_real_addr(void *addr)
+{
+        unsigned long real_addr;
+
+        asm volatile(
+                   "    lra     %0,0(%1)\n"
+                   "    jz      0f\n"
+                   "    la      %0,0\n"
+                   "0:"
+                   : "=a" (real_addr) : "a" (addr) : "cc");
+        return (void *)real_addr;
+}
+
+/*
+ * Copy up to one page to vmalloc or real memory
+ */
+static ssize_t copy_page_real(void *buf, void *src, size_t csize)
+{
+        size_t size;
+
+        if (is_vmalloc_addr(buf)) {
+                BUG_ON(csize >= PAGE_SIZE);
+                /* If buf is not page aligned, copy first part */
+                size = min(roundup(__pa(buf), PAGE_SIZE) - __pa(buf), csize);
+                if (size) {
+                        if (memcpy_real(load_real_addr(buf), src, size))
+                                return -EFAULT;
+                        buf += size;
+                        src += size;
+                }
+                /* Copy second part */
+                size = csize - size;
+                return (size) ? memcpy_real(load_real_addr(buf), src, size) : 0;
+        } else {
+                return memcpy_real(buf, src, csize);
+        }
+}
+
 /*
  * Copy one page from "oldmem"
  *
@@ -32,6 +74,7 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
                          size_t csize, unsigned long offset, int userbuf)
 {
         unsigned long src;
+        int rc;
 
         if (!csize)
                 return 0;
@@ -43,11 +86,11 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
                  src < OLDMEM_BASE + OLDMEM_SIZE)
                 src -= OLDMEM_BASE;
         if (userbuf)
-                copy_to_user_real((void __force __user *) buf, (void *) src,
-                                  csize);
+                rc = copy_to_user_real((void __force __user *) buf,
+                                       (void *) src, csize);
         else
-                memcpy_real(buf, (void *) src, csize);
-        return csize;
+                rc = copy_page_real(buf, (void *) src, csize);
+        return (rc == 0) ? csize : rc;
 }
 
 /*
diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c
index 390d9ae57bb2..fb99c2057b85 100644
--- a/arch/s390/kernel/perf_cpum_cf.c
+++ b/arch/s390/kernel/perf_cpum_cf.c
@@ -639,8 +639,8 @@ static struct pmu cpumf_pmu = {
         .cancel_txn   = cpumf_pmu_cancel_txn,
 };
 
-static int __cpuinit cpumf_pmu_notifier(struct notifier_block *self,
-                                        unsigned long action, void *hcpu)
+static int cpumf_pmu_notifier(struct notifier_block *self, unsigned long action,
+                              void *hcpu)
 {
         unsigned int cpu = (long) hcpu;
         int flags;
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
index 753c41d0ffd3..24612029f450 100644
--- a/arch/s390/kernel/processor.c
+++ b/arch/s390/kernel/processor.c
@@ -21,7 +21,7 @@ static DEFINE_PER_CPU(struct cpuid, cpu_id);
 /*
  * cpu_init - initializes state that is per-CPU.
  */
-void __cpuinit cpu_init(void)
+void cpu_init(void)
 {
         struct s390_idle_data *idle = &__get_cpu_var(s390_idle);
         struct cpuid *id = &__get_cpu_var(cpu_id);
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index a314c57f4e94..e9fadb04e3c6 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -47,7 +47,7 @@ enum s390_regset {
         REGSET_GENERAL_EXTENDED,
 };
 
-void update_per_regs(struct task_struct *task)
+void update_cr_regs(struct task_struct *task)
 {
         struct pt_regs *regs = task_pt_regs(task);
         struct thread_struct *thread = &task->thread;
@@ -56,17 +56,25 @@ void update_per_regs(struct task_struct *task)
 #ifdef CONFIG_64BIT
         /* Take care of the enable/disable of transactional execution. */
         if (MACHINE_HAS_TE) {
-                unsigned long cr0, cr0_new;
+                unsigned long cr[3], cr_new[3];
 
-                __ctl_store(cr0, 0, 0);
-                /* set or clear transaction execution bits 8 and 9. */
+                __ctl_store(cr, 0, 2);
+                cr_new[1] = cr[1];
+                /* Set or clear transaction execution TXC/PIFO bits 8 and 9. */
                 if (task->thread.per_flags & PER_FLAG_NO_TE)
-                        cr0_new = cr0 & ~(3UL << 54);
+                        cr_new[0] = cr[0] & ~(3UL << 54);
                 else
-                        cr0_new = cr0 | (3UL << 54);
-                /* Only load control register 0 if necessary. */
-                if (cr0 != cr0_new)
-                        __ctl_load(cr0_new, 0, 0);
+                        cr_new[0] = cr[0] | (3UL << 54);
+                /* Set or clear transaction execution TDC bits 62 and 63. */
+                cr_new[2] = cr[2] & ~3UL;
+                if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND) {
+                        if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND_TEND)
+                                cr_new[2] |= 1UL;
+                        else
+                                cr_new[2] |= 2UL;
+                }
+                if (memcmp(&cr_new, &cr, sizeof(cr)))
+                        __ctl_load(cr_new, 0, 2);
         }
 #endif
         /* Copy user specified PER registers */
@@ -100,14 +108,14 @@ void user_enable_single_step(struct task_struct *task)
 {
         set_tsk_thread_flag(task, TIF_SINGLE_STEP);
         if (task == current)
-                update_per_regs(task);
+                update_cr_regs(task);
 }
 
 void user_disable_single_step(struct task_struct *task)
 {
         clear_tsk_thread_flag(task, TIF_SINGLE_STEP);
         if (task == current)
-                update_per_regs(task);
+                update_cr_regs(task);
 }
 
 /*
@@ -447,6 +455,26 @@ long arch_ptrace(struct task_struct *child, long request,
                 if (!MACHINE_HAS_TE)
                         return -EIO;
                 child->thread.per_flags |= PER_FLAG_NO_TE;
+                child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND;
+                return 0;
+        case PTRACE_TE_ABORT_RAND:
+                if (!MACHINE_HAS_TE || (child->thread.per_flags & PER_FLAG_NO_TE))
+                        return -EIO;
+                switch (data) {
+                case 0UL:
+                        child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND;
+                        break;
+                case 1UL:
+                        child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND;
+                        child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND_TEND;
+                        break;
+                case 2UL:
+                        child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND;
+                        child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND_TEND;
+                        break;
+                default:
+                        return -EINVAL;
+                }
                 return 0;
         default:
                 /* Removing high order bit from addr (only for 31 bit). */
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 15a016c10563..d386c4e9d2e5 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -165,7 +165,7 @@ static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
         pcpu_sigp_retry(pcpu, order, 0);
 }
 
-static int __cpuinit pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
+static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
 {
         struct _lowcore *lc;
 
@@ -616,10 +616,9 @@ static struct sclp_cpu_info *smp_get_cpu_info(void)
         return info;
 }
 
-static int __cpuinit smp_add_present_cpu(int cpu);
+static int smp_add_present_cpu(int cpu);
 
-static int __cpuinit __smp_rescan_cpus(struct sclp_cpu_info *info,
-                                       int sysfs_add)
+static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add)
 {
         struct pcpu *pcpu;
         cpumask_t avail;
@@ -685,7 +684,7 @@ static void __init smp_detect_cpus(void)
 /*
  *      Activate a secondary processor.
  */
-static void __cpuinit smp_start_secondary(void *cpuvoid)
+static void smp_start_secondary(void *cpuvoid)
 {
         S390_lowcore.last_update_clock = get_tod_clock();
         S390_lowcore.restart_stack = (unsigned long) restart_stack;
@@ -708,7 +707,7 @@ static void __cpuinit smp_start_secondary(void *cpuvoid)
 }
 
 /* Upping and downing of CPUs */
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         struct pcpu *pcpu;
         int rc;
@@ -964,8 +963,8 @@ static struct attribute_group cpu_online_attr_group = {
         .attrs = cpu_online_attrs,
 };
 
-static int __cpuinit smp_cpu_notify(struct notifier_block *self,
-                                    unsigned long action, void *hcpu)
+static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
+                          void *hcpu)
 {
         unsigned int cpu = (unsigned int)(long)hcpu;
         struct cpu *c = &pcpu_devices[cpu].cpu;
@@ -983,7 +982,7 @@ static int __cpuinit smp_cpu_notify(struct notifier_block *self,
         return notifier_from_errno(err);
 }
 
-static int __cpuinit smp_add_present_cpu(int cpu)
+static int smp_add_present_cpu(int cpu)
 {
         struct cpu *c = &pcpu_devices[cpu].cpu;
         struct device *s = &c->dev;
diff --git a/arch/s390/kernel/sysinfo.c b/arch/s390/kernel/sysinfo.c
index 62f89d98e880..811f542b8ed4 100644
--- a/arch/s390/kernel/sysinfo.c
+++ b/arch/s390/kernel/sysinfo.c
@@ -418,7 +418,7 @@ void s390_adjust_jiffies(void)
 /*
  * calibrate the delay loop
  */
-void __cpuinit calibrate_delay(void)
+void calibrate_delay(void)
 {
         s390_adjust_jiffies();
         /* Print the good old Bogomips line .. */
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index 3fb09359eda6..9b9c1b78ec67 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -371,14 +371,14 @@ EXPORT_SYMBOL(del_virt_timer);
 /*
  * Start the virtual CPU timer on the current CPU.
  */
-void __cpuinit init_cpu_vtimer(void)
+void init_cpu_vtimer(void)
 {
         /* set initial cpu timer */
         set_vtimer(VTIMER_MAX_SLICE);
 }
 
-static int __cpuinit s390_nohz_notify(struct notifier_block *self,
-                                      unsigned long action, void *hcpu)
+static int s390_nohz_notify(struct notifier_block *self, unsigned long action,
+                            void *hcpu)
 {
         struct s390_idle_data *idle;
         long cpu = (long) hcpu;
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 047c3e4c59a2..f00aefb66a4e 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -639,8 +639,8 @@ out:
         put_task_struct(tsk);
 }
 
-static int __cpuinit pfault_cpu_notify(struct notifier_block *self,
-                                       unsigned long action, void *hcpu)
+static int pfault_cpu_notify(struct notifier_block *self, unsigned long action,
+                             void *hcpu)
 {
         struct thread_struct *thread, *next;
         struct task_struct *tsk;
diff --git a/arch/s390/mm/mmap.c b/arch/s390/mm/mmap.c
index 06bafec00278..40023290ee5b 100644
--- a/arch/s390/mm/mmap.c
+++ b/arch/s390/mm/mmap.c
@@ -91,11 +91,9 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
         if (mmap_is_legacy()) {
                 mm->mmap_base = TASK_UNMAPPED_BASE;
                 mm->get_unmapped_area = arch_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 mm->mmap_base = mmap_base();
                 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
 
@@ -176,11 +174,9 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
         if (mmap_is_legacy()) {
                 mm->mmap_base = TASK_UNMAPPED_BASE;
                 mm->get_unmapped_area = s390_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 mm->mmap_base = mmap_base();
                 mm->get_unmapped_area = s390_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
 
diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
index 82f165f8078c..d5f10a43a58f 100644
--- a/arch/s390/net/bpf_jit_comp.c
+++ b/arch/s390/net/bpf_jit_comp.c
@@ -9,6 +9,8 @@
 #include <linux/netdevice.h>
 #include <linux/if_vlan.h>
 #include <linux/filter.h>
+#include <linux/random.h>
+#include <linux/init.h>
 #include <asm/cacheflush.h>
 #include <asm/processor.h>
 #include <asm/facility.h>
@@ -221,6 +223,37 @@ static void bpf_jit_epilogue(struct bpf_jit *jit)
         EMIT2(0x07fe);
 }
 
+/* Helper to find the offset of pkt_type in sk_buff
+ * Make sure its still a 3bit field starting at the MSBs within a byte.
+ */
+#define PKT_TYPE_MAX 0xe0
+static int pkt_type_offset;
+
+static int __init bpf_pkt_type_offset_init(void)
+{
+        struct sk_buff skb_probe = {
+                .pkt_type = ~0,
+        };
+        char *ct = (char *)&skb_probe;
+        int off;
+
+        pkt_type_offset = -1;
+        for (off = 0; off < sizeof(struct sk_buff); off++) {
+                if (!ct[off])
+                        continue;
+                if (ct[off] == PKT_TYPE_MAX)
+                        pkt_type_offset = off;
+                else {
+                        /* Found non matching bit pattern, fix needed. */
+                        WARN_ON_ONCE(1);
+                        pkt_type_offset = -1;
+                        return -1;
+                }
+        }
+        return 0;
+}
+device_initcall(bpf_pkt_type_offset_init);
+
 /*
  * make sure we dont leak kernel information to user
  */
@@ -720,6 +753,16 @@ call_fn:	/* lg %r1,<d(function)>(%r13) */
                         EMIT4_DISP(0x88500000, 12);
                 }
                 break;
+        case BPF_S_ANC_PKTTYPE:
+                if (pkt_type_offset < 0)
+                        goto out;
+                /* lhi %r5,0 */
+                EMIT4(0xa7580000);
+                /* ic %r5,<d(pkt_type_offset)>(%r2) */
+                EMIT4_DISP(0x43502000, pkt_type_offset);
+                /* srl %r5,5 */
+                EMIT4_DISP(0x88500000, 5);
+                break;
         case BPF_S_ANC_CPU: /* A = smp_processor_id() */
 #ifdef CONFIG_SMP
                 /* l %r5,<d(cpu_nr)> */
@@ -738,8 +781,41 @@ out:
         return -1;
 }
 
+/*
+ * Note: for security reasons, bpf code will follow a randomly
+ *       sized amount of illegal instructions.
+ */
+struct bpf_binary_header {
+        unsigned int pages;
+        u8 image[];
+};
+
+static struct bpf_binary_header *bpf_alloc_binary(unsigned int bpfsize,
+                                                  u8 **image_ptr)
+{
+        struct bpf_binary_header *header;
+        unsigned int sz, hole;
+
+        /* Most BPF filters are really small, but if some of them fill a page,
+         * allow at least 128 extra bytes for illegal instructions.
+         */
+        sz = round_up(bpfsize + sizeof(*header) + 128, PAGE_SIZE);
+        header = module_alloc(sz);
+        if (!header)
+                return NULL;
+        memset(header, 0, sz);
+        header->pages = sz / PAGE_SIZE;
+        hole = sz - bpfsize + sizeof(*header);
+        /* Insert random number of illegal instructions before BPF code
+         * and make sure the first instruction starts at an even address.
+         */
+        *image_ptr = &header->image[(prandom_u32() % hole) & -2];
+        return header;
+}
+
 void bpf_jit_compile(struct sk_filter *fp)
 {
+        struct bpf_binary_header *header = NULL;
         unsigned long size, prg_len, lit_len;
         struct bpf_jit jit, cjit;
         unsigned int *addrs;
@@ -772,12 +848,11 @@ void bpf_jit_compile(struct sk_filter *fp)
                 } else if (jit.prg == cjit.prg && jit.lit == cjit.lit) {
                         prg_len = jit.prg - jit.start;
                         lit_len = jit.lit - jit.mid;
-                        size = max_t(unsigned long, prg_len + lit_len,
-                                     sizeof(struct work_struct));
+                        size = prg_len + lit_len;
                         if (size >= BPF_SIZE_MAX)
                                 goto out;
-                        jit.start = module_alloc(size);
-                        if (!jit.start)
+                        header = bpf_alloc_binary(size, &jit.start);
+                        if (!header)
                                 goto out;
                         jit.prg = jit.mid = jit.start + prg_len;
                         jit.lit = jit.end = jit.start + prg_len + lit_len;
@@ -788,37 +863,25 @@ void bpf_jit_compile(struct sk_filter *fp)
                 cjit = jit;
         }
         if (bpf_jit_enable > 1) {
-                pr_err("flen=%d proglen=%lu pass=%d image=%p\n",
-                       fp->len, jit.end - jit.start, pass, jit.start);
-                if (jit.start) {
-                        printk(KERN_ERR "JIT code:\n");
+                bpf_jit_dump(fp->len, jit.end - jit.start, pass, jit.start);
+                if (jit.start)
                         print_fn_code(jit.start, jit.mid - jit.start);
-                        print_hex_dump(KERN_ERR, "JIT literals:\n",
-                                       DUMP_PREFIX_ADDRESS, 16, 1,
-                                       jit.mid, jit.end - jit.mid, false);
-                }
         }
-        if (jit.start)
+        if (jit.start) {
+                set_memory_ro((unsigned long)header, header->pages);
                 fp->bpf_func = (void *) jit.start;
+        }
 out:
         kfree(addrs);
 }
 
-static void jit_free_defer(struct work_struct *arg)
-{
-        module_free(NULL, arg);
-}
-
-/* run from softirq, we must use a work_struct to call
- * module_free() from process context
- */
 void bpf_jit_free(struct sk_filter *fp)
 {
-        struct work_struct *work;
+        unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
+        struct bpf_binary_header *header = (void *)addr;
 
         if (fp->bpf_func == sk_run_filter)
                 return;
-        work = (struct work_struct *)fp->bpf_func;
-        INIT_WORK(work, jit_free_defer);
-        schedule_work(work);
+        set_memory_rw(addr, header->pages);
+        module_free(NULL, header);
 }
diff --git a/arch/score/mm/fault.c b/arch/score/mm/fault.c
index 47b600e4b2c5..6b18fb0189ae 100644
--- a/arch/score/mm/fault.c
+++ b/arch/score/mm/fault.c
@@ -172,10 +172,10 @@ out_of_memory:
                 down_read(&mm->mmap_sem);
                 goto survive;
         }
-        printk("VM: killing process %s\n", tsk->comm);
-        if (user_mode(regs))
-                do_group_exit(SIGKILL);
-        goto no_context;
+        if (!user_mode(regs))
+                goto no_context;
+        pagefault_out_of_memory();
+        return;
 
 do_sigbus:
         up_read(&mm->mmap_sem);
diff --git a/arch/score/mm/tlb-score.c b/arch/score/mm/tlb-score.c
index 6fdb100244c8..004073717de0 100644
--- a/arch/score/mm/tlb-score.c
+++ b/arch/score/mm/tlb-score.c
@@ -240,7 +240,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
         local_irq_restore(flags);
 }
 
-void __cpuinit tlb_init(void)
+void tlb_init(void)
 {
         tlblock_set(0);
         local_flush_tlb_all();
diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c
index d71a0bcf8145..4d94dff9015c 100644
--- a/arch/sh/boards/board-espt.c
+++ b/arch/sh/boards/board-espt.c
@@ -85,7 +85,7 @@ static struct sh_eth_plat_data sh7763_eth_pdata = {
 };
 
 static struct platform_device espt_eth_device = {
-        .name       = "sh-eth",
+        .name       = "sh7763-gether",
         .resource   = sh_eth_resources,
         .num_resources  = ARRAY_SIZE(sh_eth_resources),
         .dev        = {
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index 41f86702eb9f..4f114d1cd019 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -82,7 +82,7 @@ static struct sh_eth_plat_data sh7757_eth0_pdata = {
 };
 
 static struct platform_device sh7757_eth0_device = {
-        .name           = "sh-eth",
+        .name           = "sh7757-ether",
         .resource       = sh_eth0_resources,
         .id             = 0,
         .num_resources  = ARRAY_SIZE(sh_eth0_resources),
@@ -111,7 +111,7 @@ static struct sh_eth_plat_data sh7757_eth1_pdata = {
 };
 
 static struct platform_device sh7757_eth1_device = {
-        .name           = "sh-eth",
+        .name           = "sh7757-ether",
         .resource       = sh_eth1_resources,
         .id             = 1,
         .num_resources  = ARRAY_SIZE(sh_eth1_resources),
@@ -157,7 +157,7 @@ static struct sh_eth_plat_data sh7757_eth_giga0_pdata = {
 };
 
 static struct platform_device sh7757_eth_giga0_device = {
-        .name           = "sh-eth",
+        .name           = "sh7757-gether",
         .resource       = sh_eth_giga0_resources,
         .id             = 2,
         .num_resources  = ARRAY_SIZE(sh_eth_giga0_resources),
@@ -192,7 +192,7 @@ static struct sh_eth_plat_data sh7757_eth_giga1_pdata = {
 };
 
 static struct platform_device sh7757_eth_giga1_device = {
-        .name           = "sh-eth",
+        .name           = "sh7757-gether",
         .resource       = sh_eth_giga1_resources,
         .id             = 3,
         .num_resources  = ARRAY_SIZE(sh_eth_giga1_resources),
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 764530c85aa9..61fade0ffa96 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -165,8 +165,8 @@ static struct sh_eth_plat_data sh_eth_plat = {
 };
 
 static struct platform_device sh_eth_device = {
-        .name = "sh-eth",
-        .id     = 0,
+        .name = "sh7724-ether",
+        .id = 0,
         .dev = {
                 .platform_data = &sh_eth_plat,
         },
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 9759d6ba7ffb..658326f44df8 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -128,8 +128,8 @@ static struct resource sh_eth0_resources[] = {
 };
 
 static struct platform_device sh_eth0_device = {
-        .name = "sh-eth",
-        .id     = 0,
+        .name = "sh771x-ether",
+        .id = 0,
         .dev = {
                 .platform_data = PHY_ID,
         },
@@ -151,8 +151,8 @@ static struct resource sh_eth1_resources[] = {
 };
 
 static struct platform_device sh_eth1_device = {
-        .name = "sh-eth",
-        .id     = 1,
+        .name = "sh771x-ether",
+        .id = 1,
         .dev = {
                 .platform_data = PHY_ID,
         },
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 4010e63e82d8..b70180ef3e29 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -380,8 +380,8 @@ static struct sh_eth_plat_data sh_eth_plat = {
 };
 
 static struct platform_device sh_eth_device = {
-        .name = "sh-eth",
-        .id     = 0,
+        .name = "sh7724-ether",
+        .id = 0,
         .dev = {
                 .platform_data = &sh_eth_plat,
         },
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index b7c75298dfb5..50ba481fa240 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -93,7 +93,7 @@ static struct sh_eth_plat_data sh7763_eth_pdata = {
 };
 
 static struct platform_device sh7763rdp_eth_device = {
-        .name       = "sh-eth",
+        .name       = "sh7763-gether",
         .resource   = sh_eth_resources,
         .num_resources  = ARRAY_SIZE(sh_eth_resources),
         .dev        = {
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 61a07dafcd46..ecf83cd158dc 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -43,9 +43,9 @@
  * peripherals (nofpu, nodsp, and so forth).
  */
 #define onchip_setup(x)                                 \
-static int x##_disabled __cpuinitdata = !cpu_has_##x;   \
+static int x##_disabled = !cpu_has_##x;                 \
                                                         \
-static int __cpuinit x##_setup(char *opts)                      \
+static int x##_setup(char *opts)                        \
 {                                                       \
         x##_disabled = 1;                               \
         return 1;                                       \
@@ -59,7 +59,7 @@ onchip_setup(dsp);
 #define CPUOPM          0xff2f0000
 #define CPUOPM_RABD     (1 << 5)
 
-static void __cpuinit speculative_execution_init(void)
+static void speculative_execution_init(void)
 {
         /* Clear RABD */
         __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
@@ -78,7 +78,7 @@ static void __cpuinit speculative_execution_init(void)
 #define EXPMASK_BRDSSLP         (1 << 1)
 #define EXPMASK_MMCAW           (1 << 4)
 
-static void __cpuinit expmask_init(void)
+static void expmask_init(void)
 {
         unsigned long expmask = __raw_readl(EXPMASK);
 
@@ -217,7 +217,7 @@ static void detect_cache_shape(void)
                 l2_cache_shape = -1; /* No S-cache */
 }
 
-static void __cpuinit fpu_init(void)
+static void fpu_init(void)
 {
         /* Disable the FPU */
         if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) {
@@ -230,7 +230,7 @@ static void __cpuinit fpu_init(void)
 }
 
 #ifdef CONFIG_SH_DSP
-static void __cpuinit release_dsp(void)
+static void release_dsp(void)
 {
         unsigned long sr;
 
@@ -244,7 +244,7 @@ static void __cpuinit release_dsp(void)
         );
 }
 
-static void __cpuinit dsp_init(void)
+static void dsp_init(void)
 {
         unsigned long sr;
 
@@ -276,7 +276,7 @@ static void __cpuinit dsp_init(void)
         release_dsp();
 }
 #else
-static inline void __cpuinit dsp_init(void) { }
+static inline void dsp_init(void) { }
 #endif /* CONFIG_SH_DSP */
 
 /**
@@ -295,7 +295,7 @@ static inline void __cpuinit dsp_init(void) { }
  * Each processor family is still responsible for doing its own probing
  * and cache configuration in cpu_probe().
  */
-asmlinkage void __cpuinit cpu_init(void)
+asmlinkage void cpu_init(void)
 {
         current_thread_info()->cpu = hard_smp_processor_id();
 
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index bab8e75958ae..6c687ae812ef 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -13,7 +13,7 @@
 #include <asm/processor.h>
 #include <asm/cache.h>
 
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
 {
 #if defined(CONFIG_CPU_SUBTYPE_SH7619)
         boot_cpu_data.type                      = CPU_SH7619;
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index e0b740c831c7..bb11e1925178 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -124,8 +124,8 @@ static struct resource eth_resources[] = {
 };
 
 static struct platform_device eth_device = {
-        .name = "sh-eth",
-        .id     = -1,
+        .name = "sh7619-ether",
+        .id = -1,
         .dev = {
                 .platform_data = (void *)1,
         },
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 5170b6aa4129..3f87971082f1 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -13,7 +13,7 @@
 #include <asm/processor.h>
 #include <asm/cache.h>
 
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
 {
         boot_cpu_data.family                    = CPU_FAMILY_SH2A;
 
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index bf23c322e164..426e1e1dcedc 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,7 +16,7 @@
 #include <asm/cache.h>
 #include <asm/io.h>
 
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
 {
         unsigned long addr0, addr1, data0, data1, data2, data3;
 
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 0fbbd50bc8ad..a521bcf50695 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -15,7 +15,7 @@
 #include <asm/processor.h>
 #include <asm/cache.h>
 
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
 {
         unsigned long pvr, prr, cvr;
         unsigned long size;
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 5f30f805d2f2..0128af3399b7 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -329,7 +329,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]),
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]),
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[HWBLK_MMC]),
-        CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[HWBLK_ETHER]),
+        CLKDEV_DEV_ID("sh7724-ether.0", &mstp_clks[HWBLK_ETHER]),
         CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
         CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
         CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
index deb683abacf0..ed9501519ab3 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
@@ -238,7 +238,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("adc0", &mstp_clks[MSTP313]),
         CLKDEV_CON_ID("mtu0", &mstp_clks[MSTP312]),
         CLKDEV_CON_ID("iebus0", &mstp_clks[MSTP304]),
-        CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[MSTP114]),
+        CLKDEV_DEV_ID("sh7734-gether.0", &mstp_clks[MSTP114]),
         CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP303]),
         CLKDEV_CON_ID("hif0", &mstp_clks[MSTP302]),
         CLKDEV_CON_ID("stif0", &mstp_clks[MSTP301]),
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 03f2b55757cf..4a298808789c 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -124,7 +124,7 @@ static void shx3_update_boot_vector(unsigned int cpu)
         __raw_writel(STBCR_RESET, STBCR_REG(cpu));
 }
 
-static int __cpuinit
+static int
 shx3_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned int)hcpu;
@@ -143,11 +143,11 @@ shx3_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata shx3_cpu_notifier = {
+static struct notifier_block shx3_cpu_notifier = {
         .notifier_call          = shx3_cpu_callback,
 };
 
-static int __cpuinit register_shx3_cpu_notifier(void)
+static int register_shx3_cpu_notifier(void)
 {
         register_hotcpu_notifier(&shx3_cpu_notifier);
         return 0;
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 9e882409e4e9..eca427c2f2f3 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -17,7 +17,7 @@
 #include <asm/cache.h>
 #include <asm/tlb.h>
 
-void __cpuinit cpu_probe(void)
+void cpu_probe(void)
 {
         unsigned long long cir;
 
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
index 068b8a2759b5..b9cefebda55c 100644
--- a/arch/sh/kernel/perf_event.c
+++ b/arch/sh/kernel/perf_event.c
@@ -367,7 +367,7 @@ static void sh_pmu_setup(int cpu)
         memset(cpuhw, 0, sizeof(struct cpu_hw_events));
 }
 
-static int __cpuinit
+static int
 sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
 {
         unsigned int cpu = (long)hcpu;
@@ -384,7 +384,7 @@ sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
         return NOTIFY_OK;
 }
 
-int __cpuinit register_sh_pmu(struct sh_pmu *_pmu)
+int register_sh_pmu(struct sh_pmu *_pmu)
 {
         if (sh_pmu)
                 return -EBUSY;
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 055d91b70305..53bc6c4c84ec 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -65,7 +65,7 @@ void arch_task_cache_init(void)
 # define HAVE_SOFTFP    0
 #endif
 
-void __cpuinit init_thread_xstate(void)
+void init_thread_xstate(void)
 {
         if (boot_cpu_data.flags & CPU_HAS_FPU)
                 xstate_size = sizeof(struct sh_fpu_hard_struct);
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 81f999a672f6..668c81631c08 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -117,11 +117,7 @@ void user_enable_single_step(struct task_struct *child)
 
         set_tsk_thread_flag(child, TIF_SINGLESTEP);
 
-        if (ptrace_get_breakpoints(child) < 0)
-                return;
-
         set_single_step(child, pc);
-        ptrace_put_breakpoints(child);
 }
 
 void user_disable_single_step(struct task_struct *child)
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index ebe7a7d97215..1cf90e947dbf 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -172,7 +172,7 @@ disable:
 #endif
 }
 
-void __cpuinit calibrate_delay(void)
+void calibrate_delay(void)
 {
         struct clk *clk = clk_get(NULL, "cpu_clk");
 
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 45696451f0ea..86a7936a980b 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -37,7 +37,7 @@ struct plat_smp_ops *mp_ops = NULL;
 /* State of each CPU */
 DEFINE_PER_CPU(int, cpu_state) = { 0 };
 
-void __cpuinit register_smp_ops(struct plat_smp_ops *ops)
+void register_smp_ops(struct plat_smp_ops *ops)
 {
         if (mp_ops)
                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
@@ -45,7 +45,7 @@ void __cpuinit register_smp_ops(struct plat_smp_ops *ops)
         mp_ops = ops;
 }
 
-static inline void __cpuinit smp_store_cpu_info(unsigned int cpu)
+static inline void smp_store_cpu_info(unsigned int cpu)
 {
         struct sh_cpuinfo *c = cpu_data + cpu;
 
@@ -174,7 +174,7 @@ void native_play_dead(void)
 }
 #endif
 
-asmlinkage void __cpuinit start_secondary(void)
+asmlinkage void start_secondary(void)
 {
         unsigned int cpu = smp_processor_id();
         struct mm_struct *mm = &init_mm;
@@ -215,7 +215,7 @@ extern struct {
         void *thread_info;
 } stack_start;
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tsk)
+int __cpu_up(unsigned int cpu, struct task_struct *tsk)
 {
         unsigned long timeout;
 
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 5f513a64dedf..68e99f09171d 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -741,7 +741,7 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
         die_if_kernel("exception", regs, ex);
 }
 
-void __cpuinit per_cpu_trap_init(void)
+void per_cpu_trap_init(void)
 {
         extern void *vbr_base;
 
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index f87d20da1791..112ea11c030d 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -810,7 +810,7 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
         poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);
 }
 
-void __cpuinit per_cpu_trap_init(void)
+void per_cpu_trap_init(void)
 {
         /* Nothing to do for now, VBR initialization later. */
 }
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index ff1c40a31cbc..e4bb2a8e0a69 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -17,7 +17,7 @@
 /**
  * sh64_tlb_init - Perform initial setup for the DTLB and ITLB.
  */
-int __cpuinit sh64_tlb_init(void)
+int sh64_tlb_init(void)
 {
         /* Assign some sane DTLB defaults */
         cpu_data->dtlb.entries  = 64;
diff --git a/arch/sparc/include/asm/leon.h b/arch/sparc/include/asm/leon.h
index b836e9297f2a..c2f6ff6d7a35 100644
--- a/arch/sparc/include/asm/leon.h
+++ b/arch/sparc/include/asm/leon.h
@@ -108,7 +108,7 @@ static inline int sparc_leon3_snooping_enabled(void)
 {
         u32 cctrl;
         __asm__ __volatile__("lda [%%g0] 2, %0\n\t" : "=r"(cctrl));
-        return (cctrl >> 23) & 1;
+        return ((cctrl >> 23) & 1) && ((cctrl >> 17) & 1);
 };
 
 static inline void sparc_leon3_disable_cache(void)
diff --git a/arch/sparc/include/uapi/asm/fcntl.h b/arch/sparc/include/uapi/asm/fcntl.h
index d73e5e008b0d..7e8ace5bf760 100644
--- a/arch/sparc/include/uapi/asm/fcntl.h
+++ b/arch/sparc/include/uapi/asm/fcntl.h
@@ -35,7 +35,7 @@
 #define O_SYNC          (__O_SYNC|O_DSYNC)
 
 #define O_PATH          0x1000000
-#define O_TMPFILE       0x2000000
+#define __O_TMPFILE     0x2000000
 
 #define F_GETOWN        5       /*  for sockets. */
 #define F_SETOWN        6       /*  for sockets. */
diff --git a/arch/sparc/include/uapi/asm/socket.h b/arch/sparc/include/uapi/asm/socket.h
index 89f49b68a21c..4e1d66c3ce71 100644
--- a/arch/sparc/include/uapi/asm/socket.h
+++ b/arch/sparc/include/uapi/asm/socket.h
@@ -70,6 +70,8 @@
 
 #define SO_SELECT_ERR_QUEUE     0x0029
 
+#define SO_BUSY_POLL            0x0030
+
 /* Security levels - as per NRL IPv6 - don't actually do anything */
 #define SO_SECURITY_AUTHENTICATION              0x5001
 #define SO_SECURITY_ENCRYPTION_TRANSPORT        0x5002
diff --git a/arch/sparc/kernel/asm-offsets.c b/arch/sparc/kernel/asm-offsets.c
index 961b87f99e69..f76389a32342 100644
--- a/arch/sparc/kernel/asm-offsets.c
+++ b/arch/sparc/kernel/asm-offsets.c
@@ -49,6 +49,8 @@ int foo(void)
         DEFINE(AOFF_task_thread, offsetof(struct task_struct, thread));
         BLANK();
         DEFINE(AOFF_mm_context, offsetof(struct mm_struct, context));
+        BLANK();
+        DEFINE(VMA_VM_MM,    offsetof(struct vm_area_struct, vm_mm));
 
         /* DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28); */
         return 0;
diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index 5ef48dab5636..62d6b153ffa2 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -528,10 +528,8 @@ static void dr_cpu_mark(struct ds_data *resp, int cpu, int ncpus,
         }
 }
 
-static int __cpuinit dr_cpu_configure(struct ds_info *dp,
-                                      struct ds_cap_state *cp,
-                                      u64 req_num,
-                                      cpumask_t *mask)
+static int dr_cpu_configure(struct ds_info *dp, struct ds_cap_state *cp,
+                            u64 req_num, cpumask_t *mask)
 {
         struct ds_data *resp;
         int resp_len, ncpus, cpu;
@@ -627,9 +625,8 @@ static int dr_cpu_unconfigure(struct ds_info *dp,
         return 0;
 }
 
-static void __cpuinit dr_cpu_data(struct ds_info *dp,
-                                  struct ds_cap_state *cp,
-                                  void *buf, int len)
+static void dr_cpu_data(struct ds_info *dp, struct ds_cap_state *cp, void *buf,
+                        int len)
 {
         struct ds_data *data = buf;
         struct dr_cpu_tag *tag = (struct dr_cpu_tag *) (data + 1);
@@ -783,6 +780,16 @@ void ldom_set_var(const char *var, const char *value)
                 char  *base, *p;
                 int msg_len, loops;
 
+                if (strlen(var) + strlen(value) + 2 >
+                    sizeof(pkt) - sizeof(pkt.header)) {
+                        printk(KERN_ERR PFX
+                                "contents length: %zu, which more than max: %lu,"
+                                "so could not set (%s) variable to (%s).\n",
+                                strlen(var) + strlen(value) + 2,
+                                sizeof(pkt) - sizeof(pkt.header), var, value);
+                        return;
+                }
+
                 memset(&pkt, 0, sizeof(pkt));
                 pkt.header.data.tag.type = DS_DATA;
                 pkt.header.data.handle = cp->handle;
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index cc3c5cb47cda..9c179fbfb219 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -250,7 +250,7 @@ extern struct ino_bucket *ivector_table;
 extern unsigned long ivector_table_pa;
 
 extern void init_irqwork_curcpu(void);
-extern void __cpuinit sun4v_register_mondo_queues(int this_cpu);
+extern void sun4v_register_mondo_queues(int this_cpu);
 
 #endif /* CONFIG_SPARC32 */
 #endif /* _ENTRY_H */
diff --git a/arch/sparc/kernel/hvtramp.S b/arch/sparc/kernel/hvtramp.S
index 605c960b2fa6..4eb1a5a1d544 100644
--- a/arch/sparc/kernel/hvtramp.S
+++ b/arch/sparc/kernel/hvtramp.S
@@ -16,7 +16,6 @@
 #include <asm/asi.h>
 #include <asm/pil.h>
 
-        __CPUINIT
         .align          8
         .globl          hv_cpu_startup, hv_cpu_startup_end
 
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index 9bcbbe2c4e7e..d4840cec2c55 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -835,7 +835,8 @@ void notrace init_irqwork_curcpu(void)
  * Therefore you cannot make any OBP calls, not even prom_printf,
  * from these two routines.
  */
-static void __cpuinit notrace register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
+static void notrace register_one_mondo(unsigned long paddr, unsigned long type,
+                                       unsigned long qmask)
 {
         unsigned long num_entries = (qmask + 1) / 64;
         unsigned long status;
@@ -848,7 +849,7 @@ static void __cpuinit notrace register_one_mondo(unsigned long paddr, unsigned l
         }
 }
 
-void __cpuinit notrace sun4v_register_mondo_queues(int this_cpu)
+void notrace sun4v_register_mondo_queues(int this_cpu)
 {
         struct trap_per_cpu *tb = &trap_block[this_cpu];
 
diff --git a/arch/sparc/kernel/leon_smp.c b/arch/sparc/kernel/leon_smp.c
index d7aa524b7283..6edf955f987c 100644
--- a/arch/sparc/kernel/leon_smp.c
+++ b/arch/sparc/kernel/leon_smp.c
@@ -54,7 +54,7 @@ extern ctxd_t *srmmu_ctx_table_phys;
 static int smp_processors_ready;
 extern volatile unsigned long cpu_callin_map[NR_CPUS];
 extern cpumask_t smp_commenced_mask;
-void __cpuinit leon_configure_cache_smp(void);
+void leon_configure_cache_smp(void);
 static void leon_ipi_init(void);
 
 /* IRQ number of LEON IPIs */
@@ -69,12 +69,12 @@ static inline unsigned long do_swap(volatile unsigned long *ptr,
         return val;
 }
 
-void __cpuinit leon_cpu_pre_starting(void *arg)
+void leon_cpu_pre_starting(void *arg)
 {
         leon_configure_cache_smp();
 }
 
-void __cpuinit leon_cpu_pre_online(void *arg)
+void leon_cpu_pre_online(void *arg)
 {
         int cpuid = hard_smp_processor_id();
 
@@ -106,7 +106,7 @@ void __cpuinit leon_cpu_pre_online(void *arg)
 
 extern struct linux_prom_registers smp_penguin_ctable;
 
-void __cpuinit leon_configure_cache_smp(void)
+void leon_configure_cache_smp(void)
 {
         unsigned long cfg = sparc_leon3_get_dcachecfg();
         int me = smp_processor_id();
@@ -186,7 +186,7 @@ void __init leon_boot_cpus(void)
 
 }
 
-int __cpuinit leon_boot_one_cpu(int i, struct task_struct *idle)
+int leon_boot_one_cpu(int i, struct task_struct *idle)
 {
         int timeout;
 
diff --git a/arch/sparc/kernel/mdesc.c b/arch/sparc/kernel/mdesc.c
index 831c001604e8..b90bf23e3aab 100644
--- a/arch/sparc/kernel/mdesc.c
+++ b/arch/sparc/kernel/mdesc.c
@@ -571,9 +571,7 @@ static void __init report_platform_properties(void)
         mdesc_release(hp);
 }
 
-static void __cpuinit fill_in_one_cache(cpuinfo_sparc *c,
-                                        struct mdesc_handle *hp,
-                                        u64 mp)
+static void fill_in_one_cache(cpuinfo_sparc *c, struct mdesc_handle *hp, u64 mp)
 {
         const u64 *level = mdesc_get_property(hp, mp, "level", NULL);
         const u64 *size = mdesc_get_property(hp, mp, "size", NULL);
@@ -616,7 +614,7 @@ static void __cpuinit fill_in_one_cache(cpuinfo_sparc *c,
         }
 }
 
-static void __cpuinit mark_core_ids(struct mdesc_handle *hp, u64 mp, int core_id)
+static void mark_core_ids(struct mdesc_handle *hp, u64 mp, int core_id)
 {
         u64 a;
 
@@ -649,7 +647,7 @@ static void __cpuinit mark_core_ids(struct mdesc_handle *hp, u64 mp, int core_id
         }
 }
 
-static void __cpuinit set_core_ids(struct mdesc_handle *hp)
+static void set_core_ids(struct mdesc_handle *hp)
 {
         int idx;
         u64 mp;
@@ -674,7 +672,7 @@ static void __cpuinit set_core_ids(struct mdesc_handle *hp)
         }
 }
 
-static void __cpuinit mark_proc_ids(struct mdesc_handle *hp, u64 mp, int proc_id)
+static void mark_proc_ids(struct mdesc_handle *hp, u64 mp, int proc_id)
 {
         u64 a;
 
@@ -693,7 +691,7 @@ static void __cpuinit mark_proc_ids(struct mdesc_handle *hp, u64 mp, int proc_id
         }
 }
 
-static void __cpuinit __set_proc_ids(struct mdesc_handle *hp, const char *exec_unit_name)
+static void __set_proc_ids(struct mdesc_handle *hp, const char *exec_unit_name)
 {
         int idx;
         u64 mp;
@@ -714,14 +712,14 @@ static void __cpuinit __set_proc_ids(struct mdesc_handle *hp, const char *exec_u
         }
 }
 
-static void __cpuinit set_proc_ids(struct mdesc_handle *hp)
+static void set_proc_ids(struct mdesc_handle *hp)
 {
         __set_proc_ids(hp, "exec_unit");
         __set_proc_ids(hp, "exec-unit");
 }
 
-static void __cpuinit get_one_mondo_bits(const u64 *p, unsigned int *mask,
-                                         unsigned long def, unsigned long max)
+static void get_one_mondo_bits(const u64 *p, unsigned int *mask,
+                               unsigned long def, unsigned long max)
 {
         u64 val;
 
@@ -742,8 +740,8 @@ use_default:
         *mask = ((1U << def) * 64U) - 1U;
 }
 
-static void __cpuinit get_mondo_data(struct mdesc_handle *hp, u64 mp,
-                                     struct trap_per_cpu *tb)
+static void get_mondo_data(struct mdesc_handle *hp, u64 mp,
+                           struct trap_per_cpu *tb)
 {
         static int printed;
         const u64 *val;
@@ -769,7 +767,7 @@ static void __cpuinit get_mondo_data(struct mdesc_handle *hp, u64 mp,
         }
 }
 
-static void * __cpuinit mdesc_iterate_over_cpus(void *(*func)(struct mdesc_handle *, u64, int, void *), void *arg, cpumask_t *mask)
+static void *mdesc_iterate_over_cpus(void *(*func)(struct mdesc_handle *, u64, int, void *), void *arg, cpumask_t *mask)
 {
         struct mdesc_handle *hp = mdesc_grab();
         void *ret = NULL;
@@ -799,7 +797,8 @@ out:
         return ret;
 }
 
-static void * __cpuinit record_one_cpu(struct mdesc_handle *hp, u64 mp, int cpuid, void *arg)
+static void *record_one_cpu(struct mdesc_handle *hp, u64 mp, int cpuid,
+                            void *arg)
 {
         ncpus_probed++;
 #ifdef CONFIG_SMP
@@ -808,7 +807,7 @@ static void * __cpuinit record_one_cpu(struct mdesc_handle *hp, u64 mp, int cpui
         return NULL;
 }
 
-void __cpuinit mdesc_populate_present_mask(cpumask_t *mask)
+void mdesc_populate_present_mask(cpumask_t *mask)
 {
         if (tlb_type != hypervisor)
                 return;
@@ -841,7 +840,8 @@ void __init mdesc_get_page_sizes(cpumask_t *mask, unsigned long *pgsz_mask)
         mdesc_iterate_over_cpus(check_one_pgsz, pgsz_mask, mask);
 }
 
-static void * __cpuinit fill_in_one_cpu(struct mdesc_handle *hp, u64 mp, int cpuid, void *arg)
+static void *fill_in_one_cpu(struct mdesc_handle *hp, u64 mp, int cpuid,
+                             void *arg)
 {
         const u64 *cfreq = mdesc_get_property(hp, mp, "clock-frequency", NULL);
         struct trap_per_cpu *tb;
@@ -890,7 +890,7 @@ static void * __cpuinit fill_in_one_cpu(struct mdesc_handle *hp, u64 mp, int cpu
         return NULL;
 }
 
-void __cpuinit mdesc_fill_in_cpu_data(cpumask_t *mask)
+void mdesc_fill_in_cpu_data(cpumask_t *mask)
 {
         struct mdesc_handle *hp;
 
diff --git a/arch/sparc/kernel/smp_32.c b/arch/sparc/kernel/smp_32.c
index e3f2b81c23f1..a102bfba6ea8 100644
--- a/arch/sparc/kernel/smp_32.c
+++ b/arch/sparc/kernel/smp_32.c
@@ -39,7 +39,7 @@
 #include "kernel.h"
 #include "irq.h"
 
-volatile unsigned long cpu_callin_map[NR_CPUS] __cpuinitdata = {0,};
+volatile unsigned long cpu_callin_map[NR_CPUS] = {0,};
 
 cpumask_t smp_commenced_mask = CPU_MASK_NONE;
 
@@ -53,7 +53,7 @@ const struct sparc32_ipi_ops *sparc32_ipi_ops;
  * instruction which is much better...
  */
 
-void __cpuinit smp_store_cpu_info(int id)
+void smp_store_cpu_info(int id)
 {
         int cpu_node;
         int mid;
@@ -120,7 +120,7 @@ void cpu_panic(void)
         panic("SMP bolixed\n");
 }
 
-struct linux_prom_registers smp_penguin_ctable __cpuinitdata = { 0 };
+struct linux_prom_registers smp_penguin_ctable = { 0 };
 
 void smp_send_reschedule(int cpu)
 {
@@ -259,10 +259,10 @@ void __init smp_prepare_boot_cpu(void)
         set_cpu_possible(cpuid, true);
 }
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
-        extern int __cpuinit smp4m_boot_one_cpu(int, struct task_struct *);
-        extern int __cpuinit smp4d_boot_one_cpu(int, struct task_struct *);
+        extern int smp4m_boot_one_cpu(int, struct task_struct *);
+        extern int smp4d_boot_one_cpu(int, struct task_struct *);
         int ret=0;
 
         switch(sparc_cpu_model) {
@@ -297,7 +297,7 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
         return ret;
 }
 
-void __cpuinit arch_cpu_pre_starting(void *arg)
+void arch_cpu_pre_starting(void *arg)
 {
         local_ops->cache_all();
         local_ops->tlb_all();
@@ -317,7 +317,7 @@ void __cpuinit arch_cpu_pre_starting(void *arg)
         }
 }
 
-void __cpuinit arch_cpu_pre_online(void *arg)
+void arch_cpu_pre_online(void *arg)
 {
         unsigned int cpuid = hard_smp_processor_id();
 
@@ -344,7 +344,7 @@ void __cpuinit arch_cpu_pre_online(void *arg)
         }
 }
 
-void __cpuinit sparc_start_secondary(void *arg)
+void sparc_start_secondary(void *arg)
 {
         unsigned int cpu;
 
@@ -375,7 +375,7 @@ void __cpuinit sparc_start_secondary(void *arg)
         BUG();
 }
 
-void __cpuinit smp_callin(void)
+void smp_callin(void)
 {
         sparc_start_secondary(NULL);
 }
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 77539eda928c..e142545244f2 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -87,7 +87,7 @@ extern void setup_sparc64_timer(void);
 
 static volatile unsigned long callin_flag = 0;
 
-void __cpuinit smp_callin(void)
+void smp_callin(void)
 {
         int cpuid = hard_smp_processor_id();
 
@@ -281,7 +281,8 @@ static unsigned long kimage_addr_to_ra(void *p)
         return kern_base + (val - KERNBASE);
 }
 
-static void __cpuinit ldom_startcpu_cpuid(unsigned int cpu, unsigned long thread_reg, void **descrp)
+static void ldom_startcpu_cpuid(unsigned int cpu, unsigned long thread_reg,
+                                void **descrp)
 {
         extern unsigned long sparc64_ttable_tl0;
         extern unsigned long kern_locked_tte_data;
@@ -342,7 +343,7 @@ extern unsigned long sparc64_cpu_startup;
  */
 static struct thread_info *cpu_new_thread = NULL;
 
-static int __cpuinit smp_boot_one_cpu(unsigned int cpu, struct task_struct *idle)
+static int smp_boot_one_cpu(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long entry =
                 (unsigned long)(&sparc64_cpu_startup);
@@ -1266,7 +1267,7 @@ void smp_fill_in_sib_core_maps(void)
         }
 }
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         int ret = smp_boot_one_cpu(cpu, tidle);
 
diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c
index c9eb82f23d92..d5c319553fd0 100644
--- a/arch/sparc/kernel/sun4d_smp.c
+++ b/arch/sparc/kernel/sun4d_smp.c
@@ -50,7 +50,7 @@ static inline void show_leds(int cpuid)
                               "i" (ASI_M_CTL));
 }
 
-void __cpuinit sun4d_cpu_pre_starting(void *arg)
+void sun4d_cpu_pre_starting(void *arg)
 {
         int cpuid = hard_smp_processor_id();
 
@@ -62,7 +62,7 @@ void __cpuinit sun4d_cpu_pre_starting(void *arg)
         cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
 }
 
-void __cpuinit sun4d_cpu_pre_online(void *arg)
+void sun4d_cpu_pre_online(void *arg)
 {
         unsigned long flags;
         int cpuid;
@@ -118,7 +118,7 @@ void __init smp4d_boot_cpus(void)
         local_ops->cache_all();
 }
 
-int __cpuinit smp4d_boot_one_cpu(int i, struct task_struct *idle)
+int smp4d_boot_one_cpu(int i, struct task_struct *idle)
 {
         unsigned long *entry = &sun4d_cpu_startup;
         int timeout;
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c
index 8a65f158153d..d3408e72d20c 100644
--- a/arch/sparc/kernel/sun4m_smp.c
+++ b/arch/sparc/kernel/sun4m_smp.c
@@ -34,11 +34,11 @@ swap_ulong(volatile unsigned long *ptr, unsigned long val)
         return val;
 }
 
-void __cpuinit sun4m_cpu_pre_starting(void *arg)
+void sun4m_cpu_pre_starting(void *arg)
 {
 }
 
-void __cpuinit sun4m_cpu_pre_online(void *arg)
+void sun4m_cpu_pre_online(void *arg)
 {
         int cpuid = hard_smp_processor_id();
 
@@ -75,7 +75,7 @@ void __init smp4m_boot_cpus(void)
         local_ops->cache_all();
 }
 
-int __cpuinit smp4m_boot_one_cpu(int i, struct task_struct *idle)
+int smp4m_boot_one_cpu(int i, struct task_struct *idle)
 {
         unsigned long *entry = &sun4m_cpu_startup;
         int timeout;
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 2daaaa6eda23..51561b8b15ba 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -290,7 +290,6 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
             sysctl_legacy_va_layout) {
                 mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
                 mm->get_unmapped_area = arch_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 /* We know it's 32-bit */
                 unsigned long task_size = STACK_TOP32;
@@ -302,7 +301,6 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
 
                 mm->mmap_base = PAGE_ALIGN(task_size - gap - random_factor);
                 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
 
diff --git a/arch/sparc/kernel/sysfs.c b/arch/sparc/kernel/sysfs.c
index 654e8aad3bbe..c21c673e5f7c 100644
--- a/arch/sparc/kernel/sysfs.c
+++ b/arch/sparc/kernel/sysfs.c
@@ -246,7 +246,7 @@ static void unregister_cpu_online(unsigned int cpu)
 }
 #endif
 
-static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
+static int sysfs_cpu_notify(struct notifier_block *self,
                                       unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned int)(long)hcpu;
@@ -266,7 +266,7 @@ static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
+static struct notifier_block sysfs_cpu_nb = {
         .notifier_call  = sysfs_cpu_notify,
 };
 
diff --git a/arch/sparc/kernel/trampoline_32.S b/arch/sparc/kernel/trampoline_32.S
index 6cdb08cdabf0..76dcbd3c988a 100644
--- a/arch/sparc/kernel/trampoline_32.S
+++ b/arch/sparc/kernel/trampoline_32.S
@@ -18,7 +18,6 @@
         .globl sun4m_cpu_startup
         .globl sun4d_cpu_startup
 
-        __CPUINIT
         .align 4
 
 /* When we start up a cpu for the first time it enters this routine.
@@ -94,7 +93,6 @@ smp_panic:
 /* CPUID in bootbus can be found at PA 0xff0140000 */
 #define SUN4D_BOOTBUS_CPUID     0xf0140000
 
-        __CPUINIT
         .align  4
 
 sun4d_cpu_startup:
@@ -146,7 +144,6 @@ sun4d_cpu_startup:
 
         b,a     smp_panic
 
-        __CPUINIT
         .align  4
         .global leon_smp_cpu_startup, smp_penguin_ctable
 
diff --git a/arch/sparc/kernel/trampoline_64.S b/arch/sparc/kernel/trampoline_64.S
index 2e973a26fbda..e0b1e13a0736 100644
--- a/arch/sparc/kernel/trampoline_64.S
+++ b/arch/sparc/kernel/trampoline_64.S
@@ -32,13 +32,11 @@ itlb_load:
 dtlb_load:
         .asciz  "SUNW,dtlb-load"
 
-        /* XXX __cpuinit this thing XXX */
 #define TRAMP_STACK_SIZE        1024
         .align  16
 tramp_stack:
         .skip   TRAMP_STACK_SIZE
 
-        __CPUINIT
         .align          8
         .globl          sparc64_cpu_startup, sparc64_cpu_startup_end
 sparc64_cpu_startup:
diff --git a/arch/sparc/mm/hypersparc.S b/arch/sparc/mm/hypersparc.S
index 44aad32eeb4e..969f96450f69 100644
--- a/arch/sparc/mm/hypersparc.S
+++ b/arch/sparc/mm/hypersparc.S
@@ -74,7 +74,7 @@ hypersparc_flush_cache_mm_out:
 
         /* The things we do for performance... */
 hypersparc_flush_cache_range:
-        ld      [%o0 + 0x0], %o0                /* XXX vma->vm_mm, GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
 #ifndef CONFIG_SMP
         ld      [%o0 + AOFF_mm_context], %g1
         cmp     %g1, -1
@@ -163,7 +163,7 @@ hypersparc_flush_cache_range_out:
          */
         /* Verified, my ass... */
 hypersparc_flush_cache_page:
-        ld      [%o0 + 0x0], %o0                /* XXX vma->vm_mm, GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         ld      [%o0 + AOFF_mm_context], %g2
 #ifndef CONFIG_SMP
         cmp     %g2, -1
@@ -284,7 +284,7 @@ hypersparc_flush_tlb_mm_out:
          sta    %g5, [%g1] ASI_M_MMUREGS
 
 hypersparc_flush_tlb_range:
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         mov     SRMMU_CTX_REG, %g1
         ld      [%o0 + AOFF_mm_context], %o3
         lda     [%g1] ASI_M_MMUREGS, %g5
@@ -307,7 +307,7 @@ hypersparc_flush_tlb_range_out:
          sta    %g5, [%g1] ASI_M_MMUREGS
 
 hypersparc_flush_tlb_page:
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         mov     SRMMU_CTX_REG, %g1
         ld      [%o0 + AOFF_mm_context], %o3
         andn    %o1, (PAGE_SIZE - 1), %o1
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index a9c42a7ffb6a..ed82edad1a39 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -1694,7 +1694,7 @@ static void __init sun4v_ktsb_init(void)
 #endif
 }
 
-void __cpuinit sun4v_ktsb_register(void)
+void sun4v_ktsb_register(void)
 {
         unsigned long pa, ret;
 
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index 036c2797dece..5d721df48a72 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -858,7 +858,7 @@ static void __init map_kernel(void)
         }
 }
 
-void (*poke_srmmu)(void) __cpuinitdata = NULL;
+void (*poke_srmmu)(void) = NULL;
 
 extern unsigned long bootmem_init(unsigned long *pages_avail);
 
@@ -1055,7 +1055,7 @@ static void __init init_vac_layout(void)
                (int)vac_cache_size, (int)vac_line_size);
 }
 
-static void __cpuinit poke_hypersparc(void)
+static void poke_hypersparc(void)
 {
         volatile unsigned long clear;
         unsigned long mreg = srmmu_get_mmureg();
@@ -1107,7 +1107,7 @@ static void __init init_hypersparc(void)
         hypersparc_setup_blockops();
 }
 
-static void __cpuinit poke_swift(void)
+static void poke_swift(void)
 {
         unsigned long mreg;
 
@@ -1287,7 +1287,7 @@ static void turbosparc_flush_tlb_page(struct vm_area_struct *vma, unsigned long
 }
 
 
-static void __cpuinit poke_turbosparc(void)
+static void poke_turbosparc(void)
 {
         unsigned long mreg = srmmu_get_mmureg();
         unsigned long ccreg;
@@ -1350,7 +1350,7 @@ static void __init init_turbosparc(void)
         poke_srmmu = poke_turbosparc;
 }
 
-static void __cpuinit poke_tsunami(void)
+static void poke_tsunami(void)
 {
         unsigned long mreg = srmmu_get_mmureg();
 
@@ -1391,7 +1391,7 @@ static void __init init_tsunami(void)
         tsunami_setup_blockops();
 }
 
-static void __cpuinit poke_viking(void)
+static void poke_viking(void)
 {
         unsigned long mreg = srmmu_get_mmureg();
         static int smp_catch;
diff --git a/arch/sparc/mm/swift.S b/arch/sparc/mm/swift.S
index c801c3953a00..5d2b88d39424 100644
--- a/arch/sparc/mm/swift.S
+++ b/arch/sparc/mm/swift.S
@@ -105,7 +105,7 @@ swift_flush_cache_mm_out:
 
         .globl  swift_flush_cache_range
 swift_flush_cache_range:
-        ld      [%o0 + 0x0], %o0                /* XXX vma->vm_mm, GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         sub     %o2, %o1, %o2
         sethi   %hi(4096), %o3
         cmp     %o2, %o3
@@ -116,7 +116,7 @@ swift_flush_cache_range:
 
         .globl  swift_flush_cache_page
 swift_flush_cache_page:
-        ld      [%o0 + 0x0], %o0                /* XXX vma->vm_mm, GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
 70:
         ld      [%o0 + AOFF_mm_context], %g2
         cmp     %g2, -1
@@ -219,7 +219,7 @@ swift_flush_sig_insns:
         .globl  swift_flush_tlb_range
         .globl  swift_flush_tlb_all
 swift_flush_tlb_range:
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
 swift_flush_tlb_mm:
         ld      [%o0 + AOFF_mm_context], %g2
         cmp     %g2, -1
@@ -233,7 +233,7 @@ swift_flush_tlb_all_out:
 
         .globl  swift_flush_tlb_page
 swift_flush_tlb_page:
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         mov     SRMMU_CTX_REG, %g1
         ld      [%o0 + AOFF_mm_context], %o3
         andn    %o1, (PAGE_SIZE - 1), %o1
diff --git a/arch/sparc/mm/tsunami.S b/arch/sparc/mm/tsunami.S
index 4e55e8f76648..bf10a345fa8b 100644
--- a/arch/sparc/mm/tsunami.S
+++ b/arch/sparc/mm/tsunami.S
@@ -24,7 +24,7 @@
         /* Sliiick... */
 tsunami_flush_cache_page:
 tsunami_flush_cache_range:
-        ld      [%o0 + 0x0], %o0        /* XXX vma->vm_mm, GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
 tsunami_flush_cache_mm:
         ld      [%o0 + AOFF_mm_context], %g2
         cmp     %g2, -1
@@ -46,7 +46,7 @@ tsunami_flush_sig_insns:
 
         /* More slick stuff... */
 tsunami_flush_tlb_range:
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
 tsunami_flush_tlb_mm:
         ld      [%o0 + AOFF_mm_context], %g2
         cmp     %g2, -1
@@ -65,7 +65,7 @@ tsunami_flush_tlb_out:
 
         /* This one can be done in a fine grained manner... */
 tsunami_flush_tlb_page:
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         mov     SRMMU_CTX_REG, %g1
         ld      [%o0 + AOFF_mm_context], %o3
         andn    %o1, (PAGE_SIZE - 1), %o1
diff --git a/arch/sparc/mm/viking.S b/arch/sparc/mm/viking.S
index bf8ee0613ae7..852257fcc82b 100644
--- a/arch/sparc/mm/viking.S
+++ b/arch/sparc/mm/viking.S
@@ -108,7 +108,7 @@ viking_mxcc_flush_page:
 viking_flush_cache_page:
 viking_flush_cache_range:
 #ifndef CONFIG_SMP
-        ld      [%o0 + 0x0], %o0                /* XXX vma->vm_mm, GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
 #endif
 viking_flush_cache_mm:
 #ifndef CONFIG_SMP
@@ -148,7 +148,7 @@ viking_flush_tlb_mm:
 #endif
 
 viking_flush_tlb_range:
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         mov     SRMMU_CTX_REG, %g1
         ld      [%o0 + AOFF_mm_context], %o3
         lda     [%g1] ASI_M_MMUREGS, %g5
@@ -173,7 +173,7 @@ viking_flush_tlb_range:
 #endif
 
 viking_flush_tlb_page:
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         mov     SRMMU_CTX_REG, %g1
         ld      [%o0 + AOFF_mm_context], %o3
         lda     [%g1] ASI_M_MMUREGS, %g5
@@ -239,7 +239,7 @@ sun4dsmp_flush_tlb_range:
         tst     %g5
         bne     3f
          mov    SRMMU_CTX_REG, %g1
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         ld      [%o0 + AOFF_mm_context], %o3
         lda     [%g1] ASI_M_MMUREGS, %g5
         sethi   %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4
@@ -265,7 +265,7 @@ sun4dsmp_flush_tlb_page:
         tst     %g5
         bne     2f
          mov    SRMMU_CTX_REG, %g1
-        ld      [%o0 + 0x00], %o0       /* XXX vma->vm_mm GROSS XXX */
+        ld      [%o0 + VMA_VM_MM], %o0
         ld      [%o0 + AOFF_mm_context], %o3
         lda     [%g1] ASI_M_MMUREGS, %g5
         and     %o1, PAGE_MASK, %o1
diff --git a/arch/sparc/net/bpf_jit_comp.c b/arch/sparc/net/bpf_jit_comp.c
index d36a85ebb5e0..9c7be59e6f5a 100644
--- a/arch/sparc/net/bpf_jit_comp.c
+++ b/arch/sparc/net/bpf_jit_comp.c
@@ -785,9 +785,7 @@ cond_branch:			f_offset = addrs[i + filter[i].jf];
                         break;
                 }
                 if (proglen == oldproglen) {
-                        image = module_alloc(max_t(unsigned int,
-                                                   proglen,
-                                                   sizeof(struct work_struct)));
+                        image = module_alloc(proglen);
                         if (!image)
                                 goto out;
                 }
@@ -806,20 +804,8 @@ out:
         return;
 }
 
-static void jit_free_defer(struct work_struct *arg)
-{
-        module_free(NULL, arg);
-}
-
-/* run from softirq, we must use a work_struct to call
- * module_free() from process context
- */
 void bpf_jit_free(struct sk_filter *fp)
 {
-        if (fp->bpf_func != sk_run_filter) {
-                struct work_struct *work = (struct work_struct *)fp->bpf_func;
-
-                INIT_WORK(work, jit_free_defer);
-                schedule_work(work);
-        }
+        if (fp->bpf_func != sk_run_filter)
+                module_free(NULL, fp->bpf_func);
 }
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c
index 02e628065012..3ccf2cd7182e 100644
--- a/arch/tile/kernel/irq.c
+++ b/arch/tile/kernel/irq.c
@@ -220,7 +220,7 @@ void __init init_IRQ(void)
         ipi_init();
 }
 
-void __cpuinit setup_irq_regs(void)
+void setup_irq_regs(void)
 {
         /* Enable interrupt delivery. */
         unmask_irqs(~0UL);
diff --git a/arch/tile/kernel/messaging.c b/arch/tile/kernel/messaging.c
index 0858ee6b520f..00331af9525d 100644
--- a/arch/tile/kernel/messaging.c
+++ b/arch/tile/kernel/messaging.c
@@ -25,7 +25,7 @@
 /* All messages are stored here */
 static DEFINE_PER_CPU(HV_MsgState, msg_state);
 
-void __cpuinit init_messaging(void)
+void init_messaging(void)
 {
         /* Allocate storage for messages in kernel space */
         HV_MsgState *state = &__get_cpu_var(msg_state);
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index 68b542677f6a..eceb8344280f 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -58,8 +58,8 @@ struct pglist_data node_data[MAX_NUMNODES] __read_mostly;
 EXPORT_SYMBOL(node_data);
 
 /* Information on the NUMA nodes that we compute early */
-unsigned long __cpuinitdata node_start_pfn[MAX_NUMNODES];
-unsigned long __cpuinitdata node_end_pfn[MAX_NUMNODES];
+unsigned long node_start_pfn[MAX_NUMNODES];
+unsigned long node_end_pfn[MAX_NUMNODES];
 unsigned long __initdata node_memmap_pfn[MAX_NUMNODES];
 unsigned long __initdata node_percpu_pfn[MAX_NUMNODES];
 unsigned long __initdata node_free_pfn[MAX_NUMNODES];
@@ -84,7 +84,7 @@ unsigned long __initdata boot_pc = (unsigned long)start_kernel;
 
 #ifdef CONFIG_HIGHMEM
 /* Page frame index of end of lowmem on each controller. */
-unsigned long __cpuinitdata node_lowmem_end_pfn[MAX_NUMNODES];
+unsigned long node_lowmem_end_pfn[MAX_NUMNODES];
 
 /* Number of pages that can be mapped into lowmem. */
 static unsigned long __initdata mappable_physpages;
@@ -290,7 +290,7 @@ static void *__init setup_pa_va_mapping(void)
  * This is up to 4 mappings for lowmem, one mapping per memory
  * controller, plus one for our text segment.
  */
-static void __cpuinit store_permanent_mappings(void)
+static void store_permanent_mappings(void)
 {
         int i;
 
@@ -935,7 +935,7 @@ subsys_initcall(topology_init);
  * So the values we set up here in the hypervisor may be overridden on
  * the boot cpu as arguments are parsed.
  */
-static __cpuinit void init_super_pages(void)
+static void init_super_pages(void)
 {
 #ifdef CONFIG_HUGETLB_SUPER_PAGES
         int i;
@@ -950,7 +950,7 @@ static __cpuinit void init_super_pages(void)
  *
  * Called from setup_arch() on the boot cpu, or online_secondary().
  */
-void __cpuinit setup_cpu(int boot)
+void setup_cpu(int boot)
 {
         /* The boot cpu sets up its permanent mappings much earlier. */
         if (!boot)
diff --git a/arch/tile/kernel/smpboot.c b/arch/tile/kernel/smpboot.c
index 44bab29bf2f3..a535655b7089 100644
--- a/arch/tile/kernel/smpboot.c
+++ b/arch/tile/kernel/smpboot.c
@@ -133,14 +133,14 @@ static __init int reset_init_affinity(void)
 }
 late_initcall(reset_init_affinity);
 
-static struct cpumask cpu_started __cpuinitdata;
+static struct cpumask cpu_started;
 
 /*
  * Activate a secondary processor.  Very minimal; don't add anything
  * to this path without knowing what you're doing, since SMP booting
  * is pretty fragile.
  */
-static void __cpuinit start_secondary(void)
+static void start_secondary(void)
 {
         int cpuid = smp_processor_id();
 
@@ -183,7 +183,7 @@ static void __cpuinit start_secondary(void)
 /*
  * Bring a secondary processor online.
  */
-void __cpuinit online_secondary(void)
+void online_secondary(void)
 {
         /*
          * low-memory mappings have been cleared, flush them from
@@ -210,7 +210,7 @@ void __cpuinit online_secondary(void)
         cpu_startup_entry(CPUHP_ONLINE);
 }
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         /* Wait 5s total for all CPUs for them to come online */
         static int timeout;
diff --git a/arch/tile/kernel/time.c b/arch/tile/kernel/time.c
index 5ac397ec6986..7c353d8c2da9 100644
--- a/arch/tile/kernel/time.c
+++ b/arch/tile/kernel/time.c
@@ -159,7 +159,7 @@ static DEFINE_PER_CPU(struct clock_event_device, tile_timer) = {
         .set_mode = tile_timer_set_mode,
 };
 
-void __cpuinit setup_tile_timer(void)
+void setup_tile_timer(void)
 {
         struct clock_event_device *evt = &__get_cpu_var(tile_timer);
 
diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c
index 3d2b81c163a6..f7f99f90cbe0 100644
--- a/arch/tile/mm/fault.c
+++ b/arch/tile/mm/fault.c
@@ -573,10 +573,10 @@ out_of_memory:
                 down_read(&mm->mmap_sem);
                 goto survive;
         }
-        pr_alert("VM: killing process %s\n", tsk->comm);
-        if (!is_kernel_mode)
-                do_group_exit(SIGKILL);
-        goto no_context;
+        if (is_kernel_mode)
+                goto no_context;
+        pagefault_out_of_memory();
+        return 0;
 
 do_sigbus:
         up_read(&mm->mmap_sem);
diff --git a/arch/tile/mm/mmap.c b/arch/tile/mm/mmap.c
index f96f4cec602a..d67d91ebf63e 100644
--- a/arch/tile/mm/mmap.c
+++ b/arch/tile/mm/mmap.c
@@ -66,10 +66,8 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
         if (!is_32bit || rlimit(RLIMIT_STACK) == RLIM_INFINITY) {
                 mm->mmap_base = TASK_UNMAPPED_BASE;
                 mm->get_unmapped_area = arch_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 mm->mmap_base = mmap_base(mm);
                 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
diff --git a/arch/um/include/shared/frame_kern.h b/arch/um/include/shared/frame_kern.h
index e584e40ee832..f2ca5702a4e2 100644
--- a/arch/um/include/shared/frame_kern.h
+++ b/arch/um/include/shared/frame_kern.h
@@ -6,13 +6,13 @@
 #ifndef __FRAME_KERN_H_
 #define __FRAME_KERN_H_
 
-extern int setup_signal_stack_sc(unsigned long stack_top, int sig, 
+extern int setup_signal_stack_sc(unsigned long stack_top, int sig,
                                  struct k_sigaction *ka,
-                                 struct pt_regs *regs, 
+                                 struct pt_regs *regs,
                                  sigset_t *mask);
-extern int setup_signal_stack_si(unsigned long stack_top, int sig, 
+extern int setup_signal_stack_si(unsigned long stack_top, int sig,
                                  struct k_sigaction *ka,
-                                 struct pt_regs *regs, siginfo_t *info, 
+                                 struct pt_regs *regs, struct siginfo *info,
                                  sigset_t *mask);
 
 #endif
diff --git a/arch/um/kernel/signal.c b/arch/um/kernel/signal.c
index 3e831b3fd07b..f57e02e7910f 100644
--- a/arch/um/kernel/signal.c
+++ b/arch/um/kernel/signal.c
@@ -19,7 +19,7 @@ EXPORT_SYMBOL(unblock_signals);
  * OK, we're invoking a handler
  */
 static void handle_signal(struct pt_regs *regs, unsigned long signr,
-                         struct k_sigaction *ka, siginfo_t *info)
+                         struct k_sigaction *ka, struct siginfo *info)
 {
         sigset_t *oldset = sigmask_to_save();
         int singlestep = 0;
@@ -71,7 +71,7 @@ static void handle_signal(struct pt_regs *regs, unsigned long signr,
 static int kern_do_signal(struct pt_regs *regs)
 {
         struct k_sigaction ka_copy;
-        siginfo_t info;
+        struct siginfo info;
         int sig, handled_sig = 0;
 
         while ((sig = get_signal_to_deliver(&info, &ka_copy, regs, NULL)) > 0) {
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index ff03067a3b14..007d5503f49b 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -123,7 +123,7 @@ void uml_setup_stubs(struct mm_struct *mm)
         /* dup_mmap already holds mmap_sem */
         err = install_special_mapping(mm, STUB_START, STUB_END - STUB_START,
                                       VM_READ | VM_MAYREAD | VM_EXEC |
-                                      VM_MAYEXEC | VM_DONTCOPY,
+                                      VM_MAYEXEC | VM_DONTCOPY | VM_PFNMAP,
                                       mm->context.stub_pages);
         if (err) {
                 printk(KERN_ERR "install_special_mapping returned %d\n", err);
diff --git a/arch/um/kernel/skas/uaccess.c b/arch/um/kernel/skas/uaccess.c
index 1d3e0c17340b..4ffb644d6c07 100644
--- a/arch/um/kernel/skas/uaccess.c
+++ b/arch/um/kernel/skas/uaccess.c
@@ -254,6 +254,6 @@ int strnlen_user(const void __user *str, int len)
         n = buffer_op((unsigned long) str, len, 0, strnlen_chunk, &count);
         if (n == 0)
                 return count + 1;
-        return -EFAULT;
+        return 0;
 }
 EXPORT_SYMBOL(strnlen_user);
diff --git a/arch/um/os-Linux/mem.c b/arch/um/os-Linux/mem.c
index ba4398056fe9..3c4af77e51a2 100644
--- a/arch/um/os-Linux/mem.c
+++ b/arch/um/os-Linux/mem.c
@@ -53,6 +53,25 @@ static void __init find_tempdir(void)
 }
 
 /*
+ * Remove bytes from the front of the buffer and refill it so that if there's a
+ * partial string that we care about, it will be completed, and we can recognize
+ * it.
+ */
+static int pop(int fd, char *buf, size_t size, size_t npop)
+{
+        ssize_t n;
+        size_t len = strlen(&buf[npop]);
+
+        memmove(buf, &buf[npop], len + 1);
+        n = read(fd, &buf[len], size - len - 1);
+        if (n < 0)
+                return -errno;
+
+        buf[len + n] = '\0';
+        return 1;
+}
+
+/*
  * This will return 1, with the first character in buf being the
  * character following the next instance of c in the file.  This will
  * read the file as needed.  If there's an error, -errno is returned;
@@ -61,7 +80,6 @@ static void __init find_tempdir(void)
 static int next(int fd, char *buf, size_t size, char c)
 {
         ssize_t n;
-        size_t len;
         char *ptr;
 
         while ((ptr = strchr(buf, c)) == NULL) {
@@ -74,20 +92,129 @@ static int next(int fd, char *buf, size_t size, char c)
                 buf[n] = '\0';
         }
 
-        ptr++;
-        len = strlen(ptr);
-        memmove(buf, ptr, len + 1);
+        return pop(fd, buf, size, ptr - buf + 1);
+}
+
+/*
+ * Decode an octal-escaped and space-terminated path of the form used by
+ * /proc/mounts. May be used to decode a path in-place. "out" must be at least
+ * as large as the input. The output is always null-terminated. "len" gets the
+ * length of the output, excluding the trailing null. Returns 0 if a full path
+ * was successfully decoded, otherwise an error.
+ */
+static int decode_path(const char *in, char *out, size_t *len)
+{
+        char *first = out;
+        int c;
+        int i;
+        int ret = -EINVAL;
+        while (1) {
+                switch (*in) {
+                case '\0':
+                        goto out;
+
+                case ' ':
+                        ret = 0;
+                        goto out;
+
+                case '\\':
+                        in++;
+                        c = 0;
+                        for (i = 0; i < 3; i++) {
+                                if (*in < '0' || *in > '7')
+                                        goto out;
+                                c = (c << 3) | (*in++ - '0');
+                        }
+                        *(unsigned char *)out++ = (unsigned char) c;
+                        break;
+
+                default:
+                        *out++ = *in++;
+                        break;
+                }
+        }
+
+out:
+        *out = '\0';
+        *len = out - first;
+        return ret;
+}
+
+/*
+ * Computes the length of s when encoded with three-digit octal escape sequences
+ * for the characters in chars.
+ */
+static size_t octal_encoded_length(const char *s, const char *chars)
+{
+        size_t len = strlen(s);
+        while ((s = strpbrk(s, chars)) != NULL) {
+                len += 3;
+                s++;
+        }
+
+        return len;
+}
+
+enum {
+        OUTCOME_NOTHING_MOUNTED,
+        OUTCOME_TMPFS_MOUNT,
+        OUTCOME_NON_TMPFS_MOUNT,
+};
+
+/* Read a line of /proc/mounts data looking for a tmpfs mount at "path". */
+static int read_mount(int fd, char *buf, size_t bufsize, const char *path,
+                      int *outcome)
+{
+        int found;
+        int match;
+        char *space;
+        size_t len;
+
+        enum {
+                MATCH_NONE,
+                MATCH_EXACT,
+                MATCH_PARENT,
+        };
+
+        found = next(fd, buf, bufsize, ' ');
+        if (found != 1)
+                return found;
 
         /*
-         * Refill the buffer so that if there's a partial string that we care
-         * about, it will be completed, and we can recognize it.
+         * If there's no following space in the buffer, then this path is
+         * truncated, so it can't be the one we're looking for.
          */
-        n = read(fd, &buf[len], size - len - 1);
-        if (n < 0)
-                return -errno;
+        space = strchr(buf, ' ');
+        if (space) {
+                match = MATCH_NONE;
+                if (!decode_path(buf, buf, &len)) {
+                        if (!strcmp(buf, path))
+                                match = MATCH_EXACT;
+                        else if (!strncmp(buf, path, len)
+                                 && (path[len] == '/' || !strcmp(buf, "/")))
+                                match = MATCH_PARENT;
+                }
+
+                found = pop(fd, buf, bufsize, space - buf + 1);
+                if (found != 1)
+                        return found;
+
+                switch (match) {
+                case MATCH_EXACT:
+                        if (!strncmp(buf, "tmpfs", strlen("tmpfs")))
+                                *outcome = OUTCOME_TMPFS_MOUNT;
+                        else
+                                *outcome = OUTCOME_NON_TMPFS_MOUNT;
+                        break;
 
-        buf[len + n] = '\0';
-        return 1;
+                case MATCH_PARENT:
+                        /* This mount obscures any previous ones. */
+                        *outcome = OUTCOME_NOTHING_MOUNTED;
+                        break;
+                }
+        }
+
+        return next(fd, buf, bufsize, '\n');
 }
 
 /* which_tmpdir is called only during early boot */
@@ -106,8 +233,12 @@ static int checked_tmpdir = 0;
  */
 static void which_tmpdir(void)
 {
-        int fd, found;
-        char buf[128] = { '\0' };
+        int fd;
+        int found;
+        int outcome;
+        char *path;
+        char *buf;
+        size_t bufsize;
 
         if (checked_tmpdir)
                 return;
@@ -116,49 +247,66 @@ static void which_tmpdir(void)
 
         printf("Checking for tmpfs mount on /dev/shm...");
 
+        path = realpath("/dev/shm", NULL);
+        if (!path) {
+                printf("failed to check real path, errno = %d\n", errno);
+                return;
+        }
+        printf("%s...", path);
+
+        /*
+         * The buffer needs to be able to fit the full octal-escaped path, a
+         * space, and a trailing null in order to successfully decode it.
+         */
+        bufsize = octal_encoded_length(path, " \t\n\\") + 2;
+
+        if (bufsize < 128)
+                bufsize = 128;
+
+        buf = malloc(bufsize);
+        if (!buf) {
+                printf("malloc failed, errno = %d\n", errno);
+                goto out;
+        }
+        buf[0] = '\0';
+
         fd = open("/proc/mounts", O_RDONLY);
         if (fd < 0) {
                 printf("failed to open /proc/mounts, errno = %d\n", errno);
-                return;
+                goto out1;
         }
 
+        outcome = OUTCOME_NOTHING_MOUNTED;
         while (1) {
-                found = next(fd, buf, ARRAY_SIZE(buf), ' ');
-                if (found != 1)
-                        break;
-
-                if (!strncmp(buf, "/dev/shm", strlen("/dev/shm")))
-                        goto found;
-
-                found = next(fd, buf, ARRAY_SIZE(buf), '\n');
+                found = read_mount(fd, buf, bufsize, path, &outcome);
                 if (found != 1)
                         break;
         }
 
-err:
-        if (found == 0)
-                printf("nothing mounted on /dev/shm\n");
-        else if (found < 0)
+        if (found < 0) {
                 printf("read returned errno %d\n", -found);
+        } else {
+                switch (outcome) {
+                case OUTCOME_TMPFS_MOUNT:
+                        printf("OK\n");
+                        default_tmpdir = "/dev/shm";
+                        break;
 
-out:
-        close(fd);
-
-        return;
-
-found:
-        found = next(fd, buf, ARRAY_SIZE(buf), ' ');
-        if (found != 1)
-                goto err;
+                case OUTCOME_NON_TMPFS_MOUNT:
+                        printf("not tmpfs\n");
+                        break;
 
-        if (strncmp(buf, "tmpfs", strlen("tmpfs"))) {
-                printf("not tmpfs\n");
-                goto out;
+                default:
+                        printf("nothing mounted on /dev/shm\n");
+                        break;
+                }
         }
 
-        printf("OK\n");
-        default_tmpdir = "/dev/shm";
-        goto out;
+        close(fd);
+out1:
+        free(buf);
+out:
+        free(path);
 }
 
 static int __init make_tempfile(const char *template, char **out_tempname,
diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c
index 9d9f1b4bf826..905924b773d3 100644
--- a/arch/um/os-Linux/signal.c
+++ b/arch/um/os-Linux/signal.c
@@ -25,7 +25,7 @@ void (*sig_info[NSIG])(int, struct siginfo *, struct uml_pt_regs *) = {
         [SIGIO]         = sigio_handler,
         [SIGVTALRM]     = timer_handler };
 
-static void sig_handler_common(int sig, siginfo_t *si, mcontext_t *mc)
+static void sig_handler_common(int sig, struct siginfo *si, mcontext_t *mc)
 {
         struct uml_pt_regs r;
         int save_errno = errno;
@@ -61,7 +61,7 @@ static void sig_handler_common(int sig, siginfo_t *si, mcontext_t *mc)
 static int signals_enabled;
 static unsigned int signals_pending;
 
-void sig_handler(int sig, siginfo_t *si, mcontext_t *mc)
+void sig_handler(int sig, struct siginfo *si, mcontext_t *mc)
 {
         int enabled;
 
@@ -120,7 +120,7 @@ void set_sigstack(void *sig_stack, int size)
                 panic("enabling signal stack failed, errno = %d\n", errno);
 }
 
-static void (*handlers[_NSIG])(int sig, siginfo_t *si, mcontext_t *mc) = {
+static void (*handlers[_NSIG])(int sig, struct siginfo *si, mcontext_t *mc) = {
         [SIGSEGV] = sig_handler,
         [SIGBUS] = sig_handler,
         [SIGILL] = sig_handler,
@@ -162,7 +162,7 @@ static void hard_handler(int sig, siginfo_t *si, void *p)
                 while ((sig = ffs(pending)) != 0){
                         sig--;
                         pending &= ~(1 << sig);
-                        (*handlers[sig])(sig, si, mc);
+                        (*handlers[sig])(sig, (struct siginfo *)si, mc);
                 }
 
                 /*
diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c
index 4625949bf1e4..d531879a4617 100644
--- a/arch/um/os-Linux/skas/process.c
+++ b/arch/um/os-Linux/skas/process.c
@@ -54,7 +54,7 @@ static int ptrace_dump_regs(int pid)
 
 void wait_stub_done(int pid)
 {
-        int n, status, err;
+        int n, status, err, bad_stop = 0;
 
         while (1) {
                 CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED | __WALL));
@@ -74,6 +74,8 @@ void wait_stub_done(int pid)
 
         if (((1 << WSTOPSIG(status)) & STUB_DONE_MASK) != 0)
                 return;
+        else
+                bad_stop = 1;
 
 bad_wait:
         err = ptrace_dump_regs(pid);
@@ -83,7 +85,10 @@ bad_wait:
         printk(UM_KERN_ERR "wait_stub_done : failed to wait for SIGTRAP, "
                "pid = %d, n = %d, errno = %d, status = 0x%x\n", pid, n, errno,
                status);
-        fatal_sigsegv();
+        if (bad_stop)
+                kill(pid, SIGKILL);
+        else
+                fatal_sigsegv();
 }
 
 extern unsigned long current_stub_stack(void);
@@ -409,7 +414,7 @@ void userspace(struct uml_pt_regs *regs)
                 if (WIFSTOPPED(status)) {
                         int sig = WSTOPSIG(status);
 
-                        ptrace(PTRACE_GETSIGINFO, pid, 0, &si);
+                        ptrace(PTRACE_GETSIGINFO, pid, 0, (struct siginfo *)&si);
 
                         switch (sig) {
                         case SIGSEGV:
@@ -417,7 +422,7 @@ void userspace(struct uml_pt_regs *regs)
                                     !ptrace_faultinfo) {
                                         get_skas_faultinfo(pid,
                                                            &regs->faultinfo);
-                                        (*sig_info[SIGSEGV])(SIGSEGV, &si,
+                                        (*sig_info[SIGSEGV])(SIGSEGV, (struct siginfo *)&si,
                                                              regs);
                                 }
                                 else handle_segv(pid, regs);
@@ -426,14 +431,14 @@ void userspace(struct uml_pt_regs *regs)
                                 handle_trap(pid, regs, local_using_sysemu);
                                 break;
                         case SIGTRAP:
-                                relay_signal(SIGTRAP, &si, regs);
+                                relay_signal(SIGTRAP, (struct siginfo *)&si, regs);
                                 break;
                         case SIGVTALRM:
                                 now = os_nsecs();
                                 if (now < nsecs)
                                         break;
                                 block_signals();
-                                (*sig_info[sig])(sig, &si, regs);
+                                (*sig_info[sig])(sig, (struct siginfo *)&si, regs);
                                 unblock_signals();
                                 nsecs = timer.it_value.tv_sec *
                                         UM_NSEC_PER_SEC +
@@ -447,7 +452,7 @@ void userspace(struct uml_pt_regs *regs)
                         case SIGFPE:
                         case SIGWINCH:
                                 block_signals();
-                                (*sig_info[sig])(sig, &si, regs);
+                                (*sig_info[sig])(sig, (struct siginfo *)&si, regs);
                                 unblock_signals();
                                 break;
                         default:
diff --git a/arch/unicore32/kernel/process.c b/arch/unicore32/kernel/process.c
index c9447691bdac..778ebba80827 100644
--- a/arch/unicore32/kernel/process.c
+++ b/arch/unicore32/kernel/process.c
@@ -51,16 +51,6 @@ void arch_cpu_idle(void)
         local_irq_enable();
 }
 
-static char reboot_mode = 'h';
-
-int __init reboot_setup(char *str)
-{
-        reboot_mode = str[0];
-        return 1;
-}
-
-__setup("reboot=", reboot_setup);
-
 void machine_halt(void)
 {
         gpio_set_value(GPO_SOFT_OFF, 0);
@@ -88,7 +78,7 @@ void machine_restart(char *cmd)
          * we may need it to insert some 1:1 mappings so that
          * soft boot works.
          */
-        setup_mm_for_reboot(reboot_mode);
+        setup_mm_for_reboot();
 
         /* Clean and invalidate caches */
         flush_cache_all();
@@ -102,7 +92,7 @@ void machine_restart(char *cmd)
         /*
          * Now handle reboot code.
          */
-        if (reboot_mode == 's') {
+        if (reboot_mode == REBOOT_SOFT) {
                 /* Jump into ROM at address 0xffff0000 */
                 cpu_reset(VECTORS_BASE);
         } else {
diff --git a/arch/unicore32/kernel/setup.h b/arch/unicore32/kernel/setup.h
index 30f749da8f73..f5c51b85ad24 100644
--- a/arch/unicore32/kernel/setup.h
+++ b/arch/unicore32/kernel/setup.h
@@ -22,7 +22,7 @@ extern void puv3_ps2_init(void);
 extern void pci_puv3_preinit(void);
 extern void __init puv3_init_gpio(void);
 
-extern void setup_mm_for_reboot(char mode);
+extern void setup_mm_for_reboot(void);
 
 extern char __stubs_start[], __stubs_end[];
 extern char __vectors_start[], __vectors_end[];
diff --git a/arch/unicore32/mm/mmu.c b/arch/unicore32/mm/mmu.c
index 43c20b40e444..4f5a532bee13 100644
--- a/arch/unicore32/mm/mmu.c
+++ b/arch/unicore32/mm/mmu.c
@@ -445,7 +445,7 @@ void __init paging_init(void)
  * the user-mode pages.  This will then ensure that we have predictable
  * results when turning the mmu off
  */
-void setup_mm_for_reboot(char mode)
+void setup_mm_for_reboot(void)
 {
         unsigned long base_pmdval;
         pgd_t *pgd;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 265c672a2f40..b32ebf92b0ce 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -65,6 +65,7 @@ config X86
         select HAVE_KERNEL_LZMA
         select HAVE_KERNEL_XZ
         select HAVE_KERNEL_LZO
+        select HAVE_KERNEL_LZ4
         select HAVE_HW_BREAKPOINT
         select HAVE_MIXED_BREAKPOINTS_REGS
         select PERF_EVENTS
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index 5ef205c5f37b..dcd90df10ab4 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -4,7 +4,8 @@
 # create a compressed vmlinux image from the original vmlinux
 #
 
-targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.xz vmlinux.bin.lzo
+targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
+        vmlinux.bin.xz vmlinux.bin.lzo vmlinux.bin.lz4
 
 KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
 KBUILD_CFLAGS += -fno-strict-aliasing -fPIC
@@ -63,12 +64,15 @@ $(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,xzkern)
 $(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,lzo)
+$(obj)/vmlinux.bin.lz4: $(vmlinux.bin.all-y) FORCE
+        $(call if_changed,lz4)
 
 suffix-$(CONFIG_KERNEL_GZIP)    := gz
 suffix-$(CONFIG_KERNEL_BZIP2)   := bz2
 suffix-$(CONFIG_KERNEL_LZMA)    := lzma
 suffix-$(CONFIG_KERNEL_XZ)      := xz
 suffix-$(CONFIG_KERNEL_LZO)     := lzo
+suffix-$(CONFIG_KERNEL_LZ4)     := lz4
 
 quiet_cmd_mkpiggy = MKPIGGY $@
       cmd_mkpiggy = $(obj)/mkpiggy $< > $@ || ( rm -f $@ ; false )
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index 7cb56c6ca351..0319c88290a5 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -145,6 +145,10 @@ static int lines, cols;
 #include "../../../../lib/decompress_unlzo.c"
 #endif
 
+#ifdef CONFIG_KERNEL_LZ4
+#include "../../../../lib/decompress_unlz4.c"
+#endif
+
 static void scroll(void)
 {
         int i;
diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile
index 7d6ba9db1be9..6c63c358a7e6 100644
--- a/arch/x86/crypto/Makefile
+++ b/arch/x86/crypto/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
 obj-$(CONFIG_CRYPTO_CRC32_PCLMUL) += crc32-pclmul.o
 obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o
 obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o
-obj-$(CONFIG_CRYPTO_CRCT10DIF_PCLMUL) += crct10dif-pclmul.o
 
 # These modules require assembler to support AVX.
 ifeq ($(avx_supported),yes)
@@ -82,4 +81,3 @@ crc32c-intel-$(CONFIG_64BIT) += crc32c-pcl-intel-asm_64.o
 crc32-pclmul-y := crc32-pclmul_asm.o crc32-pclmul_glue.o
 sha256-ssse3-y := sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256_ssse3_glue.o
 sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o
-crct10dif-pclmul-y := crct10dif-pcl-asm_64.o crct10dif-pclmul_glue.o
diff --git a/arch/x86/crypto/crct10dif-pcl-asm_64.S b/arch/x86/crypto/crct10dif-pcl-asm_64.S
deleted file mode 100644
index 35e97569d05f..000000000000
--- a/arch/x86/crypto/crct10dif-pcl-asm_64.S
+++ /dev/null
@@ -1,643 +0,0 @@
-########################################################################
-# Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
-#
-# Copyright (c) 2013, Intel Corporation
-#
-# Authors:
-#     Erdinc Ozturk <erdinc.ozturk@intel.com>
-#     Vinodh Gopal <vinodh.gopal@intel.com>
-#     James Guilford <james.guilford@intel.com>
-#     Tim Chen <tim.c.chen@linux.intel.com>
-#
-# This software is available to you under a choice of one of two
-# licenses.  You may choose to be licensed under the terms of the GNU
-# General Public License (GPL) Version 2, available from the file
-# COPYING in the main directory of this source tree, or the
-# OpenIB.org BSD license below:
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met:
-#
-# * Redistributions of source code must retain the above copyright
-#   notice, this list of conditions and the following disclaimer.
-#
-# * Redistributions in binary form must reproduce the above copyright
-#   notice, this list of conditions and the following disclaimer in the
-#   documentation and/or other materials provided with the
-#   distribution.
-#
-# * Neither the name of the Intel Corporation nor the names of its
-#   contributors may be used to endorse or promote products derived from
-#   this software without specific prior written permission.
-#
-#
-# THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY
-# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR
-# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-########################################################################
-#       Function API:
-#       UINT16 crc_t10dif_pcl(
-#               UINT16 init_crc, //initial CRC value, 16 bits
-#               const unsigned char *buf, //buffer pointer to calculate CRC on
-#               UINT64 len //buffer length in bytes (64-bit data)
-#       );
-#
-#       Reference paper titled "Fast CRC Computation for Generic
-#       Polynomials Using PCLMULQDQ Instruction"
-#       URL: http://www.intel.com/content/dam/www/public/us/en/documents
-#  /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
-#
-#
-
-#include <linux/linkage.h>
-
-.text
-
-#define        arg1 %rdi
-#define        arg2 %rsi
-#define        arg3 %rdx
-
-#define        arg1_low32 %edi
-
-ENTRY(crc_t10dif_pcl)
-.align 16
-
-        # adjust the 16-bit initial_crc value, scale it to 32 bits
-        shl     $16, arg1_low32
-
-        # Allocate Stack Space
-        mov     %rsp, %rcx
-        sub     $16*2, %rsp
-        # align stack to 16 byte boundary
-        and     $~(0x10 - 1), %rsp
-
-        # check if smaller than 256
-        cmp     $256, arg3
-
-        # for sizes less than 128, we can't fold 64B at a time...
-        jl      _less_than_128
-
-
-        # load the initial crc value
-        movd    arg1_low32, %xmm10      # initial crc
-
-        # crc value does not need to be byte-reflected, but it needs
-        # to be moved to the high part of the register.
-        # because data will be byte-reflected and will align with
-        # initial crc at correct place.
-        pslldq  $12, %xmm10
-
-        movdqa  SHUF_MASK(%rip), %xmm11
-        # receive the initial 64B data, xor the initial crc value
-        movdqu  16*0(arg2), %xmm0
-        movdqu  16*1(arg2), %xmm1
-        movdqu  16*2(arg2), %xmm2
-        movdqu  16*3(arg2), %xmm3
-        movdqu  16*4(arg2), %xmm4
-        movdqu  16*5(arg2), %xmm5
-        movdqu  16*6(arg2), %xmm6
-        movdqu  16*7(arg2), %xmm7
-
-        pshufb  %xmm11, %xmm0
-        # XOR the initial_crc value
-        pxor    %xmm10, %xmm0
-        pshufb  %xmm11, %xmm1
-        pshufb  %xmm11, %xmm2
-        pshufb  %xmm11, %xmm3
-        pshufb  %xmm11, %xmm4
-        pshufb  %xmm11, %xmm5
-        pshufb  %xmm11, %xmm6
-        pshufb  %xmm11, %xmm7
-
-        movdqa  rk3(%rip), %xmm10       #xmm10 has rk3 and rk4
-                                        #imm value of pclmulqdq instruction
-                                        #will determine which constant to use
-
-        #################################################################
-        # we subtract 256 instead of 128 to save one instruction from the loop
-        sub     $256, arg3
-
-        # at this section of the code, there is 64*x+y (0<=y<64) bytes of
-        # buffer. The _fold_64_B_loop will fold 64B at a time
-        # until we have 64+y Bytes of buffer
-
-
-        # fold 64B at a time. This section of the code folds 4 xmm
-        # registers in parallel
-_fold_64_B_loop:
-
-        # update the buffer pointer
-        add     $128, arg2              #    buf += 64#
-
-        movdqu  16*0(arg2), %xmm9
-        movdqu  16*1(arg2), %xmm12
-        pshufb  %xmm11, %xmm9
-        pshufb  %xmm11, %xmm12
-        movdqa  %xmm0, %xmm8
-        movdqa  %xmm1, %xmm13
-        pclmulqdq       $0x0 , %xmm10, %xmm0
-        pclmulqdq       $0x11, %xmm10, %xmm8
-        pclmulqdq       $0x0 , %xmm10, %xmm1
-        pclmulqdq       $0x11, %xmm10, %xmm13
-        pxor    %xmm9 , %xmm0
-        xorps   %xmm8 , %xmm0
-        pxor    %xmm12, %xmm1
-        xorps   %xmm13, %xmm1
-
-        movdqu  16*2(arg2), %xmm9
-        movdqu  16*3(arg2), %xmm12
-        pshufb  %xmm11, %xmm9
-        pshufb  %xmm11, %xmm12
-        movdqa  %xmm2, %xmm8
-        movdqa  %xmm3, %xmm13
-        pclmulqdq       $0x0, %xmm10, %xmm2
-        pclmulqdq       $0x11, %xmm10, %xmm8
-        pclmulqdq       $0x0, %xmm10, %xmm3
-        pclmulqdq       $0x11, %xmm10, %xmm13
-        pxor    %xmm9 , %xmm2
-        xorps   %xmm8 , %xmm2
-        pxor    %xmm12, %xmm3
-        xorps   %xmm13, %xmm3
-
-        movdqu  16*4(arg2), %xmm9
-        movdqu  16*5(arg2), %xmm12
-        pshufb  %xmm11, %xmm9
-        pshufb  %xmm11, %xmm12
-        movdqa  %xmm4, %xmm8
-        movdqa  %xmm5, %xmm13
-        pclmulqdq       $0x0,  %xmm10, %xmm4
-        pclmulqdq       $0x11, %xmm10, %xmm8
-        pclmulqdq       $0x0,  %xmm10, %xmm5
-        pclmulqdq       $0x11, %xmm10, %xmm13
-        pxor    %xmm9 ,  %xmm4
-        xorps   %xmm8 ,  %xmm4
-        pxor    %xmm12,  %xmm5
-        xorps   %xmm13,  %xmm5
-
-        movdqu  16*6(arg2), %xmm9
-        movdqu  16*7(arg2), %xmm12
-        pshufb  %xmm11, %xmm9
-        pshufb  %xmm11, %xmm12
-        movdqa  %xmm6 , %xmm8
-        movdqa  %xmm7 , %xmm13
-        pclmulqdq       $0x0 , %xmm10, %xmm6
-        pclmulqdq       $0x11, %xmm10, %xmm8
-        pclmulqdq       $0x0 , %xmm10, %xmm7
-        pclmulqdq       $0x11, %xmm10, %xmm13
-        pxor    %xmm9 , %xmm6
-        xorps   %xmm8 , %xmm6
-        pxor    %xmm12, %xmm7
-        xorps   %xmm13, %xmm7
-
-        sub     $128, arg3
-
-        # check if there is another 64B in the buffer to be able to fold
-        jge     _fold_64_B_loop
-        ##################################################################
-
-
-        add     $128, arg2
-        # at this point, the buffer pointer is pointing at the last y Bytes
-        # of the buffer the 64B of folded data is in 4 of the xmm
-        # registers: xmm0, xmm1, xmm2, xmm3
-
-
-        # fold the 8 xmm registers to 1 xmm register with different constants
-
-        movdqa  rk9(%rip), %xmm10
-        movdqa  %xmm0, %xmm8
-        pclmulqdq       $0x11, %xmm10, %xmm0
-        pclmulqdq       $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        xorps   %xmm0, %xmm7
-
-        movdqa  rk11(%rip), %xmm10
-        movdqa  %xmm1, %xmm8
-        pclmulqdq        $0x11, %xmm10, %xmm1
-        pclmulqdq        $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        xorps   %xmm1, %xmm7
-
-        movdqa  rk13(%rip), %xmm10
-        movdqa  %xmm2, %xmm8
-        pclmulqdq        $0x11, %xmm10, %xmm2
-        pclmulqdq        $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        pxor    %xmm2, %xmm7
-
-        movdqa  rk15(%rip), %xmm10
-        movdqa  %xmm3, %xmm8
-        pclmulqdq       $0x11, %xmm10, %xmm3
-        pclmulqdq       $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        xorps   %xmm3, %xmm7
-
-        movdqa  rk17(%rip), %xmm10
-        movdqa  %xmm4, %xmm8
-        pclmulqdq       $0x11, %xmm10, %xmm4
-        pclmulqdq       $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        pxor    %xmm4, %xmm7
-
-        movdqa  rk19(%rip), %xmm10
-        movdqa  %xmm5, %xmm8
-        pclmulqdq       $0x11, %xmm10, %xmm5
-        pclmulqdq       $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        xorps   %xmm5, %xmm7
-
-        movdqa  rk1(%rip), %xmm10       #xmm10 has rk1 and rk2
-                                        #imm value of pclmulqdq instruction
-                                        #will determine which constant to use
-        movdqa  %xmm6, %xmm8
-        pclmulqdq       $0x11, %xmm10, %xmm6
-        pclmulqdq       $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        pxor    %xmm6, %xmm7
-
-
-        # instead of 64, we add 48 to the loop counter to save 1 instruction
-        # from the loop instead of a cmp instruction, we use the negative
-        # flag with the jl instruction
-        add     $128-16, arg3
-        jl      _final_reduction_for_128
-
-        # now we have 16+y bytes left to reduce. 16 Bytes is in register xmm7
-        # and the rest is in memory. We can fold 16 bytes at a time if y>=16
-        # continue folding 16B at a time
-
-_16B_reduction_loop:
-        movdqa  %xmm7, %xmm8
-        pclmulqdq       $0x11, %xmm10, %xmm7
-        pclmulqdq       $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        movdqu  (arg2), %xmm0
-        pshufb  %xmm11, %xmm0
-        pxor    %xmm0 , %xmm7
-        add     $16, arg2
-        sub     $16, arg3
-        # instead of a cmp instruction, we utilize the flags with the
-        # jge instruction equivalent of: cmp arg3, 16-16
-        # check if there is any more 16B in the buffer to be able to fold
-        jge     _16B_reduction_loop
-
-        #now we have 16+z bytes left to reduce, where 0<= z < 16.
-        #first, we reduce the data in the xmm7 register
-
-
-_final_reduction_for_128:
-        # check if any more data to fold. If not, compute the CRC of
-        # the final 128 bits
-        add     $16, arg3
-        je      _128_done
-
-        # here we are getting data that is less than 16 bytes.
-        # since we know that there was data before the pointer, we can
-        # offset the input pointer before the actual point, to receive
-        # exactly 16 bytes. after that the registers need to be adjusted.
-_get_last_two_xmms:
-        movdqa  %xmm7, %xmm2
-
-        movdqu  -16(arg2, arg3), %xmm1
-        pshufb  %xmm11, %xmm1
-
-        # get rid of the extra data that was loaded before
-        # load the shift constant
-        lea     pshufb_shf_table+16(%rip), %rax
-        sub     arg3, %rax
-        movdqu  (%rax), %xmm0
-
-        # shift xmm2 to the left by arg3 bytes
-        pshufb  %xmm0, %xmm2
-
-        # shift xmm7 to the right by 16-arg3 bytes
-        pxor    mask1(%rip), %xmm0
-        pshufb  %xmm0, %xmm7
-        pblendvb        %xmm2, %xmm1    #xmm0 is implicit
-
-        # fold 16 Bytes
-        movdqa  %xmm1, %xmm2
-        movdqa  %xmm7, %xmm8
-        pclmulqdq       $0x11, %xmm10, %xmm7
-        pclmulqdq       $0x0 , %xmm10, %xmm8
-        pxor    %xmm8, %xmm7
-        pxor    %xmm2, %xmm7
-
-_128_done:
-        # compute crc of a 128-bit value
-        movdqa  rk5(%rip), %xmm10       # rk5 and rk6 in xmm10
-        movdqa  %xmm7, %xmm0
-
-        #64b fold
-        pclmulqdq       $0x1, %xmm10, %xmm7
-        pslldq  $8   ,  %xmm0
-        pxor    %xmm0,  %xmm7
-
-        #32b fold
-        movdqa  %xmm7, %xmm0
-
-        pand    mask2(%rip), %xmm0
-
-        psrldq  $12, %xmm7
-        pclmulqdq       $0x10, %xmm10, %xmm7
-        pxor    %xmm0, %xmm7
-
-        #barrett reduction
-_barrett:
-        movdqa  rk7(%rip), %xmm10       # rk7 and rk8 in xmm10
-        movdqa  %xmm7, %xmm0
-        pclmulqdq       $0x01, %xmm10, %xmm7
-        pslldq  $4, %xmm7
-        pclmulqdq       $0x11, %xmm10, %xmm7
-
-        pslldq  $4, %xmm7
-        pxor    %xmm0, %xmm7
-        pextrd  $1, %xmm7, %eax
-
-_cleanup:
-        # scale the result back to 16 bits
-        shr     $16, %eax
-        mov     %rcx, %rsp
-        ret
-
-########################################################################
-
-.align 16
-_less_than_128:
-
-        # check if there is enough buffer to be able to fold 16B at a time
-        cmp     $32, arg3
-        jl      _less_than_32
-        movdqa  SHUF_MASK(%rip), %xmm11
-
-        # now if there is, load the constants
-        movdqa  rk1(%rip), %xmm10       # rk1 and rk2 in xmm10
-
-        movd    arg1_low32, %xmm0       # get the initial crc value
-        pslldq  $12, %xmm0      # align it to its correct place
-        movdqu  (arg2), %xmm7   # load the plaintext
-        pshufb  %xmm11, %xmm7   # byte-reflect the plaintext
-        pxor    %xmm0, %xmm7
-
-
-        # update the buffer pointer
-        add     $16, arg2
-
-        # update the counter. subtract 32 instead of 16 to save one
-        # instruction from the loop
-        sub     $32, arg3
-
-        jmp     _16B_reduction_loop
-
-
-.align 16
-_less_than_32:
-        # mov initial crc to the return value. this is necessary for
-        # zero-length buffers.
-        mov     arg1_low32, %eax
-        test    arg3, arg3
-        je      _cleanup
-
-        movdqa  SHUF_MASK(%rip), %xmm11
-
-        movd    arg1_low32, %xmm0       # get the initial crc value
-        pslldq  $12, %xmm0      # align it to its correct place
-
-        cmp     $16, arg3
-        je      _exact_16_left
-        jl      _less_than_16_left
-
-        movdqu  (arg2), %xmm7   # load the plaintext
-        pshufb  %xmm11, %xmm7   # byte-reflect the plaintext
-        pxor    %xmm0 , %xmm7   # xor the initial crc value
-        add     $16, arg2
-        sub     $16, arg3
-        movdqa  rk1(%rip), %xmm10       # rk1 and rk2 in xmm10
-        jmp     _get_last_two_xmms
-
-
-.align 16
-_less_than_16_left:
-        # use stack space to load data less than 16 bytes, zero-out
-        # the 16B in memory first.
-
-        pxor    %xmm1, %xmm1
-        mov     %rsp, %r11
-        movdqa  %xmm1, (%r11)
-
-        cmp     $4, arg3
-        jl      _only_less_than_4
-
-        # backup the counter value
-        mov     arg3, %r9
-        cmp     $8, arg3
-        jl      _less_than_8_left
-
-        # load 8 Bytes
-        mov     (arg2), %rax
-        mov     %rax, (%r11)
-        add     $8, %r11
-        sub     $8, arg3
-        add     $8, arg2
-_less_than_8_left:
-
-        cmp     $4, arg3
-        jl      _less_than_4_left
-
-        # load 4 Bytes
-        mov     (arg2), %eax
-        mov     %eax, (%r11)
-        add     $4, %r11
-        sub     $4, arg3
-        add     $4, arg2
-_less_than_4_left:
-
-        cmp     $2, arg3
-        jl      _less_than_2_left
-
-        # load 2 Bytes
-        mov     (arg2), %ax
-        mov     %ax, (%r11)
-        add     $2, %r11
-        sub     $2, arg3
-        add     $2, arg2
-_less_than_2_left:
-        cmp     $1, arg3
-        jl      _zero_left
-
-        # load 1 Byte
-        mov     (arg2), %al
-        mov     %al, (%r11)
-_zero_left:
-        movdqa  (%rsp), %xmm7
-        pshufb  %xmm11, %xmm7
-        pxor    %xmm0 , %xmm7   # xor the initial crc value
-
-        # shl r9, 4
-        lea     pshufb_shf_table+16(%rip), %rax
-        sub     %r9, %rax
-        movdqu  (%rax), %xmm0
-        pxor    mask1(%rip), %xmm0
-
-        pshufb  %xmm0, %xmm7
-        jmp     _128_done
-
-.align 16
-_exact_16_left:
-        movdqu  (arg2), %xmm7
-        pshufb  %xmm11, %xmm7
-        pxor    %xmm0 , %xmm7   # xor the initial crc value
-
-        jmp     _128_done
-
-_only_less_than_4:
-        cmp     $3, arg3
-        jl      _only_less_than_3
-
-        # load 3 Bytes
-        mov     (arg2), %al
-        mov     %al, (%r11)
-
-        mov     1(arg2), %al
-        mov     %al, 1(%r11)
-
-        mov     2(arg2), %al
-        mov     %al, 2(%r11)
-
-        movdqa   (%rsp), %xmm7
-        pshufb   %xmm11, %xmm7
-        pxor     %xmm0 , %xmm7  # xor the initial crc value
-
-        psrldq  $5, %xmm7
-
-        jmp     _barrett
-_only_less_than_3:
-        cmp     $2, arg3
-        jl      _only_less_than_2
-
-        # load 2 Bytes
-        mov     (arg2), %al
-        mov     %al, (%r11)
-
-        mov     1(arg2), %al
-        mov     %al, 1(%r11)
-
-        movdqa  (%rsp), %xmm7
-        pshufb  %xmm11, %xmm7
-        pxor    %xmm0 , %xmm7   # xor the initial crc value
-
-        psrldq  $6, %xmm7
-
-        jmp     _barrett
-_only_less_than_2:
-
-        # load 1 Byte
-        mov     (arg2), %al
-        mov     %al, (%r11)
-
-        movdqa  (%rsp), %xmm7
-        pshufb  %xmm11, %xmm7
-        pxor    %xmm0 , %xmm7   # xor the initial crc value
-
-        psrldq  $7, %xmm7
-
-        jmp     _barrett
-
-ENDPROC(crc_t10dif_pcl)
-
-.data
-
-# precomputed constants
-# these constants are precomputed from the poly:
-# 0x8bb70000 (0x8bb7 scaled to 32 bits)
-.align 16
-# Q = 0x18BB70000
-# rk1 = 2^(32*3) mod Q << 32
-# rk2 = 2^(32*5) mod Q << 32
-# rk3 = 2^(32*15) mod Q << 32
-# rk4 = 2^(32*17) mod Q << 32
-# rk5 = 2^(32*3) mod Q << 32
-# rk6 = 2^(32*2) mod Q << 32
-# rk7 = floor(2^64/Q)
-# rk8 = Q
-rk1:
-.quad 0x2d56000000000000
-rk2:
-.quad 0x06df000000000000
-rk3:
-.quad 0x9d9d000000000000
-rk4:
-.quad 0x7cf5000000000000
-rk5:
-.quad 0x2d56000000000000
-rk6:
-.quad 0x1368000000000000
-rk7:
-.quad 0x00000001f65a57f8
-rk8:
-.quad 0x000000018bb70000
-
-rk9:
-.quad 0xceae000000000000
-rk10:
-.quad 0xbfd6000000000000
-rk11:
-.quad 0x1e16000000000000
-rk12:
-.quad 0x713c000000000000
-rk13:
-.quad 0xf7f9000000000000
-rk14:
-.quad 0x80a6000000000000
-rk15:
-.quad 0x044c000000000000
-rk16:
-.quad 0xe658000000000000
-rk17:
-.quad 0xad18000000000000
-rk18:
-.quad 0xa497000000000000
-rk19:
-.quad 0x6ee3000000000000
-rk20:
-.quad 0xe7b5000000000000
-
-
-
-mask1:
-.octa 0x80808080808080808080808080808080
-mask2:
-.octa 0x00000000FFFFFFFFFFFFFFFFFFFFFFFF
-
-SHUF_MASK:
-.octa 0x000102030405060708090A0B0C0D0E0F
-
-pshufb_shf_table:
-# use these values for shift constants for the pshufb instruction
-# different alignments result in values as shown:
-#       DDQ 0x008f8e8d8c8b8a898887868584838281 # shl 15 (16-1) / shr1
-#       DDQ 0x01008f8e8d8c8b8a8988878685848382 # shl 14 (16-3) / shr2
-#       DDQ 0x0201008f8e8d8c8b8a89888786858483 # shl 13 (16-4) / shr3
-#       DDQ 0x030201008f8e8d8c8b8a898887868584 # shl 12 (16-4) / shr4
-#       DDQ 0x04030201008f8e8d8c8b8a8988878685 # shl 11 (16-5) / shr5
-#       DDQ 0x0504030201008f8e8d8c8b8a89888786 # shl 10 (16-6) / shr6
-#       DDQ 0x060504030201008f8e8d8c8b8a898887 # shl 9  (16-7) / shr7
-#       DDQ 0x07060504030201008f8e8d8c8b8a8988 # shl 8  (16-8) / shr8
-#       DDQ 0x0807060504030201008f8e8d8c8b8a89 # shl 7  (16-9) / shr9
-#       DDQ 0x090807060504030201008f8e8d8c8b8a # shl 6  (16-10) / shr10
-#       DDQ 0x0a090807060504030201008f8e8d8c8b # shl 5  (16-11) / shr11
-#       DDQ 0x0b0a090807060504030201008f8e8d8c # shl 4  (16-12) / shr12
-#       DDQ 0x0c0b0a090807060504030201008f8e8d # shl 3  (16-13) / shr13
-#       DDQ 0x0d0c0b0a090807060504030201008f8e # shl 2  (16-14) / shr14
-#       DDQ 0x0e0d0c0b0a090807060504030201008f # shl 1  (16-15) / shr15
-.octa 0x8f8e8d8c8b8a89888786858483828100
-.octa 0x000e0d0c0b0a09080706050403020100
diff --git a/arch/x86/crypto/crct10dif-pclmul_glue.c b/arch/x86/crypto/crct10dif-pclmul_glue.c
deleted file mode 100644
index 7845d7fd54c0..000000000000
--- a/arch/x86/crypto/crct10dif-pclmul_glue.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * Cryptographic API.
- *
- * T10 Data Integrity Field CRC16 Crypto Transform using PCLMULQDQ Instructions
- *
- * Copyright (C) 2013 Intel Corporation
- * Author: Tim Chen <tim.c.chen@linux.intel.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- */
-
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/crc-t10dif.h>
-#include <crypto/internal/hash.h>
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <asm/i387.h>
-#include <asm/cpufeature.h>
-#include <asm/cpu_device_id.h>
-
-asmlinkage __u16 crc_t10dif_pcl(__u16 crc, const unsigned char *buf,
-                                size_t len);
-
-struct chksum_desc_ctx {
-        __u16 crc;
-};
-
-/*
- * Steps through buffer one byte at at time, calculates reflected
- * crc using table.
- */
-
-static int chksum_init(struct shash_desc *desc)
-{
-        struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
-
-        ctx->crc = 0;
-
-        return 0;
-}
-
-static int chksum_update(struct shash_desc *desc, const u8 *data,
-                         unsigned int length)
-{
-        struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
-
-        if (irq_fpu_usable()) {
-                kernel_fpu_begin();
-                ctx->crc = crc_t10dif_pcl(ctx->crc, data, length);
-                kernel_fpu_end();
-        } else
-                ctx->crc = crc_t10dif_generic(ctx->crc, data, length);
-        return 0;
-}
-
-static int chksum_final(struct shash_desc *desc, u8 *out)
-{
-        struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
-
-        *(__u16 *)out = ctx->crc;
-        return 0;
-}
-
-static int __chksum_finup(__u16 *crcp, const u8 *data, unsigned int len,
-                        u8 *out)
-{
-        if (irq_fpu_usable()) {
-                kernel_fpu_begin();
-                *(__u16 *)out = crc_t10dif_pcl(*crcp, data, len);
-                kernel_fpu_end();
-        } else
-                *(__u16 *)out = crc_t10dif_generic(*crcp, data, len);
-        return 0;
-}
-
-static int chksum_finup(struct shash_desc *desc, const u8 *data,
-                        unsigned int len, u8 *out)
-{
-        struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
-
-        return __chksum_finup(&ctx->crc, data, len, out);
-}
-
-static int chksum_digest(struct shash_desc *desc, const u8 *data,
-                         unsigned int length, u8 *out)
-{
-        struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
-
-        return __chksum_finup(&ctx->crc, data, length, out);
-}
-
-static struct shash_alg alg = {
-        .digestsize             =       CRC_T10DIF_DIGEST_SIZE,
-        .init           =       chksum_init,
-        .update         =       chksum_update,
-        .final          =       chksum_final,
-        .finup          =       chksum_finup,
-        .digest         =       chksum_digest,
-        .descsize               =       sizeof(struct chksum_desc_ctx),
-        .base                   =       {
-                .cra_name               =       "crct10dif",
-                .cra_driver_name        =       "crct10dif-pclmul",
-                .cra_priority           =       200,
-                .cra_blocksize          =       CRC_T10DIF_BLOCK_SIZE,
-                .cra_module             =       THIS_MODULE,
-        }
-};
-
-static const struct x86_cpu_id crct10dif_cpu_id[] = {
-        X86_FEATURE_MATCH(X86_FEATURE_PCLMULQDQ),
-        {}
-};
-MODULE_DEVICE_TABLE(x86cpu, crct10dif_cpu_id);
-
-static int __init crct10dif_intel_mod_init(void)
-{
-        if (!x86_match_cpu(crct10dif_cpu_id))
-                return -ENODEV;
-
-        return crypto_register_shash(&alg);
-}
-
-static void __exit crct10dif_intel_mod_fini(void)
-{
-        crypto_unregister_shash(&alg);
-}
-
-module_init(crct10dif_intel_mod_init);
-module_exit(crct10dif_intel_mod_fini);
-
-MODULE_AUTHOR("Tim Chen <tim.c.chen@linux.intel.com>");
-MODULE_DESCRIPTION("T10 DIF CRC calculation accelerated with PCLMULQDQ.");
-MODULE_LICENSE("GPL");
-
-MODULE_ALIAS("crct10dif");
-MODULE_ALIAS("crct10dif-pclmul");
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index 52ff81cce008..bae3aba95b15 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -308,8 +308,6 @@ static int load_aout_binary(struct linux_binprm *bprm)
                 (current->mm->start_data = N_DATADDR(ex));
         current->mm->brk = ex.a_bss +
                 (current->mm->start_brk = N_BSSADDR(ex));
-        current->mm->free_area_cache = TASK_UNMAPPED_BASE;
-        current->mm->cached_hole_size = 0;
 
         retval = setup_arg_pages(bprm, IA32_STACK_TOP, EXSTACK_DEFAULT);
         if (retval < 0) {
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 5f9a1243190e..d2b12988d2ed 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -28,7 +28,7 @@ struct x86_cpu {
 #ifdef CONFIG_HOTPLUG_CPU
 extern int arch_register_cpu(int num);
 extern void arch_unregister_cpu(int);
-extern void __cpuinit start_cpu0(void);
+extern void start_cpu0(void);
 #ifdef CONFIG_DEBUG_HOTPLUG_CPU0
 extern int _debug_hotplug_cpu(int cpu, int action);
 #endif
diff --git a/arch/x86/include/asm/emergency-restart.h b/arch/x86/include/asm/emergency-restart.h
index 75ce3f47d204..77a99ac06d00 100644
--- a/arch/x86/include/asm/emergency-restart.h
+++ b/arch/x86/include/asm/emergency-restart.h
@@ -1,18 +1,6 @@
 #ifndef _ASM_X86_EMERGENCY_RESTART_H
 #define _ASM_X86_EMERGENCY_RESTART_H
 
-enum reboot_type {
-        BOOT_TRIPLE = 't',
-        BOOT_KBD = 'k',
-        BOOT_BIOS = 'b',
-        BOOT_ACPI = 'a',
-        BOOT_EFI = 'e',
-        BOOT_CF9 = 'p',
-        BOOT_CF9_COND = 'q',
-};
-
-extern enum reboot_type reboot_type;
-
 extern void machine_emergency_restart(void);
 
 #endif /* _ASM_X86_EMERGENCY_RESTART_H */
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index d8e8eefbe24c..34f69cb9350a 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -345,4 +345,11 @@ extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
 
 #define IO_SPACE_LIMIT 0xffff
 
+#ifdef CONFIG_MTRR
+extern int __must_check arch_phys_wc_add(unsigned long base,
+                                         unsigned long size);
+extern void arch_phys_wc_del(int handle);
+#define arch_phys_wc_add arch_phys_wc_add
+#endif
+
 #endif /* _ASM_X86_IO_H */
diff --git a/arch/x86/include/asm/mc146818rtc.h b/arch/x86/include/asm/mc146818rtc.h
index d354fb781c57..a55c7efcc4ed 100644
--- a/arch/x86/include/asm/mc146818rtc.h
+++ b/arch/x86/include/asm/mc146818rtc.h
@@ -95,8 +95,8 @@ static inline unsigned char current_lock_cmos_reg(void)
 unsigned char rtc_cmos_read(unsigned char addr);
 void rtc_cmos_write(unsigned char val, unsigned char addr);
 
-extern int mach_set_rtc_mmss(unsigned long nowtime);
-extern unsigned long mach_get_cmos_time(void);
+extern int mach_set_rtc_mmss(const struct timespec *now);
+extern void mach_get_cmos_time(struct timespec *now);
 
 #define RTC_IRQ 8
 
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 6b52980c29c1..29e3093bbd21 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -214,6 +214,13 @@ void mce_log_therm_throt_event(__u64 status);
 /* Interrupt Handler for core thermal thresholds */
 extern int (*platform_thermal_notify)(__u64 msr_val);
 
+/* Interrupt Handler for package thermal thresholds */
+extern int (*platform_thermal_package_notify)(__u64 msr_val);
+
+/* Callback support of rate control, return true, if
+ * callback has rate control */
+extern bool (*platform_thermal_package_rate_control)(void);
+
 #ifdef CONFIG_X86_THERMAL_VECTOR
 extern void mcheck_intel_therm_init(void);
 #else
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 6bc3985ee473..f98bd6625318 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -60,11 +60,11 @@ static inline void __exit exit_amd_microcode(void) {}
 #ifdef CONFIG_MICROCODE_EARLY
 #define MAX_UCODE_COUNT 128
 extern void __init load_ucode_bsp(void);
-extern void __cpuinit load_ucode_ap(void);
+extern void load_ucode_ap(void);
 extern int __init save_microcode_in_initrd(void);
 #else
 static inline void __init load_ucode_bsp(void) {}
-static inline void __cpuinit load_ucode_ap(void) {}
+static inline void load_ucode_ap(void) {}
 static inline int __init save_microcode_in_initrd(void)
 {
         return 0;
diff --git a/arch/x86/include/asm/microcode_amd.h b/arch/x86/include/asm/microcode_amd.h
index c6b043f40271..50e5c58ced23 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -67,11 +67,11 @@ extern enum ucode_state load_microcode_amd(int cpu, const u8 *data, size_t size)
 extern u8 amd_bsp_mpb[MPB_MAX_SIZE];
 #endif
 extern void __init load_ucode_amd_bsp(void);
-extern void __cpuinit load_ucode_amd_ap(void);
+extern void load_ucode_amd_ap(void);
 extern int __init save_microcode_in_initrd_amd(void);
 #else
 static inline void __init load_ucode_amd_bsp(void) {}
-static inline void __cpuinit load_ucode_amd_ap(void) {}
+static inline void load_ucode_amd_ap(void) {}
 static inline int __init save_microcode_in_initrd_amd(void) { return -EINVAL; }
 #endif
 
diff --git a/arch/x86/include/asm/microcode_intel.h b/arch/x86/include/asm/microcode_intel.h
index 87a085333cbf..9067166409bf 100644
--- a/arch/x86/include/asm/microcode_intel.h
+++ b/arch/x86/include/asm/microcode_intel.h
@@ -65,12 +65,12 @@ update_match_revision(struct microcode_header_intel *mc_header, int rev);
 
 #ifdef CONFIG_MICROCODE_INTEL_EARLY
 extern void __init load_ucode_intel_bsp(void);
-extern void __cpuinit load_ucode_intel_ap(void);
+extern void load_ucode_intel_ap(void);
 extern void show_ucode_info_early(void);
 extern int __init save_microcode_in_initrd_intel(void);
 #else
 static inline __init void load_ucode_intel_bsp(void) {}
-static inline __cpuinit void load_ucode_intel_ap(void) {}
+static inline void load_ucode_intel_ap(void) {}
 static inline void show_ucode_info_early(void) {}
 static inline int __init save_microcode_in_initrd_intel(void) { return -EINVAL; }
 #endif
diff --git a/arch/x86/include/asm/mmconfig.h b/arch/x86/include/asm/mmconfig.h
index 9b119da1d105..04a3fed22cfe 100644
--- a/arch/x86/include/asm/mmconfig.h
+++ b/arch/x86/include/asm/mmconfig.h
@@ -2,8 +2,8 @@
 #define _ASM_X86_MMCONFIG_H
 
 #ifdef CONFIG_PCI_MMCONFIG
-extern void __cpuinit fam10h_check_enable_mmcfg(void);
-extern void __cpuinit check_enable_amd_mmconf_dmi(void);
+extern void fam10h_check_enable_mmcfg(void);
+extern void check_enable_amd_mmconf_dmi(void);
 #else
 static inline void fam10h_check_enable_mmcfg(void) { }
 static inline void check_enable_amd_mmconf_dmi(void) { }
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index 3e2f42a4b872..626cf70082d7 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -94,7 +94,7 @@ static inline void early_reserve_e820_mpc_new(void) { }
 #define default_get_smp_config x86_init_uint_noop
 #endif
 
-void __cpuinit generic_processor_info(int apicid, int version);
+void generic_processor_info(int apicid, int version);
 #ifdef CONFIG_ACPI
 extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
diff --git a/arch/x86/include/asm/mrst-vrtc.h b/arch/x86/include/asm/mrst-vrtc.h
index 73668abdbedf..1e69a75412a4 100644
--- a/arch/x86/include/asm/mrst-vrtc.h
+++ b/arch/x86/include/asm/mrst-vrtc.h
@@ -3,7 +3,7 @@
 
 extern unsigned char vrtc_cmos_read(unsigned char reg);
 extern void vrtc_cmos_write(unsigned char val, unsigned char reg);
-extern unsigned long vrtc_get_time(void);
-extern int vrtc_set_mmss(unsigned long nowtime);
+extern void vrtc_get_time(struct timespec *now);
+extern int vrtc_set_mmss(const struct timespec *now);
 
 #endif
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index e235582f9930..f768f6298419 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -26,7 +26,10 @@
 #include <uapi/asm/mtrr.h>
 
 
-/*  The following functions are for use by other drivers  */
+/*
+ * The following functions are for use by other drivers that cannot use
+ * arch_phys_wc_add and arch_phys_wc_del.
+ */
 # ifdef CONFIG_MTRR
 extern u8 mtrr_type_lookup(u64 addr, u64 end);
 extern void mtrr_save_fixed_ranges(void *);
@@ -45,6 +48,7 @@ extern void mtrr_aps_init(void);
 extern void mtrr_bp_restore(void);
 extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
 extern int amd_special_default_mtrr(void);
+extern int phys_wc_to_mtrr_index(int handle);
 #  else
 static inline u8 mtrr_type_lookup(u64 addr, u64 end)
 {
@@ -80,6 +84,10 @@ static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
 static inline void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)
 {
 }
+static inline int phys_wc_to_mtrr_index(int handle)
+{
+        return -1;
+}
 
 #define mtrr_ap_init() do {} while (0)
 #define mtrr_bp_init() do {} while (0)
diff --git a/arch/x86/include/asm/numa.h b/arch/x86/include/asm/numa.h
index 1b99ee5c9f00..4064acae625d 100644
--- a/arch/x86/include/asm/numa.h
+++ b/arch/x86/include/asm/numa.h
@@ -39,7 +39,7 @@ static inline void set_apicid_to_node(int apicid, s16 node)
         __apicid_to_node[apicid] = node;
 }
 
-extern int __cpuinit numa_cpu_node(int cpu);
+extern int numa_cpu_node(int cpu);
 
 #else   /* CONFIG_NUMA */
 static inline void set_apicid_to_node(int apicid, s16 node)
@@ -60,8 +60,8 @@ static inline int numa_cpu_node(int cpu)
 extern void numa_set_node(int cpu, int node);
 extern void numa_clear_node(int cpu);
 extern void __init init_cpu_to_node(void);
-extern void __cpuinit numa_add_cpu(int cpu);
-extern void __cpuinit numa_remove_cpu(int cpu);
+extern void numa_add_cpu(int cpu);
+extern void numa_remove_cpu(int cpu);
 #else   /* CONFIG_NUMA */
 static inline void numa_set_node(int cpu, int node)     { }
 static inline void numa_clear_node(int cpu)             { }
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 29937c4f6ff8..24cf5aefb704 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -164,7 +164,7 @@ extern const struct seq_operations cpuinfo_op;
 #define cache_line_size()       (boot_cpu_data.x86_cache_alignment)
 
 extern void cpu_detect(struct cpuinfo_x86 *c);
-extern void __cpuinit fpu_detect(struct cpuinfo_x86 *c);
+extern void fpu_detect(struct cpuinfo_x86 *c);
 
 extern void early_cpu_init(void);
 extern void identify_boot_cpu(void);
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index 60bef663609a..bade6ac3b14f 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -27,7 +27,7 @@ extern int of_ioapic;
 extern u64 initial_dtb;
 extern void add_dtb(u64 data);
 extern void x86_add_irq_domains(void);
-void __cpuinit x86_of_pci_init(void);
+void x86_of_pci_init(void);
 void x86_dtb_init(void);
 #else
 static inline void add_dtb(u64 data) { }
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index b073aaea747c..4137890e88e3 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -179,7 +179,7 @@ static inline int wbinvd_on_all_cpus(void)
 }
 #endif /* CONFIG_SMP */
 
-extern unsigned disabled_cpus __cpuinitdata;
+extern unsigned disabled_cpus;
 
 #ifdef CONFIG_X86_32_SMP
 /*
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index d8d99222b36a..828a1565ba57 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -142,6 +142,8 @@ struct x86_cpuinit_ops {
         void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
 };
 
+struct timespec;
+
 /**
  * struct x86_platform_ops - platform specific runtime functions
  * @calibrate_tsc:              calibrate TSC
@@ -156,8 +158,8 @@ struct x86_cpuinit_ops {
  */
 struct x86_platform_ops {
         unsigned long (*calibrate_tsc)(void);
-        unsigned long (*get_wallclock)(void);
-        int (*set_wallclock)(unsigned long nowtime);
+        void (*get_wallclock)(struct timespec *ts);
+        int (*set_wallclock)(const struct timespec *ts);
         void (*iommu_shutdown)(void);
         bool (*is_untracked_pat_range)(u64 start, u64 end);
         void (*nmi_init)(void);
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index d81a972dd506..2627a81253ee 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -195,7 +195,7 @@ static int __init acpi_parse_madt(struct acpi_table_header *table)
         return 0;
 }
 
-static void __cpuinit acpi_register_lapic(int id, u8 enabled)
+static void acpi_register_lapic(int id, u8 enabled)
 {
         unsigned int ver = 0;
 
@@ -607,7 +607,7 @@ void __init acpi_set_irq_model_ioapic(void)
 #ifdef CONFIG_ACPI_HOTPLUG_CPU
 #include <acpi/processor.h>
 
-static void __cpuinit acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
+static void acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
 {
 #ifdef CONFIG_ACPI_NUMA
         int nid;
@@ -620,7 +620,7 @@ static void __cpuinit acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
 #endif
 }
 
-static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
+static int _acpi_map_lsapic(acpi_handle handle, int *pcpu)
 {
         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
         union acpi_object *obj;
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 2a34aaf3c8f1..33120100ff5e 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -48,9 +48,20 @@ int x86_acpi_suspend_lowlevel(void)
 #ifndef CONFIG_64BIT
         native_store_gdt((struct desc_ptr *)&header->pmode_gdt);
 
+        /*
+         * We have to check that we can write back the value, and not
+         * just read it.  At least on 90 nm Pentium M (Family 6, Model
+         * 13), reading an invalid MSR is not guaranteed to trap, see
+         * Erratum X4 in "Intel Pentium M Processor on 90 nm Process
+         * with 2-MB L2 Cache and Intel® Processor A100 and A110 on 90
+         * nm process with 512-KB L2 Cache Specification Update".
+         */
         if (!rdmsr_safe(MSR_EFER,
                         &header->pmode_efer_low,
-                        &header->pmode_efer_high))
+                        &header->pmode_efer_high) &&
+            !wrmsr_safe(MSR_EFER,
+                        header->pmode_efer_low,
+                        header->pmode_efer_high))
                 header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER);
 #endif /* !CONFIG_64BIT */
 
@@ -61,7 +72,10 @@ int x86_acpi_suspend_lowlevel(void)
         }
         if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
                         &header->pmode_misc_en_low,
-                        &header->pmode_misc_en_high))
+                        &header->pmode_misc_en_high) &&
+            !wrmsr_safe(MSR_IA32_MISC_ENABLE,
+                        header->pmode_misc_en_low,
+                        header->pmode_misc_en_high))
                 header->pmode_behavior |=
                         (1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE);
         header->realmode_flags = acpi_realmode_flags;
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 99663b59123a..eca89c53a7f5 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -58,7 +58,7 @@
 
 unsigned int num_processors;
 
-unsigned disabled_cpus __cpuinitdata;
+unsigned disabled_cpus;
 
 /* Processor that is doing the boot up */
 unsigned int boot_cpu_physical_apicid = -1U;
@@ -544,7 +544,7 @@ static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
  * Setup the local APIC timer for this CPU. Copy the initialized values
  * of the boot CPU and register the clock event in the framework.
  */
-static void __cpuinit setup_APIC_timer(void)
+static void setup_APIC_timer(void)
 {
         struct clock_event_device *levt = &__get_cpu_var(lapic_events);
 
@@ -866,7 +866,7 @@ void __init setup_boot_APIC_clock(void)
         setup_APIC_timer();
 }
 
-void __cpuinit setup_secondary_APIC_clock(void)
+void setup_secondary_APIC_clock(void)
 {
         setup_APIC_timer();
 }
@@ -1229,7 +1229,7 @@ void __init init_bsp_APIC(void)
         apic_write(APIC_LVT1, value);
 }
 
-static void __cpuinit lapic_setup_esr(void)
+static void lapic_setup_esr(void)
 {
         unsigned int oldvalue, value, maxlvt;
 
@@ -1276,7 +1276,7 @@ static void __cpuinit lapic_setup_esr(void)
  * Used to setup local APIC while initializing BSP or bringin up APs.
  * Always called with preemption disabled.
  */
-void __cpuinit setup_local_APIC(void)
+void setup_local_APIC(void)
 {
         int cpu = smp_processor_id();
         unsigned int value, queued;
@@ -1471,7 +1471,7 @@ void __cpuinit setup_local_APIC(void)
 #endif
 }
 
-void __cpuinit end_local_APIC_setup(void)
+void end_local_APIC_setup(void)
 {
         lapic_setup_esr();
 
@@ -2107,7 +2107,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
         apic_write(APIC_LVT1, value);
 }
 
-void __cpuinit generic_processor_info(int apicid, int version)
+void generic_processor_info(int apicid, int version)
 {
         int cpu, max = nr_cpu_ids;
         bool boot_cpu_detected = physid_isset(boot_cpu_physical_apicid,
@@ -2377,7 +2377,7 @@ static struct syscore_ops lapic_syscore_ops = {
         .suspend        = lapic_suspend,
 };
 
-static void __cpuinit apic_pm_activate(void)
+static void apic_pm_activate(void)
 {
         apic_pm_state.active = 1;
 }
@@ -2402,7 +2402,7 @@ static void apic_pm_activate(void) { }
 
 #ifdef CONFIG_X86_64
 
-static int __cpuinit apic_cluster_num(void)
+static int apic_cluster_num(void)
 {
         int i, clusters, zeros;
         unsigned id;
@@ -2447,10 +2447,10 @@ static int __cpuinit apic_cluster_num(void)
         return clusters;
 }
 
-static int __cpuinitdata multi_checked;
-static int __cpuinitdata multi;
+static int multi_checked;
+static int multi;
 
-static int __cpuinit set_multi(const struct dmi_system_id *d)
+static int set_multi(const struct dmi_system_id *d)
 {
         if (multi)
                 return 0;
@@ -2459,7 +2459,7 @@ static int __cpuinit set_multi(const struct dmi_system_id *d)
         return 0;
 }
 
-static const __cpuinitconst struct dmi_system_id multi_dmi_table[] = {
+static const struct dmi_system_id multi_dmi_table[] = {
         {
                 .callback = set_multi,
                 .ident = "IBM System Summit2",
@@ -2471,7 +2471,7 @@ static const __cpuinitconst struct dmi_system_id multi_dmi_table[] = {
         {}
 };
 
-static void __cpuinit dmi_check_multi(void)
+static void dmi_check_multi(void)
 {
         if (multi_checked)
                 return;
@@ -2488,7 +2488,7 @@ static void __cpuinit dmi_check_multi(void)
  * multi-chassis.
  * Use DMI to check them
  */
-__cpuinit int apic_is_clustered_box(void)
+int apic_is_clustered_box(void)
 {
         dmi_check_multi();
         if (multi)
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index 9a9110918ca7..3e67f9e3d7ef 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -74,7 +74,7 @@ static int numachip_phys_pkg_id(int initial_apic_id, int index_msb)
         return initial_apic_id >> index_msb;
 }
 
-static int __cpuinit numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip)
+static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip)
 {
         union numachip_csr_g3_ext_irq_gen int_gen;
 
diff --git a/arch/x86/kernel/apic/es7000_32.c b/arch/x86/kernel/apic/es7000_32.c
index 0874799a98c6..c55224731b2d 100644
--- a/arch/x86/kernel/apic/es7000_32.c
+++ b/arch/x86/kernel/apic/es7000_32.c
@@ -130,7 +130,7 @@ int					es7000_plat;
  */
 
 
-static int __cpuinit wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
+static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
 {
         unsigned long vect = 0, psaival = 0;
 
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c
index d661ee95cabf..1e42e8f305ee 100644
--- a/arch/x86/kernel/apic/numaq_32.c
+++ b/arch/x86/kernel/apic/numaq_32.c
@@ -105,7 +105,7 @@ static void __init smp_dump_qct(void)
         }
 }
 
-void __cpuinit numaq_tsc_disable(void)
+void numaq_tsc_disable(void)
 {
         if (!found_numaq)
                 return;
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index c88baa4ff0e5..140e29db478d 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -148,7 +148,7 @@ static void init_x2apic_ldr(void)
  /*
   * At CPU state changes, update the x2apic cluster sibling info.
   */
-static int __cpuinit
+static int
 update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu)
 {
         unsigned int this_cpu = (unsigned long)hcpu;
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 39cc7f7acab3..1191ac1c9d25 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -25,6 +25,7 @@
 #include <linux/kdebug.h>
 #include <linux/delay.h>
 #include <linux/crash_dump.h>
+#include <linux/reboot.h>
 
 #include <asm/uv/uv_mmrs.h>
 #include <asm/uv/uv_hub.h>
@@ -36,7 +37,6 @@
 #include <asm/ipi.h>
 #include <asm/smp.h>
 #include <asm/x86_init.h>
-#include <asm/emergency-restart.h>
 #include <asm/nmi.h>
 
 /* BMC sets a bit this MMR non-zero before sending an NMI */
@@ -209,7 +209,7 @@ EXPORT_SYMBOL_GPL(uv_possible_blades);
 unsigned long sn_rtc_cycles_per_second;
 EXPORT_SYMBOL(sn_rtc_cycles_per_second);
 
-static int __cpuinit uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
+static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
 {
 #ifdef CONFIG_SMP
         unsigned long val;
@@ -416,7 +416,7 @@ static struct apic __refdata apic_x2apic_uv_x = {
         .safe_wait_icr_idle             = native_safe_x2apic_wait_icr_idle,
 };
 
-static __cpuinit void set_x2apic_extra_bits(int pnode)
+static void set_x2apic_extra_bits(int pnode)
 {
         __this_cpu_write(x2apic_extra_bits, pnode << uvh_apicid.s.pnode_shift);
 }
@@ -735,7 +735,7 @@ static void uv_heartbeat(unsigned long ignored)
         mod_timer_pinned(timer, jiffies + SCIR_CPU_HB_INTERVAL);
 }
 
-static void __cpuinit uv_heartbeat_enable(int cpu)
+static void uv_heartbeat_enable(int cpu)
 {
         while (!uv_cpu_hub_info(cpu)->scir.enabled) {
                 struct timer_list *timer = &uv_cpu_hub_info(cpu)->scir.timer;
@@ -752,7 +752,7 @@ static void __cpuinit uv_heartbeat_enable(int cpu)
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
-static void __cpuinit uv_heartbeat_disable(int cpu)
+static void uv_heartbeat_disable(int cpu)
 {
         if (uv_cpu_hub_info(cpu)->scir.enabled) {
                 uv_cpu_hub_info(cpu)->scir.enabled = 0;
@@ -764,8 +764,8 @@ static void __cpuinit uv_heartbeat_disable(int cpu)
 /*
  * cpu hotplug notifier
  */
-static __cpuinit int uv_scir_cpu_notify(struct notifier_block *self,
-                                       unsigned long action, void *hcpu)
+static int uv_scir_cpu_notify(struct notifier_block *self, unsigned long action,
+                              void *hcpu)
 {
         long cpu = (long)hcpu;
 
@@ -835,7 +835,7 @@ int uv_set_vga_state(struct pci_dev *pdev, bool decode,
  * Called on each cpu to initialize the per_cpu UV data area.
  * FIXME: hotplug not supported yet
  */
-void __cpuinit uv_cpu_init(void)
+void uv_cpu_init(void)
 {
         /* CPU 0 initilization will be done via uv_system_init. */
         if (!uv_blade_info)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index c587a8757227..f654ecefea5b 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -69,7 +69,7 @@ static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
 extern void vide(void);
 __asm__(".align 4\nvide: ret");
 
-static void __cpuinit init_amd_k5(struct cpuinfo_x86 *c)
+static void init_amd_k5(struct cpuinfo_x86 *c)
 {
 /*
  * General Systems BIOSen alias the cpu frequency registers
@@ -87,7 +87,7 @@ static void __cpuinit init_amd_k5(struct cpuinfo_x86 *c)
 }
 
 
-static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
+static void init_amd_k6(struct cpuinfo_x86 *c)
 {
         u32 l, h;
         int mbytes = get_num_physpages() >> (20-PAGE_SHIFT);
@@ -179,7 +179,7 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
         }
 }
 
-static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
+static void amd_k7_smp_check(struct cpuinfo_x86 *c)
 {
         /* calling is from identify_secondary_cpu() ? */
         if (!c->cpu_index)
@@ -222,7 +222,7 @@ static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
         add_taint(TAINT_UNSAFE_SMP, LOCKDEP_NOW_UNRELIABLE);
 }
 
-static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
+static void init_amd_k7(struct cpuinfo_x86 *c)
 {
         u32 l, h;
 
@@ -267,7 +267,7 @@ static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
  * To workaround broken NUMA config.  Read the comment in
  * srat_detect_node().
  */
-static int __cpuinit nearby_node(int apicid)
+static int nearby_node(int apicid)
 {
         int i, node;
 
@@ -292,7 +292,7 @@ static int __cpuinit nearby_node(int apicid)
  * (2) AMD processors supporting compute units
  */
 #ifdef CONFIG_X86_HT
-static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
+static void amd_get_topology(struct cpuinfo_x86 *c)
 {
         u32 nodes, cores_per_cu = 1;
         u8 node_id;
@@ -342,7 +342,7 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
  * Assumes number of cores is a power of two.
  */
-static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
+static void amd_detect_cmp(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_HT
         unsigned bits;
@@ -369,7 +369,7 @@ u16 amd_get_nb_id(int cpu)
 }
 EXPORT_SYMBOL_GPL(amd_get_nb_id);
 
-static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
+static void srat_detect_node(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_NUMA
         int cpu = smp_processor_id();
@@ -421,7 +421,7 @@ static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
 #endif
 }
 
-static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c)
+static void early_init_amd_mc(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_HT
         unsigned bits, ecx;
@@ -447,7 +447,7 @@ static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c)
 #endif
 }
 
-static void __cpuinit bsp_init_amd(struct cpuinfo_x86 *c)
+static void bsp_init_amd(struct cpuinfo_x86 *c)
 {
         if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) {
 
@@ -475,7 +475,7 @@ static void __cpuinit bsp_init_amd(struct cpuinfo_x86 *c)
         }
 }
 
-static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
+static void early_init_amd(struct cpuinfo_x86 *c)
 {
         early_init_amd_mc(c);
 
@@ -514,7 +514,7 @@ static const int amd_erratum_383[];
 static const int amd_erratum_400[];
 static bool cpu_has_amd_erratum(const int *erratum);
 
-static void __cpuinit init_amd(struct cpuinfo_x86 *c)
+static void init_amd(struct cpuinfo_x86 *c)
 {
         u32 dummy;
         unsigned long long value;
@@ -740,8 +740,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 }
 
 #ifdef CONFIG_X86_32
-static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c,
-                                                        unsigned int size)
+static unsigned int amd_size_cache(struct cpuinfo_x86 *c, unsigned int size)
 {
         /* AMD errata T13 (order #21922) */
         if ((c->x86 == 6)) {
@@ -757,7 +756,7 @@ static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c,
 }
 #endif
 
-static void __cpuinit cpu_set_tlb_flushall_shift(struct cpuinfo_x86 *c)
+static void cpu_set_tlb_flushall_shift(struct cpuinfo_x86 *c)
 {
         tlb_flushall_shift = 5;
 
@@ -765,7 +764,7 @@ static void __cpuinit cpu_set_tlb_flushall_shift(struct cpuinfo_x86 *c)
                 tlb_flushall_shift = 4;
 }
 
-static void __cpuinit cpu_detect_tlb_amd(struct cpuinfo_x86 *c)
+static void cpu_detect_tlb_amd(struct cpuinfo_x86 *c)
 {
         u32 ebx, eax, ecx, edx;
         u16 mask = 0xfff;
@@ -820,7 +819,7 @@ static void __cpuinit cpu_detect_tlb_amd(struct cpuinfo_x86 *c)
         cpu_set_tlb_flushall_shift(c);
 }
 
-static const struct cpu_dev __cpuinitconst amd_cpu_dev = {
+static const struct cpu_dev amd_cpu_dev = {
         .c_vendor       = "AMD",
         .c_ident        = { "AuthenticAMD" },
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index 159103c0b1f4..fbf6c3bc2400 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -11,7 +11,7 @@
 
 #ifdef CONFIG_X86_OOSTORE
 
-static u32 __cpuinit power2(u32 x)
+static u32 power2(u32 x)
 {
         u32 s = 1;
 
@@ -25,7 +25,7 @@ static u32 __cpuinit power2(u32 x)
 /*
  * Set up an actual MCR
  */
-static void __cpuinit centaur_mcr_insert(int reg, u32 base, u32 size, int key)
+static void centaur_mcr_insert(int reg, u32 base, u32 size, int key)
 {
         u32 lo, hi;
 
@@ -42,7 +42,7 @@ static void __cpuinit centaur_mcr_insert(int reg, u32 base, u32 size, int key)
  *
  * Shortcut: We know you can't put 4Gig of RAM on a winchip
  */
-static u32 __cpuinit ramtop(void)
+static u32 ramtop(void)
 {
         u32 clip = 0xFFFFFFFFUL;
         u32 top = 0;
@@ -91,7 +91,7 @@ static u32 __cpuinit ramtop(void)
 /*
  * Compute a set of MCR's to give maximum coverage
  */
-static int __cpuinit centaur_mcr_compute(int nr, int key)
+static int centaur_mcr_compute(int nr, int key)
 {
         u32 mem = ramtop();
         u32 root = power2(mem);
@@ -157,7 +157,7 @@ static int __cpuinit centaur_mcr_compute(int nr, int key)
         return ct;
 }
 
-static void __cpuinit centaur_create_optimal_mcr(void)
+static void centaur_create_optimal_mcr(void)
 {
         int used;
         int i;
@@ -181,7 +181,7 @@ static void __cpuinit centaur_create_optimal_mcr(void)
                 wrmsr(MSR_IDT_MCR0+i, 0, 0);
 }
 
-static void __cpuinit winchip2_create_optimal_mcr(void)
+static void winchip2_create_optimal_mcr(void)
 {
         u32 lo, hi;
         int used;
@@ -217,7 +217,7 @@ static void __cpuinit winchip2_create_optimal_mcr(void)
 /*
  * Handle the MCR key on the Winchip 2.
  */
-static void __cpuinit winchip2_unprotect_mcr(void)
+static void winchip2_unprotect_mcr(void)
 {
         u32 lo, hi;
         u32 key;
@@ -229,7 +229,7 @@ static void __cpuinit winchip2_unprotect_mcr(void)
         wrmsr(MSR_IDT_MCR_CTRL, lo, hi);
 }
 
-static void __cpuinit winchip2_protect_mcr(void)
+static void winchip2_protect_mcr(void)
 {
         u32 lo, hi;
 
@@ -247,7 +247,7 @@ static void __cpuinit winchip2_protect_mcr(void)
 #define RNG_ENABLED     (1 << 3)
 #define RNG_ENABLE      (1 << 6)        /* MSR_VIA_RNG */
 
-static void __cpuinit init_c3(struct cpuinfo_x86 *c)
+static void init_c3(struct cpuinfo_x86 *c)
 {
         u32  lo, hi;
 
@@ -318,7 +318,7 @@ enum {
                 EAMD3D          = 1<<20,
 };
 
-static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
+static void early_init_centaur(struct cpuinfo_x86 *c)
 {
         switch (c->x86) {
 #ifdef CONFIG_X86_32
@@ -337,7 +337,7 @@ static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
 #endif
 }
 
-static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
+static void init_centaur(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_32
         char *name;
@@ -468,7 +468,7 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
 #endif
 }
 
-static unsigned int __cpuinit
+static unsigned int
 centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
 {
 #ifdef CONFIG_X86_32
@@ -488,7 +488,7 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
         return size;
 }
 
-static const struct cpu_dev __cpuinitconst centaur_cpu_dev = {
+static const struct cpu_dev centaur_cpu_dev = {
         .c_vendor       = "Centaur",
         .c_ident        = { "CentaurHauls" },
         .c_early_init   = early_init_centaur,
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 548bd039784e..25eb2747b063 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -63,7 +63,7 @@ void __init setup_cpu_local_masks(void)
         alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask);
 }
 
-static void __cpuinit default_init(struct cpuinfo_x86 *c)
+static void default_init(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_64
         cpu_detect_cache_sizes(c);
@@ -80,13 +80,13 @@ static void __cpuinit default_init(struct cpuinfo_x86 *c)
 #endif
 }
 
-static const struct cpu_dev __cpuinitconst default_cpu = {
+static const struct cpu_dev default_cpu = {
         .c_init         = default_init,
         .c_vendor       = "Unknown",
         .c_x86_vendor   = X86_VENDOR_UNKNOWN,
 };
 
-static const struct cpu_dev *this_cpu __cpuinitdata = &default_cpu;
+static const struct cpu_dev *this_cpu = &default_cpu;
 
 DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
 #ifdef CONFIG_X86_64
@@ -160,8 +160,8 @@ static int __init x86_xsaveopt_setup(char *s)
 __setup("noxsaveopt", x86_xsaveopt_setup);
 
 #ifdef CONFIG_X86_32
-static int cachesize_override __cpuinitdata = -1;
-static int disable_x86_serial_nr __cpuinitdata = 1;
+static int cachesize_override = -1;
+static int disable_x86_serial_nr = 1;
 
 static int __init cachesize_setup(char *str)
 {
@@ -215,12 +215,12 @@ static inline int flag_is_changeable_p(u32 flag)
 }
 
 /* Probe for the CPUID instruction */
-int __cpuinit have_cpuid_p(void)
+int have_cpuid_p(void)
 {
         return flag_is_changeable_p(X86_EFLAGS_ID);
 }
 
-static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
+static void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
 {
         unsigned long lo, hi;
 
@@ -298,7 +298,7 @@ struct cpuid_dependent_feature {
         u32 level;
 };
 
-static const struct cpuid_dependent_feature __cpuinitconst
+static const struct cpuid_dependent_feature
 cpuid_dependent_features[] = {
         { X86_FEATURE_MWAIT,            0x00000005 },
         { X86_FEATURE_DCA,              0x00000009 },
@@ -306,7 +306,7 @@ cpuid_dependent_features[] = {
         { 0, 0 }
 };
 
-static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
+static void filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
 {
         const struct cpuid_dependent_feature *df;
 
@@ -344,7 +344,7 @@ static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
  */
 
 /* Look up CPU names by table lookup. */
-static const char *__cpuinit table_lookup_model(struct cpuinfo_x86 *c)
+static const char *table_lookup_model(struct cpuinfo_x86 *c)
 {
         const struct cpu_model_info *info;
 
@@ -364,8 +364,8 @@ static const char *__cpuinit table_lookup_model(struct cpuinfo_x86 *c)
         return NULL;            /* Not found */
 }
 
-__u32 cpu_caps_cleared[NCAPINTS] __cpuinitdata;
-__u32 cpu_caps_set[NCAPINTS] __cpuinitdata;
+__u32 cpu_caps_cleared[NCAPINTS];
+__u32 cpu_caps_set[NCAPINTS];
 
 void load_percpu_segment(int cpu)
 {
@@ -394,9 +394,9 @@ void switch_to_new_gdt(int cpu)
         load_percpu_segment(cpu);
 }
 
-static const struct cpu_dev *__cpuinitdata cpu_devs[X86_VENDOR_NUM] = {};
+static const struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {};
 
-static void __cpuinit get_model_name(struct cpuinfo_x86 *c)
+static void get_model_name(struct cpuinfo_x86 *c)
 {
         unsigned int *v;
         char *p, *q;
@@ -425,7 +425,7 @@ static void __cpuinit get_model_name(struct cpuinfo_x86 *c)
         }
 }
 
-void __cpuinit cpu_detect_cache_sizes(struct cpuinfo_x86 *c)
+void cpu_detect_cache_sizes(struct cpuinfo_x86 *c)
 {
         unsigned int n, dummy, ebx, ecx, edx, l2size;
 
@@ -479,7 +479,7 @@ u16 __read_mostly tlb_lld_4m[NR_INFO];
  */
 s8  __read_mostly tlb_flushall_shift = -1;
 
-void __cpuinit cpu_detect_tlb(struct cpuinfo_x86 *c)
+void cpu_detect_tlb(struct cpuinfo_x86 *c)
 {
         if (this_cpu->c_detect_tlb)
                 this_cpu->c_detect_tlb(c);
@@ -493,7 +493,7 @@ void __cpuinit cpu_detect_tlb(struct cpuinfo_x86 *c)
                 tlb_flushall_shift);
 }
 
-void __cpuinit detect_ht(struct cpuinfo_x86 *c)
+void detect_ht(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_HT
         u32 eax, ebx, ecx, edx;
@@ -544,7 +544,7 @@ out:
 #endif
 }
 
-static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
+static void get_cpu_vendor(struct cpuinfo_x86 *c)
 {
         char *v = c->x86_vendor_id;
         int i;
@@ -571,7 +571,7 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
         this_cpu = &default_cpu;
 }
 
-void __cpuinit cpu_detect(struct cpuinfo_x86 *c)
+void cpu_detect(struct cpuinfo_x86 *c)
 {
         /* Get vendor name */
         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
@@ -601,7 +601,7 @@ void __cpuinit cpu_detect(struct cpuinfo_x86 *c)
         }
 }
 
-void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
+void get_cpu_cap(struct cpuinfo_x86 *c)
 {
         u32 tfms, xlvl;
         u32 ebx;
@@ -652,7 +652,7 @@ void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
         init_scattered_cpuid_features(c);
 }
 
-static void __cpuinit identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
+static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_32
         int i;
@@ -769,7 +769,7 @@ void __init early_cpu_init(void)
  * unless we can find a reliable way to detect all the broken cases.
  * Enable it explicitly on 64-bit for non-constant inputs of cpu_has().
  */
-static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
+static void detect_nopl(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_32
         clear_cpu_cap(c, X86_FEATURE_NOPL);
@@ -778,7 +778,7 @@ static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
 #endif
 }
 
-static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
+static void generic_identify(struct cpuinfo_x86 *c)
 {
         c->extended_cpuid_level = 0;
 
@@ -815,7 +815,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
 /*
  * This does the hard work of actually picking apart the CPU stuff...
  */
-static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
+static void identify_cpu(struct cpuinfo_x86 *c)
 {
         int i;
 
@@ -960,7 +960,7 @@ void __init identify_boot_cpu(void)
         cpu_detect_tlb(&boot_cpu_data);
 }
 
-void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
+void identify_secondary_cpu(struct cpuinfo_x86 *c)
 {
         BUG_ON(c == &boot_cpu_data);
         identify_cpu(c);
@@ -975,14 +975,14 @@ struct msr_range {
         unsigned        max;
 };
 
-static const struct msr_range msr_range_array[] __cpuinitconst = {
+static const struct msr_range msr_range_array[] = {
         { 0x00000000, 0x00000418},
         { 0xc0000000, 0xc000040b},
         { 0xc0010000, 0xc0010142},
         { 0xc0011000, 0xc001103b},
 };
 
-static void __cpuinit __print_cpu_msr(void)
+static void __print_cpu_msr(void)
 {
         unsigned index_min, index_max;
         unsigned index;
@@ -1001,7 +1001,7 @@ static void __cpuinit __print_cpu_msr(void)
         }
 }
 
-static int show_msr __cpuinitdata;
+static int show_msr;
 
 static __init int setup_show_msr(char *arg)
 {
@@ -1022,7 +1022,7 @@ static __init int setup_noclflush(char *arg)
 }
 __setup("noclflush", setup_noclflush);
 
-void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
+void print_cpu_info(struct cpuinfo_x86 *c)
 {
         const char *vendor = NULL;
 
@@ -1051,7 +1051,7 @@ void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
         print_cpu_msr(c);
 }
 
-void __cpuinit print_cpu_msr(struct cpuinfo_x86 *c)
+void print_cpu_msr(struct cpuinfo_x86 *c)
 {
         if (c->cpu_index < show_msr)
                 __print_cpu_msr();
@@ -1216,7 +1216,7 @@ static void dbg_restore_debug_regs(void)
  */
 #ifdef CONFIG_X86_64
 
-void __cpuinit cpu_init(void)
+void cpu_init(void)
 {
         struct orig_ist *oist;
         struct task_struct *me;
@@ -1315,7 +1315,7 @@ void __cpuinit cpu_init(void)
 
 #else
 
-void __cpuinit cpu_init(void)
+void cpu_init(void)
 {
         int cpu = smp_processor_id();
         struct task_struct *curr = current;
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index 7582f475b163..d0969c75ab54 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -15,7 +15,7 @@
 /*
  * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU
  */
-static void __cpuinit __do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
+static void __do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
 {
         unsigned char ccr2, ccr3;
 
@@ -44,7 +44,7 @@ static void __cpuinit __do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
         }
 }
 
-static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
+static void do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
 {
         unsigned long flags;
 
@@ -59,25 +59,25 @@ static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
  * Actually since bugs.h doesn't even reference this perhaps someone should
  * fix the documentation ???
  */
-static unsigned char Cx86_dir0_msb __cpuinitdata = 0;
+static unsigned char Cx86_dir0_msb = 0;
 
-static const char __cpuinitconst Cx86_model[][9] = {
+static const char Cx86_model[][9] = {
         "Cx486", "Cx486", "5x86 ", "6x86", "MediaGX ", "6x86MX ",
         "M II ", "Unknown"
 };
-static const char __cpuinitconst Cx486_name[][5] = {
+static const char Cx486_name[][5] = {
         "SLC", "DLC", "SLC2", "DLC2", "SRx", "DRx",
         "SRx2", "DRx2"
 };
-static const char __cpuinitconst Cx486S_name[][4] = {
+static const char Cx486S_name[][4] = {
         "S", "S2", "Se", "S2e"
 };
-static const char __cpuinitconst Cx486D_name[][4] = {
+static const char Cx486D_name[][4] = {
         "DX", "DX2", "?", "?", "?", "DX4"
 };
-static char Cx86_cb[] __cpuinitdata = "?.5x Core/Bus Clock";
-static const char __cpuinitconst cyrix_model_mult1[] = "12??43";
-static const char __cpuinitconst cyrix_model_mult2[] = "12233445";
+static char Cx86_cb[] = "?.5x Core/Bus Clock";
+static const char cyrix_model_mult1[] = "12??43";
+static const char cyrix_model_mult2[] = "12233445";
 
 /*
  * Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old
@@ -87,7 +87,7 @@ static const char __cpuinitconst cyrix_model_mult2[] = "12233445";
  * FIXME: our newer udelay uses the tsc. We don't need to frob with SLOP
  */
 
-static void __cpuinit check_cx686_slop(struct cpuinfo_x86 *c)
+static void check_cx686_slop(struct cpuinfo_x86 *c)
 {
         unsigned long flags;
 
@@ -112,7 +112,7 @@ static void __cpuinit check_cx686_slop(struct cpuinfo_x86 *c)
 }
 
 
-static void __cpuinit set_cx86_reorder(void)
+static void set_cx86_reorder(void)
 {
         u8 ccr3;
 
@@ -127,7 +127,7 @@ static void __cpuinit set_cx86_reorder(void)
         setCx86(CX86_CCR3, ccr3);
 }
 
-static void __cpuinit set_cx86_memwb(void)
+static void set_cx86_memwb(void)
 {
         printk(KERN_INFO "Enable Memory-Write-back mode on Cyrix/NSC processor.\n");
 
@@ -143,7 +143,7 @@ static void __cpuinit set_cx86_memwb(void)
  *      Configure later MediaGX and/or Geode processor.
  */
 
-static void __cpuinit geode_configure(void)
+static void geode_configure(void)
 {
         unsigned long flags;
         u8 ccr3;
@@ -166,7 +166,7 @@ static void __cpuinit geode_configure(void)
         local_irq_restore(flags);
 }
 
-static void __cpuinit early_init_cyrix(struct cpuinfo_x86 *c)
+static void early_init_cyrix(struct cpuinfo_x86 *c)
 {
         unsigned char dir0, dir0_msn, dir1 = 0;
 
@@ -185,7 +185,7 @@ static void __cpuinit early_init_cyrix(struct cpuinfo_x86 *c)
         }
 }
 
-static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
+static void init_cyrix(struct cpuinfo_x86 *c)
 {
         unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0;
         char *buf = c->x86_model_id;
@@ -356,7 +356,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
 /*
  * Handle National Semiconductor branded processors
  */
-static void __cpuinit init_nsc(struct cpuinfo_x86 *c)
+static void init_nsc(struct cpuinfo_x86 *c)
 {
         /*
          * There may be GX1 processors in the wild that are branded
@@ -405,7 +405,7 @@ static inline int test_cyrix_52div(void)
         return (unsigned char) (test >> 8) == 0x02;
 }
 
-static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c)
+static void cyrix_identify(struct cpuinfo_x86 *c)
 {
         /* Detect Cyrix with disabled CPUID */
         if (c->x86 == 4 && test_cyrix_52div()) {
@@ -441,7 +441,7 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c)
         }
 }
 
-static const struct cpu_dev __cpuinitconst cyrix_cpu_dev = {
+static const struct cpu_dev cyrix_cpu_dev = {
         .c_vendor       = "Cyrix",
         .c_ident        = { "CyrixInstead" },
         .c_early_init   = early_init_cyrix,
@@ -452,7 +452,7 @@ static const struct cpu_dev __cpuinitconst cyrix_cpu_dev = {
 
 cpu_dev_register(cyrix_cpu_dev);
 
-static const struct cpu_dev __cpuinitconst nsc_cpu_dev = {
+static const struct cpu_dev nsc_cpu_dev = {
         .c_vendor       = "NSC",
         .c_ident        = { "Geode by NSC" },
         .c_init         = init_nsc,
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index 1e7e84a02eba..87279212d318 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -60,7 +60,7 @@ detect_hypervisor_vendor(void)
         }
 }
 
-void __cpuinit init_hypervisor(struct cpuinfo_x86 *c)
+void init_hypervisor(struct cpuinfo_x86 *c)
 {
         if (x86_hyper && x86_hyper->set_cpu_features)
                 x86_hyper->set_cpu_features(c);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 9b0c441c03f5..ec7299566f79 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -26,7 +26,7 @@
 #include <asm/apic.h>
 #endif
 
-static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
+static void early_init_intel(struct cpuinfo_x86 *c)
 {
         u64 misc_enable;
 
@@ -163,7 +163,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
  *      This is called before we do cpu ident work
  */
 
-int __cpuinit ppro_with_ram_bug(void)
+int ppro_with_ram_bug(void)
 {
         /* Uses data from early_cpu_detect now */
         if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
@@ -176,7 +176,7 @@ int __cpuinit ppro_with_ram_bug(void)
         return 0;
 }
 
-static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
+static void intel_smp_check(struct cpuinfo_x86 *c)
 {
         /* calling is from identify_secondary_cpu() ? */
         if (!c->cpu_index)
@@ -196,7 +196,7 @@ static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
         }
 }
 
-static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
+static void intel_workarounds(struct cpuinfo_x86 *c)
 {
         unsigned long lo, hi;
 
@@ -275,12 +275,12 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
         intel_smp_check(c);
 }
 #else
-static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
+static void intel_workarounds(struct cpuinfo_x86 *c)
 {
 }
 #endif
 
-static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
+static void srat_detect_node(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_NUMA
         unsigned node;
@@ -300,7 +300,7 @@ static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
 /*
  * find out the number of processor cores on the die
  */
-static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
+static int intel_num_cpu_cores(struct cpuinfo_x86 *c)
 {
         unsigned int eax, ebx, ecx, edx;
 
@@ -315,7 +315,7 @@ static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
                 return 1;
 }
 
-static void __cpuinit detect_vmx_virtcap(struct cpuinfo_x86 *c)
+static void detect_vmx_virtcap(struct cpuinfo_x86 *c)
 {
         /* Intel VMX MSR indicated features */
 #define X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW    0x00200000
@@ -353,7 +353,7 @@ static void __cpuinit detect_vmx_virtcap(struct cpuinfo_x86 *c)
         }
 }
 
-static void __cpuinit init_intel(struct cpuinfo_x86 *c)
+static void init_intel(struct cpuinfo_x86 *c)
 {
         unsigned int l2 = 0;
 
@@ -472,7 +472,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 }
 
 #ifdef CONFIG_X86_32
-static unsigned int __cpuinit intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
+static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
 {
         /*
          * Intel PIII Tualatin. This comes in two flavours.
@@ -506,7 +506,7 @@ static unsigned int __cpuinit intel_size_cache(struct cpuinfo_x86 *c, unsigned i
 
 #define STLB_4K         0x41
 
-static const struct _tlb_table intel_tlb_table[] __cpuinitconst = {
+static const struct _tlb_table intel_tlb_table[] = {
         { 0x01, TLB_INST_4K,            32,     " TLB_INST 4 KByte pages, 4-way set associative" },
         { 0x02, TLB_INST_4M,            2,      " TLB_INST 4 MByte pages, full associative" },
         { 0x03, TLB_DATA_4K,            64,     " TLB_DATA 4 KByte pages, 4-way set associative" },
@@ -536,7 +536,7 @@ static const struct _tlb_table intel_tlb_table[] __cpuinitconst = {
         { 0x00, 0, 0 }
 };
 
-static void __cpuinit intel_tlb_lookup(const unsigned char desc)
+static void intel_tlb_lookup(const unsigned char desc)
 {
         unsigned char k;
         if (desc == 0)
@@ -605,7 +605,7 @@ static void __cpuinit intel_tlb_lookup(const unsigned char desc)
         }
 }
 
-static void __cpuinit intel_tlb_flushall_shift_set(struct cpuinfo_x86 *c)
+static void intel_tlb_flushall_shift_set(struct cpuinfo_x86 *c)
 {
         switch ((c->x86 << 8) + c->x86_model) {
         case 0x60f: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
@@ -634,7 +634,7 @@ static void __cpuinit intel_tlb_flushall_shift_set(struct cpuinfo_x86 *c)
         }
 }
 
-static void __cpuinit intel_detect_tlb(struct cpuinfo_x86 *c)
+static void intel_detect_tlb(struct cpuinfo_x86 *c)
 {
         int i, j, n;
         unsigned int regs[4];
@@ -661,7 +661,7 @@ static void __cpuinit intel_detect_tlb(struct cpuinfo_x86 *c)
         intel_tlb_flushall_shift_set(c);
 }
 
-static const struct cpu_dev __cpuinitconst intel_cpu_dev = {
+static const struct cpu_dev intel_cpu_dev = {
         .c_vendor       = "Intel",
         .c_ident        = { "GenuineIntel" },
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 8dc72dda66fe..1414c90feaba 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -37,7 +37,7 @@ struct _cache_table {
 /* All the cache descriptor types we care about (no TLB or
    trace cache entries) */
 
-static const struct _cache_table __cpuinitconst cache_table[] =
+static const struct _cache_table cache_table[] =
 {
         { 0x06, LVL_1_INST, 8 },        /* 4-way set assoc, 32 byte line size */
         { 0x08, LVL_1_INST, 16 },       /* 4-way set assoc, 32 byte line size */
@@ -203,7 +203,7 @@ union l3_cache {
         unsigned val;
 };
 
-static const unsigned short __cpuinitconst assocs[] = {
+static const unsigned short assocs[] = {
         [1] = 1,
         [2] = 2,
         [4] = 4,
@@ -217,10 +217,10 @@ static const unsigned short __cpuinitconst assocs[] = {
         [0xf] = 0xffff /* fully associative - no way to show this currently */
 };
 
-static const unsigned char __cpuinitconst levels[] = { 1, 1, 2, 3 };
-static const unsigned char __cpuinitconst types[] = { 1, 2, 3, 3 };
+static const unsigned char levels[] = { 1, 1, 2, 3 };
+static const unsigned char types[] = { 1, 2, 3, 3 };
 
-static void __cpuinit
+static void
 amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
                      union _cpuid4_leaf_ebx *ebx,
                      union _cpuid4_leaf_ecx *ecx)
@@ -302,7 +302,7 @@ struct _cache_attr {
 /*
  * L3 cache descriptors
  */
-static void __cpuinit amd_calc_l3_indices(struct amd_northbridge *nb)
+static void amd_calc_l3_indices(struct amd_northbridge *nb)
 {
         struct amd_l3_cache *l3 = &nb->l3_cache;
         unsigned int sc0, sc1, sc2, sc3;
@@ -325,7 +325,7 @@ static void __cpuinit amd_calc_l3_indices(struct amd_northbridge *nb)
         l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1;
 }
 
-static void __cpuinit amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index)
+static void amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index)
 {
         int node;
 
@@ -528,8 +528,7 @@ static struct _cache_attr subcaches =
 #endif  /* CONFIG_AMD_NB && CONFIG_SYSFS */
 
 static int
-__cpuinit cpuid4_cache_lookup_regs(int index,
-                                   struct _cpuid4_info_regs *this_leaf)
+cpuid4_cache_lookup_regs(int index, struct _cpuid4_info_regs *this_leaf)
 {
         union _cpuid4_leaf_eax  eax;
         union _cpuid4_leaf_ebx  ebx;
@@ -560,7 +559,7 @@ __cpuinit cpuid4_cache_lookup_regs(int index,
         return 0;
 }
 
-static int __cpuinit find_num_cache_leaves(struct cpuinfo_x86 *c)
+static int find_num_cache_leaves(struct cpuinfo_x86 *c)
 {
         unsigned int            eax, ebx, ecx, edx, op;
         union _cpuid4_leaf_eax  cache_eax;
@@ -580,7 +579,7 @@ static int __cpuinit find_num_cache_leaves(struct cpuinfo_x86 *c)
         return i;
 }
 
-void __cpuinit init_amd_cacheinfo(struct cpuinfo_x86 *c)
+void init_amd_cacheinfo(struct cpuinfo_x86 *c)
 {
 
         if (cpu_has_topoext) {
@@ -593,7 +592,7 @@ void __cpuinit init_amd_cacheinfo(struct cpuinfo_x86 *c)
         }
 }
 
-unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
+unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
 {
         /* Cache sizes */
         unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0;
@@ -744,7 +743,7 @@ static DEFINE_PER_CPU(struct _cpuid4_info *, ici_cpuid4_info);
 
 #ifdef CONFIG_SMP
 
-static int __cpuinit cache_shared_amd_cpu_map_setup(unsigned int cpu, int index)
+static int cache_shared_amd_cpu_map_setup(unsigned int cpu, int index)
 {
         struct _cpuid4_info *this_leaf;
         int i, sibling;
@@ -793,7 +792,7 @@ static int __cpuinit cache_shared_amd_cpu_map_setup(unsigned int cpu, int index)
         return 1;
 }
 
-static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
+static void cache_shared_cpu_map_setup(unsigned int cpu, int index)
 {
         struct _cpuid4_info *this_leaf, *sibling_leaf;
         unsigned long num_threads_sharing;
@@ -828,7 +827,7 @@ static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
                 }
         }
 }
-static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
+static void cache_remove_shared_cpu_map(unsigned int cpu, int index)
 {
         struct _cpuid4_info     *this_leaf, *sibling_leaf;
         int sibling;
@@ -841,16 +840,16 @@ static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
         }
 }
 #else
-static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
+static void cache_shared_cpu_map_setup(unsigned int cpu, int index)
 {
 }
 
-static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
+static void cache_remove_shared_cpu_map(unsigned int cpu, int index)
 {
 }
 #endif
 
-static void __cpuinit free_cache_attributes(unsigned int cpu)
+static void free_cache_attributes(unsigned int cpu)
 {
         int i;
 
@@ -861,7 +860,7 @@ static void __cpuinit free_cache_attributes(unsigned int cpu)
         per_cpu(ici_cpuid4_info, cpu) = NULL;
 }
 
-static void __cpuinit get_cpu_leaves(void *_retval)
+static void get_cpu_leaves(void *_retval)
 {
         int j, *retval = _retval, cpu = smp_processor_id();
 
@@ -881,7 +880,7 @@ static void __cpuinit get_cpu_leaves(void *_retval)
         }
 }
 
-static int __cpuinit detect_cache_attributes(unsigned int cpu)
+static int detect_cache_attributes(unsigned int cpu)
 {
         int                     retval;
 
@@ -1015,7 +1014,7 @@ static struct attribute *default_attrs[] = {
 };
 
 #ifdef CONFIG_AMD_NB
-static struct attribute ** __cpuinit amd_l3_attrs(void)
+static struct attribute **amd_l3_attrs(void)
 {
         static struct attribute **attrs;
         int n;
@@ -1091,7 +1090,7 @@ static struct kobj_type ktype_percpu_entry = {
         .sysfs_ops      = &sysfs_ops,
 };
 
-static void __cpuinit cpuid4_cache_sysfs_exit(unsigned int cpu)
+static void cpuid4_cache_sysfs_exit(unsigned int cpu)
 {
         kfree(per_cpu(ici_cache_kobject, cpu));
         kfree(per_cpu(ici_index_kobject, cpu));
@@ -1100,7 +1099,7 @@ static void __cpuinit cpuid4_cache_sysfs_exit(unsigned int cpu)
         free_cache_attributes(cpu);
 }
 
-static int __cpuinit cpuid4_cache_sysfs_init(unsigned int cpu)
+static int cpuid4_cache_sysfs_init(unsigned int cpu)
 {
         int err;
 
@@ -1132,7 +1131,7 @@ err_out:
 static DECLARE_BITMAP(cache_dev_map, NR_CPUS);
 
 /* Add/Remove cache interface for CPU device */
-static int __cpuinit cache_add_dev(struct device *dev)
+static int cache_add_dev(struct device *dev)
 {
         unsigned int cpu = dev->id;
         unsigned long i, j;
@@ -1183,7 +1182,7 @@ static int __cpuinit cache_add_dev(struct device *dev)
         return 0;
 }
 
-static void __cpuinit cache_remove_dev(struct device *dev)
+static void cache_remove_dev(struct device *dev)
 {
         unsigned int cpu = dev->id;
         unsigned long i;
@@ -1200,8 +1199,8 @@ static void __cpuinit cache_remove_dev(struct device *dev)
         cpuid4_cache_sysfs_exit(cpu);
 }
 
-static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb,
-                                        unsigned long action, void *hcpu)
+static int cacheinfo_cpu_callback(struct notifier_block *nfb,
+                                  unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
         struct device *dev;
@@ -1220,7 +1219,7 @@ static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata cacheinfo_cpu_notifier = {
+static struct notifier_block cacheinfo_cpu_notifier = {
         .notifier_call = cacheinfo_cpu_callback,
 };
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index bf49cdbb010f..87a65c939bcd 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1363,7 +1363,7 @@ int mce_notify_irq(void)
 }
 EXPORT_SYMBOL_GPL(mce_notify_irq);
 
-static int __cpuinit __mcheck_cpu_mce_banks_init(void)
+static int __mcheck_cpu_mce_banks_init(void)
 {
         int i;
         u8 num_banks = mca_cfg.banks;
@@ -1384,7 +1384,7 @@ static int __cpuinit __mcheck_cpu_mce_banks_init(void)
 /*
  * Initialize Machine Checks for a CPU.
  */
-static int __cpuinit __mcheck_cpu_cap_init(void)
+static int __mcheck_cpu_cap_init(void)
 {
         unsigned b;
         u64 cap;
@@ -1483,7 +1483,7 @@ static void quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)
 }
 
 /* Add per CPU specific workarounds here */
-static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
+static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
 {
         struct mca_config *cfg = &mca_cfg;
 
@@ -1593,7 +1593,7 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
         return 0;
 }
 
-static int __cpuinit __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c)
+static int __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c)
 {
         if (c->x86 != 5)
                 return 0;
@@ -1664,7 +1664,7 @@ void (*machine_check_vector)(struct pt_regs *, long error_code) =
  * Called for each booted CPU to set up machine checks.
  * Must be called with preempt off:
  */
-void __cpuinit mcheck_cpu_init(struct cpuinfo_x86 *c)
+void mcheck_cpu_init(struct cpuinfo_x86 *c)
 {
         if (mca_cfg.disabled)
                 return;
@@ -2082,7 +2082,6 @@ static struct bus_type mce_subsys = {
 
 DEFINE_PER_CPU(struct device *, mce_device);
 
-__cpuinitdata
 void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
 
 static inline struct mce_bank *attr_to_bank(struct device_attribute *attr)
@@ -2228,7 +2227,7 @@ static void mce_device_release(struct device *dev)
 }
 
 /* Per cpu device init. All of the cpus still share the same ctrl bank: */
-static __cpuinit int mce_device_create(unsigned int cpu)
+static int mce_device_create(unsigned int cpu)
 {
         struct device *dev;
         int err;
@@ -2274,7 +2273,7 @@ error:
         return err;
 }
 
-static __cpuinit void mce_device_remove(unsigned int cpu)
+static void mce_device_remove(unsigned int cpu)
 {
         struct device *dev = per_cpu(mce_device, cpu);
         int i;
@@ -2294,7 +2293,7 @@ static __cpuinit void mce_device_remove(unsigned int cpu)
 }
 
 /* Make sure there are no machine checks on offlined CPUs. */
-static void __cpuinit mce_disable_cpu(void *h)
+static void mce_disable_cpu(void *h)
 {
         unsigned long action = *(unsigned long *)h;
         int i;
@@ -2312,7 +2311,7 @@ static void __cpuinit mce_disable_cpu(void *h)
         }
 }
 
-static void __cpuinit mce_reenable_cpu(void *h)
+static void mce_reenable_cpu(void *h)
 {
         unsigned long action = *(unsigned long *)h;
         int i;
@@ -2331,7 +2330,7 @@ static void __cpuinit mce_reenable_cpu(void *h)
 }
 
 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
-static int __cpuinit
+static int
 mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
@@ -2367,7 +2366,7 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
         return NOTIFY_OK;
 }
 
-static struct notifier_block mce_cpu_notifier __cpuinitdata = {
+static struct notifier_block mce_cpu_notifier = {
         .notifier_call = mce_cpu_callback,
 };
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 9cb52767999a..603df4f74640 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -458,10 +458,8 @@ static struct kobj_type threshold_ktype = {
         .default_attrs          = default_attrs,
 };
 
-static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
-                                               unsigned int bank,
-                                               unsigned int block,
-                                               u32 address)
+static int allocate_threshold_blocks(unsigned int cpu, unsigned int bank,
+                                     unsigned int block, u32 address)
 {
         struct threshold_block *b = NULL;
         u32 low, high;
@@ -543,7 +541,7 @@ out_free:
         return err;
 }
 
-static __cpuinit int __threshold_add_blocks(struct threshold_bank *b)
+static int __threshold_add_blocks(struct threshold_bank *b)
 {
         struct list_head *head = &b->blocks->miscj;
         struct threshold_block *pos = NULL;
@@ -567,7 +565,7 @@ static __cpuinit int __threshold_add_blocks(struct threshold_bank *b)
         return err;
 }
 
-static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
+static int threshold_create_bank(unsigned int cpu, unsigned int bank)
 {
         struct device *dev = per_cpu(mce_device, cpu);
         struct amd_northbridge *nb = NULL;
@@ -632,7 +630,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 }
 
 /* create dir/files for all valid threshold banks */
-static __cpuinit int threshold_create_device(unsigned int cpu)
+static int threshold_create_device(unsigned int cpu)
 {
         unsigned int bank;
         struct threshold_bank **bp;
@@ -736,7 +734,7 @@ static void threshold_remove_device(unsigned int cpu)
 }
 
 /* get notified when a cpu comes on/off */
-static void __cpuinit
+static void
 amd_64_threshold_cpu_callback(unsigned long action, unsigned int cpu)
 {
         switch (action) {
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index 98f2083832eb..3eec7de76efb 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -55,12 +55,24 @@ struct thermal_state {
         struct _thermal_state package_power_limit;
         struct _thermal_state core_thresh0;
         struct _thermal_state core_thresh1;
+        struct _thermal_state pkg_thresh0;
+        struct _thermal_state pkg_thresh1;
 };
 
 /* Callback to handle core threshold interrupts */
 int (*platform_thermal_notify)(__u64 msr_val);
 EXPORT_SYMBOL(platform_thermal_notify);
 
+/* Callback to handle core package threshold_interrupts */
+int (*platform_thermal_package_notify)(__u64 msr_val);
+EXPORT_SYMBOL_GPL(platform_thermal_package_notify);
+
+/* Callback support of rate control, return true, if
+ * callback has rate control */
+bool (*platform_thermal_package_rate_control)(void);
+EXPORT_SYMBOL_GPL(platform_thermal_package_rate_control);
+
+
 static DEFINE_PER_CPU(struct thermal_state, thermal_state);
 
 static atomic_t therm_throt_en  = ATOMIC_INIT(0);
@@ -195,19 +207,25 @@ static int therm_throt_process(bool new_event, int event, int level)
         return 0;
 }
 
-static int thresh_event_valid(int event)
+static int thresh_event_valid(int level, int event)
 {
         struct _thermal_state *state;
         unsigned int this_cpu = smp_processor_id();
         struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
         u64 now = get_jiffies_64();
 
-        state = (event == 0) ? &pstate->core_thresh0 : &pstate->core_thresh1;
+        if (level == PACKAGE_LEVEL)
+                state = (event == 0) ? &pstate->pkg_thresh0 :
+                                                &pstate->pkg_thresh1;
+        else
+                state = (event == 0) ? &pstate->core_thresh0 :
+                                                &pstate->core_thresh1;
 
         if (time_before64(now, state->next_check))
                 return 0;
 
         state->next_check = now + CHECK_INTERVAL;
+
         return 1;
 }
 
@@ -222,8 +240,7 @@ __setup("int_pln_enable", int_pln_enable_setup);
 
 #ifdef CONFIG_SYSFS
 /* Add/Remove thermal_throttle interface for CPU device: */
-static __cpuinit int thermal_throttle_add_dev(struct device *dev,
-                                unsigned int cpu)
+static int thermal_throttle_add_dev(struct device *dev, unsigned int cpu)
 {
         int err;
         struct cpuinfo_x86 *c = &cpu_data(cpu);
@@ -249,7 +266,7 @@ static __cpuinit int thermal_throttle_add_dev(struct device *dev,
         return err;
 }
 
-static __cpuinit void thermal_throttle_remove_dev(struct device *dev)
+static void thermal_throttle_remove_dev(struct device *dev)
 {
         sysfs_remove_group(&dev->kobj, &thermal_attr_group);
 }
@@ -258,7 +275,7 @@ static __cpuinit void thermal_throttle_remove_dev(struct device *dev)
 static DEFINE_MUTEX(therm_cpu_lock);
 
 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
-static __cpuinit int
+static int
 thermal_throttle_cpu_callback(struct notifier_block *nfb,
                               unsigned long action,
                               void *hcpu)
@@ -289,7 +306,7 @@ thermal_throttle_cpu_callback(struct notifier_block *nfb,
         return notifier_from_errno(err);
 }
 
-static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
+static struct notifier_block thermal_throttle_cpu_notifier =
 {
         .notifier_call = thermal_throttle_cpu_callback,
 };
@@ -322,6 +339,39 @@ device_initcall(thermal_throttle_init_device);
 
 #endif /* CONFIG_SYSFS */
 
+static void notify_package_thresholds(__u64 msr_val)
+{
+        bool notify_thres_0 = false;
+        bool notify_thres_1 = false;
+
+        if (!platform_thermal_package_notify)
+                return;
+
+        /* lower threshold check */
+        if (msr_val & THERM_LOG_THRESHOLD0)
+                notify_thres_0 = true;
+        /* higher threshold check */
+        if (msr_val & THERM_LOG_THRESHOLD1)
+                notify_thres_1 = true;
+
+        if (!notify_thres_0 && !notify_thres_1)
+                return;
+
+        if (platform_thermal_package_rate_control &&
+                platform_thermal_package_rate_control()) {
+                /* Rate control is implemented in callback */
+                platform_thermal_package_notify(msr_val);
+                return;
+        }
+
+        /* lower threshold reached */
+        if (notify_thres_0 && thresh_event_valid(PACKAGE_LEVEL, 0))
+                platform_thermal_package_notify(msr_val);
+        /* higher threshold reached */
+        if (notify_thres_1 && thresh_event_valid(PACKAGE_LEVEL, 1))
+                platform_thermal_package_notify(msr_val);
+}
+
 static void notify_thresholds(__u64 msr_val)
 {
         /* check whether the interrupt handler is defined;
@@ -331,10 +381,12 @@ static void notify_thresholds(__u64 msr_val)
                 return;
 
         /* lower threshold reached */
-        if ((msr_val & THERM_LOG_THRESHOLD0) && thresh_event_valid(0))
+        if ((msr_val & THERM_LOG_THRESHOLD0) &&
+                        thresh_event_valid(CORE_LEVEL, 0))
                 platform_thermal_notify(msr_val);
         /* higher threshold reached */
-        if ((msr_val & THERM_LOG_THRESHOLD1) && thresh_event_valid(1))
+        if ((msr_val & THERM_LOG_THRESHOLD1) &&
+                        thresh_event_valid(CORE_LEVEL, 1))
                 platform_thermal_notify(msr_val);
 }
 
@@ -360,6 +412,8 @@ static void intel_thermal_interrupt(void)
 
         if (this_cpu_has(X86_FEATURE_PTS)) {
                 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
+                /* check violations of package thermal thresholds */
+                notify_package_thresholds(msr_val);
                 therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
                                         THERMAL_THROTTLING_EVENT,
                                         PACKAGE_LEVEL);
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index ca22b73aaa25..f961de9964c7 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -51,9 +51,13 @@
 #include <asm/e820.h>
 #include <asm/mtrr.h>
 #include <asm/msr.h>
+#include <asm/pat.h>
 
 #include "mtrr.h"
 
+/* arch_phys_wc_add returns an MTRR register index plus this offset. */
+#define MTRR_TO_PHYS_WC_OFFSET 1000
+
 u32 num_var_ranges;
 
 unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];
@@ -525,6 +529,73 @@ int mtrr_del(int reg, unsigned long base, unsigned long size)
 }
 EXPORT_SYMBOL(mtrr_del);
 
+/**
+ * arch_phys_wc_add - add a WC MTRR and handle errors if PAT is unavailable
+ * @base: Physical base address
+ * @size: Size of region
+ *
+ * If PAT is available, this does nothing.  If PAT is unavailable, it
+ * attempts to add a WC MTRR covering size bytes starting at base and
+ * logs an error if this fails.
+ *
+ * Drivers must store the return value to pass to mtrr_del_wc_if_needed,
+ * but drivers should not try to interpret that return value.
+ */
+int arch_phys_wc_add(unsigned long base, unsigned long size)
+{
+        int ret;
+
+        if (pat_enabled)
+                return 0;  /* Success!  (We don't need to do anything.) */
+
+        ret = mtrr_add(base, size, MTRR_TYPE_WRCOMB, true);
+        if (ret < 0) {
+                pr_warn("Failed to add WC MTRR for [%p-%p]; performance may suffer.",
+                        (void *)base, (void *)(base + size - 1));
+                return ret;
+        }
+        return ret + MTRR_TO_PHYS_WC_OFFSET;
+}
+EXPORT_SYMBOL(arch_phys_wc_add);
+
+/*
+ * arch_phys_wc_del - undoes arch_phys_wc_add
+ * @handle: Return value from arch_phys_wc_add
+ *
+ * This cleans up after mtrr_add_wc_if_needed.
+ *
+ * The API guarantees that mtrr_del_wc_if_needed(error code) and
+ * mtrr_del_wc_if_needed(0) do nothing.
+ */
+void arch_phys_wc_del(int handle)
+{
+        if (handle >= 1) {
+                WARN_ON(handle < MTRR_TO_PHYS_WC_OFFSET);
+                mtrr_del(handle - MTRR_TO_PHYS_WC_OFFSET, 0, 0);
+        }
+}
+EXPORT_SYMBOL(arch_phys_wc_del);
+
+/*
+ * phys_wc_to_mtrr_index - translates arch_phys_wc_add's return value
+ * @handle: Return value from arch_phys_wc_add
+ *
+ * This will turn the return value from arch_phys_wc_add into an mtrr
+ * index suitable for debugging.
+ *
+ * Note: There is no legitimate use for this function, except possibly
+ * in printk line.  Alas there is an illegitimate use in some ancient
+ * drm ioctls.
+ */
+int phys_wc_to_mtrr_index(int handle)
+{
+        if (handle < MTRR_TO_PHYS_WC_OFFSET)
+                return -1;
+        else
+                return handle - MTRR_TO_PHYS_WC_OFFSET;
+}
+EXPORT_SYMBOL_GPL(phys_wc_to_mtrr_index);
+
 /*
  * HACK ALERT!
  * These should be called implicitly, but we can't yet until all the initcall
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 9e581c5cf6d0..a7c7305030cc 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1295,7 +1295,7 @@ perf_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
 struct event_constraint emptyconstraint;
 struct event_constraint unconstrained;
 
-static int __cpuinit
+static int
 x86_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
 {
         unsigned int cpu = (long)hcpu;
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
index 5f0581e713c2..e09f0bfb7b8f 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
@@ -851,7 +851,7 @@ static void clear_APIC_ibs(void *dummy)
                 setup_APIC_eilvt(offset, 0, APIC_EILVT_MSG_FIX, 1);
 }
 
-static int __cpuinit
+static int
 perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
 {
         switch (action & ~CPU_TASKS_FROZEN) {
diff --git a/arch/x86/kernel/cpu/perf_event_amd_iommu.c b/arch/x86/kernel/cpu/perf_event_amd_iommu.c
index 0db655ef3918..639d1289b1ba 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_iommu.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_iommu.c
@@ -491,10 +491,8 @@ static struct perf_amd_iommu __perf_iommu = {
 static __init int amd_iommu_pc_init(void)
 {
         /* Make sure the IOMMU PC resource is available */
-        if (!amd_iommu_pc_supported()) {
-                pr_err("perf: amd_iommu PMU not installed. No support!\n");
+        if (!amd_iommu_pc_supported())
                 return -ENODEV;
-        }
 
         _init_perf_amd_iommu(&__perf_iommu, "amd_iommu");
 
diff --git a/arch/x86/kernel/cpu/perf_event_amd_uncore.c b/arch/x86/kernel/cpu/perf_event_amd_uncore.c
index c0c661adf03e..754291adec33 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_uncore.c
@@ -288,13 +288,13 @@ static struct pmu amd_l2_pmu = {
         .read           = amd_uncore_read,
 };
 
-static struct amd_uncore * __cpuinit amd_uncore_alloc(unsigned int cpu)
+static struct amd_uncore *amd_uncore_alloc(unsigned int cpu)
 {
         return kzalloc_node(sizeof(struct amd_uncore), GFP_KERNEL,
                         cpu_to_node(cpu));
 }
 
-static void __cpuinit amd_uncore_cpu_up_prepare(unsigned int cpu)
+static void amd_uncore_cpu_up_prepare(unsigned int cpu)
 {
         struct amd_uncore *uncore;
 
@@ -322,8 +322,8 @@ static void __cpuinit amd_uncore_cpu_up_prepare(unsigned int cpu)
 }
 
 static struct amd_uncore *
-__cpuinit amd_uncore_find_online_sibling(struct amd_uncore *this,
-                                         struct amd_uncore * __percpu *uncores)
+amd_uncore_find_online_sibling(struct amd_uncore *this,
+                               struct amd_uncore * __percpu *uncores)
 {
         unsigned int cpu;
         struct amd_uncore *that;
@@ -348,7 +348,7 @@ __cpuinit amd_uncore_find_online_sibling(struct amd_uncore *this,
         return this;
 }
 
-static void __cpuinit amd_uncore_cpu_starting(unsigned int cpu)
+static void amd_uncore_cpu_starting(unsigned int cpu)
 {
         unsigned int eax, ebx, ecx, edx;
         struct amd_uncore *uncore;
@@ -376,8 +376,8 @@ static void __cpuinit amd_uncore_cpu_starting(unsigned int cpu)
         }
 }
 
-static void __cpuinit uncore_online(unsigned int cpu,
-                                    struct amd_uncore * __percpu *uncores)
+static void uncore_online(unsigned int cpu,
+                          struct amd_uncore * __percpu *uncores)
 {
         struct amd_uncore *uncore = *per_cpu_ptr(uncores, cpu);
 
@@ -388,7 +388,7 @@ static void __cpuinit uncore_online(unsigned int cpu,
                 cpumask_set_cpu(cpu, uncore->active_mask);
 }
 
-static void __cpuinit amd_uncore_cpu_online(unsigned int cpu)
+static void amd_uncore_cpu_online(unsigned int cpu)
 {
         if (amd_uncore_nb)
                 uncore_online(cpu, amd_uncore_nb);
@@ -397,8 +397,8 @@ static void __cpuinit amd_uncore_cpu_online(unsigned int cpu)
                 uncore_online(cpu, amd_uncore_l2);
 }
 
-static void __cpuinit uncore_down_prepare(unsigned int cpu,
-                                          struct amd_uncore * __percpu *uncores)
+static void uncore_down_prepare(unsigned int cpu,
+                                struct amd_uncore * __percpu *uncores)
 {
         unsigned int i;
         struct amd_uncore *this = *per_cpu_ptr(uncores, cpu);
@@ -423,7 +423,7 @@ static void __cpuinit uncore_down_prepare(unsigned int cpu,
         }
 }
 
-static void __cpuinit amd_uncore_cpu_down_prepare(unsigned int cpu)
+static void amd_uncore_cpu_down_prepare(unsigned int cpu)
 {
         if (amd_uncore_nb)
                 uncore_down_prepare(cpu, amd_uncore_nb);
@@ -432,8 +432,7 @@ static void __cpuinit amd_uncore_cpu_down_prepare(unsigned int cpu)
                 uncore_down_prepare(cpu, amd_uncore_l2);
 }
 
-static void __cpuinit uncore_dead(unsigned int cpu,
-                                  struct amd_uncore * __percpu *uncores)
+static void uncore_dead(unsigned int cpu, struct amd_uncore * __percpu *uncores)
 {
         struct amd_uncore *uncore = *per_cpu_ptr(uncores, cpu);
 
@@ -445,7 +444,7 @@ static void __cpuinit uncore_dead(unsigned int cpu,
         *per_cpu_ptr(amd_uncore_nb, cpu) = NULL;
 }
 
-static void __cpuinit amd_uncore_cpu_dead(unsigned int cpu)
+static void amd_uncore_cpu_dead(unsigned int cpu)
 {
         if (amd_uncore_nb)
                 uncore_dead(cpu, amd_uncore_nb);
@@ -454,7 +453,7 @@ static void __cpuinit amd_uncore_cpu_dead(unsigned int cpu)
                 uncore_dead(cpu, amd_uncore_l2);
 }
 
-static int __cpuinit
+static int
 amd_uncore_cpu_notifier(struct notifier_block *self, unsigned long action,
                         void *hcpu)
 {
@@ -489,7 +488,7 @@ amd_uncore_cpu_notifier(struct notifier_block *self, unsigned long action,
         return NOTIFY_OK;
 }
 
-static struct notifier_block amd_uncore_cpu_notifier_block __cpuinitdata = {
+static struct notifier_block amd_uncore_cpu_notifier_block = {
         .notifier_call  = amd_uncore_cpu_notifier,
         .priority       = CPU_PRI_PERF + 1,
 };
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 9dd99751ccf9..cad791dbde95 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -3297,7 +3297,7 @@ static void __init uncore_pci_exit(void)
 /* CPU hot plug/unplug are serialized by cpu_add_remove_lock mutex */
 static LIST_HEAD(boxes_to_free);
 
-static void __cpuinit uncore_kfree_boxes(void)
+static void uncore_kfree_boxes(void)
 {
         struct intel_uncore_box *box;
 
@@ -3309,7 +3309,7 @@ static void __cpuinit uncore_kfree_boxes(void)
         }
 }
 
-static void __cpuinit uncore_cpu_dying(int cpu)
+static void uncore_cpu_dying(int cpu)
 {
         struct intel_uncore_type *type;
         struct intel_uncore_pmu *pmu;
@@ -3328,7 +3328,7 @@ static void __cpuinit uncore_cpu_dying(int cpu)
         }
 }
 
-static int __cpuinit uncore_cpu_starting(int cpu)
+static int uncore_cpu_starting(int cpu)
 {
         struct intel_uncore_type *type;
         struct intel_uncore_pmu *pmu;
@@ -3371,7 +3371,7 @@ static int __cpuinit uncore_cpu_starting(int cpu)
         return 0;
 }
 
-static int __cpuinit uncore_cpu_prepare(int cpu, int phys_id)
+static int uncore_cpu_prepare(int cpu, int phys_id)
 {
         struct intel_uncore_type *type;
         struct intel_uncore_pmu *pmu;
@@ -3397,7 +3397,7 @@ static int __cpuinit uncore_cpu_prepare(int cpu, int phys_id)
         return 0;
 }
 
-static void __cpuinit
+static void
 uncore_change_context(struct intel_uncore_type **uncores, int old_cpu, int new_cpu)
 {
         struct intel_uncore_type *type;
@@ -3435,7 +3435,7 @@ uncore_change_context(struct intel_uncore_type **uncores, int old_cpu, int new_c
         }
 }
 
-static void __cpuinit uncore_event_exit_cpu(int cpu)
+static void uncore_event_exit_cpu(int cpu)
 {
         int i, phys_id, target;
 
@@ -3463,7 +3463,7 @@ static void __cpuinit uncore_event_exit_cpu(int cpu)
         uncore_change_context(pci_uncores, cpu, target);
 }
 
-static void __cpuinit uncore_event_init_cpu(int cpu)
+static void uncore_event_init_cpu(int cpu)
 {
         int i, phys_id;
 
@@ -3479,8 +3479,8 @@ static void __cpuinit uncore_event_init_cpu(int cpu)
         uncore_change_context(pci_uncores, -1, cpu);
 }
 
-static int
- __cpuinit uncore_cpu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
+static int uncore_cpu_notifier(struct notifier_block *self,
+                               unsigned long action, void *hcpu)
 {
         unsigned int cpu = (long)hcpu;
 
@@ -3520,7 +3520,7 @@ static int
         return NOTIFY_OK;
 }
 
-static struct notifier_block uncore_cpu_nb __cpuinitdata = {
+static struct notifier_block uncore_cpu_nb = {
         .notifier_call  = uncore_cpu_notifier,
         /*
          * to migrate uncore events, our notifier should be executed
diff --git a/arch/x86/kernel/cpu/rdrand.c b/arch/x86/kernel/cpu/rdrand.c
index feca286c2bb4..88db010845cb 100644
--- a/arch/x86/kernel/cpu/rdrand.c
+++ b/arch/x86/kernel/cpu/rdrand.c
@@ -52,7 +52,7 @@ static inline int rdrand_long(unsigned long *v)
  */
 #define RESEED_LOOP ((512*128)/sizeof(unsigned long))
 
-void __cpuinit x86_init_rdrand(struct cpuinfo_x86 *c)
+void x86_init_rdrand(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_ARCH_RANDOM
         unsigned long tmp;
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index d92b5dad15dd..f2cc63e9cf08 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -24,13 +24,13 @@ enum cpuid_regs {
         CR_EBX
 };
 
-void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
+void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
 {
         u32 max_level;
         u32 regs[4];
         const struct cpuid_bit *cb;
 
-        static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
+        static const struct cpuid_bit cpuid_bits[] = {
                 { X86_FEATURE_DTHERM,           CR_EAX, 0, 0x00000006, 0 },
                 { X86_FEATURE_IDA,              CR_EAX, 1, 0x00000006, 0 },
                 { X86_FEATURE_ARAT,             CR_EAX, 2, 0x00000006, 0 },
diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c
index 4397e987a1cf..4c60eaf0571c 100644
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -26,7 +26,7 @@
  * exists, use it for populating initial_apicid and cpu topology
  * detection.
  */
-void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
+void detect_extended_topology(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_SMP
         unsigned int eax, ebx, ecx, edx, sub_index;
diff --git a/arch/x86/kernel/cpu/transmeta.c b/arch/x86/kernel/cpu/transmeta.c
index 28000743bbb0..aa0430d69b90 100644
--- a/arch/x86/kernel/cpu/transmeta.c
+++ b/arch/x86/kernel/cpu/transmeta.c
@@ -5,7 +5,7 @@
 #include <asm/msr.h>
 #include "cpu.h"
 
-static void __cpuinit early_init_transmeta(struct cpuinfo_x86 *c)
+static void early_init_transmeta(struct cpuinfo_x86 *c)
 {
         u32 xlvl;
 
@@ -17,7 +17,7 @@ static void __cpuinit early_init_transmeta(struct cpuinfo_x86 *c)
         }
 }
 
-static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
+static void init_transmeta(struct cpuinfo_x86 *c)
 {
         unsigned int cap_mask, uk, max, dummy;
         unsigned int cms_rev1, cms_rev2;
@@ -98,7 +98,7 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
 #endif
 }
 
-static const struct cpu_dev __cpuinitconst transmeta_cpu_dev = {
+static const struct cpu_dev transmeta_cpu_dev = {
         .c_vendor       = "Transmeta",
         .c_ident        = { "GenuineTMx86", "TransmetaCPU" },
         .c_early_init   = early_init_transmeta,
diff --git a/arch/x86/kernel/cpu/umc.c b/arch/x86/kernel/cpu/umc.c
index fd2c37bf7acb..202759a14121 100644
--- a/arch/x86/kernel/cpu/umc.c
+++ b/arch/x86/kernel/cpu/umc.c
@@ -8,7 +8,7 @@
  * so no special init takes place.
  */
 
-static const struct cpu_dev __cpuinitconst umc_cpu_dev = {
+static const struct cpu_dev umc_cpu_dev = {
         .c_vendor       = "UMC",
         .c_ident        = { "UMC UMC UMC" },
         .c_models = {
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index 03a36321ec54..7076878404ec 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -122,7 +122,7 @@ static bool __init vmware_platform(void)
  * so that the kernel could just trust the hypervisor with providing a
  * reliable virtual TSC that is suitable for timekeeping.
  */
-static void __cpuinit vmware_set_cpu_features(struct cpuinfo_x86 *c)
+static void vmware_set_cpu_features(struct cpuinfo_x86 *c)
 {
         set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
         set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 1e4dbcfe6d31..7d9481c743f8 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -137,7 +137,7 @@ static const struct file_operations cpuid_fops = {
         .open = cpuid_open,
 };
 
-static __cpuinit int cpuid_device_create(int cpu)
+static int cpuid_device_create(int cpu)
 {
         struct device *dev;
 
@@ -151,9 +151,8 @@ static void cpuid_device_destroy(int cpu)
         device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu));
 }
 
-static int __cpuinit cpuid_class_cpu_callback(struct notifier_block *nfb,
-                                              unsigned long action,
-                                              void *hcpu)
+static int cpuid_class_cpu_callback(struct notifier_block *nfb,
+                                    unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
         int err = 0;
diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index b1581527a236..69eb2fa25494 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -133,7 +133,7 @@ static void x86_of_pci_irq_disable(struct pci_dev *dev)
 {
 }
 
-void __cpuinit x86_of_pci_init(void)
+void x86_of_pci_init(void)
 {
         pcibios_enable_irq = x86_of_pci_irq_enable;
         pcibios_disable_irq = x86_of_pci_irq_disable;
@@ -364,9 +364,7 @@ static void dt_add_ioapic_domain(unsigned int ioapic_num,
                  * and assigned so we can keep the 1:1 mapping which the ioapic
                  * is having.
                  */
-                ret = irq_domain_associate_many(id, 0, 0, NR_IRQS_LEGACY);
-                if (ret)
-                        pr_err("Error mapping legacy IRQs: %d\n", ret);
+                irq_domain_associate_many(id, 0, 0, NR_IRQS_LEGACY);
 
                 if (num > NR_IRQS_LEGACY) {
                         ret = irq_create_strict_mappings(id, NR_IRQS_LEGACY,
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index e65ddc62e113..5dd87a89f011 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -292,7 +292,6 @@ ENDPROC(start_cpu0)
  * If cpu hotplug is not supported then this code can go in init section
  * which will be freed later
  */
-__CPUINIT
 ENTRY(startup_32_smp)
         cld
         movl $(__BOOT_DS),%eax
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 5e4d8a8a5c40..e1aabdb314c8 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -512,21 +512,6 @@ ENTRY(phys_base)
 
 #include "../../x86/xen/xen-head.S"
         
-        .section .bss, "aw", @nobits
-        .align L1_CACHE_BYTES
-ENTRY(idt_table)
-        .skip IDT_ENTRIES * 16
-
-        .align L1_CACHE_BYTES
-ENTRY(debug_idt_table)
-        .skip IDT_ENTRIES * 16
-
-#ifdef CONFIG_TRACING
-        .align L1_CACHE_BYTES
-ENTRY(trace_idt_table)
-        .skip IDT_ENTRIES * 16
-#endif
-
         __PAGE_ALIGNED_BSS
 NEXT_PAGE(empty_zero_page)
         .skip PAGE_SIZE
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index 02f07634d265..f66ff162dce8 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -393,6 +393,9 @@ void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
                 unregister_hw_breakpoint(t->ptrace_bps[i]);
                 t->ptrace_bps[i] = NULL;
         }
+
+        t->debugreg6 = 0;
+        t->ptrace_dr7 = 0;
 }
 
 void hw_breakpoint_restore(void)
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index b627746f6b1a..202d24f0f7e7 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -108,9 +108,9 @@ EXPORT_SYMBOL(unlazy_fpu);
 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
 unsigned int xstate_size;
 EXPORT_SYMBOL_GPL(xstate_size);
-static struct i387_fxsave_struct fx_scratch __cpuinitdata;
+static struct i387_fxsave_struct fx_scratch;
 
-static void __cpuinit mxcsr_feature_mask_init(void)
+static void mxcsr_feature_mask_init(void)
 {
         unsigned long mask = 0;
 
@@ -124,7 +124,7 @@ static void __cpuinit mxcsr_feature_mask_init(void)
         mxcsr_feature_mask &= mask;
 }
 
-static void __cpuinit init_thread_xstate(void)
+static void init_thread_xstate(void)
 {
         /*
          * Note that xstate_size might be overwriten later during
@@ -153,7 +153,7 @@ static void __cpuinit init_thread_xstate(void)
  * into all processes.
  */
 
-void __cpuinit fpu_init(void)
+void fpu_init(void)
 {
         unsigned long cr0;
         unsigned long cr4_mask = 0;
@@ -608,7 +608,7 @@ static int __init no_387(char *s)
 
 __setup("no387", no_387);
 
-void __cpuinit fpu_detect(struct cpuinfo_x86 *c)
+void fpu_detect(struct cpuinfo_x86 *c)
 {
         unsigned long cr0;
         u16 fsw, fcw;
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 344faf8d0d62..4186755f1d7c 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -119,7 +119,7 @@ execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
 /*
  * allocate per-cpu stacks for hardirq and for softirq processing
  */
-void __cpuinit irq_ctx_init(int cpu)
+void irq_ctx_init(int cpu)
 {
         union irq_ctx *irqctx;
 
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index cd6d9a5a42f6..a96d32cc55b8 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -320,7 +320,7 @@ static void kvm_guest_apic_eoi_write(u32 reg, u32 val)
         apic_write(APIC_EOI, APIC_EOI_ACK);
 }
 
-void __cpuinit kvm_guest_cpu_init(void)
+void kvm_guest_cpu_init(void)
 {
         if (!kvm_para_available())
                 return;
@@ -421,7 +421,7 @@ static void __init kvm_smp_prepare_boot_cpu(void)
         native_smp_prepare_boot_cpu();
 }
 
-static void __cpuinit kvm_guest_cpu_online(void *dummy)
+static void kvm_guest_cpu_online(void *dummy)
 {
         kvm_guest_cpu_init();
 }
@@ -435,8 +435,8 @@ static void kvm_guest_cpu_offline(void *dummy)
         apf_task_wake_all();
 }
 
-static int __cpuinit kvm_cpu_notify(struct notifier_block *self,
-                                    unsigned long action, void *hcpu)
+static int kvm_cpu_notify(struct notifier_block *self, unsigned long action,
+                          void *hcpu)
 {
         int cpu = (unsigned long)hcpu;
         switch (action) {
@@ -455,7 +455,7 @@ static int __cpuinit kvm_cpu_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata kvm_cpu_notifier = {
+static struct notifier_block kvm_cpu_notifier = {
         .notifier_call  = kvm_cpu_notify,
 };
 #endif
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 3dd37ebd591b..1570e0741344 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -48,10 +48,9 @@ static struct pvclock_wall_clock wall_clock;
  * have elapsed since the hypervisor wrote the data. So we try to account for
  * that with system time
  */
-static unsigned long kvm_get_wallclock(void)
+static void kvm_get_wallclock(struct timespec *now)
 {
         struct pvclock_vcpu_time_info *vcpu_time;
-        struct timespec ts;
         int low, high;
         int cpu;
 
@@ -64,14 +63,12 @@ static unsigned long kvm_get_wallclock(void)
         cpu = smp_processor_id();
 
         vcpu_time = &hv_clock[cpu].pvti;
-        pvclock_read_wallclock(&wall_clock, vcpu_time, &ts);
+        pvclock_read_wallclock(&wall_clock, vcpu_time, now);
 
         preempt_enable();
-
-        return ts.tv_sec;
 }
 
-static int kvm_set_wallclock(unsigned long now)
+static int kvm_set_wallclock(const struct timespec *now)
 {
         return -1;
 }
@@ -185,7 +182,7 @@ static void kvm_restore_sched_clock_state(void)
 }
 
 #ifdef CONFIG_X86_LOCAL_APIC
-static void __cpuinit kvm_setup_secondary_clock(void)
+static void kvm_setup_secondary_clock(void)
 {
         /*
          * Now that the first cpu already had this clocksource initialized,
diff --git a/arch/x86/kernel/microcode_amd_early.c b/arch/x86/kernel/microcode_amd_early.c
index 1ac6e9aee766..1d14ffee5749 100644
--- a/arch/x86/kernel/microcode_amd_early.c
+++ b/arch/x86/kernel/microcode_amd_early.c
@@ -82,7 +82,7 @@ static struct cpio_data __init find_ucode_in_initrd(void)
  * load_microcode_amd() to save equivalent cpu table and microcode patches in
  * kernel heap memory.
  */
-static void __cpuinit apply_ucode_in_initrd(void *ucode, size_t size)
+static void apply_ucode_in_initrd(void *ucode, size_t size)
 {
         struct equiv_cpu_entry *eq;
         u32 *header;
@@ -206,7 +206,7 @@ u8 amd_bsp_mpb[MPB_MAX_SIZE];
  * save_microcode_in_initrd_amd() BSP's patch is copied to amd_bsp_mpb, which
  * is used upon resume from suspend.
  */
-void __cpuinit load_ucode_amd_ap(void)
+void load_ucode_amd_ap(void)
 {
         struct microcode_amd *mc;
         unsigned long *initrd;
@@ -238,7 +238,7 @@ static void __init collect_cpu_sig_on_bsp(void *arg)
         uci->cpu_sig.sig = cpuid_eax(0x00000001);
 }
 #else
-static void __cpuinit collect_cpu_info_amd_early(struct cpuinfo_x86 *c,
+static void collect_cpu_info_amd_early(struct cpuinfo_x86 *c,
                                                  struct ucode_cpu_info *uci)
 {
         u32 rev, eax;
@@ -252,7 +252,7 @@ static void __cpuinit collect_cpu_info_amd_early(struct cpuinfo_x86 *c,
         c->x86 = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
 }
 
-void __cpuinit load_ucode_amd_ap(void)
+void load_ucode_amd_ap(void)
 {
         unsigned int cpu = smp_processor_id();
 
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 22db92bbdf1a..15c987698b0f 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -468,7 +468,7 @@ static struct syscore_ops mc_syscore_ops = {
         .resume                 = mc_bp_resume,
 };
 
-static __cpuinit int
+static int
 mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
diff --git a/arch/x86/kernel/microcode_core_early.c b/arch/x86/kernel/microcode_core_early.c
index 86119f63db0c..be7f8514f577 100644
--- a/arch/x86/kernel/microcode_core_early.c
+++ b/arch/x86/kernel/microcode_core_early.c
@@ -41,7 +41,7 @@
  *
  * x86_vendor() gets vendor information directly through cpuid.
  */
-static int __cpuinit x86_vendor(void)
+static int x86_vendor(void)
 {
         u32 eax = 0x00000000;
         u32 ebx, ecx = 0, edx;
@@ -57,7 +57,7 @@ static int __cpuinit x86_vendor(void)
         return X86_VENDOR_UNKNOWN;
 }
 
-static int __cpuinit x86_family(void)
+static int x86_family(void)
 {
         u32 eax = 0x00000001;
         u32 ebx, ecx = 0, edx;
@@ -96,7 +96,7 @@ void __init load_ucode_bsp(void)
         }
 }
 
-void __cpuinit load_ucode_ap(void)
+void load_ucode_ap(void)
 {
         int vendor, x86;
 
diff --git a/arch/x86/kernel/microcode_intel_early.c b/arch/x86/kernel/microcode_intel_early.c
index dabef95506f3..1575deb2e636 100644
--- a/arch/x86/kernel/microcode_intel_early.c
+++ b/arch/x86/kernel/microcode_intel_early.c
@@ -34,7 +34,7 @@ struct mc_saved_data {
         struct microcode_intel **mc_saved;
 } mc_saved_data;
 
-static enum ucode_state __cpuinit
+static enum ucode_state
 generic_load_microcode_early(struct microcode_intel **mc_saved_p,
                              unsigned int mc_saved_count,
                              struct ucode_cpu_info *uci)
@@ -69,7 +69,7 @@ out:
         return state;
 }
 
-static void __cpuinit
+static void
 microcode_pointer(struct microcode_intel **mc_saved,
                   unsigned long *mc_saved_in_initrd,
                   unsigned long initrd_start, int mc_saved_count)
@@ -82,7 +82,7 @@ microcode_pointer(struct microcode_intel **mc_saved,
 }
 
 #ifdef CONFIG_X86_32
-static void __cpuinit
+static void
 microcode_phys(struct microcode_intel **mc_saved_tmp,
                struct mc_saved_data *mc_saved_data)
 {
@@ -101,7 +101,7 @@ microcode_phys(struct microcode_intel **mc_saved_tmp,
 }
 #endif
 
-static enum ucode_state __cpuinit
+static enum ucode_state
 load_microcode(struct mc_saved_data *mc_saved_data,
                unsigned long *mc_saved_in_initrd,
                unsigned long initrd_start,
@@ -375,7 +375,7 @@ do {						\
 #define native_wrmsr(msr, low, high)            \
         native_write_msr(msr, low, high);
 
-static int __cpuinit collect_cpu_info_early(struct ucode_cpu_info *uci)
+static int collect_cpu_info_early(struct ucode_cpu_info *uci)
 {
         unsigned int val[2];
         u8 x86, x86_model;
@@ -584,7 +584,7 @@ scan_microcode(unsigned long start, unsigned long end,
 /*
  * Print ucode update info.
  */
-static void __cpuinit
+static void
 print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
 {
         int cpu = smp_processor_id();
@@ -605,7 +605,7 @@ static int current_mc_date;
 /*
  * Print early updated ucode info after printk works. This is delayed info dump.
  */
-void __cpuinit show_ucode_info_early(void)
+void show_ucode_info_early(void)
 {
         struct ucode_cpu_info uci;
 
@@ -621,7 +621,7 @@ void __cpuinit show_ucode_info_early(void)
  * mc_saved_data.mc_saved and delay printing microcode info in
  * show_ucode_info_early() until printk() works.
  */
-static void __cpuinit print_ucode(struct ucode_cpu_info *uci)
+static void print_ucode(struct ucode_cpu_info *uci)
 {
         struct microcode_intel *mc_intel;
         int *delay_ucode_info_p;
@@ -643,12 +643,12 @@ static void __cpuinit print_ucode(struct ucode_cpu_info *uci)
  * Flush global tlb. We only do this in x86_64 where paging has been enabled
  * already and PGE should be enabled as well.
  */
-static inline void __cpuinit flush_tlb_early(void)
+static inline void flush_tlb_early(void)
 {
         __native_flush_tlb_global_irq_disabled();
 }
 
-static inline void __cpuinit print_ucode(struct ucode_cpu_info *uci)
+static inline void print_ucode(struct ucode_cpu_info *uci)
 {
         struct microcode_intel *mc_intel;
 
@@ -660,8 +660,8 @@ static inline void __cpuinit print_ucode(struct ucode_cpu_info *uci)
 }
 #endif
 
-static int __cpuinit apply_microcode_early(struct mc_saved_data *mc_saved_data,
-                                           struct ucode_cpu_info *uci)
+static int apply_microcode_early(struct mc_saved_data *mc_saved_data,
+                                 struct ucode_cpu_info *uci)
 {
         struct microcode_intel *mc_intel;
         unsigned int val[2];
@@ -763,7 +763,7 @@ load_ucode_intel_bsp(void)
 #endif
 }
 
-void __cpuinit load_ucode_intel_ap(void)
+void load_ucode_intel_ap(void)
 {
         struct mc_saved_data *mc_saved_data_p;
         struct ucode_cpu_info uci;
diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c
index ac861b8348e2..f4c886d9165c 100644
--- a/arch/x86/kernel/mmconf-fam10h_64.c
+++ b/arch/x86/kernel/mmconf-fam10h_64.c
@@ -24,14 +24,14 @@ struct pci_hostbridge_probe {
         u32 device;
 };
 
-static u64 __cpuinitdata fam10h_pci_mmconf_base;
+static u64 fam10h_pci_mmconf_base;
 
-static struct pci_hostbridge_probe pci_probes[] __cpuinitdata = {
+static struct pci_hostbridge_probe pci_probes[] = {
         { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 },
         { 0xff, 0, PCI_VENDOR_ID_AMD, 0x1200 },
 };
 
-static int __cpuinit cmp_range(const void *x1, const void *x2)
+static int cmp_range(const void *x1, const void *x2)
 {
         const struct range *r1 = x1;
         const struct range *r2 = x2;
@@ -49,7 +49,7 @@ static int __cpuinit cmp_range(const void *x1, const void *x2)
 /* need to avoid (0xfd<<32), (0xfe<<32), and (0xff<<32), ht used space */
 #define FAM10H_PCI_MMCONF_BASE (0xfcULL<<32)
 #define BASE_VALID(b) ((b) + MMCONF_SIZE <= (0xfdULL<<32) || (b) >= (1ULL<<40))
-static void __cpuinit get_fam10h_pci_mmconf_base(void)
+static void get_fam10h_pci_mmconf_base(void)
 {
         int i;
         unsigned bus;
@@ -166,7 +166,7 @@ out:
         fam10h_pci_mmconf_base = base;
 }
 
-void __cpuinit fam10h_check_enable_mmcfg(void)
+void fam10h_check_enable_mmcfg(void)
 {
         u64 val;
         u32 address;
@@ -230,7 +230,7 @@ static const struct dmi_system_id __initconst mmconf_dmi_table[] = {
         {}
 };
 
-/* Called from a __cpuinit function, but only on the BSP. */
+/* Called from a non __init function, but only on the BSP. */
 void __ref check_enable_amd_mmconf_dmi(void)
 {
         dmi_check_system(mmconf_dmi_table);
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index ce130493b802..88458faea2f8 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -200,7 +200,7 @@ static const struct file_operations msr_fops = {
         .compat_ioctl = msr_ioctl,
 };
 
-static int __cpuinit msr_device_create(int cpu)
+static int msr_device_create(int cpu)
 {
         struct device *dev;
 
@@ -214,8 +214,8 @@ static void msr_device_destroy(int cpu)
         device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
 }
 
-static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb,
-                                unsigned long action, void *hcpu)
+static int msr_class_cpu_callback(struct notifier_block *nfb,
+                                  unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
         int err = 0;
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index 0920212e6159..ba77ebc2c353 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -111,7 +111,7 @@ static int __kprobes nmi_handle(unsigned int type, struct pt_regs *regs, bool b2
          */
         list_for_each_entry_rcu(a, &desc->head, list) {
                 u64 before, delta, whole_msecs;
-                int decimal_msecs, thishandled;
+                int remainder_ns, decimal_msecs, thishandled;
 
                 before = local_clock();
                 thishandled = a->handler(type, regs);
@@ -123,8 +123,9 @@ static int __kprobes nmi_handle(unsigned int type, struct pt_regs *regs, bool b2
                         continue;
 
                 nmi_longest_ns = delta;
-                whole_msecs = do_div(delta, (1000 * 1000));
-                decimal_msecs = do_div(delta, 1000) % 1000;
+                whole_msecs = delta;
+                remainder_ns = do_div(whole_msecs, (1000 * 1000));
+                decimal_msecs = remainder_ns / 1000;
                 printk_ratelimited(KERN_INFO
                         "INFO: NMI handler (%ps) took too long to run: "
                         "%lld.%03d msecs\n", a->handler, whole_msecs,
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 81a5f5e8f142..83369e5a1d27 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -398,7 +398,7 @@ static void amd_e400_idle(void)
                 default_idle();
 }
 
-void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
+void select_idle_routine(const struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_SMP
         if (boot_option_idle_override == IDLE_POLL && smp_num_siblings > 1)
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 29a8120e6fe8..7461f50d5bb1 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -601,30 +601,48 @@ static unsigned long ptrace_get_dr7(struct perf_event *bp[])
         return dr7;
 }
 
-static int
-ptrace_modify_breakpoint(struct perf_event *bp, int len, int type,
-                         struct task_struct *tsk, int disabled)
+static int ptrace_fill_bp_fields(struct perf_event_attr *attr,
+                                        int len, int type, bool disabled)
+{
+        int err, bp_len, bp_type;
+
+        err = arch_bp_generic_fields(len, type, &bp_len, &bp_type);
+        if (!err) {
+                attr->bp_len = bp_len;
+                attr->bp_type = bp_type;
+                attr->disabled = disabled;
+        }
+
+        return err;
+}
+
+static struct perf_event *
+ptrace_register_breakpoint(struct task_struct *tsk, int len, int type,
+                                unsigned long addr, bool disabled)
 {
-        int err;
-        int gen_len, gen_type;
         struct perf_event_attr attr;
+        int err;
 
-        /*
-         * We should have at least an inactive breakpoint at this
-         * slot. It means the user is writing dr7 without having
-         * written the address register first
-         */
-        if (!bp)
-                return -EINVAL;
+        ptrace_breakpoint_init(&attr);
+        attr.bp_addr = addr;
 
-        err = arch_bp_generic_fields(len, type, &gen_len, &gen_type);
+        err = ptrace_fill_bp_fields(&attr, len, type, disabled);
         if (err)
-                return err;
+                return ERR_PTR(err);
+
+        return register_user_hw_breakpoint(&attr, ptrace_triggered,
+                                                 NULL, tsk);
+}
 
-        attr = bp->attr;
-        attr.bp_len = gen_len;
-        attr.bp_type = gen_type;
-        attr.disabled = disabled;
+static int ptrace_modify_breakpoint(struct perf_event *bp, int len, int type,
+                                        int disabled)
+{
+        struct perf_event_attr attr = bp->attr;
+        int err;
+
+        err = ptrace_fill_bp_fields(&attr, len, type, disabled);
+        if (err)
+                return err;
 
         return modify_user_hw_breakpoint(bp, &attr);
 }
@@ -634,67 +652,50 @@ ptrace_modify_breakpoint(struct perf_event *bp, int len, int type,
  */
 static int ptrace_write_dr7(struct task_struct *tsk, unsigned long data)
 {
-        struct thread_struct *thread = &(tsk->thread);
+        struct thread_struct *thread = &tsk->thread;
         unsigned long old_dr7;
-        int i, orig_ret = 0, rc = 0;
-        int enabled, second_pass = 0;
-        unsigned len, type;
-        struct perf_event *bp;
-
-        if (ptrace_get_breakpoints(tsk) < 0)
-                return -ESRCH;
+        bool second_pass = false;
+        int i, rc, ret = 0;
 
         data &= ~DR_CONTROL_RESERVED;
         old_dr7 = ptrace_get_dr7(thread->ptrace_bps);
+
 restore:
-        /*
-         * Loop through all the hardware breakpoints, making the
-         * appropriate changes to each.
-         */
+        rc = 0;
         for (i = 0; i < HBP_NUM; i++) {
-                enabled = decode_dr7(data, i, &len, &type);
-                bp = thread->ptrace_bps[i];
-
-                if (!enabled) {
-                        if (bp) {
-                                /*
-                                 * Don't unregister the breakpoints right-away,
-                                 * unless all register_user_hw_breakpoint()
-                                 * requests have succeeded. This prevents
-                                 * any window of opportunity for debug
-                                 * register grabbing by other users.
-                                 */
-                                if (!second_pass)
-                                        continue;
-
-                                rc = ptrace_modify_breakpoint(bp, len, type,
-                                                              tsk, 1);
-                                if (rc)
-                                        break;
+                unsigned len, type;
+                bool disabled = !decode_dr7(data, i, &len, &type);
+                struct perf_event *bp = thread->ptrace_bps[i];
+
+                if (!bp) {
+                        if (disabled)
+                                continue;
+
+                        bp = ptrace_register_breakpoint(tsk,
+                                        len, type, 0, disabled);
+                        if (IS_ERR(bp)) {
+                                rc = PTR_ERR(bp);
+                                break;
                         }
+
+                        thread->ptrace_bps[i] = bp;
                         continue;
                 }
 
-                rc = ptrace_modify_breakpoint(bp, len, type, tsk, 0);
+                rc = ptrace_modify_breakpoint(bp, len, type, disabled);
                 if (rc)
                         break;
         }
-        /*
-         * Make a second pass to free the remaining unused breakpoints
-         * or to restore the original breakpoints if an error occurred.
-         */
-        if (!second_pass) {
-                second_pass = 1;
-                if (rc < 0) {
-                        orig_ret = rc;
-                        data = old_dr7;
-                }
+
+        /* Restore if the first pass failed, second_pass shouldn't fail. */
+        if (rc && !WARN_ON(second_pass)) {
+                ret = rc;
+                data = old_dr7;
+                second_pass = true;
                 goto restore;
         }
 
-        ptrace_put_breakpoints(tsk);
-
-        return ((orig_ret < 0) ? orig_ret : rc);
+        return ret;
 }
 
 /*
@@ -702,25 +703,17 @@ restore:
  */
 static unsigned long ptrace_get_debugreg(struct task_struct *tsk, int n)
 {
-        struct thread_struct *thread = &(tsk->thread);
+        struct thread_struct *thread = &tsk->thread;
         unsigned long val = 0;
 
         if (n < HBP_NUM) {
-                struct perf_event *bp;
+                struct perf_event *bp = thread->ptrace_bps[n];
 
-                if (ptrace_get_breakpoints(tsk) < 0)
-                        return -ESRCH;
-
-                bp = thread->ptrace_bps[n];
-                if (!bp)
-                        val = 0;
-                else
+                if (bp)
                         val = bp->hw.info.address;
-
-                ptrace_put_breakpoints(tsk);
         } else if (n == 6) {
                 val = thread->debugreg6;
-         } else if (n == 7) {
+        } else if (n == 7) {
                 val = thread->ptrace_dr7;
         }
         return val;
@@ -729,29 +722,14 @@ static unsigned long ptrace_get_debugreg(struct task_struct *tsk, int n)
 static int ptrace_set_breakpoint_addr(struct task_struct *tsk, int nr,
                                       unsigned long addr)
 {
-        struct perf_event *bp;
         struct thread_struct *t = &tsk->thread;
-        struct perf_event_attr attr;
+        struct perf_event *bp = t->ptrace_bps[nr];
         int err = 0;
 
-        if (ptrace_get_breakpoints(tsk) < 0)
-                return -ESRCH;
-
-        if (!t->ptrace_bps[nr]) {
-                ptrace_breakpoint_init(&attr);
-                /*
-                 * Put stub len and type to register (reserve) an inactive but
-                 * correct bp
-                 */
-                attr.bp_addr = addr;
-                attr.bp_len = HW_BREAKPOINT_LEN_1;
-                attr.bp_type = HW_BREAKPOINT_W;
-                attr.disabled = 1;
-
-                bp = register_user_hw_breakpoint(&attr, ptrace_triggered,
-                                                 NULL, tsk);
-
+        if (!bp) {
                 /*
+                 * Put stub len and type to create an inactive but correct bp.
+                 *
                  * CHECKME: the previous code returned -EIO if the addr wasn't
                  * a valid task virtual addr. The new one will return -EINVAL in
                  *  this case.
@@ -760,22 +738,20 @@ static int ptrace_set_breakpoint_addr(struct task_struct *tsk, int nr,
                  * writing for the user. And anyway this is the previous
                  * behaviour.
                  */
-                if (IS_ERR(bp)) {
+                bp = ptrace_register_breakpoint(tsk,
+                                X86_BREAKPOINT_LEN_1, X86_BREAKPOINT_WRITE,
+                                addr, true);
+                if (IS_ERR(bp))
                         err = PTR_ERR(bp);
-                        goto put;
-                }
-
-                t->ptrace_bps[nr] = bp;
+                else
+                        t->ptrace_bps[nr] = bp;
         } else {
-                bp = t->ptrace_bps[nr];
+                struct perf_event_attr attr = bp->attr;
 
-                attr = bp->attr;
                 attr.bp_addr = addr;
                 err = modify_user_hw_breakpoint(bp, &attr);
         }
 
-put:
-        ptrace_put_breakpoints(tsk);
         return err;
 }
 
@@ -785,30 +761,20 @@ put:
 static int ptrace_set_debugreg(struct task_struct *tsk, int n,
                                unsigned long val)
 {
-        struct thread_struct *thread = &(tsk->thread);
-        int rc = 0;
-
+        struct thread_struct *thread = &tsk->thread;
         /* There are no DR4 or DR5 registers */
-        if (n == 4 || n == 5)
-                return -EIO;
+        int rc = -EIO;
 
-        if (n == 6) {
-                thread->debugreg6 = val;
-                goto ret_path;
-        }
         if (n < HBP_NUM) {
                 rc = ptrace_set_breakpoint_addr(tsk, n, val);
-                if (rc)
-                        return rc;
-        }
-        /* All that's left is DR7 */
-        if (n == 7) {
+        } else if (n == 6) {
+                thread->debugreg6 = val;
+                rc = 0;
+        } else if (n == 7) {
                 rc = ptrace_write_dr7(tsk, val);
                 if (!rc)
                         thread->ptrace_dr7 = val;
         }
-
-ret_path:
         return rc;
 }
 
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 76fa1e9a2b39..563ed91e6faa 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -36,22 +36,6 @@ void (*pm_power_off)(void);
 EXPORT_SYMBOL(pm_power_off);
 
 static const struct desc_ptr no_idt = {};
-static int reboot_mode;
-enum reboot_type reboot_type = BOOT_ACPI;
-int reboot_force;
-
-/*
- * This variable is used privately to keep track of whether or not
- * reboot_type is still set to its default value (i.e., reboot= hasn't
- * been set on the command line).  This is needed so that we can
- * suppress DMI scanning for reboot quirks.  Without it, it's
- * impossible to override a faulty reboot quirk without recompiling.
- */
-static int reboot_default = 1;
-
-#ifdef CONFIG_SMP
-static int reboot_cpu = -1;
-#endif
 
 /*
  * This is set if we need to go through the 'emergency' path.
@@ -64,79 +48,6 @@ static int reboot_emergency;
 bool port_cf9_safe = false;
 
 /*
- * reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
- * warm   Don't set the cold reboot flag
- * cold   Set the cold reboot flag
- * bios   Reboot by jumping through the BIOS
- * smp    Reboot by executing reset on BSP or other CPU
- * triple Force a triple fault (init)
- * kbd    Use the keyboard controller. cold reset (default)
- * acpi   Use the RESET_REG in the FADT
- * efi    Use efi reset_system runtime service
- * pci    Use the so-called "PCI reset register", CF9
- * force  Avoid anything that could hang.
- */
-static int __init reboot_setup(char *str)
-{
-        for (;;) {
-                /*
-                 * Having anything passed on the command line via
-                 * reboot= will cause us to disable DMI checking
-                 * below.
-                 */
-                reboot_default = 0;
-
-                switch (*str) {
-                case 'w':
-                        reboot_mode = 0x1234;
-                        break;
-
-                case 'c':
-                        reboot_mode = 0;
-                        break;
-
-#ifdef CONFIG_SMP
-                case 's':
-                        if (isdigit(*(str+1))) {
-                                reboot_cpu = (int) (*(str+1) - '0');
-                                if (isdigit(*(str+2)))
-                                        reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
-                        }
-                        /*
-                         * We will leave sorting out the final value
-                         * when we are ready to reboot, since we might not
-                         * have detected BSP APIC ID or smp_num_cpu
-                         */
-                        break;
-#endif /* CONFIG_SMP */
-
-                case 'b':
-                case 'a':
-                case 'k':
-                case 't':
-                case 'e':
-                case 'p':
-                        reboot_type = *str;
-                        break;
-
-                case 'f':
-                        reboot_force = 1;
-                        break;
-                }
-
-                str = strchr(str, ',');
-                if (str)
-                        str++;
-                else
-                        break;
-        }
-        return 1;
-}
-
-__setup("reboot=", reboot_setup);
-
-
-/*
  * Reboot options and system auto-detection code provided by
  * Dell Inc. so their systems "just work". :-)
  */
@@ -536,6 +447,7 @@ static void native_machine_emergency_restart(void)
         int i;
         int attempt = 0;
         int orig_reboot_type = reboot_type;
+        unsigned short mode;
 
         if (reboot_emergency)
                 emergency_vmx_disable_all();
@@ -543,7 +455,8 @@ static void native_machine_emergency_restart(void)
         tboot_shutdown(TB_SHUTDOWN_REBOOT);
 
         /* Tell the BIOS if we want cold or warm reboot */
-        *((unsigned short *)__va(0x472)) = reboot_mode;
+        mode = reboot_mode == REBOOT_WARM ? 0x1234 : 0;
+        *((unsigned short *)__va(0x472)) = mode;
 
         for (;;) {
                 /* Could also try the reset bit in the Hammer NB */
@@ -585,7 +498,7 @@ static void native_machine_emergency_restart(void)
 
                 case BOOT_EFI:
                         if (efi_enabled(EFI_RUNTIME_SERVICES))
-                                efi.reset_system(reboot_mode ?
+                                efi.reset_system(reboot_mode == REBOOT_WARM ?
                                                  EFI_RESET_WARM :
                                                  EFI_RESET_COLD,
                                                  EFI_SUCCESS, 0, NULL);
@@ -614,26 +527,10 @@ void native_machine_shutdown(void)
 {
         /* Stop the cpus and apics */
 #ifdef CONFIG_SMP
-
-        /* The boot cpu is always logical cpu 0 */
-        int reboot_cpu_id = 0;
-
-        /* See if there has been given a command line override */
-        if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
-                cpu_online(reboot_cpu))
-                reboot_cpu_id = reboot_cpu;
-
-        /* Make certain the cpu I'm about to reboot on is online */
-        if (!cpu_online(reboot_cpu_id))
-                reboot_cpu_id = smp_processor_id();
-
-        /* Make certain I only run on the appropriate processor */
-        set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
-
         /*
-         * O.K Now that I'm on the appropriate processor, stop all of the
-         * others. Also disable the local irq to not receive the per-cpu
-         * timer interrupt which may trigger scheduler's load balance.
+         * Stop all of the others. Also disable the local irq to
+         * not receive the per-cpu timer interrupt which may trigger
+         * scheduler's load balance.
          */
         local_irq_disable();
         stop_other_cpus();
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 198eb201ed3b..0aa29394ed6f 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -38,8 +38,9 @@ EXPORT_SYMBOL(rtc_lock);
  * jump to the next second precisely 500 ms later. Check the Motorola
  * MC146818A or Dallas DS12887 data sheet for details.
  */
-int mach_set_rtc_mmss(unsigned long nowtime)
+int mach_set_rtc_mmss(const struct timespec *now)
 {
+        unsigned long nowtime = now->tv_sec;
         struct rtc_time tm;
         int retval = 0;
 
@@ -58,7 +59,7 @@ int mach_set_rtc_mmss(unsigned long nowtime)
         return retval;
 }
 
-unsigned long mach_get_cmos_time(void)
+void mach_get_cmos_time(struct timespec *now)
 {
         unsigned int status, year, mon, day, hour, min, sec, century = 0;
         unsigned long flags;
@@ -107,7 +108,8 @@ unsigned long mach_get_cmos_time(void)
         } else
                 year += CMOS_YEARS_OFFS;
 
-        return mktime(year, mon, day, hour, min, sec);
+        now->tv_sec = mktime(year, mon, day, hour, min, sec);
+        now->tv_nsec = 0;
 }
 
 /* Routines for accessing the CMOS RAM/RTC. */
@@ -135,18 +137,13 @@ EXPORT_SYMBOL(rtc_cmos_write);
 
 int update_persistent_clock(struct timespec now)
 {
-        return x86_platform.set_wallclock(now.tv_sec);
+        return x86_platform.set_wallclock(&now);
 }
 
 /* not static: needed by APM */
 void read_persistent_clock(struct timespec *ts)
 {
-        unsigned long retval;
-
-        retval = x86_platform.get_wallclock();
-
-        ts->tv_sec = retval;
-        ts->tv_nsec = 0;
+        x86_platform.get_wallclock(ts);
 }
 
 
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index e68709da8251..f8ec57815c05 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -170,7 +170,7 @@ static struct resource bss_resource = {
 
 #ifdef CONFIG_X86_32
 /* cpu data as detected by the assembly code in head.S */
-struct cpuinfo_x86 new_cpu_data __cpuinitdata = {
+struct cpuinfo_x86 new_cpu_data = {
         .wp_works_ok = -1,
 };
 /* common cpu data for all cpus */
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index f4fe0b8879e0..cdaa347dfcad 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -265,23 +265,30 @@ void smp_reschedule_interrupt(struct pt_regs *regs)
          */
 }
 
-void smp_trace_reschedule_interrupt(struct pt_regs *regs)
+static inline void smp_entering_irq(void)
 {
         ack_APIC_irq();
+        irq_enter();
+}
+
+void smp_trace_reschedule_interrupt(struct pt_regs *regs)
+{
+        /*
+         * Need to call irq_enter() before calling the trace point.
+         * __smp_reschedule_interrupt() calls irq_enter/exit() too (in
+         * scheduler_ipi(). This is OK, since those functions are allowed
+         * to nest.
+         */
+        smp_entering_irq();
         trace_reschedule_entry(RESCHEDULE_VECTOR);
         __smp_reschedule_interrupt();
         trace_reschedule_exit(RESCHEDULE_VECTOR);
+        exiting_irq();
         /*
          * KVM uses this interrupt to force a cpu out of guest mode
          */
 }
 
-static inline void call_function_entering_irq(void)
-{
-        ack_APIC_irq();
-        irq_enter();
-}
-
 static inline void __smp_call_function_interrupt(void)
 {
         generic_smp_call_function_interrupt();
@@ -290,14 +297,14 @@ static inline void __smp_call_function_interrupt(void)
 
 void smp_call_function_interrupt(struct pt_regs *regs)
 {
-        call_function_entering_irq();
+        smp_entering_irq();
         __smp_call_function_interrupt();
         exiting_irq();
 }
 
 void smp_trace_call_function_interrupt(struct pt_regs *regs)
 {
-        call_function_entering_irq();
+        smp_entering_irq();
         trace_call_function_entry(CALL_FUNCTION_VECTOR);
         __smp_call_function_interrupt();
         trace_call_function_exit(CALL_FUNCTION_VECTOR);
@@ -312,14 +319,14 @@ static inline void __smp_call_function_single_interrupt(void)
 
 void smp_call_function_single_interrupt(struct pt_regs *regs)
 {
-        call_function_entering_irq();
+        smp_entering_irq();
         __smp_call_function_single_interrupt();
         exiting_irq();
 }
 
 void smp_trace_call_function_single_interrupt(struct pt_regs *regs)
 {
-        call_function_entering_irq();
+        smp_entering_irq();
         trace_call_function_single_entry(CALL_FUNCTION_SINGLE_VECTOR);
         __smp_call_function_single_interrupt();
         trace_call_function_single_exit(CALL_FUNCTION_SINGLE_VECTOR);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index bfd348e99369..aecc98a93d1b 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -130,7 +130,7 @@ atomic_t init_deasserted;
  * Report back to the Boot Processor during boot time or to the caller processor
  * during CPU online.
  */
-static void __cpuinit smp_callin(void)
+static void smp_callin(void)
 {
         int cpuid, phys_id;
         unsigned long timeout;
@@ -237,7 +237,7 @@ static int enable_start_cpu0;
 /*
  * Activate a secondary processor.
  */
-notrace static void __cpuinit start_secondary(void *unused)
+static void notrace start_secondary(void *unused)
 {
         /*
          * Don't put *anything* before cpu_init(), SMP booting is too
@@ -300,7 +300,7 @@ void __init smp_store_boot_cpu_info(void)
  * The bootstrap kernel entry code has set these up. Save them for
  * a given CPU
  */
-void __cpuinit smp_store_cpu_info(int id)
+void smp_store_cpu_info(int id)
 {
         struct cpuinfo_x86 *c = &cpu_data(id);
 
@@ -313,7 +313,7 @@ void __cpuinit smp_store_cpu_info(int id)
         identify_secondary_cpu(c);
 }
 
-static bool __cpuinit
+static bool
 topology_sane(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o, const char *name)
 {
         int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
@@ -330,7 +330,7 @@ do {									\
         cpumask_set_cpu((c2), cpu_##_m##_mask(c1));                     \
 } while (0)
 
-static bool __cpuinit match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
+static bool match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 {
         if (cpu_has_topoext) {
                 int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
@@ -348,7 +348,7 @@ static bool __cpuinit match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
         return false;
 }
 
-static bool __cpuinit match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
+static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 {
         int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
 
@@ -359,7 +359,7 @@ static bool __cpuinit match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
         return false;
 }
 
-static bool __cpuinit match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
+static bool match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 {
         if (c->phys_proc_id == o->phys_proc_id) {
                 if (cpu_has(c, X86_FEATURE_AMD_DCM))
@@ -370,7 +370,7 @@ static bool __cpuinit match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
         return false;
 }
 
-void __cpuinit set_cpu_sibling_map(int cpu)
+void set_cpu_sibling_map(int cpu)
 {
         bool has_smt = smp_num_siblings > 1;
         bool has_mp = has_smt || boot_cpu_data.x86_max_cores > 1;
@@ -499,7 +499,7 @@ void __inquire_remote_apic(int apicid)
  * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
  * won't ... remember to clear down the APIC, etc later.
  */
-int __cpuinit
+int
 wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
 {
         unsigned long send_status, accept_status = 0;
@@ -533,7 +533,7 @@ wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
         return (send_status | accept_status);
 }
 
-static int __cpuinit
+static int
 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
 {
         unsigned long send_status, accept_status = 0;
@@ -649,7 +649,7 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
 }
 
 /* reduce the number of lines printed when booting a large cpu count system */
-static void __cpuinit announce_cpu(int cpu, int apicid)
+static void announce_cpu(int cpu, int apicid)
 {
         static int current_node = -1;
         int node = early_cpu_to_node(cpu);
@@ -691,7 +691,7 @@ static int wakeup_cpu0_nmi(unsigned int cmd, struct pt_regs *regs)
  * We'll change this code in the future to wake up hard offlined CPU0 if
  * real platform and request are available.
  */
-static int __cpuinit
+static int
 wakeup_cpu_via_init_nmi(int cpu, unsigned long start_ip, int apicid,
                int *cpu0_nmi_registered)
 {
@@ -731,7 +731,7 @@ wakeup_cpu_via_init_nmi(int cpu, unsigned long start_ip, int apicid,
  * Returns zero if CPU booted OK, else error code from
  * ->wakeup_secondary_cpu.
  */
-static int __cpuinit do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
+static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
 {
         volatile u32 *trampoline_status =
                 (volatile u32 *) __va(real_mode_header->trampoline_status);
@@ -872,7 +872,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
         return boot_error;
 }
 
-int __cpuinit native_cpu_up(unsigned int cpu, struct task_struct *tidle)
+int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         int apicid = apic->cpu_present_to_apicid(cpu);
         unsigned long flags;
diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c
index 3ff42d2f046d..addf7b58f4e8 100644
--- a/arch/x86/kernel/tboot.c
+++ b/arch/x86/kernel/tboot.c
@@ -320,8 +320,8 @@ static int tboot_wait_for_aps(int num_aps)
         return !(atomic_read((atomic_t *)&tboot->num_in_wfs) == num_aps);
 }
 
-static int __cpuinit tboot_cpu_callback(struct notifier_block *nfb,
-                        unsigned long action, void *hcpu)
+static int tboot_cpu_callback(struct notifier_block *nfb, unsigned long action,
+                              void *hcpu)
 {
         switch (action) {
         case CPU_DYING:
@@ -334,7 +334,7 @@ static int __cpuinit tboot_cpu_callback(struct notifier_block *nfb,
         return NOTIFY_OK;
 }
 
-static struct notifier_block tboot_cpu_notifier __cpuinitdata =
+static struct notifier_block tboot_cpu_notifier =
 {
         .notifier_call = tboot_cpu_callback,
 };
diff --git a/arch/x86/kernel/tracepoint.c b/arch/x86/kernel/tracepoint.c
index 4e584a8d6edd..1c113db9ed57 100644
--- a/arch/x86/kernel/tracepoint.c
+++ b/arch/x86/kernel/tracepoint.c
@@ -12,10 +12,8 @@ atomic_t trace_idt_ctr = ATOMIC_INIT(0);
 struct desc_ptr trace_idt_descr = { NR_VECTORS * 16 - 1,
                                 (unsigned long) trace_idt_table };
 
-#ifndef CONFIG_X86_64
-gate_desc trace_idt_table[NR_VECTORS] __page_aligned_data
-                                        = { { { { 0, 0 } } }, };
-#endif
+/* No need to be aligned, but done to keep all IDTs defined the same way. */
+gate_desc trace_idt_table[NR_VECTORS] __page_aligned_bss;
 
 static int trace_irq_vector_refcount;
 static DEFINE_MUTEX(irq_vector_mutex);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index b0865e88d3cc..1b23a1c92746 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -63,19 +63,19 @@
 #include <asm/x86_init.h>
 #include <asm/pgalloc.h>
 #include <asm/proto.h>
+
+/* No need to be aligned, but done to keep all IDTs defined the same way. */
+gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
 #else
 #include <asm/processor-flags.h>
 #include <asm/setup.h>
 
 asmlinkage int system_call(void);
-
-/*
- * The IDT has to be page-aligned to simplify the Pentium
- * F0 0F bug workaround.
- */
-gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
 #endif
 
+/* Must be page-aligned because the real IDT is used in a fixmap. */
+gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
+
 DECLARE_BITMAP(used_vectors, NR_VECTORS);
 EXPORT_SYMBOL_GPL(used_vectors);
 
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 098b3cfda72e..6ff49247edf8 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -824,7 +824,7 @@ static void __init check_system_tsc_reliable(void)
  * Make an educated guess if the TSC is trustworthy and synchronized
  * over all CPUs.
  */
-__cpuinit int unsynchronized_tsc(void)
+int unsynchronized_tsc(void)
 {
         if (!cpu_has_tsc || tsc_unstable)
                 return 1;
@@ -1020,7 +1020,7 @@ void __init tsc_init(void)
  * been calibrated. This assumes that CONSTANT_TSC applies to all
  * cpus in the socket - this should be a safe assumption.
  */
-unsigned long __cpuinit calibrate_delay_is_known(void)
+unsigned long calibrate_delay_is_known(void)
 {
         int i, cpu = smp_processor_id();
 
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index fc25e60a5884..adfdf56a3714 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -25,24 +25,24 @@
  * Entry/exit counters that make sure that both CPUs
  * run the measurement code at once:
  */
-static __cpuinitdata atomic_t start_count;
-static __cpuinitdata atomic_t stop_count;
+static atomic_t start_count;
+static atomic_t stop_count;
 
 /*
  * We use a raw spinlock in this exceptional case, because
  * we want to have the fastest, inlined, non-debug version
  * of a critical section, to be able to prove TSC time-warps:
  */
-static __cpuinitdata arch_spinlock_t sync_lock = __ARCH_SPIN_LOCK_UNLOCKED;
+static arch_spinlock_t sync_lock = __ARCH_SPIN_LOCK_UNLOCKED;
 
-static __cpuinitdata cycles_t last_tsc;
-static __cpuinitdata cycles_t max_warp;
-static __cpuinitdata int nr_warps;
+static cycles_t last_tsc;
+static cycles_t max_warp;
+static int nr_warps;
 
 /*
  * TSC-warp measurement loop running on both CPUs:
  */
-static __cpuinit void check_tsc_warp(unsigned int timeout)
+static void check_tsc_warp(unsigned int timeout)
 {
         cycles_t start, now, prev, end;
         int i;
@@ -121,7 +121,7 @@ static inline unsigned int loop_timeout(int cpu)
  * Source CPU calls into this - it waits for the freshly booted
  * target CPU to arrive and then starts the measurement:
  */
-void __cpuinit check_tsc_sync_source(int cpu)
+void check_tsc_sync_source(int cpu)
 {
         int cpus = 2;
 
@@ -187,7 +187,7 @@ void __cpuinit check_tsc_sync_source(int cpu)
 /*
  * Freshly booted CPUs call into this:
  */
-void __cpuinit check_tsc_sync_target(void)
+void check_tsc_sync_target(void)
 {
         int cpus = 2;
 
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 9a907a67be8f..1f96f9347ed9 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -331,7 +331,7 @@ sigsegv:
  * Assume __initcall executes before all user space. Hopefully kmod
  * doesn't violate that. We'll find out if it does.
  */
-static void __cpuinit vsyscall_set_cpu(int cpu)
+static void vsyscall_set_cpu(int cpu)
 {
         unsigned long d;
         unsigned long node = 0;
@@ -353,13 +353,13 @@ static void __cpuinit vsyscall_set_cpu(int cpu)
         write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_PER_CPU, &d, DESCTYPE_S);
 }
 
-static void __cpuinit cpu_vsyscall_init(void *arg)
+static void cpu_vsyscall_init(void *arg)
 {
         /* preemption should be already off */
         vsyscall_set_cpu(raw_smp_processor_id());
 }
 
-static int __cpuinit
+static int
 cpu_vsyscall_notifier(struct notifier_block *n, unsigned long action, void *arg)
 {
         long cpu = (long)arg;
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 45a14dbbddaf..5f24c71accaa 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -25,7 +25,7 @@
 #include <asm/iommu.h>
 #include <asm/mach_traps.h>
 
-void __cpuinit x86_init_noop(void) { }
+void x86_init_noop(void) { }
 void __init x86_init_uint_noop(unsigned int unused) { }
 int __init iommu_init_noop(void) { return 0; }
 void iommu_shutdown_noop(void) { }
@@ -85,7 +85,7 @@ struct x86_init_ops x86_init __initdata = {
         },
 };
 
-struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
+struct x86_cpuinit_ops x86_cpuinit = {
         .early_percpu_clock_init        = x86_init_noop,
         .setup_percpu_clockev           = setup_secondary_APIC_clock,
 };
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c
index d6c28acdf99c..422fd8223470 100644
--- a/arch/x86/kernel/xsave.c
+++ b/arch/x86/kernel/xsave.c
@@ -573,7 +573,7 @@ static void __init xstate_enable_boot_cpu(void)
  * This is somewhat obfuscated due to the lack of powerful enough
  * overrides for the section checks.
  */
-void __cpuinit xsave_init(void)
+void xsave_init(void)
 {
         static __refdata void (*next_func)(void) = xstate_enable_boot_cpu;
         void (*this_func)(void);
@@ -594,7 +594,7 @@ static inline void __init eager_fpu_init_bp(void)
                 setup_init_fpu_buf();
 }
 
-void __cpuinit eager_fpu_init(void)
+void eager_fpu_init(void)
 {
         static __refdata void (*boot_func)(void) = eager_fpu_init_bp;
 
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 0d094da49541..9e9285ae9b94 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -2811,6 +2811,13 @@ exit:
 static bool page_fault_can_be_fast(struct kvm_vcpu *vcpu, u32 error_code)
 {
         /*
+         * Do not fix the mmio spte with invalid generation number which
+         * need to be updated by slow page fault path.
+         */
+        if (unlikely(error_code & PFERR_RSVD_MASK))
+                return false;
+
+        /*
          * #PF can be fast only if the shadow page table is present and it
          * is caused by write-protect, that means we just need change the
          * W bit of the spte which can be done out of mmu-lock.
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a7e18551c968..064d0be67ecc 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -3404,15 +3404,22 @@ static void vmx_get_segment(struct kvm_vcpu *vcpu,
         var->limit = vmx_read_guest_seg_limit(vmx, seg);
         var->selector = vmx_read_guest_seg_selector(vmx, seg);
         ar = vmx_read_guest_seg_ar(vmx, seg);
+        var->unusable = (ar >> 16) & 1;
         var->type = ar & 15;
         var->s = (ar >> 4) & 1;
         var->dpl = (ar >> 5) & 3;
-        var->present = (ar >> 7) & 1;
+        /*
+         * Some userspaces do not preserve unusable property. Since usable
+         * segment has to be present according to VMX spec we can use present
+         * property to amend userspace bug by making unusable segment always
+         * nonpresent. vmx_segment_access_rights() already marks nonpresent
+         * segment as unusable.
+         */
+        var->present = !var->unusable;
         var->avl = (ar >> 12) & 1;
         var->l = (ar >> 13) & 1;
         var->db = (ar >> 14) & 1;
         var->g = (ar >> 15) & 1;
-        var->unusable = (ar >> 16) & 1;
 }
 
 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index d482bcaf61c1..6a22c19da663 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -882,9 +882,9 @@ int lguest_setup_irq(unsigned int irq)
  * It would be far better for everyone if the Guest had its own clock, but
  * until then the Host gives us the time on every interrupt.
  */
-static unsigned long lguest_get_wallclock(void)
+static void lguest_get_wallclock(struct timespec *now)
 {
-        return lguest_data.time.tv_sec;
+        *now = lguest_data.time;
 }
 
 /*
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 845df6835f9f..62c29a5bfe26 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -115,10 +115,8 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
         if (mmap_is_legacy()) {
                 mm->mmap_base = mmap_legacy_base();
                 mm->get_unmapped_area = arch_get_unmapped_area;
-                mm->unmap_area = arch_unmap_area;
         } else {
                 mm->mmap_base = mmap_base();
                 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
-                mm->unmap_area = arch_unmap_area_topdown;
         }
 }
diff --git a/arch/x86/mm/mmio-mod.c b/arch/x86/mm/mmio-mod.c
index dc0b727742f4..0057a7accfb1 100644
--- a/arch/x86/mm/mmio-mod.c
+++ b/arch/x86/mm/mmio-mod.c
@@ -410,9 +410,7 @@ out:
                 pr_warning("multiple CPUs still online, may miss events.\n");
 }
 
-/* __ref because leave_uniprocessor calls cpu_up which is __cpuinit,
-   but this whole function is ifdefed CONFIG_HOTPLUG_CPU */
-static void __ref leave_uniprocessor(void)
+static void leave_uniprocessor(void)
 {
         int cpu;
         int err;
diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c
index a71c4e207679..8bf93bae1f13 100644
--- a/arch/x86/mm/numa.c
+++ b/arch/x86/mm/numa.c
@@ -60,7 +60,7 @@ s16 __apicid_to_node[MAX_LOCAL_APIC] = {
         [0 ... MAX_LOCAL_APIC-1] = NUMA_NO_NODE
 };
 
-int __cpuinit numa_cpu_node(int cpu)
+int numa_cpu_node(int cpu)
 {
         int apicid = early_per_cpu(x86_cpu_to_apicid, cpu);
 
@@ -691,12 +691,12 @@ void __init init_cpu_to_node(void)
 #ifndef CONFIG_DEBUG_PER_CPU_MAPS
 
 # ifndef CONFIG_NUMA_EMU
-void __cpuinit numa_add_cpu(int cpu)
+void numa_add_cpu(int cpu)
 {
         cpumask_set_cpu(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]);
 }
 
-void __cpuinit numa_remove_cpu(int cpu)
+void numa_remove_cpu(int cpu)
 {
         cpumask_clear_cpu(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]);
 }
@@ -763,17 +763,17 @@ void debug_cpumask_set_cpu(int cpu, int node, bool enable)
 }
 
 # ifndef CONFIG_NUMA_EMU
-static void __cpuinit numa_set_cpumask(int cpu, bool enable)
+static void numa_set_cpumask(int cpu, bool enable)
 {
         debug_cpumask_set_cpu(cpu, early_cpu_to_node(cpu), enable);
 }
 
-void __cpuinit numa_add_cpu(int cpu)
+void numa_add_cpu(int cpu)
 {
         numa_set_cpumask(cpu, true);
 }
 
-void __cpuinit numa_remove_cpu(int cpu)
+void numa_remove_cpu(int cpu)
 {
         numa_set_cpumask(cpu, false);
 }
diff --git a/arch/x86/mm/numa_emulation.c b/arch/x86/mm/numa_emulation.c
index dbbbb47260cc..a8f90ce3dedf 100644
--- a/arch/x86/mm/numa_emulation.c
+++ b/arch/x86/mm/numa_emulation.c
@@ -10,7 +10,7 @@
 
 #include "numa_internal.h"
 
-static int emu_nid_to_phys[MAX_NUMNODES] __cpuinitdata;
+static int emu_nid_to_phys[MAX_NUMNODES];
 static char *emu_cmdline __initdata;
 
 void __init numa_emu_cmdline(char *str)
@@ -444,7 +444,7 @@ no_emu:
 }
 
 #ifndef CONFIG_DEBUG_PER_CPU_MAPS
-void __cpuinit numa_add_cpu(int cpu)
+void numa_add_cpu(int cpu)
 {
         int physnid, nid;
 
@@ -462,7 +462,7 @@ void __cpuinit numa_add_cpu(int cpu)
                         cpumask_set_cpu(cpu, node_to_cpumask_map[nid]);
 }
 
-void __cpuinit numa_remove_cpu(int cpu)
+void numa_remove_cpu(int cpu)
 {
         int i;
 
@@ -470,7 +470,7 @@ void __cpuinit numa_remove_cpu(int cpu)
                 cpumask_clear_cpu(cpu, node_to_cpumask_map[i]);
 }
 #else   /* !CONFIG_DEBUG_PER_CPU_MAPS */
-static void __cpuinit numa_set_cpumask(int cpu, bool enable)
+static void numa_set_cpumask(int cpu, bool enable)
 {
         int nid, physnid;
 
@@ -490,12 +490,12 @@ static void __cpuinit numa_set_cpumask(int cpu, bool enable)
         }
 }
 
-void __cpuinit numa_add_cpu(int cpu)
+void numa_add_cpu(int cpu)
 {
         numa_set_cpumask(cpu, true);
 }
 
-void __cpuinit numa_remove_cpu(int cpu)
+void numa_remove_cpu(int cpu)
 {
         numa_set_cpumask(cpu, false);
 }
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 17fda6a8b3c2..dfa537a03be1 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -240,7 +240,6 @@ static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp)
 static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
 {
         pud_t *pud;
-        unsigned long addr;
         int i;
 
         if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */
@@ -248,8 +247,7 @@ static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
 
         pud = pud_offset(pgd, 0);
 
-        for (addr = i = 0; i < PREALLOCATED_PMDS;
-             i++, pud++, addr += PUD_SIZE) {
+        for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {
                 pmd_t *pmd = pmds[i];
 
                 if (i >= KERNEL_PGD_BOUNDARY)
diff --git a/arch/x86/mm/setup_nx.c b/arch/x86/mm/setup_nx.c
index 410531d3c292..90555bf60aa4 100644
--- a/arch/x86/mm/setup_nx.c
+++ b/arch/x86/mm/setup_nx.c
@@ -5,7 +5,7 @@
 #include <asm/pgtable.h>
 #include <asm/proto.h>
 
-static int disable_nx __cpuinitdata;
+static int disable_nx;
 
 /*
  * noexec = on|off
@@ -29,7 +29,7 @@ static int __init noexec_setup(char *str)
 }
 early_param("noexec", noexec_setup);
 
-void __cpuinit x86_configure_nx(void)
+void x86_configure_nx(void)
 {
         if (cpu_has_nx && !disable_nx)
                 __supported_pte_mask |= _PAGE_NX;
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index f66b54086ce5..79c216aa0e2b 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -12,6 +12,7 @@
 #include <linux/netdevice.h>
 #include <linux/filter.h>
 #include <linux/if_vlan.h>
+#include <linux/random.h>
 
 /*
  * Conventions :
@@ -144,6 +145,39 @@ static int pkt_type_offset(void)
         return -1;
 }
 
+struct bpf_binary_header {
+        unsigned int    pages;
+        /* Note : for security reasons, bpf code will follow a randomly
+         * sized amount of int3 instructions
+         */
+        u8              image[];
+};
+
+static struct bpf_binary_header *bpf_alloc_binary(unsigned int proglen,
+                                                  u8 **image_ptr)
+{
+        unsigned int sz, hole;
+        struct bpf_binary_header *header;
+
+        /* Most of BPF filters are really small,
+         * but if some of them fill a page, allow at least
+         * 128 extra bytes to insert a random section of int3
+         */
+        sz = round_up(proglen + sizeof(*header) + 128, PAGE_SIZE);
+        header = module_alloc(sz);
+        if (!header)
+                return NULL;
+
+        memset(header, 0xcc, sz); /* fill whole space with int3 instructions */
+
+        header->pages = sz / PAGE_SIZE;
+        hole = sz - (proglen + sizeof(*header));
+
+        /* insert a random number of int3 instructions before BPF code */
+        *image_ptr = &header->image[prandom_u32() % hole];
+        return header;
+}
+
 void bpf_jit_compile(struct sk_filter *fp)
 {
         u8 temp[64];
@@ -153,6 +187,7 @@ void bpf_jit_compile(struct sk_filter *fp)
         int t_offset, f_offset;
         u8 t_op, f_op, seen = 0, pass;
         u8 *image = NULL;
+        struct bpf_binary_header *header = NULL;
         u8 *func;
         int pc_ret0 = -1; /* bpf index of first RET #0 instruction (if any) */
         unsigned int cleanup_addr; /* epilogue code offset */
@@ -693,7 +728,7 @@ cond_branch:			f_offset = addrs[i + filter[i].jf] - addrs[i];
                                 if (unlikely(proglen + ilen > oldproglen)) {
                                         pr_err("bpb_jit_compile fatal error\n");
                                         kfree(addrs);
-                                        module_free(NULL, image);
+                                        module_free(NULL, header);
                                         return;
                                 }
                                 memcpy(image + proglen, temp, ilen);
@@ -717,10 +752,8 @@ cond_branch:			f_offset = addrs[i + filter[i].jf] - addrs[i];
                         break;
                 }
                 if (proglen == oldproglen) {
-                        image = module_alloc(max_t(unsigned int,
-                                                   proglen,
-                                                   sizeof(struct work_struct)));
-                        if (!image)
+                        header = bpf_alloc_binary(proglen, &image);
+                        if (!header)
                                 goto out;
                 }
                 oldproglen = proglen;
@@ -730,7 +763,8 @@ cond_branch:			f_offset = addrs[i + filter[i].jf] - addrs[i];
                 bpf_jit_dump(flen, proglen, pass, image);
 
         if (image) {
-                bpf_flush_icache(image, image + proglen);
+                bpf_flush_icache(header, image + proglen);
+                set_memory_ro((unsigned long)header, header->pages);
                 fp->bpf_func = (void *)image;
         }
 out:
@@ -738,20 +772,13 @@ out:
         return;
 }
 
-static void jit_free_defer(struct work_struct *arg)
-{
-        module_free(NULL, arg);
-}
-
-/* run from softirq, we must use a work_struct to call
- * module_free() from process context
- */
 void bpf_jit_free(struct sk_filter *fp)
 {
         if (fp->bpf_func != sk_run_filter) {
-                struct work_struct *work = (struct work_struct *)fp->bpf_func;
+                unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
+                struct bpf_binary_header *header = (void *)addr;
 
-                INIT_WORK(work, jit_free_defer);
-                schedule_work(work);
+                set_memory_rw(addr, header->pages);
+                module_free(NULL, header);
         }
 }
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index e9e6ed5cdf94..a48be98e9ded 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -312,7 +312,7 @@ static int __init early_fill_mp_bus_info(void)
 
 #define ENABLE_CF8_EXT_CFG      (1ULL << 46)
 
-static void __cpuinit enable_pci_io_ecs(void *unused)
+static void enable_pci_io_ecs(void *unused)
 {
         u64 reg;
         rdmsrl(MSR_AMD64_NB_CFG, reg);
@@ -322,8 +322,8 @@ static void __cpuinit enable_pci_io_ecs(void *unused)
         }
 }
 
-static int __cpuinit amd_cpu_notify(struct notifier_block *self,
-                                    unsigned long action, void *hcpu)
+static int amd_cpu_notify(struct notifier_block *self, unsigned long action,
+                          void *hcpu)
 {
         int cpu = (long)hcpu;
         switch (action) {
@@ -337,7 +337,7 @@ static int __cpuinit amd_cpu_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata amd_cpu_notifier = {
+static struct notifier_block amd_cpu_notifier = {
         .notifier_call  = amd_cpu_notify,
 };
 
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index f8ab4945892e..643b8b5eee86 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/serial_reg.h>
 #include <linux/serial_8250.h>
+#include <linux/reboot.h>
 
 #include <asm/ce4100.h>
 #include <asm/prom.h>
@@ -134,7 +135,7 @@ static void __init sdv_arch_setup(void)
 }
 
 #ifdef CONFIG_X86_IO_APIC
-static void __cpuinit sdv_pci_init(void)
+static void sdv_pci_init(void)
 {
         x86_of_pci_init();
         /* We can't set this earlier, because we need to calibrate the timer */
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index b410b71bdcf7..90f6ed127096 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -274,8 +274,9 @@ static efi_status_t __init phys_efi_get_time(efi_time_t *tm,
         return status;
 }
 
-int efi_set_rtc_mmss(unsigned long nowtime)
+int efi_set_rtc_mmss(const struct timespec *now)
 {
+        unsigned long nowtime = now->tv_sec;
         efi_status_t    status;
         efi_time_t      eft;
         efi_time_cap_t  cap;
@@ -310,7 +311,7 @@ int efi_set_rtc_mmss(unsigned long nowtime)
         return 0;
 }
 
-unsigned long efi_get_time(void)
+void efi_get_time(struct timespec *now)
 {
         efi_status_t status;
         efi_time_t eft;
@@ -320,8 +321,9 @@ unsigned long efi_get_time(void)
         if (status != EFI_SUCCESS)
                 pr_err("Oops: efitime: can't read time!\n");
 
-        return mktime(eft.year, eft.month, eft.day, eft.hour,
-                      eft.minute, eft.second);
+        now->tv_sec = mktime(eft.year, eft.month, eft.day, eft.hour,
+                             eft.minute, eft.second);
+        now->tv_nsec = 0;
 }
 
 /*
@@ -929,13 +931,6 @@ void __init efi_enter_virtual_mode(void)
                         va = efi_ioremap(md->phys_addr, size,
                                          md->type, md->attribute);
 
-                if (!(md->attribute & EFI_MEMORY_RUNTIME)) {
-                        if (!va)
-                                pr_err("ioremap of 0x%llX failed!\n",
-                                       (unsigned long long)md->phys_addr);
-                        continue;
-                }
-
                 md->virt_addr = (u64) (unsigned long) va;
 
                 if (!va) {
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
index a0a0a4389bbd..47fe66fe61f1 100644
--- a/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@ -65,7 +65,7 @@
  * lapic (always-on,ARAT) ------ 150
  */
 
-__cpuinitdata enum mrst_timer_options mrst_timer_options;
+enum mrst_timer_options mrst_timer_options;
 
 static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
 static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
@@ -248,7 +248,7 @@ static void __init mrst_time_init(void)
         apbt_time_init();
 }
 
-static void __cpuinit mrst_arch_setup(void)
+static void mrst_arch_setup(void)
 {
         if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27)
                 __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL;
diff --git a/arch/x86/platform/mrst/vrtc.c b/arch/x86/platform/mrst/vrtc.c
index d62b0a3b5c14..5e355b134ba4 100644
--- a/arch/x86/platform/mrst/vrtc.c
+++ b/arch/x86/platform/mrst/vrtc.c
@@ -56,7 +56,7 @@ void vrtc_cmos_write(unsigned char val, unsigned char reg)
 }
 EXPORT_SYMBOL_GPL(vrtc_cmos_write);
 
-unsigned long vrtc_get_time(void)
+void vrtc_get_time(struct timespec *now)
 {
         u8 sec, min, hour, mday, mon;
         unsigned long flags;
@@ -82,17 +82,18 @@ unsigned long vrtc_get_time(void)
         printk(KERN_INFO "vRTC: sec: %d min: %d hour: %d day: %d "
                 "mon: %d year: %d\n", sec, min, hour, mday, mon, year);
 
-        return mktime(year, mon, mday, hour, min, sec);
+        now->tv_sec = mktime(year, mon, mday, hour, min, sec);
+        now->tv_nsec = 0;
 }
 
-int vrtc_set_mmss(unsigned long nowtime)
+int vrtc_set_mmss(const struct timespec *now)
 {
         unsigned long flags;
         struct rtc_time tm;
         int year;
         int retval = 0;
 
-        rtc_time_to_tm(nowtime, &tm);
+        rtc_time_to_tm(now->tv_sec, &tm);
         if (!rtc_valid_tm(&tm) && tm.tm_year >= 72) {
                 /*
                  * tm.year is the number of years since 1900, and the
@@ -110,7 +111,7 @@ int vrtc_set_mmss(unsigned long nowtime)
         } else {
                 printk(KERN_ERR
                        "%s: Invalid vRTC value: write of %lx to vRTC failed\n",
-                        __FUNCTION__, nowtime);
+                        __FUNCTION__, now->tv_sec);
                 retval = -EINVAL;
         }
         return retval;
diff --git a/arch/x86/um/signal.c b/arch/x86/um/signal.c
index ae7319db18ee..5e04a1c899fa 100644
--- a/arch/x86/um/signal.c
+++ b/arch/x86/um/signal.c
@@ -508,7 +508,6 @@ int setup_signal_stack_si(unsigned long stack_top, int sig,
 {
         struct rt_sigframe __user *frame;
         int err = 0;
-        struct task_struct *me = current;
 
         frame = (struct rt_sigframe __user *)
                 round_down(stack_top - sizeof(struct rt_sigframe), 16);
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 2fa02bc50034..193097ef3d7d 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1681,8 +1681,8 @@ static void __init init_hvm_pv_info(void)
         xen_domain_type = XEN_HVM_DOMAIN;
 }
 
-static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
-                                    unsigned long action, void *hcpu)
+static int xen_hvm_cpu_notify(struct notifier_block *self, unsigned long action,
+                              void *hcpu)
 {
         int cpu = (long)hcpu;
         switch (action) {
@@ -1700,7 +1700,7 @@ static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
+static struct notifier_block xen_hvm_cpu_notifier = {
         .notifier_call  = xen_hvm_cpu_notify,
 };
 
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 94eac5c85cdc..056d11faef21 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -475,7 +475,7 @@ static void __init fiddle_vdso(void)
 #endif
 }
 
-static int __cpuinit register_callback(unsigned type, const void *func)
+static int register_callback(unsigned type, const void *func)
 {
         struct callback_register callback = {
                 .type = type,
@@ -486,7 +486,7 @@ static int __cpuinit register_callback(unsigned type, const void *func)
         return HYPERVISOR_callback_op(CALLBACKOP_register, &callback);
 }
 
-void __cpuinit xen_enable_sysenter(void)
+void xen_enable_sysenter(void)
 {
         int ret;
         unsigned sysenter_feature;
@@ -505,7 +505,7 @@ void __cpuinit xen_enable_sysenter(void)
                 setup_clear_cpu_cap(sysenter_feature);
 }
 
-void __cpuinit xen_enable_syscall(void)
+void xen_enable_syscall(void)
 {
 #ifdef CONFIG_X86_64
         int ret;
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index c1367b29c3b1..ca92754eb846 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -65,7 +65,7 @@ static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static void __cpuinit cpu_bringup(void)
+static void cpu_bringup(void)
 {
         int cpu;
 
@@ -97,7 +97,7 @@ static void __cpuinit cpu_bringup(void)
         wmb();                  /* make sure everything is out */
 }
 
-static void __cpuinit cpu_bringup_and_idle(void)
+static void cpu_bringup_and_idle(void)
 {
         cpu_bringup();
         cpu_startup_entry(CPUHP_ONLINE);
@@ -326,7 +326,7 @@ static void __init xen_smp_prepare_cpus(unsigned int max_cpus)
                 set_cpu_present(cpu, true);
 }
 
-static int __cpuinit
+static int
 cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
 {
         struct vcpu_guest_context *ctxt;
@@ -397,7 +397,7 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
         return 0;
 }
 
-static int __cpuinit xen_cpu_up(unsigned int cpu, struct task_struct *idle)
+static int xen_cpu_up(unsigned int cpu, struct task_struct *idle)
 {
         int rc;
 
@@ -470,7 +470,7 @@ static void xen_cpu_die(unsigned int cpu)
         xen_teardown_timer(cpu);
 }
 
-static void __cpuinit xen_play_dead(void) /* used only with HOTPLUG_CPU */
+static void xen_play_dead(void) /* used only with HOTPLUG_CPU */
 {
         play_dead_common();
         HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
@@ -691,7 +691,7 @@ static void __init xen_hvm_smp_prepare_cpus(unsigned int max_cpus)
         xen_init_lock_cpu(0);
 }
 
-static int __cpuinit xen_hvm_cpu_up(unsigned int cpu, struct task_struct *tidle)
+static int xen_hvm_cpu_up(unsigned int cpu, struct task_struct *tidle)
 {
         int rc;
         rc = native_cpu_up(cpu, tidle);
diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c
index a40f8508e760..cf3caee356b3 100644
--- a/arch/x86/xen/spinlock.c
+++ b/arch/x86/xen/spinlock.c
@@ -361,7 +361,7 @@ static irqreturn_t dummy_handler(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-void __cpuinit xen_init_lock_cpu(int cpu)
+void xen_init_lock_cpu(int cpu)
 {
         int irq;
         char *name;
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index a690868be837..ee365895b06b 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -15,6 +15,7 @@
 #include <linux/math64.h>
 #include <linux/gfp.h>
 #include <linux/slab.h>
+#include <linux/pvclock_gtod.h>
 
 #include <asm/pvclock.h>
 #include <asm/xen/hypervisor.h>
@@ -179,34 +180,56 @@ static void xen_read_wallclock(struct timespec *ts)
         put_cpu_var(xen_vcpu);
 }
 
-static unsigned long xen_get_wallclock(void)
+static void xen_get_wallclock(struct timespec *now)
 {
-        struct timespec ts;
+        xen_read_wallclock(now);
+}
 
-        xen_read_wallclock(&ts);
-        return ts.tv_sec;
+static int xen_set_wallclock(const struct timespec *now)
+{
+        return -1;
 }
 
-static int xen_set_wallclock(unsigned long now)
+static int xen_pvclock_gtod_notify(struct notifier_block *nb,
+                                   unsigned long was_set, void *priv)
 {
+        /* Protected by the calling core code serialization */
+        static struct timespec next_sync;
+
         struct xen_platform_op op;
-        int rc;
+        struct timespec now;
 
-        /* do nothing for domU */
-        if (!xen_initial_domain())
-                return -1;
+        now = __current_kernel_time();
+
+        /*
+         * We only take the expensive HV call when the clock was set
+         * or when the 11 minutes RTC synchronization time elapsed.
+         */
+        if (!was_set && timespec_compare(&now, &next_sync) < 0)
+                return NOTIFY_OK;
 
         op.cmd = XENPF_settime;
-        op.u.settime.secs = now;
-        op.u.settime.nsecs = 0;
+        op.u.settime.secs = now.tv_sec;
+        op.u.settime.nsecs = now.tv_nsec;
         op.u.settime.system_time = xen_clocksource_read();
 
-        rc = HYPERVISOR_dom0_op(&op);
-        WARN(rc != 0, "XENPF_settime failed: now=%ld\n", now);
+        (void)HYPERVISOR_dom0_op(&op);
 
-        return rc;
+        /*
+         * Move the next drift compensation time 11 minutes
+         * ahead. That's emulating the sync_cmos_clock() update for
+         * the hardware RTC.
+         */
+        next_sync = now;
+        next_sync.tv_sec += 11 * 60;
+
+        return NOTIFY_OK;
 }
 
+static struct notifier_block xen_pvclock_gtod_notifier = {
+        .notifier_call = xen_pvclock_gtod_notify,
+};
+
 static struct clocksource xen_clocksource __read_mostly = {
         .name = "xen",
         .rating = 400,
@@ -482,6 +505,9 @@ static void __init xen_time_init(void)
         xen_setup_runstate_info(cpu);
         xen_setup_timer(cpu);
         xen_setup_cpu_clockevents();
+
+        if (xen_initial_domain())
+                pvclock_gtod_register_notifier(&xen_pvclock_gtod_notifier);
 }
 
 void __init xen_init_time_ops(void)
@@ -494,7 +520,9 @@ void __init xen_init_time_ops(void)
 
         x86_platform.calibrate_tsc = xen_tsc_khz;
         x86_platform.get_wallclock = xen_get_wallclock;
-        x86_platform.set_wallclock = xen_set_wallclock;
+        /* Dom0 uses the native method to set the hardware RTC. */
+        if (!xen_initial_domain())
+                x86_platform.set_wallclock = xen_set_wallclock;
 }
 
 #ifdef CONFIG_XEN_PVHVM
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index a95b41744ad0..86782c5d7e2a 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -73,7 +73,7 @@ static inline void xen_hvm_smp_init(void) {}
 
 #ifdef CONFIG_PARAVIRT_SPINLOCKS
 void __init xen_init_spinlocks(void);
-void __cpuinit xen_init_lock_cpu(int cpu);
+void xen_init_lock_cpu(int cpu);
 void xen_uninit_lock_cpu(int cpu);
 #else
 static inline void xen_init_spinlocks(void)
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 0a1b95f81a32..7ea6451a3a33 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -6,10 +6,12 @@ config XTENSA
         select ARCH_WANT_FRAME_POINTERS
         select HAVE_IDE
         select GENERIC_ATOMIC64
+        select GENERIC_CLOCKEVENTS
         select HAVE_GENERIC_HARDIRQS
         select VIRT_TO_BUS
         select GENERIC_IRQ_SHOW
         select GENERIC_CPU_DEVICES
+        select GENERIC_SCHED_CLOCK
         select MODULES_USE_ELF_RELA
         select GENERIC_PCI_IOMAP
         select ARCH_WANT_IPC_PARSE_VERSION
@@ -17,6 +19,7 @@ config XTENSA
         select CLONE_BACKWARDS
         select IRQ_DOMAIN
         select HAVE_OPROFILE
+        select HAVE_FUNCTION_TRACER
         help
           Xtensa processors are 32-bit RISC machines designed by Tensilica
           primarily for embedded systems.  These processors are both
diff --git a/arch/xtensa/Kconfig.debug b/arch/xtensa/Kconfig.debug
index a34010e0e51c..af7da74d535f 100644
--- a/arch/xtensa/Kconfig.debug
+++ b/arch/xtensa/Kconfig.debug
@@ -2,6 +2,16 @@ menu "Kernel hacking"
 
 source "lib/Kconfig.debug"
 
+config DEBUG_TLB_SANITY
+        bool "Debug TLB sanity"
+        depends on DEBUG_KERNEL
+        help
+          Enable this to turn on TLB sanity check on each entry to userspace.
+          This check can spot missing TLB invalidation/wrong PTE permissions/
+          premature page freeing.
+
+          If unsure, say N.
+
 config LD_NO_RELAX
         bool "Disable linker relaxation"
         default n
diff --git a/arch/xtensa/boot/.gitignore b/arch/xtensa/boot/.gitignore
new file mode 100644
index 000000000000..be7655998b26
--- /dev/null
+++ b/arch/xtensa/boot/.gitignore
@@ -0,0 +1,3 @@
+uImage
+zImage.redboot
+*.dtb
diff --git a/arch/xtensa/boot/boot-elf/.gitignore b/arch/xtensa/boot/boot-elf/.gitignore
new file mode 100644
index 000000000000..5ff8fbb8561b
--- /dev/null
+++ b/arch/xtensa/boot/boot-elf/.gitignore
@@ -0,0 +1 @@
+boot.lds
diff --git a/arch/xtensa/boot/lib/.gitignore b/arch/xtensa/boot/lib/.gitignore
new file mode 100644
index 000000000000..1629a6167755
--- /dev/null
+++ b/arch/xtensa/boot/lib/.gitignore
@@ -0,0 +1,3 @@
+inffast.c
+inflate.c
+inftrees.c
diff --git a/arch/xtensa/boot/lib/Makefile b/arch/xtensa/boot/lib/Makefile
index ad8952e8a07f..6868f2ca6af8 100644
--- a/arch/xtensa/boot/lib/Makefile
+++ b/arch/xtensa/boot/lib/Makefile
@@ -7,6 +7,13 @@ zlib	:= inffast.c inflate.c inftrees.c
 lib-y   += $(zlib:.c=.o) zmem.o
 
 ccflags-y       := -Ilib/zlib_inflate
+ifdef CONFIG_FUNCTION_TRACER
+CFLAGS_REMOVE_inflate.o = -pg
+CFLAGS_REMOVE_zmem.o = -pg
+CFLAGS_REMOVE_inftrees.o = -pg
+CFLAGS_REMOVE_inffast.o = -pg
+endif
+
 
 quiet_cmd_copy_zlib = COPY    $@
       cmd_copy_zlib = cat $< > $@
diff --git a/arch/xtensa/include/asm/bootparam.h b/arch/xtensa/include/asm/bootparam.h
index 0c25799facab..23392c5630ce 100644
--- a/arch/xtensa/include/asm/bootparam.h
+++ b/arch/xtensa/include/asm/bootparam.h
@@ -20,7 +20,7 @@
 #define BP_TAG_COMMAND_LINE     0x1001  /* command line (0-terminated string)*/
 #define BP_TAG_INITRD           0x1002  /* ramdisk addr and size (bp_meminfo) */
 #define BP_TAG_MEMORY           0x1003  /* memory addr and size (bp_meminfo) */
-#define BP_TAG_SERIAL_BAUSRATE  0x1004  /* baud rate of current console. */
+#define BP_TAG_SERIAL_BAUDRATE  0x1004  /* baud rate of current console. */
 #define BP_TAG_SERIAL_PORT      0x1005  /* serial device of current console */
 #define BP_TAG_FDT              0x1006  /* flat device tree addr */
 
diff --git a/arch/xtensa/include/asm/cmpxchg.h b/arch/xtensa/include/asm/cmpxchg.h
index d9ab131bc1aa..370b26f38414 100644
--- a/arch/xtensa/include/asm/cmpxchg.h
+++ b/arch/xtensa/include/asm/cmpxchg.h
@@ -93,6 +93,7 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
         ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
                         (unsigned long)(n), sizeof(*(ptr))))
 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+#define cmpxchg64(ptr, o, n)    cmpxchg64_local((ptr), (o), (n))
 
 /*
  * xchg_u32
diff --git a/arch/xtensa/include/asm/delay.h b/arch/xtensa/include/asm/delay.h
index 61fc5faeb46c..3899610c1dff 100644
--- a/arch/xtensa/include/asm/delay.h
+++ b/arch/xtensa/include/asm/delay.h
@@ -12,7 +12,7 @@
 #ifndef _XTENSA_DELAY_H
 #define _XTENSA_DELAY_H
 
-#include <asm/processor.h>
+#include <asm/timex.h>
 #include <asm/param.h>
 
 extern unsigned long loops_per_jiffy;
@@ -24,24 +24,17 @@ static inline void __delay(unsigned long loops)
                               : "=r" (loops) : "0" (loops));
 }
 
-static __inline__ u32 xtensa_get_ccount(void)
-{
-        u32 ccount;
-        asm volatile ("rsr %0, ccount\n" : "=r" (ccount));
-        return ccount;
-}
-
 /* For SMP/NUMA systems, change boot_cpu_data to something like
  * local_cpu_data->... where local_cpu_data points to the current
  * cpu. */
 
 static __inline__ void udelay (unsigned long usecs)
 {
-        unsigned long start = xtensa_get_ccount();
+        unsigned long start = get_ccount();
         unsigned long cycles = usecs * (loops_per_jiffy / (1000000UL / HZ));
 
         /* Note: all variables are unsigned (can wrap around)! */
-        while (((unsigned long)xtensa_get_ccount()) - start < cycles)
+        while (((unsigned long)get_ccount()) - start < cycles)
                 ;
 }
 
diff --git a/arch/xtensa/include/asm/ftrace.h b/arch/xtensa/include/asm/ftrace.h
index 36dc7a684397..73cc3f482304 100644
--- a/arch/xtensa/include/asm/ftrace.h
+++ b/arch/xtensa/include/asm/ftrace.h
@@ -13,6 +13,7 @@
 #include <asm/processor.h>
 
 #define HAVE_ARCH_CALLER_ADDR
+#ifndef __ASSEMBLY__
 #define CALLER_ADDR0 ({ unsigned long a0, a1; \
                 __asm__ __volatile__ ( \
                         "mov %0, a0\n" \
@@ -24,10 +25,22 @@ extern unsigned long return_address(unsigned level);
 #define CALLER_ADDR1 return_address(1)
 #define CALLER_ADDR2 return_address(2)
 #define CALLER_ADDR3 return_address(3)
-#else
+#else /* CONFIG_FRAME_POINTER */
 #define CALLER_ADDR1 (0)
 #define CALLER_ADDR2 (0)
 #define CALLER_ADDR3 (0)
-#endif
+#endif /* CONFIG_FRAME_POINTER */
+#endif /* __ASSEMBLY__ */
+
+#ifdef CONFIG_FUNCTION_TRACER
+
+#define MCOUNT_ADDR ((unsigned long)(_mcount))
+#define MCOUNT_INSN_SIZE 3
+
+#ifndef __ASSEMBLY__
+extern void _mcount(void);
+#define mcount _mcount
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_FUNCTION_TRACER */
 
 #endif /* _XTENSA_FTRACE_H */
diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h
index 8f017eb309bd..0fdf5d043f82 100644
--- a/arch/xtensa/include/asm/pgtable.h
+++ b/arch/xtensa/include/asm/pgtable.h
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
- * Copyright (C) 2001 - 2007 Tensilica Inc.
+ * Copyright (C) 2001 - 2013 Tensilica Inc.
  */
 
 #ifndef _XTENSA_PGTABLE_H
@@ -64,41 +64,82 @@
  * Virtual memory area. We keep a distance to other memory regions to be
  * on the safe side. We also use this area for cache aliasing.
  */
-
 #define VMALLOC_START           0xC0000000
 #define VMALLOC_END             0xC7FEFFFF
 #define TLBTEMP_BASE_1          0xC7FF0000
 #define TLBTEMP_BASE_2          0xC7FF8000
 
 /*
- * Xtensa Linux config PTE layout (when present):
- *      31-12:  PPN
- *      11-6:   Software
- *      5-4:    RING
- *      3-0:    CA
+ * For the Xtensa architecture, the PTE layout is as follows:
+ *
+ *              31------12  11  10-9   8-6  5-4  3-2  1-0
+ *              +-----------------------------------------+
+ *              |           |   Software   |   HARDWARE   |
+ *              |    PPN    |          ADW | RI |Attribute|
+ *              +-----------------------------------------+
+ *   pte_none   |             MBZ          | 01 | 11 | 00 |
+ *              +-----------------------------------------+
+ *   present    |    PPN    | 0 | 00 | ADW | RI | CA | wx |
+ *              +- - - - - - - - - - - - - - - - - - - - -+
+ *   (PAGE_NONE)|    PPN    | 0 | 00 | ADW | 01 | 11 | 11 |
+ *              +-----------------------------------------+
+ *   swap       |     index     |   type   | 01 | 11 | 00 |
+ *              +- - - - - - - - - - - - - - - - - - - - -+
+ *   file       |        file offset       | 01 | 11 | 10 |
+ *              +-----------------------------------------+
+ *
+ * For T1050 hardware and earlier the layout differs for present and (PAGE_NONE)
+ *              +-----------------------------------------+
+ *   present    |    PPN    | 0 | 00 | ADW | RI | CA | w1 |
+ *              +-----------------------------------------+
+ *   (PAGE_NONE)|    PPN    | 0 | 00 | ADW | 01 | 01 | 00 |
+ *              +-----------------------------------------+
  *
- * Similar to the Alpha and MIPS ports, we need to keep track of the ref
- * and mod bits in software.  We have a software "you can read
- * from this page" bit, and a hardware one which actually lets the
- * process read from the page.  On the same token we have a software
- * writable bit and the real hardware one which actually lets the
- * process write to the page.
+ *  Legend:
+ *   PPN        Physical Page Number
+ *   ADW        software: accessed (young) / dirty / writable
+ *   RI         ring (0=privileged, 1=user, 2 and 3 are unused)
+ *   CA         cache attribute: 00 bypass, 01 writeback, 10 writethrough
+ *              (11 is invalid and used to mark pages that are not present)
+ *   w          page is writable (hw)
+ *   x          page is executable (hw)
+ *   index      swap offset / PAGE_SIZE (bit 11-31: 21 bits -> 8 GB)
+ *              (note that the index is always non-zero)
+ *   type       swap type (5 bits -> 32 types)
+ *   file offset 26-bit offset into the file, in increments of PAGE_SIZE
  *
- * See further below for PTE layout for swapped-out pages.
+ *  Notes:
+ *   - (PROT_NONE) is a special case of 'present' but causes an exception for
+ *     any access (read, write, and execute).
+ *   - 'multihit-exception' has the highest priority of all MMU exceptions,
+ *     so the ring must be set to 'RING_USER' even for 'non-present' pages.
+ *   - on older hardware, the exectuable flag was not supported and
+ *     used as a 'valid' flag, so it needs to be always set.
+ *   - we need to keep track of certain flags in software (dirty and young)
+ *     to do this, we use write exceptions and have a separate software w-flag.
+ *   - attribute value 1101 (and 1111 on T1050 and earlier) is reserved
  */
 
+#define _PAGE_ATTRIB_MASK       0xf
+
 #define _PAGE_HW_EXEC           (1<<0)  /* hardware: page is executable */
 #define _PAGE_HW_WRITE          (1<<1)  /* hardware: page is writable */
 
-#define _PAGE_FILE              (1<<1)  /* non-linear mapping, if !present */
-#define _PAGE_PROTNONE          (3<<0)  /* special case for VM_PROT_NONE */
-
-/* None of these cache modes include MP coherency:  */
 #define _PAGE_CA_BYPASS         (0<<2)  /* bypass, non-speculative */
 #define _PAGE_CA_WB             (1<<2)  /* write-back */
 #define _PAGE_CA_WT             (2<<2)  /* write-through */
 #define _PAGE_CA_MASK           (3<<2)
-#define _PAGE_INVALID           (3<<2)
+#define _PAGE_CA_INVALID        (3<<2)
+
+/* We use invalid attribute values to distinguish special pte entries */
+#if XCHAL_HW_VERSION_MAJOR < 2000
+#define _PAGE_HW_VALID          0x01    /* older HW needed this bit set */
+#define _PAGE_NONE              0x04
+#else
+#define _PAGE_HW_VALID          0x00
+#define _PAGE_NONE              0x0f
+#endif
+#define _PAGE_FILE              (1<<1)  /* file mapped page, only if !present */
 
 #define _PAGE_USER              (1<<4)  /* user access (ring=1) */
 
@@ -108,19 +149,12 @@
 #define _PAGE_DIRTY             (1<<7)  /* software: page dirty */
 #define _PAGE_ACCESSED          (1<<8)  /* software: page accessed (read) */
 
-/* On older HW revisions, we always have to set bit 0 */
-#if XCHAL_HW_VERSION_MAJOR < 2000
-# define _PAGE_VALID            (1<<0)
-#else
-# define _PAGE_VALID            0
-#endif
-
-#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
-#define _PAGE_PRESENT   (_PAGE_VALID | _PAGE_CA_WB | _PAGE_ACCESSED)
-
 #ifdef CONFIG_MMU
 
-#define PAGE_NONE          __pgprot(_PAGE_INVALID | _PAGE_USER | _PAGE_PROTNONE)
+#define _PAGE_CHG_MASK     (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
+#define _PAGE_PRESENT      (_PAGE_HW_VALID | _PAGE_CA_WB | _PAGE_ACCESSED)
+
+#define PAGE_NONE          __pgprot(_PAGE_NONE | _PAGE_USER)
 #define PAGE_COPY          __pgprot(_PAGE_PRESENT | _PAGE_USER)
 #define PAGE_COPY_EXEC     __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_HW_EXEC)
 #define PAGE_READONLY      __pgprot(_PAGE_PRESENT | _PAGE_USER)
@@ -132,9 +166,9 @@
 #define PAGE_KERNEL_EXEC   __pgprot(_PAGE_PRESENT|_PAGE_HW_WRITE|_PAGE_HW_EXEC)
 
 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
-# define _PAGE_DIRECTORY (_PAGE_VALID | _PAGE_ACCESSED)
+# define _PAGE_DIRECTORY   (_PAGE_HW_VALID | _PAGE_ACCESSED | _PAGE_CA_BYPASS)
 #else
-# define _PAGE_DIRECTORY (_PAGE_VALID | _PAGE_ACCESSED | _PAGE_CA_WB)
+# define _PAGE_DIRECTORY   (_PAGE_HW_VALID | _PAGE_ACCESSED | _PAGE_CA_WB)
 #endif
 
 #else /* no mmu */
@@ -202,12 +236,16 @@ static inline void pgtable_cache_init(void) { }
 /*
  * pte status.
  */
-#define pte_none(pte)    (pte_val(pte) == _PAGE_INVALID)
-#define pte_present(pte)                                                \
-        (((pte_val(pte) & _PAGE_CA_MASK) != _PAGE_INVALID)              \
-         || ((pte_val(pte) & _PAGE_PROTNONE) == _PAGE_PROTNONE))
+# define pte_none(pte)   (pte_val(pte) == (_PAGE_CA_INVALID | _PAGE_USER))
+#if XCHAL_HW_VERSION_MAJOR < 2000
+# define pte_present(pte) ((pte_val(pte) & _PAGE_CA_MASK) != _PAGE_CA_INVALID)
+#else
+# define pte_present(pte)                                               \
+        (((pte_val(pte) & _PAGE_CA_MASK) != _PAGE_CA_INVALID)           \
+         || ((pte_val(pte) & _PAGE_ATTRIB_MASK) == _PAGE_NONE))
+#endif
 #define pte_clear(mm,addr,ptep)                                         \
-        do { update_pte(ptep, __pte(_PAGE_INVALID)); } while(0)
+        do { update_pte(ptep, __pte(_PAGE_CA_INVALID | _PAGE_USER)); } while (0)
 
 #define pmd_none(pmd)    (!pmd_val(pmd))
 #define pmd_present(pmd) (pmd_val(pmd) & PAGE_MASK)
@@ -328,35 +366,23 @@ ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 
 
 /*
- * Encode and decode a swap entry.
- *
- * Format of swap pte:
- *  bit    0       MBZ
- *  bit    1       page-file (must be zero)
- *  bits   2 -  3  page hw access mode (must be 11: _PAGE_INVALID)
- *  bits   4 -  5  ring protection (must be 01: _PAGE_USER)
- *  bits   6 - 10  swap type (5 bits -> 32 types)
- *  bits  11 - 31  swap offset / PAGE_SIZE (21 bits -> 8GB)
- 
- * Format of file pte:
- *  bit    0       MBZ
- *  bit    1       page-file (must be one: _PAGE_FILE)
- *  bits   2 -  3  page hw access mode (must be 11: _PAGE_INVALID)
- *  bits   4 -  5  ring protection (must be 01: _PAGE_USER)
- *  bits   6 - 31  file offset / PAGE_SIZE
+ * Encode and decode a swap and file entry.
  */
+#define SWP_TYPE_BITS           5
+#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
 
 #define __swp_type(entry)       (((entry).val >> 6) & 0x1f)
 #define __swp_offset(entry)     ((entry).val >> 11)
 #define __swp_entry(type,offs)  \
-        ((swp_entry_t) {((type) << 6) | ((offs) << 11) | _PAGE_INVALID})
+        ((swp_entry_t){((type) << 6) | ((offs) << 11) | \
+         _PAGE_CA_INVALID | _PAGE_USER})
 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 #define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
 
-#define PTE_FILE_MAX_BITS       28
-#define pte_to_pgoff(pte)       (pte_val(pte) >> 4)
+#define PTE_FILE_MAX_BITS       26
+#define pte_to_pgoff(pte)       (pte_val(pte) >> 6)
 #define pgoff_to_pte(off)       \
-        ((pte_t) { ((off) << 4) | _PAGE_INVALID | _PAGE_FILE })
+        ((pte_t) { ((off) << 6) | _PAGE_CA_INVALID | _PAGE_FILE | _PAGE_USER })
 
 #endif /*  !defined (__ASSEMBLY__) */
 
diff --git a/arch/xtensa/include/asm/platform.h b/arch/xtensa/include/asm/platform.h
index ec098b68fb9a..32e98f27ce97 100644
--- a/arch/xtensa/include/asm/platform.h
+++ b/arch/xtensa/include/asm/platform.h
@@ -30,11 +30,6 @@ extern void platform_init(bp_tag_t*);
 extern void platform_setup (char **);
 
 /*
- * platform_init_irq is called from init_IRQ.
- */
-extern void platform_init_irq (void);
-
-/*
  * platform_restart is called to restart the system.
  */
 extern void platform_restart (void);
diff --git a/arch/xtensa/include/asm/timex.h b/arch/xtensa/include/asm/timex.h
index 3d35e5d0367e..69f901713fb6 100644
--- a/arch/xtensa/include/asm/timex.h
+++ b/arch/xtensa/include/asm/timex.h
@@ -35,19 +35,11 @@
 # error "Bad timer number for Linux configurations!"
 #endif
 
-#define LINUX_TIMER_MASK        (1L << LINUX_TIMER_INT)
-
-#define CLOCK_TICK_RATE         1193180 /* (everyone is using this value) */
-#define CLOCK_TICK_FACTOR       20 /* Factor of both 10^6 and CLOCK_TICK_RATE */
-
 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
-extern unsigned long ccount_per_jiffy;
-extern unsigned long nsec_per_ccount;
-#define CCOUNT_PER_JIFFY ccount_per_jiffy
-#define NSEC_PER_CCOUNT  nsec_per_ccount
+extern unsigned long ccount_freq;
+#define CCOUNT_PER_JIFFY (ccount_freq / HZ)
 #else
 #define CCOUNT_PER_JIFFY (CONFIG_XTENSA_CPU_CLOCK*(1000000UL/HZ))
-#define NSEC_PER_CCOUNT (1000UL / CONFIG_XTENSA_CPU_CLOCK)
 #endif
 
 
diff --git a/arch/xtensa/include/uapi/asm/socket.h b/arch/xtensa/include/uapi/asm/socket.h
index a8f44f50e651..c114483010c1 100644
--- a/arch/xtensa/include/uapi/asm/socket.h
+++ b/arch/xtensa/include/uapi/asm/socket.h
@@ -85,4 +85,6 @@
 
 #define SO_SELECT_ERR_QUEUE     45
 
+#define SO_BUSY_POLL            46
+
 #endif  /* _XTENSA_SOCKET_H */
diff --git a/arch/xtensa/kernel/.gitignore b/arch/xtensa/kernel/.gitignore
new file mode 100644
index 000000000000..c5f676c3c224
--- /dev/null
+++ b/arch/xtensa/kernel/.gitignore
@@ -0,0 +1 @@
+vmlinux.lds
diff --git a/arch/xtensa/kernel/Makefile b/arch/xtensa/kernel/Makefile
index 1e7fc87a94bb..f90265ec1ccc 100644
--- a/arch/xtensa/kernel/Makefile
+++ b/arch/xtensa/kernel/Makefile
@@ -11,6 +11,7 @@ obj-y := align.o coprocessor.o entry.o irq.o pci-dma.o platform.o process.o \
 obj-$(CONFIG_KGDB) += xtensa-stub.o
 obj-$(CONFIG_PCI) += pci.o
 obj-$(CONFIG_MODULES) += xtensa_ksyms.o module.o
+obj-$(CONFIG_FUNCTION_TRACER) += mcount.o
 
 AFLAGS_head.o += -mtext-section-literals
 
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 5082507d5631..9298742f0fd0 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -458,7 +458,7 @@ common_exception_return:
 
         _bbsi.l a4, TIF_NEED_RESCHED, 3f
         _bbsi.l a4, TIF_NOTIFY_RESUME, 2f
-        _bbci.l a4, TIF_SIGPENDING, 4f
+        _bbci.l a4, TIF_SIGPENDING, 5f
 
 2:      l32i    a4, a1, PT_DEPC
         bgeui   a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
@@ -476,6 +476,13 @@ common_exception_return:
         callx4  a4
         j       1b
 
+5:
+#ifdef CONFIG_DEBUG_TLB_SANITY
+        l32i    a4, a1, PT_DEPC
+        bgeui   a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
+        movi    a4, check_tlb_sanity
+        callx4  a4
+#endif
 4:      /* Restore optional registers. */
 
         load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
@@ -1792,10 +1799,15 @@ ENTRY(fast_store_prohibited)
         l32i    a0, a0, 0
         beqz    a0, 2f
 
-        /* Note that we assume _PAGE_WRITABLE_BIT is only set if pte is valid.*/
+        /*
+         * Note that we test _PAGE_WRITABLE_BIT only if PTE is present
+         * and is not PAGE_NONE. See pgtable.h for possible PTE layouts.
+         */
 
         _PTE_OFFSET(a0, a1, a4)
         l32i    a4, a0, 0               # read pteval
+        movi    a1, _PAGE_CA_INVALID
+        ball    a4, a1, 2f
         bbci.l  a4, _PAGE_WRITABLE_BIT, 2f
 
         movi    a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE
diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S
index ef12c0e6fa25..7d740ebbe198 100644
--- a/arch/xtensa/kernel/head.S
+++ b/arch/xtensa/kernel/head.S
@@ -68,6 +68,15 @@ _SetupMMU:
 
 #ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
         initialize_mmu
+#if defined(CONFIG_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
+        rsr     a2, excsave1
+        movi    a3, 0x08000000
+        bgeu    a2, a3, 1f
+        movi    a3, 0xd0000000
+        add     a2, a2, a3
+        wsr     a2, excsave1
+1:
+#endif
 #endif
         .end    no-absolute-literals
 
diff --git a/arch/xtensa/kernel/mcount.S b/arch/xtensa/kernel/mcount.S
new file mode 100644
index 000000000000..0eeda2e4a25e
--- /dev/null
+++ b/arch/xtensa/kernel/mcount.S
@@ -0,0 +1,50 @@
+/*
+ * arch/xtensa/kernel/mcount.S
+ *
+ * Xtensa specific mcount support
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2013 Tensilica Inc.
+ */
+
+#include <linux/linkage.h>
+#include <asm/ftrace.h>
+
+/*
+ * Entry condition:
+ *
+ *   a2:        a0 of the caller
+ */
+
+ENTRY(_mcount)
+
+        entry   a1, 16
+
+        movi    a4, ftrace_trace_function
+        l32i    a4, a4, 0
+        movi    a3, ftrace_stub
+        bne     a3, a4, 1f
+        retw
+
+1:      xor     a7, a2, a1
+        movi    a3, 0x3fffffff
+        and     a7, a7, a3
+        xor     a7, a7, a1
+
+        xor     a6, a0, a1
+        and     a6, a6, a3
+        xor     a6, a6, a1
+        addi    a6, a6, -MCOUNT_INSN_SIZE
+        callx4  a4
+
+        retw
+
+ENDPROC(_mcount)
+
+ENTRY(ftrace_stub)
+        entry   a1, 16
+        retw
+ENDPROC(ftrace_stub)
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index 126c18839409..5b3403388d7f 100644
--- a/arch/xtensa/kernel/pci.c
+++ b/arch/xtensa/kernel/pci.c
@@ -77,9 +77,9 @@ pcibios_align_resource(void *data, const struct resource *res,
 
         if (res->flags & IORESOURCE_IO) {
                 if (size > 0x100) {
-                        printk(KERN_ERR "PCI: I/O Region %s/%d too large"
-                               " (%ld bytes)\n", pci_name(dev),
-                               dev->resource - res, size);
+                        pr_err("PCI: I/O Region %s/%d too large (%u bytes)\n",
+                                        pci_name(dev), dev->resource - res,
+                                        size);
                 }
 
                 if (start & 0x300)
@@ -174,7 +174,7 @@ static int __init pcibios_init(void)
         struct pci_controller *pci_ctrl;
         struct list_head resources;
         struct pci_bus *bus;
-        int next_busno = 0, i;
+        int next_busno = 0;
 
         printk("PCI: Probing PCI hardware\n");
 
@@ -197,7 +197,7 @@ static int __init pcibios_init(void)
 
 subsys_initcall(pcibios_init);
 
-void __init pcibios_fixup_bus(struct pci_bus *bus)
+void pcibios_fixup_bus(struct pci_bus *bus)
 {
         if (bus->parent) {
                 /* This is a subordinate bridge */
diff --git a/arch/xtensa/kernel/platform.c b/arch/xtensa/kernel/platform.c
index 2bd6c351f37c..1cf008284dd2 100644
--- a/arch/xtensa/kernel/platform.c
+++ b/arch/xtensa/kernel/platform.c
@@ -29,7 +29,6 @@
  */
 
 _F(void, setup, (char** cmd), { });
-_F(void, init_irq, (void), { });
 _F(void, restart, (void), { while(1); });
 _F(void, halt, (void), { while(1); });
 _F(void, power_off, (void), { while(1); });
@@ -42,6 +41,6 @@ _F(void, pcibios_init, (void), { });
 _F(void, calibrate_ccount, (void),
 {
         pr_err("ERROR: Cannot calibrate cpu frequency! Assuming 10MHz.\n");
-        ccount_per_jiffy = 10 * (1000000UL/HZ);
+        ccount_freq = 10 * 1000000UL;
 });
 #endif
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 6dd25ecde3f5..42a8bba0b0ea 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -152,8 +152,8 @@ static int __init parse_tag_initrd(const bp_tag_t* tag)
 {
         meminfo_t* mi;
         mi = (meminfo_t*)(tag->data);
-        initrd_start = (void*)(mi->start);
-        initrd_end = (void*)(mi->end);
+        initrd_start = __va(mi->start);
+        initrd_end = __va(mi->end);
 
         return 0;
 }
@@ -164,7 +164,7 @@ __tagtable(BP_TAG_INITRD, parse_tag_initrd);
 
 static int __init parse_tag_fdt(const bp_tag_t *tag)
 {
-        dtb_start = (void *)(tag->data[0]);
+        dtb_start = __va(tag->data[0]);
         return 0;
 }
 
@@ -256,7 +256,7 @@ void __init early_init_devtree(void *params)
 static void __init copy_devtree(void)
 {
         void *alloc = early_init_dt_alloc_memory_arch(
-                        be32_to_cpu(initial_boot_params->totalsize), 0);
+                        be32_to_cpu(initial_boot_params->totalsize), 8);
         if (alloc) {
                 memcpy(alloc, initial_boot_params,
                                 be32_to_cpu(initial_boot_params->totalsize));
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index ffb474104311..24bb0c1776ba 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -16,6 +16,7 @@
 #include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/clocksource.h>
+#include <linux/clockchips.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/init.h>
@@ -23,13 +24,13 @@
 #include <linux/profile.h>
 #include <linux/delay.h>
 #include <linux/irqdomain.h>
+#include <linux/sched_clock.h>
 
 #include <asm/timex.h>
 #include <asm/platform.h>
 
 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
-unsigned long ccount_per_jiffy;         /* per 1/HZ */
-unsigned long nsec_per_ccount;          /* nsec per ccount increment */
+unsigned long ccount_freq;              /* ccount Hz */
 #endif
 
 static cycle_t ccount_read(struct clocksource *cs)
@@ -37,6 +38,11 @@ static cycle_t ccount_read(struct clocksource *cs)
         return (cycle_t)get_ccount();
 }
 
+static u32 notrace ccount_sched_clock_read(void)
+{
+        return get_ccount();
+}
+
 static struct clocksource ccount_clocksource = {
         .name = "ccount",
         .rating = 200,
@@ -44,29 +50,98 @@ static struct clocksource ccount_clocksource = {
         .mask = CLOCKSOURCE_MASK(32),
 };
 
+static int ccount_timer_set_next_event(unsigned long delta,
+                struct clock_event_device *dev);
+static void ccount_timer_set_mode(enum clock_event_mode mode,
+                struct clock_event_device *evt);
+static struct ccount_timer_t {
+        struct clock_event_device evt;
+        int irq_enabled;
+} ccount_timer = {
+        .evt = {
+                .name           = "ccount_clockevent",
+                .features       = CLOCK_EVT_FEAT_ONESHOT,
+                .rating         = 300,
+                .set_next_event = ccount_timer_set_next_event,
+                .set_mode       = ccount_timer_set_mode,
+        },
+};
+
+static int ccount_timer_set_next_event(unsigned long delta,
+                struct clock_event_device *dev)
+{
+        unsigned long flags, next;
+        int ret = 0;
+
+        local_irq_save(flags);
+        next = get_ccount() + delta;
+        set_linux_timer(next);
+        if (next - get_ccount() > delta)
+                ret = -ETIME;
+        local_irq_restore(flags);
+
+        return ret;
+}
+
+static void ccount_timer_set_mode(enum clock_event_mode mode,
+                struct clock_event_device *evt)
+{
+        struct ccount_timer_t *timer =
+                container_of(evt, struct ccount_timer_t, evt);
+
+        /*
+         * There is no way to disable the timer interrupt at the device level,
+         * only at the intenable register itself. Since enable_irq/disable_irq
+         * calls are nested, we need to make sure that these calls are
+         * balanced.
+         */
+        switch (mode) {
+        case CLOCK_EVT_MODE_SHUTDOWN:
+        case CLOCK_EVT_MODE_UNUSED:
+                if (timer->irq_enabled) {
+                        disable_irq(evt->irq);
+                        timer->irq_enabled = 0;
+                }
+                break;
+        case CLOCK_EVT_MODE_RESUME:
+        case CLOCK_EVT_MODE_ONESHOT:
+                if (!timer->irq_enabled) {
+                        enable_irq(evt->irq);
+                        timer->irq_enabled = 1;
+                }
+        default:
+                break;
+        }
+}
+
 static irqreturn_t timer_interrupt(int irq, void *dev_id);
 static struct irqaction timer_irqaction = {
         .handler =      timer_interrupt,
-        .flags =        IRQF_DISABLED,
+        .flags =        IRQF_TIMER,
         .name =         "timer",
+        .dev_id =       &ccount_timer,
 };
 
 void __init time_init(void)
 {
-        unsigned int irq;
 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
         printk("Calibrating CPU frequency ");
         platform_calibrate_ccount();
-        printk("%d.%02d MHz\n", (int)ccount_per_jiffy/(1000000/HZ),
-                        (int)(ccount_per_jiffy/(10000/HZ))%100);
+        printk("%d.%02d MHz\n", (int)ccount_freq/1000000,
+                        (int)(ccount_freq/10000)%100);
 #endif
         clocksource_register_hz(&ccount_clocksource, CCOUNT_PER_JIFFY * HZ);
 
-        /* Initialize the linux timer interrupt. */
+        ccount_timer.evt.cpumask = cpumask_of(0);
+        ccount_timer.evt.irq = irq_create_mapping(NULL, LINUX_TIMER_INT);
+        if (WARN(!ccount_timer.evt.irq, "error: can't map timer irq"))
+                return;
+        clockevents_config_and_register(&ccount_timer.evt, ccount_freq, 0xf,
+                        0xffffffff);
+        setup_irq(ccount_timer.evt.irq, &timer_irqaction);
+        ccount_timer.irq_enabled = 1;
 
-        irq = irq_create_mapping(NULL, LINUX_TIMER_INT);
-        setup_irq(irq, &timer_irqaction);
-        set_linux_timer(get_ccount() + CCOUNT_PER_JIFFY);
+        setup_sched_clock(ccount_sched_clock_read, 32, ccount_freq);
 }
 
 /*
@@ -75,41 +150,19 @@ void __init time_init(void)
 
 irqreturn_t timer_interrupt (int irq, void *dev_id)
 {
+        struct ccount_timer_t *timer = dev_id;
+        struct clock_event_device *evt = &timer->evt;
 
-        unsigned long next;
-
-        next = get_linux_timer();
-
-again:
-        while ((signed long)(get_ccount() - next) > 0) {
-
-                profile_tick(CPU_PROFILING);
-#ifndef CONFIG_SMP
-                update_process_times(user_mode(get_irq_regs()));
-#endif
-
-                xtime_update(1); /* Linux handler in kernel/time/timekeeping */
-
-                /* Note that writing CCOMPARE clears the interrupt. */
-
-                next += CCOUNT_PER_JIFFY;
-                set_linux_timer(next);
-        }
+        evt->event_handler(evt);
 
         /* Allow platform to do something useful (Wdog). */
-
         platform_heartbeat();
 
-        /* Make sure we didn't miss any tick... */
-
-        if ((signed long)(get_ccount() - next) > 0)
-                goto again;
-
         return IRQ_HANDLED;
 }
 
 #ifndef CONFIG_GENERIC_CALIBRATE_DELAY
-void __cpuinit calibrate_delay(void)
+void calibrate_delay(void)
 {
         loops_per_jiffy = CCOUNT_PER_JIFFY;
         printk("Calibrating delay loop (skipped)... "
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index 42c53c87c204..d8507f812f46 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -124,3 +124,7 @@ extern long common_exception_return;
 extern long _spill_registers;
 EXPORT_SYMBOL(common_exception_return);
 EXPORT_SYMBOL(_spill_registers);
+
+#ifdef CONFIG_FUNCTION_TRACER
+EXPORT_SYMBOL(_mcount);
+#endif
diff --git a/arch/xtensa/mm/tlb.c b/arch/xtensa/mm/tlb.c
index 5411aa67c68e..ca9d2366bf12 100644
--- a/arch/xtensa/mm/tlb.c
+++ b/arch/xtensa/mm/tlb.c
@@ -64,7 +64,7 @@ void flush_tlb_mm(struct mm_struct *mm)
 {
         if (mm == current->active_mm) {
                 unsigned long flags;
-                local_save_flags(flags);
+                local_irq_save(flags);
                 __get_new_mmu_context(mm);
                 __load_mmu_context(mm);
                 local_irq_restore(flags);
@@ -94,7 +94,7 @@ void flush_tlb_range (struct vm_area_struct *vma,
         printk("[tlbrange<%02lx,%08lx,%08lx>]\n",
                         (unsigned long)mm->context, start, end);
 #endif
-        local_save_flags(flags);
+        local_irq_save(flags);
 
         if (end-start + (PAGE_SIZE-1) <= _TLB_ENTRIES << PAGE_SHIFT) {
                 int oldpid = get_rasid_register();
@@ -128,9 +128,10 @@ void flush_tlb_page (struct vm_area_struct *vma, unsigned long page)
         if(mm->context == NO_CONTEXT)
                 return;
 
-        local_save_flags(flags);
+        local_irq_save(flags);
 
         oldpid = get_rasid_register();
+        set_rasid_register(ASID_INSERT(mm->context));
 
         if (vma->vm_flags & VM_EXEC)
                 invalidate_itlb_mapping(page);
@@ -140,3 +141,116 @@ void flush_tlb_page (struct vm_area_struct *vma, unsigned long page)
 
         local_irq_restore(flags);
 }
+
+#ifdef CONFIG_DEBUG_TLB_SANITY
+
+static unsigned get_pte_for_vaddr(unsigned vaddr)
+{
+        struct task_struct *task = get_current();
+        struct mm_struct *mm = task->mm;
+        pgd_t *pgd;
+        pmd_t *pmd;
+        pte_t *pte;
+
+        if (!mm)
+                mm = task->active_mm;
+        pgd = pgd_offset(mm, vaddr);
+        if (pgd_none_or_clear_bad(pgd))
+                return 0;
+        pmd = pmd_offset(pgd, vaddr);
+        if (pmd_none_or_clear_bad(pmd))
+                return 0;
+        pte = pte_offset_map(pmd, vaddr);
+        if (!pte)
+                return 0;
+        return pte_val(*pte);
+}
+
+enum {
+        TLB_SUSPICIOUS  = 1,
+        TLB_INSANE      = 2,
+};
+
+static void tlb_insane(void)
+{
+        BUG_ON(1);
+}
+
+static void tlb_suspicious(void)
+{
+        WARN_ON(1);
+}
+
+/*
+ * Check that TLB entries with kernel ASID (1) have kernel VMA (>= TASK_SIZE),
+ * and TLB entries with user ASID (>=4) have VMA < TASK_SIZE.
+ *
+ * Check that valid TLB entries either have the same PA as the PTE, or PTE is
+ * marked as non-present. Non-present PTE and the page with non-zero refcount
+ * and zero mapcount is normal for batched TLB flush operation. Zero refcount
+ * means that the page was freed prematurely. Non-zero mapcount is unusual,
+ * but does not necessary means an error, thus marked as suspicious.
+ */
+static int check_tlb_entry(unsigned w, unsigned e, bool dtlb)
+{
+        unsigned tlbidx = w | (e << PAGE_SHIFT);
+        unsigned r0 = dtlb ?
+                read_dtlb_virtual(tlbidx) : read_itlb_virtual(tlbidx);
+        unsigned vpn = (r0 & PAGE_MASK) | (e << PAGE_SHIFT);
+        unsigned pte = get_pte_for_vaddr(vpn);
+        unsigned mm_asid = (get_rasid_register() >> 8) & ASID_MASK;
+        unsigned tlb_asid = r0 & ASID_MASK;
+        bool kernel = tlb_asid == 1;
+        int rc = 0;
+
+        if (tlb_asid > 0 && ((vpn < TASK_SIZE) == kernel)) {
+                pr_err("%cTLB: way: %u, entry: %u, VPN %08x in %s PTE\n",
+                                dtlb ? 'D' : 'I', w, e, vpn,
+                                kernel ? "kernel" : "user");
+                rc |= TLB_INSANE;
+        }
+
+        if (tlb_asid == mm_asid) {
+                unsigned r1 = dtlb ? read_dtlb_translation(tlbidx) :
+                        read_itlb_translation(tlbidx);
+                if ((pte ^ r1) & PAGE_MASK) {
+                        pr_err("%cTLB: way: %u, entry: %u, mapping: %08x->%08x, PTE: %08x\n",
+                                        dtlb ? 'D' : 'I', w, e, r0, r1, pte);
+                        if (pte == 0 || !pte_present(__pte(pte))) {
+                                struct page *p = pfn_to_page(r1 >> PAGE_SHIFT);
+                                pr_err("page refcount: %d, mapcount: %d\n",
+                                                page_count(p),
+                                                page_mapcount(p));
+                                if (!page_count(p))
+                                        rc |= TLB_INSANE;
+                                else if (page_mapped(p))
+                                        rc |= TLB_SUSPICIOUS;
+                        } else {
+                                rc |= TLB_INSANE;
+                        }
+                }
+        }
+        return rc;
+}
+
+void check_tlb_sanity(void)
+{
+        unsigned long flags;
+        unsigned w, e;
+        int bug = 0;
+
+        local_irq_save(flags);
+        for (w = 0; w < DTLB_ARF_WAYS; ++w)
+                for (e = 0; e < (1 << XCHAL_DTLB_ARF_ENTRIES_LOG2); ++e)
+                        bug |= check_tlb_entry(w, e, true);
+        for (w = 0; w < ITLB_ARF_WAYS; ++w)
+                for (e = 0; e < (1 << XCHAL_ITLB_ARF_ENTRIES_LOG2); ++e)
+                        bug |= check_tlb_entry(w, e, false);
+        if (bug & TLB_INSANE)
+                tlb_insane();
+        if (bug & TLB_SUSPICIOUS)
+                tlb_suspicious();
+        local_irq_restore(flags);
+}
+
+#endif /* CONFIG_DEBUG_TLB_SANITY */
diff --git a/arch/xtensa/platforms/iss/network.c b/arch/xtensa/platforms/iss/network.c
index 7d0fea6d7f20..56f88b7afe2f 100644
--- a/arch/xtensa/platforms/iss/network.c
+++ b/arch/xtensa/platforms/iss/network.c
@@ -700,7 +700,7 @@ struct iss_net_init {
 
 #define ERR KERN_ERR "iss_net_setup: "
 
-static int iss_net_setup(char *str)
+static int __init iss_net_setup(char *str)
 {
         struct iss_net_private *device = NULL;
         struct iss_net_init *new;
diff --git a/arch/xtensa/platforms/iss/simdisk.c b/arch/xtensa/platforms/iss/simdisk.c
index c0edb35424ce..8c6e819cd8ed 100644
--- a/arch/xtensa/platforms/iss/simdisk.c
+++ b/arch/xtensa/platforms/iss/simdisk.c
@@ -108,13 +108,13 @@ static int simdisk_xfer_bio(struct simdisk *dev, struct bio *bio)
         sector_t sector = bio->bi_sector;
 
         bio_for_each_segment(bvec, bio, i) {
-                char *buffer = __bio_kmap_atomic(bio, i, KM_USER0);
+                char *buffer = __bio_kmap_atomic(bio, i);
                 unsigned len = bvec->bv_len >> SECTOR_SHIFT;
 
                 simdisk_transfer(dev, sector, len, buffer,
                                 bio_data_dir(bio) == WRITE);
                 sector += len;
-                __bio_kunmap_atomic(bio, KM_USER0);
+                __bio_kunmap_atomic(bio);
         }
         return 0;
 }
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
index 96ef8eeb064e..74bb74fa3f87 100644
--- a/arch/xtensa/platforms/xtfpga/setup.c
+++ b/arch/xtensa/platforms/xtfpga/setup.c
@@ -163,7 +163,7 @@ void platform_heartbeat(void)
 
 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
 
-void platform_calibrate_ccount(void)
+void __init platform_calibrate_ccount(void)
 {
         long clk_freq = 0;
 #ifdef CONFIG_OF
@@ -179,8 +179,7 @@ void platform_calibrate_ccount(void)
         if (!clk_freq)
                 clk_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
 
-        ccount_per_jiffy = clk_freq / HZ;
-        nsec_per_ccount = 1000000000UL / clk_freq;
+        ccount_freq = clk_freq;
 }
 
 #endif
diff --git a/arch/xtensa/variants/s6000/delay.c b/arch/xtensa/variants/s6000/delay.c
index 54b2b573f166..39154563ee17 100644
--- a/arch/xtensa/variants/s6000/delay.c
+++ b/arch/xtensa/variants/s6000/delay.c
@@ -1,4 +1,3 @@
-#include <asm/delay.h>
 #include <asm/timex.h>
 #include <asm/io.h>
 #include <variant/hardware.h>
@@ -17,11 +16,10 @@ void platform_calibrate_ccount(void)
                 "1:     l32i %0, %2, 0 ;"
                 "       beq %0, %1, 1b ;"
                 : "=&a"(u) : "a"(t), "a"(tstamp));
-                b = xtensa_get_ccount();
+                b = get_ccount();
                 if (i == LOOPS)
                         a = b;
         } while (--i >= 0);
         b -= a;
-        nsec_per_ccount = (LOOPS * 10000) / b;
-        ccount_per_jiffy = b * (100000UL / (LOOPS * HZ));
+        ccount_freq = b * (100000UL / LOOPS);
 }