diff options
author | Andrew Victor <andrew@sanpeople.com> | 2007-05-02 12:14:57 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-03 09:10:21 -0400 |
commit | e8788babe6ddb35ab041a146d6b3e18874513566 (patch) | |
tree | 8482a53b5878bb442538ced99443a8e77114f9a8 /arch | |
parent | ce813b97e58cdfd780b8f8b4e15cd3ebfe940415 (diff) |
[ARM] 4351/1: AT91: Define rest of peripheral clocks
Define and register the remaining peripheral clocks for the AT91
processors.
AT91SAM9261 clocks patch by Ivan Zhakov.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-at91/at91rm9200.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9261.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9263.c | 48 |
4 files changed, 84 insertions, 9 deletions
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 2ddcdd69df7d..2cad2bf864be 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -117,6 +117,21 @@ static struct clk pioD_clk = { | |||
117 | .pmc_mask = 1 << AT91RM9200_ID_PIOD, | 117 | .pmc_mask = 1 << AT91RM9200_ID_PIOD, |
118 | .type = CLK_TYPE_PERIPHERAL, | 118 | .type = CLK_TYPE_PERIPHERAL, |
119 | }; | 119 | }; |
120 | static struct clk ssc0_clk = { | ||
121 | .name = "ssc0_clk", | ||
122 | .pmc_mask = 1 << AT91RM9200_ID_SSC0, | ||
123 | .type = CLK_TYPE_PERIPHERAL, | ||
124 | }; | ||
125 | static struct clk ssc1_clk = { | ||
126 | .name = "ssc1_clk", | ||
127 | .pmc_mask = 1 << AT91RM9200_ID_SSC1, | ||
128 | .type = CLK_TYPE_PERIPHERAL, | ||
129 | }; | ||
130 | static struct clk ssc2_clk = { | ||
131 | .name = "ssc2_clk", | ||
132 | .pmc_mask = 1 << AT91RM9200_ID_SSC2, | ||
133 | .type = CLK_TYPE_PERIPHERAL, | ||
134 | }; | ||
120 | static struct clk tc0_clk = { | 135 | static struct clk tc0_clk = { |
121 | .name = "tc0_clk", | 136 | .name = "tc0_clk", |
122 | .pmc_mask = 1 << AT91RM9200_ID_TC0, | 137 | .pmc_mask = 1 << AT91RM9200_ID_TC0, |
@@ -161,7 +176,9 @@ static struct clk *periph_clocks[] __initdata = { | |||
161 | &udc_clk, | 176 | &udc_clk, |
162 | &twi_clk, | 177 | &twi_clk, |
163 | &spi_clk, | 178 | &spi_clk, |
164 | // ssc 0 .. ssc2 | 179 | &ssc0_clk, |
180 | &ssc1_clk, | ||
181 | &ssc2_clk, | ||
165 | &tc0_clk, | 182 | &tc0_clk, |
166 | &tc1_clk, | 183 | &tc1_clk, |
167 | &tc2_clk, | 184 | &tc2_clk, |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 6ea41d8266cb..e47381e8aaba 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -119,6 +119,11 @@ static struct clk spi1_clk = { | |||
119 | .pmc_mask = 1 << AT91SAM9260_ID_SPI1, | 119 | .pmc_mask = 1 << AT91SAM9260_ID_SPI1, |
120 | .type = CLK_TYPE_PERIPHERAL, | 120 | .type = CLK_TYPE_PERIPHERAL, |
121 | }; | 121 | }; |
122 | static struct clk ssc_clk = { | ||
123 | .name = "ssc_clk", | ||
124 | .pmc_mask = 1 << AT91SAM9260_ID_SSC, | ||
125 | .type = CLK_TYPE_PERIPHERAL, | ||
126 | }; | ||
122 | static struct clk tc0_clk = { | 127 | static struct clk tc0_clk = { |
123 | .name = "tc0_clk", | 128 | .name = "tc0_clk", |
124 | .pmc_mask = 1 << AT91SAM9260_ID_TC0, | 129 | .pmc_mask = 1 << AT91SAM9260_ID_TC0, |
@@ -193,7 +198,7 @@ static struct clk *periph_clocks[] __initdata = { | |||
193 | &twi_clk, | 198 | &twi_clk, |
194 | &spi0_clk, | 199 | &spi0_clk, |
195 | &spi1_clk, | 200 | &spi1_clk, |
196 | // ssc | 201 | &ssc_clk, |
197 | &tc0_clk, | 202 | &tc0_clk, |
198 | &tc1_clk, | 203 | &tc1_clk, |
199 | &tc2_clk, | 204 | &tc2_clk, |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 784d1e682d6d..dfe8c39c9fb9 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -97,6 +97,21 @@ static struct clk spi1_clk = { | |||
97 | .pmc_mask = 1 << AT91SAM9261_ID_SPI1, | 97 | .pmc_mask = 1 << AT91SAM9261_ID_SPI1, |
98 | .type = CLK_TYPE_PERIPHERAL, | 98 | .type = CLK_TYPE_PERIPHERAL, |
99 | }; | 99 | }; |
100 | static struct clk ssc0_clk = { | ||
101 | .name = "ssc0_clk", | ||
102 | .pmc_mask = 1 << AT91SAM9261_ID_SSC0, | ||
103 | .type = CLK_TYPE_PERIPHERAL, | ||
104 | }; | ||
105 | static struct clk ssc1_clk = { | ||
106 | .name = "ssc1_clk", | ||
107 | .pmc_mask = 1 << AT91SAM9261_ID_SSC1, | ||
108 | .type = CLK_TYPE_PERIPHERAL, | ||
109 | }; | ||
110 | static struct clk ssc2_clk = { | ||
111 | .name = "ssc2_clk", | ||
112 | .pmc_mask = 1 << AT91SAM9261_ID_SSC2, | ||
113 | .type = CLK_TYPE_PERIPHERAL, | ||
114 | }; | ||
100 | static struct clk tc0_clk = { | 115 | static struct clk tc0_clk = { |
101 | .name = "tc0_clk", | 116 | .name = "tc0_clk", |
102 | .pmc_mask = 1 << AT91SAM9261_ID_TC0, | 117 | .pmc_mask = 1 << AT91SAM9261_ID_TC0, |
@@ -135,7 +150,9 @@ static struct clk *periph_clocks[] __initdata = { | |||
135 | &twi_clk, | 150 | &twi_clk, |
136 | &spi0_clk, | 151 | &spi0_clk, |
137 | &spi1_clk, | 152 | &spi1_clk, |
138 | // ssc 0 .. ssc2 | 153 | &ssc0_clk, |
154 | &ssc1_clk, | ||
155 | &ssc2_clk, | ||
139 | &tc0_clk, | 156 | &tc0_clk, |
140 | &tc1_clk, | 157 | &tc1_clk, |
141 | &tc2_clk, | 158 | &tc2_clk, |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 0e89a7fca3fa..00e27b177857 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -87,6 +87,11 @@ static struct clk mmc1_clk = { | |||
87 | .pmc_mask = 1 << AT91SAM9263_ID_MCI1, | 87 | .pmc_mask = 1 << AT91SAM9263_ID_MCI1, |
88 | .type = CLK_TYPE_PERIPHERAL, | 88 | .type = CLK_TYPE_PERIPHERAL, |
89 | }; | 89 | }; |
90 | static struct clk can_clk = { | ||
91 | .name = "can_clk", | ||
92 | .pmc_mask = 1 << AT91SAM9263_ID_CAN, | ||
93 | .type = CLK_TYPE_PERIPHERAL, | ||
94 | }; | ||
90 | static struct clk twi_clk = { | 95 | static struct clk twi_clk = { |
91 | .name = "twi_clk", | 96 | .name = "twi_clk", |
92 | .pmc_mask = 1 << AT91SAM9263_ID_TWI, | 97 | .pmc_mask = 1 << AT91SAM9263_ID_TWI, |
@@ -102,16 +107,46 @@ static struct clk spi1_clk = { | |||
102 | .pmc_mask = 1 << AT91SAM9263_ID_SPI1, | 107 | .pmc_mask = 1 << AT91SAM9263_ID_SPI1, |
103 | .type = CLK_TYPE_PERIPHERAL, | 108 | .type = CLK_TYPE_PERIPHERAL, |
104 | }; | 109 | }; |
110 | static struct clk ssc0_clk = { | ||
111 | .name = "ssc0_clk", | ||
112 | .pmc_mask = 1 << AT91SAM9263_ID_SSC0, | ||
113 | .type = CLK_TYPE_PERIPHERAL, | ||
114 | }; | ||
115 | static struct clk ssc1_clk = { | ||
116 | .name = "ssc1_clk", | ||
117 | .pmc_mask = 1 << AT91SAM9263_ID_SSC1, | ||
118 | .type = CLK_TYPE_PERIPHERAL, | ||
119 | }; | ||
120 | static struct clk ac97_clk = { | ||
121 | .name = "ac97_clk", | ||
122 | .pmc_mask = 1 << AT91SAM9263_ID_AC97C, | ||
123 | .type = CLK_TYPE_PERIPHERAL, | ||
124 | }; | ||
105 | static struct clk tcb_clk = { | 125 | static struct clk tcb_clk = { |
106 | .name = "tcb_clk", | 126 | .name = "tcb_clk", |
107 | .pmc_mask = 1 << AT91SAM9263_ID_TCB, | 127 | .pmc_mask = 1 << AT91SAM9263_ID_TCB, |
108 | .type = CLK_TYPE_PERIPHERAL, | 128 | .type = CLK_TYPE_PERIPHERAL, |
109 | }; | 129 | }; |
130 | static struct clk pwmc_clk = { | ||
131 | .name = "pwmc_clk", | ||
132 | .pmc_mask = 1 << AT91SAM9263_ID_PWMC, | ||
133 | .type = CLK_TYPE_PERIPHERAL, | ||
134 | }; | ||
110 | static struct clk macb_clk = { | 135 | static struct clk macb_clk = { |
111 | .name = "macb_clk", | 136 | .name = "macb_clk", |
112 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, | 137 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, |
113 | .type = CLK_TYPE_PERIPHERAL, | 138 | .type = CLK_TYPE_PERIPHERAL, |
114 | }; | 139 | }; |
140 | static struct clk dma_clk = { | ||
141 | .name = "dma_clk", | ||
142 | .pmc_mask = 1 << AT91SAM9263_ID_DMA, | ||
143 | .type = CLK_TYPE_PERIPHERAL, | ||
144 | }; | ||
145 | static struct clk twodge_clk = { | ||
146 | .name = "2dge_clk", | ||
147 | .pmc_mask = 1 << AT91SAM9263_ID_2DGE, | ||
148 | .type = CLK_TYPE_PERIPHERAL, | ||
149 | }; | ||
115 | static struct clk udc_clk = { | 150 | static struct clk udc_clk = { |
116 | .name = "udc_clk", | 151 | .name = "udc_clk", |
117 | .pmc_mask = 1 << AT91SAM9263_ID_UDP, | 152 | .pmc_mask = 1 << AT91SAM9263_ID_UDP, |
@@ -142,20 +177,21 @@ static struct clk *periph_clocks[] __initdata = { | |||
142 | &usart2_clk, | 177 | &usart2_clk, |
143 | &mmc0_clk, | 178 | &mmc0_clk, |
144 | &mmc1_clk, | 179 | &mmc1_clk, |
145 | // can | 180 | &can_clk, |
146 | &twi_clk, | 181 | &twi_clk, |
147 | &spi0_clk, | 182 | &spi0_clk, |
148 | &spi1_clk, | 183 | &spi1_clk, |
149 | // ssc0 .. ssc1 | 184 | &ssc0_clk, |
150 | // ac97 | 185 | &ssc1_clk, |
186 | &ac97_clk, | ||
151 | &tcb_clk, | 187 | &tcb_clk, |
152 | // pwmc | 188 | &pwmc_clk, |
153 | &macb_clk, | 189 | &macb_clk, |
154 | // 2dge | 190 | &twodge_clk, |
155 | &udc_clk, | 191 | &udc_clk, |
156 | &isi_clk, | 192 | &isi_clk, |
157 | &lcdc_clk, | 193 | &lcdc_clk, |
158 | // dma | 194 | &dma_clk, |
159 | &ohci_clk, | 195 | &ohci_clk, |
160 | // irq0 .. irq1 | 196 | // irq0 .. irq1 |
161 | }; | 197 | }; |