Merge branch 'prcm-fixes-3.1' of git://git.pwsan.com/linux-2.6 into fixes-part-2

11 files changed, 206 insertions, 31 deletions

diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 044df38f65ce..257882028492 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1605,6 +1605,7 @@ static struct clk gpmc_ick = {
         .ops            = &clkops_omap2_dflt,
         .enable_reg     = OMAP4430_CM_L3_2_GPMC_CLKCTRL,
         .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
+        .flags          = ENABLE_ON_INIT,
         .clkdm_name     = "l3_2_clkdm",
         .parent         = &l3_div_ck,
         .recalc         = &followparent_recalc,
@@ -3032,10 +3033,10 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "dmic_sync_mux_ck",             &dmic_sync_mux_ck,      CK_443X),
         CLK(NULL,       "dmic_fck",                     &dmic_fck,      CK_443X),
         CLK(NULL,       "dsp_fck",                      &dsp_fck,       CK_443X),
-        CLK("omapdss_dss",      "sys_clk",                      &dss_sys_clk,   CK_443X),
-        CLK("omapdss_dss",      "tv_clk",                       &dss_tv_clk,    CK_443X),
-        CLK("omapdss_dss",      "video_clk",                    &dss_48mhz_clk, CK_443X),
-        CLK("omapdss_dss",      "fck",                          &dss_dss_clk,   CK_443X),
+        CLK(NULL,       "dss_sys_clk",                  &dss_sys_clk,   CK_443X),
+        CLK(NULL,       "dss_tv_clk",                   &dss_tv_clk,    CK_443X),
+        CLK(NULL,       "dss_48mhz_clk",                &dss_48mhz_clk, CK_443X),
+        CLK(NULL,       "dss_dss_clk",                  &dss_dss_clk,   CK_443X),
         CLK("omapdss_dss",      "ick",                          &dss_fck,       CK_443X),
         CLK(NULL,       "efuse_ctrl_cust_fck",          &efuse_ctrl_cust_fck,   CK_443X),
         CLK(NULL,       "emif1_fck",                    &emif1_fck,     CK_443X),
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index 79c478c4cb1c..ace99944e96f 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -21,9 +21,19 @@
 
 #include <plat/cpu.h>
 #include <plat/i2c.h>
+#include <plat/common.h>
+#include <plat/omap_hwmod.h>
 
 #include "mux.h"
 
+/* In register I2C_CON, Bit 15 is the I2C enable bit */
+#define I2C_EN                                  BIT(15)
+#define OMAP2_I2C_CON_OFFSET                    0x24
+#define OMAP4_I2C_CON_OFFSET                    0xA4
+
+/* Maximum microseconds to wait for OMAP module to softreset */
+#define MAX_MODULE_SOFTRESET_WAIT       10000
+
 void __init omap2_i2c_mux_pins(int bus_id)
 {
         char mux_name[sizeof("i2c2_scl.i2c2_scl")];
@@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id)
         sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
         omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
 }
+
+/**
+ * omap_i2c_reset - reset the omap i2c module.
+ * @oh: struct omap_hwmod *
+ *
+ * The i2c moudle in omap2, omap3 had a special sequence to reset. The
+ * sequence is:
+ * - Disable the I2C.
+ * - Write to SOFTRESET bit.
+ * - Enable the I2C.
+ * - Poll on the RESETDONE bit.
+ * The sequence is implemented in below function. This is called for 2420,
+ * 2430 and omap3.
+ */
+int omap_i2c_reset(struct omap_hwmod *oh)
+{
+        u32 v;
+        u16 i2c_con;
+        int c = 0;
+
+        if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
+                i2c_con = OMAP4_I2C_CON_OFFSET;
+        } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
+                i2c_con = OMAP2_I2C_CON_OFFSET;
+        } else {
+                WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
+                     oh->name);
+                return -EINVAL;
+        }
+
+        /* Disable I2C */
+        v = omap_hwmod_read(oh, i2c_con);
+        v &= ~I2C_EN;
+        omap_hwmod_write(v, oh, i2c_con);
+
+        /* Write to the SOFTRESET bit */
+        omap_hwmod_softreset(oh);
+
+        /* Enable I2C */
+        v = omap_hwmod_read(oh, i2c_con);
+        v |= I2C_EN;
+        omap_hwmod_write(v, oh, i2c_con);
+
+        /* Poll on RESETDONE bit */
+        omap_test_timeout((omap_hwmod_read(oh,
+                                oh->class->sysc->syss_offs)
+                                & SYSS_RESETDONE_MASK),
+                                MAX_MODULE_SOFTRESET_WAIT, c);
+
+        if (c == MAX_MODULE_SOFTRESET_WAIT)
+                pr_warning("%s: %s: softreset failed (waited %d usec)\n",
+                        __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
+        else
+                pr_debug("%s: %s: softreset in %d usec\n", __func__,
+                        oh->name, c);
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 7d242c9e2a2c..02b6016393a8 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1656,6 +1656,33 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
 }
 
 /**
+ * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
+ * @oh: struct omap_hwmod *
+ *
+ * This is a public function exposed to drivers. Some drivers may need to do
+ * some settings before and after resetting the device.  Those drivers after
+ * doing the necessary settings could use this function to start a reset by
+ * setting the SYSCONFIG.SOFTRESET bit.
+ */
+int omap_hwmod_softreset(struct omap_hwmod *oh)
+{
+        u32 v;
+        int ret;
+
+        if (!oh || !(oh->_sysc_cache))
+                return -EINVAL;
+
+        v = oh->_sysc_cache;
+        ret = _set_softreset(oh, &v);
+        if (ret)
+                goto error;
+        _write_sysconfig(v, oh);
+
+error:
+        return ret;
+}
+
+/**
  * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  * @oh: struct omap_hwmod *
  * @idlemode: SIDLEMODE field bits (shifted to bit 0)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index f3901abf2c28..a015c69068f6 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -1029,9 +1029,16 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
 static struct omap_hwmod_class i2c_class = {
         .name           = "i2c",
         .sysc           = &i2c_sysc,
+        .rev            = OMAP_I2C_IP_VERSION_1,
+        .reset          = &omap_i2c_reset,
 };
 
-static struct omap_i2c_dev_attr i2c_dev_attr;
+static struct omap_i2c_dev_attr i2c_dev_attr = {
+        .flags          = OMAP_I2C_FLAG_NO_FIFO |
+                          OMAP_I2C_FLAG_SIMPLE_CLOCK |
+                          OMAP_I2C_FLAG_16BIT_DATA_REG |
+                          OMAP_I2C_FLAG_BUS_SHIFT_2,
+};
 
 /* I2C1 */
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 2a52f025bd06..16743c7d6e8e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1078,10 +1078,15 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
 static struct omap_hwmod_class i2c_class = {
         .name           = "i2c",
         .sysc           = &i2c_sysc,
+        .rev            = OMAP_I2C_IP_VERSION_1,
+        .reset          = &omap_i2c_reset,
 };
 
 static struct omap_i2c_dev_attr i2c_dev_attr = {
         .fifo_depth     = 8, /* bytes */
+        .flags          = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |
+                          OMAP_I2C_FLAG_BUS_SHIFT_2 |
+                          OMAP_I2C_FLAG_FORCE_19200_INT_CLK,
 };
 
 /* I2C1 */
@@ -1092,6 +1097,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
 
 static struct omap_hwmod omap2430_i2c1_hwmod = {
         .name           = "i2c1",
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = omap2_i2c1_mpu_irqs,
         .sdma_reqs      = omap2_i2c1_sdma_reqs,
         .main_clk       = "i2chs1_fck",
@@ -1127,6 +1133,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
 
 static struct omap_hwmod omap2430_i2c2_hwmod = {
         .name           = "i2c2",
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = omap2_i2c2_mpu_irqs,
         .sdma_reqs      = omap2_i2c2_sdma_reqs,
         .main_clk       = "i2chs2_fck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 1a52716e48bf..25bf43b5a4ec 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1306,8 +1306,10 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
 };
 
 static struct omap_hwmod_class i2c_class = {
-        .name = "i2c",
-        .sysc = &i2c_sysc,
+        .name   = "i2c",
+        .sysc   = &i2c_sysc,
+        .rev    = OMAP_I2C_IP_VERSION_1,
+        .reset  = &omap_i2c_reset,
 };
 
 static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
@@ -1607,6 +1609,9 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
 
 static struct omap_i2c_dev_attr i2c1_dev_attr = {
         .fifo_depth     = 8, /* bytes */
+        .flags          = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |
+                          OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |
+                          OMAP_I2C_FLAG_BUS_SHIFT_2,
 };
 
 static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
@@ -1615,6 +1620,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
 
 static struct omap_hwmod omap3xxx_i2c1_hwmod = {
         .name           = "i2c1",
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = omap2_i2c1_mpu_irqs,
         .sdma_reqs      = omap2_i2c1_sdma_reqs,
         .main_clk       = "i2c1_fck",
@@ -1638,6 +1644,9 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
 
 static struct omap_i2c_dev_attr i2c2_dev_attr = {
         .fifo_depth     = 8, /* bytes */
+        .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |
+                 OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |
+                 OMAP_I2C_FLAG_BUS_SHIFT_2,
 };
 
 static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
@@ -1646,6 +1655,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
 
 static struct omap_hwmod omap3xxx_i2c2_hwmod = {
         .name           = "i2c2",
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = omap2_i2c2_mpu_irqs,
         .sdma_reqs      = omap2_i2c2_sdma_reqs,
         .main_clk       = "i2c2_fck",
@@ -1669,6 +1679,9 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
 
 static struct omap_i2c_dev_attr i2c3_dev_attr = {
         .fifo_depth     = 64, /* bytes */
+        .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |
+                 OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |
+                 OMAP_I2C_FLAG_BUS_SHIFT_2,
 };
 
 static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
@@ -1688,6 +1701,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
 
 static struct omap_hwmod omap3xxx_i2c3_hwmod = {
         .name           = "i2c3",
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = i2c3_mpu_irqs,
         .sdma_reqs      = i2c3_sdma_reqs,
         .main_clk       = "i2c3_fck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index e01143725b08..5d5df49749df 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -22,11 +22,13 @@
 
 #include <plat/omap_hwmod.h>
 #include <plat/cpu.h>
+#include <plat/i2c.h>
 #include <plat/gpio.h>
 #include <plat/dma.h>
 #include <plat/mcspi.h>
 #include <plat/mcbsp.h>
 #include <plat/mmc.h>
+#include <plat/i2c.h>
 
 #include "omap_hwmod_common_data.h"
 
@@ -1136,7 +1138,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = {
 static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = {
         .master         = &omap44xx_l3_main_2_hwmod,
         .slave          = &omap44xx_dss_hwmod,
-        .clk            = "l3_div_ck",
+        .clk            = "dss_fck",
         .addr           = omap44xx_dss_dma_addrs,
         .user           = OCP_USER_SDMA,
 };
@@ -1175,7 +1177,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
 static struct omap_hwmod omap44xx_dss_hwmod = {
         .name           = "dss_core",
         .class          = &omap44xx_dss_hwmod_class,
-        .main_clk       = "dss_fck",
+        .main_clk       = "dss_dss_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
@@ -1238,7 +1240,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {
 static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = {
         .master         = &omap44xx_l3_main_2_hwmod,
         .slave          = &omap44xx_dss_dispc_hwmod,
-        .clk            = "l3_div_ck",
+        .clk            = "dss_fck",
         .addr           = omap44xx_dss_dispc_dma_addrs,
         .user           = OCP_USER_SDMA,
 };
@@ -1267,17 +1269,26 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
         &omap44xx_l4_per__dss_dispc,
 };
 
+static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+        { .role = "tv_clk", .clk = "dss_tv_clk" },
+        { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
+};
+
 static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
         .name           = "dss_dispc",
         .class          = &omap44xx_dispc_hwmod_class,
+        .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_dss_dispc_irqs,
         .sdma_reqs      = omap44xx_dss_dispc_sdma_reqs,
-        .main_clk       = "dss_fck",
+        .main_clk       = "dss_dss_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
                 },
         },
+        .opt_clks       = dss_dispc_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dispc_opt_clks),
         .slaves         = omap44xx_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -1329,7 +1340,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {
 static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = {
         .master         = &omap44xx_l3_main_2_hwmod,
         .slave          = &omap44xx_dss_dsi1_hwmod,
-        .clk            = "l3_div_ck",
+        .clk            = "dss_fck",
         .addr           = omap44xx_dss_dsi1_dma_addrs,
         .user           = OCP_USER_SDMA,
 };
@@ -1358,17 +1369,23 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = {
         &omap44xx_l4_per__dss_dsi1,
 };
 
+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+};
+
 static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
         .name           = "dss_dsi1",
         .class          = &omap44xx_dsi_hwmod_class,
         .mpu_irqs       = omap44xx_dss_dsi1_irqs,
         .sdma_reqs      = omap44xx_dss_dsi1_sdma_reqs,
-        .main_clk       = "dss_fck",
+        .main_clk       = "dss_dss_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
                 },
         },
+        .opt_clks       = dss_dsi1_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dsi1_opt_clks),
         .slaves         = omap44xx_dss_dsi1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dsi1_slaves),
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -1399,7 +1416,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {
 static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = {
         .master         = &omap44xx_l3_main_2_hwmod,
         .slave          = &omap44xx_dss_dsi2_hwmod,
-        .clk            = "l3_div_ck",
+        .clk            = "dss_fck",
         .addr           = omap44xx_dss_dsi2_dma_addrs,
         .user           = OCP_USER_SDMA,
 };
@@ -1428,17 +1445,23 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = {
         &omap44xx_l4_per__dss_dsi2,
 };
 
+static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+};
+
 static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
         .name           = "dss_dsi2",
         .class          = &omap44xx_dsi_hwmod_class,
         .mpu_irqs       = omap44xx_dss_dsi2_irqs,
         .sdma_reqs      = omap44xx_dss_dsi2_sdma_reqs,
-        .main_clk       = "dss_fck",
+        .main_clk       = "dss_dss_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
                 },
         },
+        .opt_clks       = dss_dsi2_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dsi2_opt_clks),
         .slaves         = omap44xx_dss_dsi2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dsi2_slaves),
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -1489,7 +1512,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {
 static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = {
         .master         = &omap44xx_l3_main_2_hwmod,
         .slave          = &omap44xx_dss_hdmi_hwmod,
-        .clk            = "l3_div_ck",
+        .clk            = "dss_fck",
         .addr           = omap44xx_dss_hdmi_dma_addrs,
         .user           = OCP_USER_SDMA,
 };
@@ -1518,17 +1541,23 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = {
         &omap44xx_l4_per__dss_hdmi,
 };
 
+static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss_sys_clk" },
+};
+
 static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
         .name           = "dss_hdmi",
         .class          = &omap44xx_hdmi_hwmod_class,
         .mpu_irqs       = omap44xx_dss_hdmi_irqs,
         .sdma_reqs      = omap44xx_dss_hdmi_sdma_reqs,
-        .main_clk       = "dss_fck",
+        .main_clk       = "dss_dss_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
                 },
         },
+        .opt_clks       = dss_hdmi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_hdmi_opt_clks),
         .slaves         = omap44xx_dss_hdmi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_hdmi_slaves),
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -1574,7 +1603,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {
 static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = {
         .master         = &omap44xx_l3_main_2_hwmod,
         .slave          = &omap44xx_dss_rfbi_hwmod,
-        .clk            = "l3_div_ck",
+        .clk            = "dss_fck",
         .addr           = omap44xx_dss_rfbi_dma_addrs,
         .user           = OCP_USER_SDMA,
 };
@@ -1603,16 +1632,22 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = {
         &omap44xx_l4_per__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_fck" },
+};
+
 static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
         .class          = &omap44xx_rfbi_hwmod_class,
         .sdma_reqs      = omap44xx_dss_rfbi_sdma_reqs,
-        .main_clk       = "dss_fck",
+        .main_clk       = "dss_dss_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
                 },
         },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
         .slaves         = omap44xx_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_rfbi_slaves),
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -1642,7 +1677,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = {
 static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = {
         .master         = &omap44xx_l3_main_2_hwmod,
         .slave          = &omap44xx_dss_venc_hwmod,
-        .clk            = "l3_div_ck",
+        .clk            = "dss_fck",
         .addr           = omap44xx_dss_venc_dma_addrs,
         .user           = OCP_USER_SDMA,
 };
@@ -1674,7 +1709,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {
 static struct omap_hwmod omap44xx_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap44xx_venc_hwmod_class,
-        .main_clk       = "dss_fck",
+        .main_clk       = "dss_dss_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
@@ -2127,6 +2162,12 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
 static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
         .name   = "i2c",
         .sysc   = &omap44xx_i2c_sysc,
+        .rev    = OMAP_I2C_IP_VERSION_2,
+        .reset  = &omap_i2c_reset,
+};
+
+static struct omap_i2c_dev_attr i2c_dev_attr = {
+        .flags  = OMAP_I2C_FLAG_BUS_SHIFT_NONE,
 };
 
 /* i2c1 */
@@ -2168,7 +2209,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
 static struct omap_hwmod omap44xx_i2c1_hwmod = {
         .name           = "i2c1",
         .class          = &omap44xx_i2c_hwmod_class,
-        .flags          = HWMOD_INIT_NO_RESET,
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = omap44xx_i2c1_irqs,
         .sdma_reqs      = omap44xx_i2c1_sdma_reqs,
         .main_clk       = "i2c1_fck",
@@ -2179,6 +2220,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
         },
         .slaves         = omap44xx_i2c1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_i2c1_slaves),
+        .dev_attr       = &i2c_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
@@ -2221,7 +2263,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
 static struct omap_hwmod omap44xx_i2c2_hwmod = {
         .name           = "i2c2",
         .class          = &omap44xx_i2c_hwmod_class,
-        .flags          = HWMOD_INIT_NO_RESET,
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = omap44xx_i2c2_irqs,
         .sdma_reqs      = omap44xx_i2c2_sdma_reqs,
         .main_clk       = "i2c2_fck",
@@ -2232,6 +2274,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
         },
         .slaves         = omap44xx_i2c2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_i2c2_slaves),
+        .dev_attr       = &i2c_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
@@ -2274,7 +2317,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
 static struct omap_hwmod omap44xx_i2c3_hwmod = {
         .name           = "i2c3",
         .class          = &omap44xx_i2c_hwmod_class,
-        .flags          = HWMOD_INIT_NO_RESET,
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = omap44xx_i2c3_irqs,
         .sdma_reqs      = omap44xx_i2c3_sdma_reqs,
         .main_clk       = "i2c3_fck",
@@ -2285,6 +2328,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
         },
         .slaves         = omap44xx_i2c3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_i2c3_slaves),
+        .dev_attr       = &i2c_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
@@ -2327,7 +2371,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
 static struct omap_hwmod omap44xx_i2c4_hwmod = {
         .name           = "i2c4",
         .class          = &omap44xx_i2c_hwmod_class,
-        .flags          = HWMOD_INIT_NO_RESET,
+        .flags          = HWMOD_16BIT_REG,
         .mpu_irqs       = omap44xx_i2c4_irqs,
         .sdma_reqs      = omap44xx_i2c4_sdma_reqs,
         .main_clk       = "i2c4_fck",
@@ -2338,6 +2382,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
         },
         .slaves         = omap44xx_i2c4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_i2c4_slaves),
+        .dev_attr       = &i2c_dev_attr,
         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 49486f522dca..d48813fd62de 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void)
 int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
 {
         u32 cur_state;
-        int sleep_switch = 0;
+        int sleep_switch = -1;
         int ret = 0;
 
         if (pwrdm == NULL || IS_ERR(pwrdm))
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 3a7e678fd5f1..247e79495115 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -1,7 +1,7 @@
 /*
  * OMAP4 Power domains framework
  *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
+ * Copyright (C) 2009-2011 Texas Instruments, Inc.
  * Copyright (C) 2009-2011 Nokia Corporation
  *
  * Abhijit Pagare (abhijitpagare@ti.com)
@@ -41,14 +41,14 @@ static struct powerdomain core_44xx_pwrdm = {
         .banks            = 5,
         .pwrsts_mem_ret = {
                 [0] = PWRSTS_OFF,       /* core_nret_bank */
-                [1] = PWRSTS_OFF_RET,   /* core_ocmram */
+                [1] = PWRSTS_RET,       /* core_ocmram */
                 [2] = PWRSTS_RET,       /* core_other_bank */
                 [3] = PWRSTS_OFF_RET,   /* ducati_l2ram */
                 [4] = PWRSTS_OFF_RET,   /* ducati_unicache */
         },
         .pwrsts_mem_on  = {
                 [0] = PWRSTS_ON,        /* core_nret_bank */
-                [1] = PWRSTS_OFF_RET,   /* core_ocmram */
+                [1] = PWRSTS_ON,        /* core_ocmram */
                 [2] = PWRSTS_ON,        /* core_other_bank */
                 [3] = PWRSTS_ON,        /* ducati_l2ram */
                 [4] = PWRSTS_ON,        /* ducati_unicache */
@@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = {
         .prcm_offs        = OMAP4430_PRM_MPU_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
         .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
-        .pwrsts           = PWRSTS_OFF_RET_ON,
+        .pwrsts           = PWRSTS_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 3,
         .pwrsts_mem_ret = {
@@ -318,6 +318,7 @@ static struct powerdomain cefuse_44xx_pwrdm = {
         .prcm_partition   = OMAP4430_PRM_PARTITION,
         .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_ON,
+        .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
 /*
diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h
index 878d632c4092..7c22b9e10dc3 100644
--- a/arch/arm/plat-omap/include/plat/i2c.h
+++ b/arch/arm/plat-omap/include/plat/i2c.h
@@ -22,6 +22,7 @@
 #define __ASM__ARCH_OMAP_I2C_H
 
 #include <linux/i2c.h>
+#include <linux/i2c-omap.h>
 
 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
 extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
@@ -46,10 +47,13 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
  */
 struct omap_i2c_dev_attr {
         u8      fifo_depth;
-        u8      flags;
+        u32     flags;
 };
 
 void __init omap1_i2c_mux_pins(int bus_id);
 void __init omap2_i2c_mux_pins(int bus_id);
 
+struct omap_hwmod;
+int omap_i2c_reset(struct omap_hwmod *oh);
+
 #endif /* __ASM__ARCH_OMAP_I2C_H */
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index ce06ac6a9709..fafdfe3c8d4e 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -566,6 +566,7 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
 
 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
+int omap_hwmod_softreset(struct omap_hwmod *oh);
 
 int omap_hwmod_count_resources(struct omap_hwmod *oh);
 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);