diff options
author | Denys Vlasenko <vda.linux@googlemail.com> | 2010-02-19 19:03:42 -0500 |
---|---|---|
committer | Michal Marek <mmarek@suse.cz> | 2010-03-03 05:25:59 -0500 |
commit | dafb9320671316fbd030b1d2e0ab9b96597223cb (patch) | |
tree | 9223fc08c0bffb071333f714be75a01b312bdf10 /arch | |
parent | 9d1578a3ba7fe9d3eecf86615ee427789792c2d6 (diff) |
Rename .data..patch.XXX to .data..patch.XXX.
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/ia64/include/asm/asmmacro.h | 12 | ||||
-rw-r--r-- | arch/ia64/kernel/gate.S | 8 | ||||
-rw-r--r-- | arch/ia64/kernel/gate.lds.S | 10 | ||||
-rw-r--r-- | arch/ia64/kernel/minstate.h | 4 | ||||
-rw-r--r-- | arch/ia64/kernel/vmlinux.lds.S | 16 |
5 files changed, 25 insertions, 25 deletions
diff --git a/arch/ia64/include/asm/asmmacro.h b/arch/ia64/include/asm/asmmacro.h index c1642fd64029..3ab6d75aa3db 100644 --- a/arch/ia64/include/asm/asmmacro.h +++ b/arch/ia64/include/asm/asmmacro.h | |||
@@ -70,12 +70,12 @@ name: | |||
70 | * path (ivt.S - TLB miss processing) or in places where it might not be | 70 | * path (ivt.S - TLB miss processing) or in places where it might not be |
71 | * safe to use a "tpa" instruction (mca_asm.S - error recovery). | 71 | * safe to use a "tpa" instruction (mca_asm.S - error recovery). |
72 | */ | 72 | */ |
73 | .section ".data.patch.vtop", "a" // declare section & section attributes | 73 | .section ".data..patch.vtop", "a" // declare section & section attributes |
74 | .previous | 74 | .previous |
75 | 75 | ||
76 | #define LOAD_PHYSICAL(pr, reg, obj) \ | 76 | #define LOAD_PHYSICAL(pr, reg, obj) \ |
77 | [1:](pr)movl reg = obj; \ | 77 | [1:](pr)movl reg = obj; \ |
78 | .xdata4 ".data.patch.vtop", 1b-. | 78 | .xdata4 ".data..patch.vtop", 1b-. |
79 | 79 | ||
80 | /* | 80 | /* |
81 | * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it, | 81 | * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it, |
@@ -84,11 +84,11 @@ name: | |||
84 | #define DO_MCKINLEY_E9_WORKAROUND | 84 | #define DO_MCKINLEY_E9_WORKAROUND |
85 | 85 | ||
86 | #ifdef DO_MCKINLEY_E9_WORKAROUND | 86 | #ifdef DO_MCKINLEY_E9_WORKAROUND |
87 | .section ".data.patch.mckinley_e9", "a" | 87 | .section ".data..patch.mckinley_e9", "a" |
88 | .previous | 88 | .previous |
89 | /* workaround for Itanium 2 Errata 9: */ | 89 | /* workaround for Itanium 2 Errata 9: */ |
90 | # define FSYS_RETURN \ | 90 | # define FSYS_RETURN \ |
91 | .xdata4 ".data.patch.mckinley_e9", 1f-.; \ | 91 | .xdata4 ".data..patch.mckinley_e9", 1f-.; \ |
92 | 1:{ .mib; \ | 92 | 1:{ .mib; \ |
93 | nop.m 0; \ | 93 | nop.m 0; \ |
94 | mov r16=ar.pfs; \ | 94 | mov r16=ar.pfs; \ |
@@ -107,11 +107,11 @@ name: | |||
107 | * If physical stack register size is different from DEF_NUM_STACK_REG, | 107 | * If physical stack register size is different from DEF_NUM_STACK_REG, |
108 | * dynamically patch the kernel for correct size. | 108 | * dynamically patch the kernel for correct size. |
109 | */ | 109 | */ |
110 | .section ".data.patch.phys_stack_reg", "a" | 110 | .section ".data..patch.phys_stack_reg", "a" |
111 | .previous | 111 | .previous |
112 | #define LOAD_PHYS_STACK_REG_SIZE(reg) \ | 112 | #define LOAD_PHYS_STACK_REG_SIZE(reg) \ |
113 | [1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \ | 113 | [1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \ |
114 | .xdata4 ".data.patch.phys_stack_reg", 1b-. | 114 | .xdata4 ".data..patch.phys_stack_reg", 1b-. |
115 | 115 | ||
116 | /* | 116 | /* |
117 | * Up until early 2004, use of .align within a function caused bad unwind info. | 117 | * Up until early 2004, use of .align within a function caused bad unwind info. |
diff --git a/arch/ia64/kernel/gate.S b/arch/ia64/kernel/gate.S index cf5e0a105e16..245d3e1ec7e1 100644 --- a/arch/ia64/kernel/gate.S +++ b/arch/ia64/kernel/gate.S | |||
@@ -21,18 +21,18 @@ | |||
21 | * to targets outside the shared object) and to avoid multi-phase kernel builds, we | 21 | * to targets outside the shared object) and to avoid multi-phase kernel builds, we |
22 | * simply create minimalistic "patch lists" in special ELF sections. | 22 | * simply create minimalistic "patch lists" in special ELF sections. |
23 | */ | 23 | */ |
24 | .section ".data.patch.fsyscall_table", "a" | 24 | .section ".data..patch.fsyscall_table", "a" |
25 | .previous | 25 | .previous |
26 | #define LOAD_FSYSCALL_TABLE(reg) \ | 26 | #define LOAD_FSYSCALL_TABLE(reg) \ |
27 | [1:] movl reg=0; \ | 27 | [1:] movl reg=0; \ |
28 | .xdata4 ".data.patch.fsyscall_table", 1b-. | 28 | .xdata4 ".data..patch.fsyscall_table", 1b-. |
29 | 29 | ||
30 | .section ".data.patch.brl_fsys_bubble_down", "a" | 30 | .section ".data..patch.brl_fsys_bubble_down", "a" |
31 | .previous | 31 | .previous |
32 | #define BRL_COND_FSYS_BUBBLE_DOWN(pr) \ | 32 | #define BRL_COND_FSYS_BUBBLE_DOWN(pr) \ |
33 | [1:](pr)brl.cond.sptk 0; \ | 33 | [1:](pr)brl.cond.sptk 0; \ |
34 | ;; \ | 34 | ;; \ |
35 | .xdata4 ".data.patch.brl_fsys_bubble_down", 1b-. | 35 | .xdata4 ".data..patch.brl_fsys_bubble_down", 1b-. |
36 | 36 | ||
37 | GLOBAL_ENTRY(__kernel_syscall_via_break) | 37 | GLOBAL_ENTRY(__kernel_syscall_via_break) |
38 | .prologue | 38 | .prologue |
diff --git a/arch/ia64/kernel/gate.lds.S b/arch/ia64/kernel/gate.lds.S index 88c64ed47c36..d32b0855110a 100644 --- a/arch/ia64/kernel/gate.lds.S +++ b/arch/ia64/kernel/gate.lds.S | |||
@@ -33,21 +33,21 @@ SECTIONS | |||
33 | */ | 33 | */ |
34 | . = GATE_ADDR + 0x600; | 34 | . = GATE_ADDR + 0x600; |
35 | 35 | ||
36 | .data.patch : { | 36 | .data..patch : { |
37 | __paravirt_start_gate_mckinley_e9_patchlist = .; | 37 | __paravirt_start_gate_mckinley_e9_patchlist = .; |
38 | *(.data.patch.mckinley_e9) | 38 | *(.data..patch.mckinley_e9) |
39 | __paravirt_end_gate_mckinley_e9_patchlist = .; | 39 | __paravirt_end_gate_mckinley_e9_patchlist = .; |
40 | 40 | ||
41 | __paravirt_start_gate_vtop_patchlist = .; | 41 | __paravirt_start_gate_vtop_patchlist = .; |
42 | *(.data.patch.vtop) | 42 | *(.data..patch.vtop) |
43 | __paravirt_end_gate_vtop_patchlist = .; | 43 | __paravirt_end_gate_vtop_patchlist = .; |
44 | 44 | ||
45 | __paravirt_start_gate_fsyscall_patchlist = .; | 45 | __paravirt_start_gate_fsyscall_patchlist = .; |
46 | *(.data.patch.fsyscall_table) | 46 | *(.data..patch.fsyscall_table) |
47 | __paravirt_end_gate_fsyscall_patchlist = .; | 47 | __paravirt_end_gate_fsyscall_patchlist = .; |
48 | 48 | ||
49 | __paravirt_start_gate_brl_fsys_bubble_down_patchlist = .; | 49 | __paravirt_start_gate_brl_fsys_bubble_down_patchlist = .; |
50 | *(.data.patch.brl_fsys_bubble_down) | 50 | *(.data..patch.brl_fsys_bubble_down) |
51 | __paravirt_end_gate_brl_fsys_bubble_down_patchlist = .; | 51 | __paravirt_end_gate_brl_fsys_bubble_down_patchlist = .; |
52 | } :readable | 52 | } :readable |
53 | 53 | ||
diff --git a/arch/ia64/kernel/minstate.h b/arch/ia64/kernel/minstate.h index 292e214a3b84..d56753a11636 100644 --- a/arch/ia64/kernel/minstate.h +++ b/arch/ia64/kernel/minstate.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #define ACCOUNT_SYS_ENTER | 16 | #define ACCOUNT_SYS_ENTER |
17 | #endif | 17 | #endif |
18 | 18 | ||
19 | .section ".data.patch.rse", "a" | 19 | .section ".data..patch.rse", "a" |
20 | .previous | 20 | .previous |
21 | 21 | ||
22 | /* | 22 | /* |
@@ -215,7 +215,7 @@ | |||
215 | (pUStk) extr.u r17=r18,3,6; \ | 215 | (pUStk) extr.u r17=r18,3,6; \ |
216 | (pUStk) sub r16=r18,r22; \ | 216 | (pUStk) sub r16=r18,r22; \ |
217 | [1:](pKStk) br.cond.sptk.many 1f; \ | 217 | [1:](pKStk) br.cond.sptk.many 1f; \ |
218 | .xdata4 ".data.patch.rse",1b-. \ | 218 | .xdata4 ".data..patch.rse",1b-. \ |
219 | ;; \ | 219 | ;; \ |
220 | cmp.ge p6,p7 = 33,r17; \ | 220 | cmp.ge p6,p7 = 33,r17; \ |
221 | ;; \ | 221 | ;; \ |
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S index 3e338093c551..b943eff2129e 100644 --- a/arch/ia64/kernel/vmlinux.lds.S +++ b/arch/ia64/kernel/vmlinux.lds.S | |||
@@ -75,10 +75,10 @@ SECTIONS | |||
75 | __stop___mca_table = .; | 75 | __stop___mca_table = .; |
76 | } | 76 | } |
77 | 77 | ||
78 | .data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET) | 78 | .data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) |
79 | { | 79 | { |
80 | __start___phys_stack_reg_patchlist = .; | 80 | __start___phys_stack_reg_patchlist = .; |
81 | *(.data.patch.phys_stack_reg) | 81 | *(.data..patch.phys_stack_reg) |
82 | __end___phys_stack_reg_patchlist = .; | 82 | __end___phys_stack_reg_patchlist = .; |
83 | } | 83 | } |
84 | 84 | ||
@@ -110,24 +110,24 @@ SECTIONS | |||
110 | INIT_TEXT_SECTION(PAGE_SIZE) | 110 | INIT_TEXT_SECTION(PAGE_SIZE) |
111 | INIT_DATA_SECTION(16) | 111 | INIT_DATA_SECTION(16) |
112 | 112 | ||
113 | .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET) | 113 | .data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET) |
114 | { | 114 | { |
115 | __start___vtop_patchlist = .; | 115 | __start___vtop_patchlist = .; |
116 | *(.data.patch.vtop) | 116 | *(.data..patch.vtop) |
117 | __end___vtop_patchlist = .; | 117 | __end___vtop_patchlist = .; |
118 | } | 118 | } |
119 | 119 | ||
120 | .data.patch.rse : AT(ADDR(.data.patch.rse) - LOAD_OFFSET) | 120 | .data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) |
121 | { | 121 | { |
122 | __start___rse_patchlist = .; | 122 | __start___rse_patchlist = .; |
123 | *(.data.patch.rse) | 123 | *(.data..patch.rse) |
124 | __end___rse_patchlist = .; | 124 | __end___rse_patchlist = .; |
125 | } | 125 | } |
126 | 126 | ||
127 | .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET) | 127 | .data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) |
128 | { | 128 | { |
129 | __start___mckinley_e9_bundles = .; | 129 | __start___mckinley_e9_bundles = .; |
130 | *(.data.patch.mckinley_e9) | 130 | *(.data..patch.mckinley_e9) |
131 | __end___mckinley_e9_bundles = .; | 131 | __end___mckinley_e9_bundles = .; |
132 | } | 132 | } |
133 | 133 | ||