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authorIngo Molnar <mingo@kernel.org>2014-09-09 00:48:07 -0400
committerIngo Molnar <mingo@kernel.org>2014-09-09 00:48:07 -0400
commitbdea534db894ea19320f470ce2e63b1d9de96a15 (patch)
tree8ec2a0a93d9bb5e7205253c67aa624b9ec227477 /arch
parent39b5a56ec0be5effe9b7d0f18cb27724bf2e5d47 (diff)
parent2ce7598c9a453e0acd0e07be7be3f5eb39608ebd (diff)
Merge tag 'v3.17-rc4' into perf/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/include/asm/io.h12
-rw-r--r--arch/alpha/include/asm/unistd.h2
-rw-r--r--arch/alpha/include/uapi/asm/unistd.h3
-rw-r--r--arch/alpha/kernel/systbls.S3
-rw-r--r--arch/arc/mm/cache_arc700.c3
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/dts/am4372.dtsi4
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts6
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts9
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi1
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts47
-rw-r--r--arch/arm/boot/dts/dra7.dtsi16
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi13
-rw-r--r--arch/arm/boot/dts/imx53-qsrb.dts8
-rw-r--r--arch/arm/boot/dts/imx53.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard.dts4
-rw-r--r--arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts3
-rw-r--r--arch/arm/boot/dts/imx6qdl-cubox-i.dtsi19
-rw-r--r--arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6sx-pinfunc.h26
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts1
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts2
-rw-r--r--arch/arm/boot/dts/omap3430-sdp.dts2
-rw-r--r--arch/arm/boot/dts/omap3xxx-clocks.dtsi1
-rw-r--r--arch/arm/boot/dts/omap54xx-clocks.dtsi16
-rw-r--r--arch/arm/boot/dts/r8a7791-koelsch.dts7
-rw-r--r--arch/arm/boot/dts/rk3066a-bqcurie2.dts2
-rw-r--r--arch/arm/boot/dts/rk3188-radxarock.dts2
-rw-r--r--arch/arm/boot/dts/ste-snowball.dts1
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi8
-rw-r--r--arch/arm/boot/dts/tegra30-apalis.dtsi11
-rw-r--r--arch/arm/boot/dts/tegra30-colibri.dtsi11
-rw-r--r--arch/arm/boot/dts/twl6030.dtsi4
-rw-r--r--arch/arm/boot/dts/vf610-twr.dts2
-rw-r--r--arch/arm/common/edma.c9
-rw-r--r--arch/arm/include/asm/cacheflush.h1
-rw-r--r--arch/arm/include/asm/cputype.h3
-rw-r--r--arch/arm/include/asm/elf.h1
-rw-r--r--arch/arm/include/asm/smp_plat.h15
-rw-r--r--arch/arm/kernel/entry-header.S29
-rw-r--r--arch/arm/kernel/module.c1
-rw-r--r--arch/arm/kvm/handle_exit.c2
-rw-r--r--arch/arm/kvm/init.S4
-rw-r--r--arch/arm/mach-at91/board-dt-rm9200.c11
-rw-r--r--arch/arm/mach-bcm/Makefile1
-rw-r--r--arch/arm/mach-bcm/brcmstb.h19
-rw-r--r--arch/arm/mach-bcm/headsmp-brcmstb.S33
-rw-r--r--arch/arm/mach-bcm/platsmp-brcmstb.c363
-rw-r--r--arch/arm/mach-exynos/mcpm-exynos.c1
-rw-r--r--arch/arm/mach-imx/Kconfig2
-rw-r--r--arch/arm/mach-imx/Makefile2
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c10
-rw-r--r--arch/arm/mach-imx/suspend-imx6.S2
-rw-r--r--arch/arm/mach-omap2/board-flash.c2
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c3
-rw-r--r--arch/arm/mach-omap2/gpmc.c14
-rw-r--r--arch/arm/mach-omap2/id.c2
-rw-r--r--arch/arm/mach-omap2/omap_device.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c7
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c22
-rw-r--r--arch/arm/mach-omap2/soc.h6
-rw-r--r--arch/arm/mach-shmobile/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7790.c4
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7791.c2
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c2
-rw-r--r--arch/arm/mach-vexpress/spc.c14
-rw-r--r--arch/arm/mm/abort-ev6.S6
-rw-r--r--arch/arm/mm/abort-ev7.S6
-rw-r--r--arch/arm64/crypto/sha2-ce-glue.c1
-rw-r--r--arch/arm64/include/asm/hw_breakpoint.h1
-rw-r--r--arch/arm64/include/asm/processor.h2
-rw-r--r--arch/arm64/include/asm/ptrace.h2
-rw-r--r--arch/arm64/kernel/efi.c2
-rw-r--r--arch/arm64/kernel/fpsimd.c1
-rw-r--r--arch/arm64/kernel/head.S4
-rw-r--r--arch/arm64/kernel/perf_regs.c6
-rw-r--r--arch/arm64/kernel/ptrace.c13
-rw-r--r--arch/arm64/kernel/setup.c40
-rw-r--r--arch/arm64/kvm/handle_exit.c2
-rw-r--r--arch/arm64/kvm/hyp-init.S4
-rw-r--r--arch/hexagon/mm/cache.c1
-rw-r--r--arch/ia64/Kconfig2
-rw-r--r--arch/m68k/Kconfig2
-rw-r--r--arch/m68k/include/asm/unistd.h2
-rw-r--r--arch/m68k/include/uapi/asm/unistd.h2
-rw-r--r--arch/m68k/kernel/syscalltable.S2
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/alchemy/devboards/db1200.c6
-rw-r--r--arch/mips/bcm47xx/setup.c13
-rw-r--r--arch/mips/cavium-octeon/setup.c19
-rw-r--r--arch/mips/include/asm/eva.h43
-rw-r--r--arch/mips/include/asm/gic.h2
-rw-r--r--arch/mips/include/asm/irq.h2
-rw-r--r--arch/mips/include/asm/mach-malta/kernel-entry-init.h22
-rw-r--r--arch/mips/include/asm/mach-netlogic/topology.h7
-rw-r--r--arch/mips/include/asm/pgtable.h8
-rw-r--r--arch/mips/include/asm/syscall.h8
-rw-r--r--arch/mips/kernel/cps-vec.S4
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c2
-rw-r--r--arch/mips/kernel/scall64-o32.S12
-rw-r--r--arch/mips/loongson/loongson-3/cop2-ex.c8
-rw-r--r--arch/mips/loongson/loongson-3/numa.c2
-rw-r--r--arch/mips/mm/cache.c27
-rw-r--r--arch/mips/mti-malta/malta-memory.c14
-rw-r--r--arch/mips/pmcs-msp71xx/msp_irq.c2
-rw-r--r--arch/powerpc/Kconfig2
-rw-r--r--arch/powerpc/kvm/book3s_64_mmu_hv.c4
-rw-r--r--arch/s390/Kconfig2
-rw-r--r--arch/s390/include/asm/pgtable.h6
-rw-r--r--arch/s390/include/uapi/asm/unistd.h5
-rw-r--r--arch/s390/kernel/compat_wrapper.c3
-rw-r--r--arch/s390/kernel/ipl.c7
-rw-r--r--arch/s390/kernel/setup.c19
-rw-r--r--arch/s390/kernel/syscalls.S3
-rw-r--r--arch/s390/kvm/kvm-s390.c13
-rw-r--r--arch/s390/mm/pgtable.c10
-rw-r--r--arch/sh/Kconfig5
-rw-r--r--arch/sh/mm/cache.c1
-rw-r--r--arch/tile/Kconfig2
-rw-r--r--arch/tile/kernel/smp.c1
-rw-r--r--arch/unicore32/kernel/signal.c9
-rw-r--r--arch/x86/Kbuild4
-rw-r--r--arch/x86/Kconfig18
-rw-r--r--arch/x86/Makefile6
-rw-r--r--arch/x86/include/asm/io_apic.h2
-rw-r--r--arch/x86/include/asm/pgtable.h9
-rw-r--r--arch/x86/kernel/Makefile2
-rw-r--r--arch/x86/kernel/apic/io_apic.c27
-rw-r--r--arch/x86/kernel/crash.c6
-rw-r--r--arch/x86/kernel/entry_32.S2
-rw-r--r--arch/x86/kernel/irqinit.c2
-rw-r--r--arch/x86/kernel/machine_kexec_64.c11
-rw-r--r--arch/x86/kernel/time.c2
-rw-r--r--arch/x86/mm/tlb.c10
-rw-r--r--arch/x86/pci/intel_mid_pci.c2
-rw-r--r--arch/x86/pci/irq.c2
-rw-r--r--arch/x86/purgatory/Makefile6
-rw-r--r--arch/xtensa/Kconfig92
-rw-r--r--arch/xtensa/Makefile7
-rw-r--r--arch/xtensa/boot/dts/kc705.dts5
-rw-r--r--arch/xtensa/configs/common_defconfig1
-rw-r--r--arch/xtensa/configs/iss_defconfig3
-rw-r--r--arch/xtensa/configs/s6105_defconfig1
-rw-r--r--arch/xtensa/include/asm/cacheflush.h2
-rw-r--r--arch/xtensa/include/asm/fixmap.h30
-rw-r--r--arch/xtensa/include/asm/highmem.h40
-rw-r--r--arch/xtensa/include/asm/page.h14
-rw-r--r--arch/xtensa/include/asm/pgtable.h7
-rw-r--r--arch/xtensa/include/asm/uaccess.h5
-rw-r--r--arch/xtensa/include/uapi/asm/ioctls.h19
-rw-r--r--arch/xtensa/include/uapi/asm/unistd.h5
-rw-r--r--arch/xtensa/kernel/align.S128
-rw-r--r--arch/xtensa/kernel/entry.S54
-rw-r--r--arch/xtensa/kernel/pci-dma.c12
-rw-r--r--arch/xtensa/kernel/smp.c1
-rw-r--r--arch/xtensa/kernel/traps.c5
-rw-r--r--arch/xtensa/kernel/vectors.S8
-rw-r--r--arch/xtensa/kernel/vmlinux.lds.S4
-rw-r--r--arch/xtensa/mm/cache.c77
-rw-r--r--arch/xtensa/mm/highmem.c41
-rw-r--r--arch/xtensa/mm/misc.S116
-rw-r--r--arch/xtensa/mm/mmu.c38
163 files changed, 1141 insertions, 929 deletions
diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h
index 5ebab5895edb..f05bdb4b1cb9 100644
--- a/arch/alpha/include/asm/io.h
+++ b/arch/alpha/include/asm/io.h
@@ -500,10 +500,14 @@ extern inline void writeq(u64 b, volatile void __iomem *addr)
500#define outb_p outb 500#define outb_p outb
501#define outw_p outw 501#define outw_p outw
502#define outl_p outl 502#define outl_p outl
503#define readb_relaxed(addr) __raw_readb(addr) 503#define readb_relaxed(addr) __raw_readb(addr)
504#define readw_relaxed(addr) __raw_readw(addr) 504#define readw_relaxed(addr) __raw_readw(addr)
505#define readl_relaxed(addr) __raw_readl(addr) 505#define readl_relaxed(addr) __raw_readl(addr)
506#define readq_relaxed(addr) __raw_readq(addr) 506#define readq_relaxed(addr) __raw_readq(addr)
507#define writeb_relaxed(b, addr) __raw_writeb(b, addr)
508#define writew_relaxed(b, addr) __raw_writew(b, addr)
509#define writel_relaxed(b, addr) __raw_writel(b, addr)
510#define writeq_relaxed(b, addr) __raw_writeq(b, addr)
507 511
508#define mmiowb() 512#define mmiowb()
509 513
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index f2c94402e2c8..c509d306db45 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -3,7 +3,7 @@
3 3
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6#define NR_SYSCALLS 508 6#define NR_SYSCALLS 511
7 7
8#define __ARCH_WANT_OLD_READDIR 8#define __ARCH_WANT_OLD_READDIR
9#define __ARCH_WANT_STAT64 9#define __ARCH_WANT_STAT64
diff --git a/arch/alpha/include/uapi/asm/unistd.h b/arch/alpha/include/uapi/asm/unistd.h
index 53ae7bb1bfd1..d214a0358100 100644
--- a/arch/alpha/include/uapi/asm/unistd.h
+++ b/arch/alpha/include/uapi/asm/unistd.h
@@ -469,5 +469,8 @@
469#define __NR_process_vm_writev 505 469#define __NR_process_vm_writev 505
470#define __NR_kcmp 506 470#define __NR_kcmp 506
471#define __NR_finit_module 507 471#define __NR_finit_module 507
472#define __NR_sched_setattr 508
473#define __NR_sched_getattr 509
474#define __NR_renameat2 510
472 475
473#endif /* _UAPI_ALPHA_UNISTD_H */ 476#endif /* _UAPI_ALPHA_UNISTD_H */
diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S
index dca9b3fb0071..24789713f1ea 100644
--- a/arch/alpha/kernel/systbls.S
+++ b/arch/alpha/kernel/systbls.S
@@ -526,6 +526,9 @@ sys_call_table:
526 .quad sys_process_vm_writev /* 505 */ 526 .quad sys_process_vm_writev /* 505 */
527 .quad sys_kcmp 527 .quad sys_kcmp
528 .quad sys_finit_module 528 .quad sys_finit_module
529 .quad sys_sched_setattr
530 .quad sys_sched_getattr
531 .quad sys_renameat2 /* 510 */
529 532
530 .size sys_call_table, . - sys_call_table 533 .size sys_call_table, . - sys_call_table
531 .type sys_call_table, @object 534 .type sys_call_table, @object
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 4670afc3b971..9e1142729fd1 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -427,7 +427,7 @@ struct ic_inv_args {
427 427
428static void __ic_line_inv_vaddr_helper(void *info) 428static void __ic_line_inv_vaddr_helper(void *info)
429{ 429{
430 struct ic_inv *ic_inv_args = (struct ic_inv_args *) info; 430 struct ic_inv_args *ic_inv = info;
431 431
432 __ic_line_inv_vaddr_local(ic_inv->paddr, ic_inv->vaddr, ic_inv->sz); 432 __ic_line_inv_vaddr_local(ic_inv->paddr, ic_inv->vaddr, ic_inv->sz);
433} 433}
@@ -581,6 +581,7 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
581 tot_sz -= sz; 581 tot_sz -= sz;
582 } 582 }
583} 583}
584EXPORT_SYMBOL(flush_icache_range);
584 585
585/* 586/*
586 * General purpose helper to make I and D cache lines consistent. 587 * General purpose helper to make I and D cache lines consistent.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c49a775937db..32cbbd565902 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1983,8 +1983,6 @@ config XIP_PHYS_ADDR
1983config KEXEC 1983config KEXEC
1984 bool "Kexec system call (EXPERIMENTAL)" 1984 bool "Kexec system call (EXPERIMENTAL)"
1985 depends on (!SMP || PM_SLEEP_SMP) 1985 depends on (!SMP || PM_SLEEP_SMP)
1986 select CRYPTO
1987 select CRYPTO_SHA256
1988 help 1986 help
1989 kexec is a system call that implements the ability to shutdown your 1987 kexec is a system call that implements the ability to shutdown your
1990 current kernel, and to start another kernel. It is like a reboot 1988 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 9b3d2ba82f13..8689949bdba3 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -804,7 +804,7 @@
804 804
805 usb1: usb@48390000 { 805 usb1: usb@48390000 {
806 compatible = "synopsys,dwc3"; 806 compatible = "synopsys,dwc3";
807 reg = <0x48390000 0x17000>; 807 reg = <0x48390000 0x10000>;
808 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 808 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
809 phys = <&usb2_phy1>; 809 phys = <&usb2_phy1>;
810 phy-names = "usb2-phy"; 810 phy-names = "usb2-phy";
@@ -826,7 +826,7 @@
826 826
827 usb2: usb@483d0000 { 827 usb2: usb@483d0000 {
828 compatible = "synopsys,dwc3"; 828 compatible = "synopsys,dwc3";
829 reg = <0x483d0000 0x17000>; 829 reg = <0x483d0000 0x10000>;
830 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 830 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
831 phys = <&usb2_phy2>; 831 phys = <&usb2_phy2>;
832 phy-names = "usb2-phy"; 832 phy-names = "usb2-phy";
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 646a6eade788..e7ac47fa6615 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -260,7 +260,7 @@
260 status = "okay"; 260 status = "okay";
261 pinctrl-names = "default"; 261 pinctrl-names = "default";
262 pinctrl-0 = <&i2c0_pins>; 262 pinctrl-0 = <&i2c0_pins>;
263 clock-frequency = <400000>; 263 clock-frequency = <100000>;
264 264
265 tps65218: tps65218@24 { 265 tps65218: tps65218@24 {
266 reg = <0x24>; 266 reg = <0x24>;
@@ -424,7 +424,7 @@
424 ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ 424 ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
425 nand@0,0 { 425 nand@0,0 {
426 reg = <0 0 4>; /* device IO registers */ 426 reg = <0 0 4>; /* device IO registers */
427 ti,nand-ecc-opt = "bch8"; 427 ti,nand-ecc-opt = "bch16";
428 ti,elm-id = <&elm>; 428 ti,elm-id = <&elm>;
429 nand-bus-width = <8>; 429 nand-bus-width = <8>;
430 gpmc,device-width = <1>; 430 gpmc,device-width = <1>;
@@ -443,8 +443,6 @@
443 gpmc,rd-cycle-ns = <40>; 443 gpmc,rd-cycle-ns = <40>;
444 gpmc,wr-cycle-ns = <40>; 444 gpmc,wr-cycle-ns = <40>;
445 gpmc,wait-pin = <0>; 445 gpmc,wait-pin = <0>;
446 gpmc,wait-on-read;
447 gpmc,wait-on-write;
448 gpmc,bus-turnaround-ns = <0>; 446 gpmc,bus-turnaround-ns = <0>;
449 gpmc,cycle2cycle-delay-ns = <0>; 447 gpmc,cycle2cycle-delay-ns = <0>;
450 gpmc,clk-activation-ns = <0>; 448 gpmc,clk-activation-ns = <0>;
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index ed7dd2395915..ac3e4859935f 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -435,13 +435,13 @@
435}; 435};
436 436
437&gpmc { 437&gpmc {
438 status = "okay"; 438 status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
439 pinctrl-names = "default"; 439 pinctrl-names = "default";
440 pinctrl-0 = <&nand_flash_x8>; 440 pinctrl-0 = <&nand_flash_x8>;
441 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ 441 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
442 nand@0,0 { 442 nand@0,0 {
443 reg = <0 0 0>; /* CS0, offset 0 */ 443 reg = <0 0 0>; /* CS0, offset 0 */
444 ti,nand-ecc-opt = "bch8"; 444 ti,nand-ecc-opt = "bch16";
445 ti,elm-id = <&elm>; 445 ti,elm-id = <&elm>;
446 nand-bus-width = <8>; 446 nand-bus-width = <8>;
447 gpmc,device-width = <1>; 447 gpmc,device-width = <1>;
@@ -459,8 +459,7 @@
459 gpmc,access-ns = <30>; /* tCEA + 4*/ 459 gpmc,access-ns = <30>; /* tCEA + 4*/
460 gpmc,rd-cycle-ns = <40>; 460 gpmc,rd-cycle-ns = <40>;
461 gpmc,wr-cycle-ns = <40>; 461 gpmc,wr-cycle-ns = <40>;
462 gpmc,wait-on-read = "true"; 462 gpmc,wait-pin = <0>;
463 gpmc,wait-on-write = "true";
464 gpmc,bus-turnaround-ns = <0>; 463 gpmc,bus-turnaround-ns = <0>;
465 gpmc,cycle2cycle-delay-ns = <0>; 464 gpmc,cycle2cycle-delay-ns = <0>;
466 gpmc,clk-activation-ns = <0>; 465 gpmc,clk-activation-ns = <0>;
@@ -557,7 +556,7 @@
557}; 556};
558 557
559&qspi { 558&qspi {
560 status = "okay"; 559 status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */
561 pinctrl-names = "default"; 560 pinctrl-names = "default";
562 pinctrl-0 = <&qspi1_default>; 561 pinctrl-0 = <&qspi1_default>;
563 562
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 65ccf564b9a5..6c97d4af61ee 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -149,7 +149,7 @@
149 usb: usbck { 149 usb: usbck {
150 compatible = "atmel,at91rm9200-clk-usb"; 150 compatible = "atmel,at91rm9200-clk-usb";
151 #clock-cells = <0>; 151 #clock-cells = <0>;
152 atmel,clk-divisors = <1 2>; 152 atmel,clk-divisors = <1 2 0 0>;
153 clocks = <&pllb>; 153 clocks = <&pllb>;
154 }; 154 };
155 155
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 31f7652612fc..4e0abbd9d655 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -40,6 +40,7 @@
40 }; 40 };
41 41
42 pllb: pllbck { 42 pllb: pllbck {
43 compatible = "atmel,at91sam9g20-clk-pllb";
43 atmel,clk-input-range = <2000000 32000000>; 44 atmel,clk-input-range = <2000000 32000000>;
44 atmel,pll-clk-output-ranges = <30000000 100000000 0 0>; 45 atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
45 }; 46 };
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 50f8022905a1..e03fbf3c6889 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -8,6 +8,7 @@
8/dts-v1/; 8/dts-v1/;
9 9
10#include "dra74x.dtsi" 10#include "dra74x.dtsi"
11#include <dt-bindings/gpio/gpio.h>
11 12
12/ { 13/ {
13 model = "TI DRA742"; 14 model = "TI DRA742";
@@ -24,9 +25,29 @@
24 regulator-min-microvolt = <3300000>; 25 regulator-min-microvolt = <3300000>;
25 regulator-max-microvolt = <3300000>; 26 regulator-max-microvolt = <3300000>;
26 }; 27 };
28
29 vtt_fixed: fixedregulator-vtt {
30 compatible = "regulator-fixed";
31 regulator-name = "vtt_fixed";
32 regulator-min-microvolt = <1350000>;
33 regulator-max-microvolt = <1350000>;
34 regulator-always-on;
35 regulator-boot-on;
36 enable-active-high;
37 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
38 };
27}; 39};
28 40
29&dra7_pmx_core { 41&dra7_pmx_core {
42 pinctrl-names = "default";
43 pinctrl-0 = <&vtt_pin>;
44
45 vtt_pin: pinmux_vtt_pin {
46 pinctrl-single,pins = <
47 0x3b4 (PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
48 >;
49 };
50
30 i2c1_pins: pinmux_i2c1_pins { 51 i2c1_pins: pinmux_i2c1_pins {
31 pinctrl-single,pins = < 52 pinctrl-single,pins = <
32 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */ 53 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
@@ -43,20 +64,19 @@
43 64
44 i2c3_pins: pinmux_i2c3_pins { 65 i2c3_pins: pinmux_i2c3_pins {
45 pinctrl-single,pins = < 66 pinctrl-single,pins = <
46 0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */ 67 0x288 (PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
47 0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */ 68 0x28c (PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
48 >; 69 >;
49 }; 70 };
50 71
51 mcspi1_pins: pinmux_mcspi1_pins { 72 mcspi1_pins: pinmux_mcspi1_pins {
52 pinctrl-single,pins = < 73 pinctrl-single,pins = <
53 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */ 74 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi1_sclk */
54 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */ 75 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi1_d1 */
55 0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */ 76 0x3ac (PIN_INPUT | MUX_MODE0) /* spi1_d0 */
56 0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ 77 0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */
57 0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */ 78 0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */
58 0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */ 79 0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */
59 0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */
60 >; 80 >;
61 }; 81 };
62 82
@@ -284,7 +304,7 @@
284 status = "okay"; 304 status = "okay";
285 pinctrl-names = "default"; 305 pinctrl-names = "default";
286 pinctrl-0 = <&i2c3_pins>; 306 pinctrl-0 = <&i2c3_pins>;
287 clock-frequency = <3400000>; 307 clock-frequency = <400000>;
288}; 308};
289 309
290&mcspi1 { 310&mcspi1 {
@@ -483,7 +503,7 @@
483 reg = <0x001c0000 0x00020000>; 503 reg = <0x001c0000 0x00020000>;
484 }; 504 };
485 partition@7 { 505 partition@7 {
486 label = "NAND.u-boot-env"; 506 label = "NAND.u-boot-env.backup1";
487 reg = <0x001e0000 0x00020000>; 507 reg = <0x001e0000 0x00020000>;
488 }; 508 };
489 partition@8 { 509 partition@8 {
@@ -504,3 +524,8 @@
504&usb2_phy2 { 524&usb2_phy2 {
505 phy-supply = <&ldousb_reg>; 525 phy-supply = <&ldousb_reg>;
506}; 526};
527
528&gpio7 {
529 ti,no-reset-on-init;
530 ti,no-idle-on-init;
531};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 97f603c4483d..d678152db4cb 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -245,7 +245,7 @@
245 gpio-controller; 245 gpio-controller;
246 #gpio-cells = <2>; 246 #gpio-cells = <2>;
247 interrupt-controller; 247 interrupt-controller;
248 #interrupt-cells = <1>; 248 #interrupt-cells = <2>;
249 }; 249 };
250 250
251 gpio2: gpio@48055000 { 251 gpio2: gpio@48055000 {
@@ -256,7 +256,7 @@
256 gpio-controller; 256 gpio-controller;
257 #gpio-cells = <2>; 257 #gpio-cells = <2>;
258 interrupt-controller; 258 interrupt-controller;
259 #interrupt-cells = <1>; 259 #interrupt-cells = <2>;
260 }; 260 };
261 261
262 gpio3: gpio@48057000 { 262 gpio3: gpio@48057000 {
@@ -267,7 +267,7 @@
267 gpio-controller; 267 gpio-controller;
268 #gpio-cells = <2>; 268 #gpio-cells = <2>;
269 interrupt-controller; 269 interrupt-controller;
270 #interrupt-cells = <1>; 270 #interrupt-cells = <2>;
271 }; 271 };
272 272
273 gpio4: gpio@48059000 { 273 gpio4: gpio@48059000 {
@@ -278,7 +278,7 @@
278 gpio-controller; 278 gpio-controller;
279 #gpio-cells = <2>; 279 #gpio-cells = <2>;
280 interrupt-controller; 280 interrupt-controller;
281 #interrupt-cells = <1>; 281 #interrupt-cells = <2>;
282 }; 282 };
283 283
284 gpio5: gpio@4805b000 { 284 gpio5: gpio@4805b000 {
@@ -289,7 +289,7 @@
289 gpio-controller; 289 gpio-controller;
290 #gpio-cells = <2>; 290 #gpio-cells = <2>;
291 interrupt-controller; 291 interrupt-controller;
292 #interrupt-cells = <1>; 292 #interrupt-cells = <2>;
293 }; 293 };
294 294
295 gpio6: gpio@4805d000 { 295 gpio6: gpio@4805d000 {
@@ -300,7 +300,7 @@
300 gpio-controller; 300 gpio-controller;
301 #gpio-cells = <2>; 301 #gpio-cells = <2>;
302 interrupt-controller; 302 interrupt-controller;
303 #interrupt-cells = <1>; 303 #interrupt-cells = <2>;
304 }; 304 };
305 305
306 gpio7: gpio@48051000 { 306 gpio7: gpio@48051000 {
@@ -311,7 +311,7 @@
311 gpio-controller; 311 gpio-controller;
312 #gpio-cells = <2>; 312 #gpio-cells = <2>;
313 interrupt-controller; 313 interrupt-controller;
314 #interrupt-cells = <1>; 314 #interrupt-cells = <2>;
315 }; 315 };
316 316
317 gpio8: gpio@48053000 { 317 gpio8: gpio@48053000 {
@@ -322,7 +322,7 @@
322 gpio-controller; 322 gpio-controller;
323 #gpio-cells = <2>; 323 #gpio-cells = <2>;
324 interrupt-controller; 324 interrupt-controller;
325 #interrupt-cells = <1>; 325 #interrupt-cells = <2>;
326 }; 326 };
327 327
328 uart1: serial@4806a000 { 328 uart1: serial@4806a000 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 6d6d23c83d30..adadaf97ac01 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -134,6 +134,8 @@
134 i2c@13860000 { 134 i2c@13860000 {
135 pinctrl-0 = <&i2c0_bus>; 135 pinctrl-0 = <&i2c0_bus>;
136 pinctrl-names = "default"; 136 pinctrl-names = "default";
137 samsung,i2c-sda-delay = <100>;
138 samsung,i2c-max-bus-freq = <400000>;
137 status = "okay"; 139 status = "okay";
138 140
139 usb3503: usb3503@08 { 141 usb3503: usb3503@08 {
@@ -148,6 +150,10 @@
148 150
149 max77686: pmic@09 { 151 max77686: pmic@09 {
150 compatible = "maxim,max77686"; 152 compatible = "maxim,max77686";
153 interrupt-parent = <&gpx3>;
154 interrupts = <2 0>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&max77686_irq>;
151 reg = <0x09>; 157 reg = <0x09>;
152 #clock-cells = <1>; 158 #clock-cells = <1>;
153 159
@@ -368,4 +374,11 @@
368 samsung,pins = "gpx1-3"; 374 samsung,pins = "gpx1-3";
369 samsung,pin-pud = <0>; 375 samsung,pin-pud = <0>;
370 }; 376 };
377
378 max77686_irq: max77686-irq {
379 samsung,pins = "gpx3-2";
380 samsung,pin-function = <0>;
381 samsung,pin-pud = <0>;
382 samsung,pin-drv = <0>;
383 };
371}; 384};
diff --git a/arch/arm/boot/dts/imx53-qsrb.dts b/arch/arm/boot/dts/imx53-qsrb.dts
index f1bbf9a32991..82d623d05915 100644
--- a/arch/arm/boot/dts/imx53-qsrb.dts
+++ b/arch/arm/boot/dts/imx53-qsrb.dts
@@ -28,6 +28,12 @@
28 MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec 28 MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec
29 >; 29 >;
30 }; 30 };
31
32 pinctrl_pmic: pmicgrp {
33 fsl,pins = <
34 MX53_PAD_CSI0_DAT5__GPIO5_23 0x1e4 /* IRQ */
35 >;
36 };
31 }; 37 };
32}; 38};
33 39
@@ -38,6 +44,8 @@
38 44
39 pmic: mc34708@8 { 45 pmic: mc34708@8 {
40 compatible = "fsl,mc34708"; 46 compatible = "fsl,mc34708";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_pmic>;
41 reg = <0x08>; 49 reg = <0x08>;
42 interrupt-parent = <&gpio5>; 50 interrupt-parent = <&gpio5>;
43 interrupts = <23 0x8>; 51 interrupts = <23 0x8>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 64fa27b36be0..c6c58c1c00e3 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -731,7 +731,7 @@
731 compatible = "fsl,imx53-vpu"; 731 compatible = "fsl,imx53-vpu";
732 reg = <0x63ff4000 0x1000>; 732 reg = <0x63ff4000 0x1000>;
733 interrupts = <9>; 733 interrupts = <9>;
734 clocks = <&clks IMX5_CLK_VPU_GATE>, 734 clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>,
735 <&clks IMX5_CLK_VPU_GATE>; 735 <&clks IMX5_CLK_VPU_GATE>;
736 clock-names = "per", "ahb"; 736 clock-names = "per", "ahb";
737 resets = <&src 1>; 737 resets = <&src 1>;
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index c8e51dd41b8f..71598546087f 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -58,7 +58,7 @@
58 58
59 sound-spdif { 59 sound-spdif {
60 compatible = "fsl,imx-audio-spdif"; 60 compatible = "fsl,imx-audio-spdif";
61 model = "imx-spdif"; 61 model = "On-board SPDIF";
62 /* IMX6 doesn't implement this yet */ 62 /* IMX6 doesn't implement this yet */
63 spdif-controller = <&spdif>; 63 spdif-controller = <&spdif>;
64 spdif-out; 64 spdif-out;
@@ -181,11 +181,13 @@
181}; 181};
182 182
183&usbh1 { 183&usbh1 {
184 disable-over-current;
184 vbus-supply = <&reg_usbh1_vbus>; 185 vbus-supply = <&reg_usbh1_vbus>;
185 status = "okay"; 186 status = "okay";
186}; 187};
187 188
188&usbotg { 189&usbotg {
190 disable-over-current;
189 pinctrl-names = "default"; 191 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>; 192 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
191 vbus-supply = <&reg_usbotg_vbus>; 193 vbus-supply = <&reg_usbotg_vbus>;
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index 8c1cb53464a0..4fa254347798 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -119,7 +119,7 @@
119 pinctrl-names = "default"; 119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_enet>; 120 pinctrl-0 = <&pinctrl_enet>;
121 phy-mode = "rgmii"; 121 phy-mode = "rgmii";
122 phy-reset-gpios = <&gpio3 23 0>; 122 phy-reset-gpios = <&gpio1 25 0>;
123 phy-supply = <&vgen2_1v2_eth>; 123 phy-supply = <&vgen2_1v2_eth>;
124 status = "okay"; 124 status = "okay";
125}; 125};
@@ -339,6 +339,7 @@
339 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 339 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
340 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 340 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
341 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 341 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
342 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
342 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 343 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
343 >; 344 >;
344 }; 345 };
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index e8e781656b3f..6a524ca011e7 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -61,7 +61,7 @@
61 61
62 sound-spdif { 62 sound-spdif {
63 compatible = "fsl,imx-audio-spdif"; 63 compatible = "fsl,imx-audio-spdif";
64 model = "imx-spdif"; 64 model = "Integrated SPDIF";
65 /* IMX6 doesn't implement this yet */ 65 /* IMX6 doesn't implement this yet */
66 spdif-controller = <&spdif>; 66 spdif-controller = <&spdif>;
67 spdif-out; 67 spdif-out;
@@ -130,16 +130,23 @@
130 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>; 130 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
131 }; 131 };
132 132
133 pinctrl_cubox_i_usbh1: cubox-i-usbh1 {
134 fsl,pins = <MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0>;
135 };
136
133 pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus { 137 pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus {
134 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>; 138 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
135 }; 139 };
136 140
137 pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id { 141 pinctrl_cubox_i_usbotg: cubox-i-usbotg {
138 /* 142 /*
139 * The Cubox-i pulls this low, but as it's pointless 143 * The Cubox-i pulls ID low, but as it's pointless
140 * leaving it as a pull-up, even if it is just 10uA. 144 * leaving it as a pull-up, even if it is just 10uA.
141 */ 145 */
142 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>; 146 fsl,pins = <
147 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
148 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
149 >;
143 }; 150 };
144 151
145 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus { 152 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
@@ -173,13 +180,15 @@
173}; 180};
174 181
175&usbh1 { 182&usbh1 {
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_cubox_i_usbh1>;
176 vbus-supply = <&reg_usbh1_vbus>; 185 vbus-supply = <&reg_usbh1_vbus>;
177 status = "okay"; 186 status = "okay";
178}; 187};
179 188
180&usbotg { 189&usbotg {
181 pinctrl-names = "default"; 190 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>; 191 pinctrl-0 = <&pinctrl_cubox_i_usbotg>;
183 vbus-supply = <&reg_usbotg_vbus>; 192 vbus-supply = <&reg_usbotg_vbus>;
184 status = "okay"; 193 status = "okay";
185}; 194};
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
index d16066608e21..db9f45b2c573 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
@@ -17,7 +17,7 @@
17 enet { 17 enet {
18 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 { 18 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
19 fsl,pins = < 19 fsl,pins = <
20 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 20 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
21 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 21 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
22 /* AR8035 reset */ 22 /* AR8035 reset */
23 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0 23 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
diff --git a/arch/arm/boot/dts/imx6sx-pinfunc.h b/arch/arm/boot/dts/imx6sx-pinfunc.h
index 3e0b816dac08..bb9c6b78cb97 100644
--- a/arch/arm/boot/dts/imx6sx-pinfunc.h
+++ b/arch/arm/boot/dts/imx6sx-pinfunc.h
@@ -78,7 +78,7 @@
78#define MX6SX_PAD_GPIO1_IO07__USDHC2_WP 0x0030 0x0378 0x0870 0x1 0x1 78#define MX6SX_PAD_GPIO1_IO07__USDHC2_WP 0x0030 0x0378 0x0870 0x1 0x1
79#define MX6SX_PAD_GPIO1_IO07__ENET2_MDIO 0x0030 0x0378 0x0770 0x2 0x0 79#define MX6SX_PAD_GPIO1_IO07__ENET2_MDIO 0x0030 0x0378 0x0770 0x2 0x0
80#define MX6SX_PAD_GPIO1_IO07__AUDMUX_MCLK 0x0030 0x0378 0x0000 0x3 0x0 80#define MX6SX_PAD_GPIO1_IO07__AUDMUX_MCLK 0x0030 0x0378 0x0000 0x3 0x0
81#define MX6SX_PAD_GPIO1_IO07__UART1_CTS_B 0x0030 0x0378 0x082C 0x4 0x1 81#define MX6SX_PAD_GPIO1_IO07__UART1_CTS_B 0x0030 0x0378 0x0000 0x4 0x0
82#define MX6SX_PAD_GPIO1_IO07__GPIO1_IO_7 0x0030 0x0378 0x0000 0x5 0x0 82#define MX6SX_PAD_GPIO1_IO07__GPIO1_IO_7 0x0030 0x0378 0x0000 0x5 0x0
83#define MX6SX_PAD_GPIO1_IO07__SRC_EARLY_RESET 0x0030 0x0378 0x0000 0x6 0x0 83#define MX6SX_PAD_GPIO1_IO07__SRC_EARLY_RESET 0x0030 0x0378 0x0000 0x6 0x0
84#define MX6SX_PAD_GPIO1_IO07__DCIC2_OUT 0x0030 0x0378 0x0000 0x7 0x0 84#define MX6SX_PAD_GPIO1_IO07__DCIC2_OUT 0x0030 0x0378 0x0000 0x7 0x0
@@ -96,7 +96,7 @@
96#define MX6SX_PAD_GPIO1_IO09__WDOG2_WDOG_B 0x0038 0x0380 0x0000 0x1 0x0 96#define MX6SX_PAD_GPIO1_IO09__WDOG2_WDOG_B 0x0038 0x0380 0x0000 0x1 0x0
97#define MX6SX_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1 0x0038 0x0380 0x0820 0x2 0x0 97#define MX6SX_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1 0x0038 0x0380 0x0820 0x2 0x0
98#define MX6SX_PAD_GPIO1_IO09__CCM_OUT0 0x0038 0x0380 0x0000 0x3 0x0 98#define MX6SX_PAD_GPIO1_IO09__CCM_OUT0 0x0038 0x0380 0x0000 0x3 0x0
99#define MX6SX_PAD_GPIO1_IO09__UART2_CTS_B 0x0038 0x0380 0x0834 0x4 0x1 99#define MX6SX_PAD_GPIO1_IO09__UART2_CTS_B 0x0038 0x0380 0x0000 0x4 0x0
100#define MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x0038 0x0380 0x0000 0x5 0x0 100#define MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x0038 0x0380 0x0000 0x5 0x0
101#define MX6SX_PAD_GPIO1_IO09__SRC_INT_BOOT 0x0038 0x0380 0x0000 0x6 0x0 101#define MX6SX_PAD_GPIO1_IO09__SRC_INT_BOOT 0x0038 0x0380 0x0000 0x6 0x0
102#define MX6SX_PAD_GPIO1_IO09__OBSERVE_MUX_OUT_4 0x0038 0x0380 0x0000 0x7 0x0 102#define MX6SX_PAD_GPIO1_IO09__OBSERVE_MUX_OUT_4 0x0038 0x0380 0x0000 0x7 0x0
@@ -213,7 +213,7 @@
213#define MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2 0x0068 0x03B0 0x079C 0x1 0x1 213#define MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2 0x0068 0x03B0 0x079C 0x1 0x1
214#define MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x0068 0x03B0 0x07C4 0x2 0x2 214#define MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x0068 0x03B0 0x07C4 0x2 0x2
215#define MX6SX_PAD_CSI_DATA07__KPP_ROW_7 0x0068 0x03B0 0x07DC 0x3 0x0 215#define MX6SX_PAD_CSI_DATA07__KPP_ROW_7 0x0068 0x03B0 0x07DC 0x3 0x0
216#define MX6SX_PAD_CSI_DATA07__UART6_CTS_B 0x0068 0x03B0 0x0854 0x4 0x1 216#define MX6SX_PAD_CSI_DATA07__UART6_CTS_B 0x0068 0x03B0 0x0000 0x4 0x0
217#define MX6SX_PAD_CSI_DATA07__GPIO1_IO_21 0x0068 0x03B0 0x0000 0x5 0x0 217#define MX6SX_PAD_CSI_DATA07__GPIO1_IO_21 0x0068 0x03B0 0x0000 0x5 0x0
218#define MX6SX_PAD_CSI_DATA07__WEIM_DATA_16 0x0068 0x03B0 0x0000 0x6 0x0 218#define MX6SX_PAD_CSI_DATA07__WEIM_DATA_16 0x0068 0x03B0 0x0000 0x6 0x0
219#define MX6SX_PAD_CSI_DATA07__DCIC1_OUT 0x0068 0x03B0 0x0000 0x7 0x0 219#define MX6SX_PAD_CSI_DATA07__DCIC1_OUT 0x0068 0x03B0 0x0000 0x7 0x0
@@ -254,7 +254,7 @@
254#define MX6SX_PAD_CSI_VSYNC__CSI1_VSYNC 0x0078 0x03C0 0x0708 0x0 0x0 254#define MX6SX_PAD_CSI_VSYNC__CSI1_VSYNC 0x0078 0x03C0 0x0708 0x0 0x0
255#define MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0 0x0078 0x03C0 0x07A4 0x1 0x1 255#define MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0 0x0078 0x03C0 0x07A4 0x1 0x1
256#define MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x0078 0x03C0 0x0674 0x2 0x1 256#define MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x0078 0x03C0 0x0674 0x2 0x1
257#define MX6SX_PAD_CSI_VSYNC__UART4_CTS_B 0x0078 0x03C0 0x0844 0x3 0x3 257#define MX6SX_PAD_CSI_VSYNC__UART4_CTS_B 0x0078 0x03C0 0x0000 0x3 0x0
258#define MX6SX_PAD_CSI_VSYNC__MQS_RIGHT 0x0078 0x03C0 0x0000 0x4 0x0 258#define MX6SX_PAD_CSI_VSYNC__MQS_RIGHT 0x0078 0x03C0 0x0000 0x4 0x0
259#define MX6SX_PAD_CSI_VSYNC__GPIO1_IO_25 0x0078 0x03C0 0x0000 0x5 0x0 259#define MX6SX_PAD_CSI_VSYNC__GPIO1_IO_25 0x0078 0x03C0 0x0000 0x5 0x0
260#define MX6SX_PAD_CSI_VSYNC__WEIM_DATA_24 0x0078 0x03C0 0x0000 0x6 0x0 260#define MX6SX_PAD_CSI_VSYNC__WEIM_DATA_24 0x0078 0x03C0 0x0000 0x6 0x0
@@ -352,7 +352,7 @@
352#define MX6SX_PAD_ENET2_TX_CLK__ENET2_TX_CLK 0x00A0 0x03E8 0x0000 0x0 0x0 352#define MX6SX_PAD_ENET2_TX_CLK__ENET2_TX_CLK 0x00A0 0x03E8 0x0000 0x0 0x0
353#define MX6SX_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x00A0 0x03E8 0x076C 0x1 0x1 353#define MX6SX_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x00A0 0x03E8 0x076C 0x1 0x1
354#define MX6SX_PAD_ENET2_TX_CLK__I2C3_SDA 0x00A0 0x03E8 0x07BC 0x2 0x1 354#define MX6SX_PAD_ENET2_TX_CLK__I2C3_SDA 0x00A0 0x03E8 0x07BC 0x2 0x1
355#define MX6SX_PAD_ENET2_TX_CLK__UART1_CTS_B 0x00A0 0x03E8 0x082C 0x3 0x3 355#define MX6SX_PAD_ENET2_TX_CLK__UART1_CTS_B 0x00A0 0x03E8 0x0000 0x3 0x0
356#define MX6SX_PAD_ENET2_TX_CLK__MLB_CLK 0x00A0 0x03E8 0x07E8 0x4 0x1 356#define MX6SX_PAD_ENET2_TX_CLK__MLB_CLK 0x00A0 0x03E8 0x07E8 0x4 0x1
357#define MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x00A0 0x03E8 0x0000 0x5 0x0 357#define MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x00A0 0x03E8 0x0000 0x5 0x0
358#define MX6SX_PAD_ENET2_TX_CLK__USB_OTG2_PWR 0x00A0 0x03E8 0x0000 0x6 0x0 358#define MX6SX_PAD_ENET2_TX_CLK__USB_OTG2_PWR 0x00A0 0x03E8 0x0000 0x6 0x0
@@ -404,7 +404,7 @@
404#define MX6SX_PAD_KEY_COL4__SAI2_RX_BCLK 0x00B4 0x03FC 0x0808 0x7 0x0 404#define MX6SX_PAD_KEY_COL4__SAI2_RX_BCLK 0x00B4 0x03FC 0x0808 0x7 0x0
405#define MX6SX_PAD_KEY_ROW0__KPP_ROW_0 0x00B8 0x0400 0x0000 0x0 0x0 405#define MX6SX_PAD_KEY_ROW0__KPP_ROW_0 0x00B8 0x0400 0x0000 0x0 0x0
406#define MX6SX_PAD_KEY_ROW0__USDHC3_WP 0x00B8 0x0400 0x0000 0x1 0x0 406#define MX6SX_PAD_KEY_ROW0__USDHC3_WP 0x00B8 0x0400 0x0000 0x1 0x0
407#define MX6SX_PAD_KEY_ROW0__UART6_CTS_B 0x00B8 0x0400 0x0854 0x2 0x3 407#define MX6SX_PAD_KEY_ROW0__UART6_CTS_B 0x00B8 0x0400 0x0000 0x2 0x0
408#define MX6SX_PAD_KEY_ROW0__ECSPI1_MOSI 0x00B8 0x0400 0x0718 0x3 0x0 408#define MX6SX_PAD_KEY_ROW0__ECSPI1_MOSI 0x00B8 0x0400 0x0718 0x3 0x0
409#define MX6SX_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x00B8 0x0400 0x0660 0x4 0x0 409#define MX6SX_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x00B8 0x0400 0x0660 0x4 0x0
410#define MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x00B8 0x0400 0x0000 0x5 0x0 410#define MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x00B8 0x0400 0x0000 0x5 0x0
@@ -423,7 +423,7 @@
423#define MX6SX_PAD_KEY_ROW1__M4_NMI 0x00BC 0x0404 0x0000 0x8 0x0 423#define MX6SX_PAD_KEY_ROW1__M4_NMI 0x00BC 0x0404 0x0000 0x8 0x0
424#define MX6SX_PAD_KEY_ROW2__KPP_ROW_2 0x00C0 0x0408 0x0000 0x0 0x0 424#define MX6SX_PAD_KEY_ROW2__KPP_ROW_2 0x00C0 0x0408 0x0000 0x0 0x0
425#define MX6SX_PAD_KEY_ROW2__USDHC4_WP 0x00C0 0x0408 0x0878 0x1 0x1 425#define MX6SX_PAD_KEY_ROW2__USDHC4_WP 0x00C0 0x0408 0x0878 0x1 0x1
426#define MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x00C0 0x0408 0x084C 0x2 0x3 426#define MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x00C0 0x0408 0x0000 0x2 0x0
427#define MX6SX_PAD_KEY_ROW2__CAN1_RX 0x00C0 0x0408 0x068C 0x3 0x1 427#define MX6SX_PAD_KEY_ROW2__CAN1_RX 0x00C0 0x0408 0x068C 0x3 0x1
428#define MX6SX_PAD_KEY_ROW2__CANFD_RX1 0x00C0 0x0408 0x0694 0x4 0x1 428#define MX6SX_PAD_KEY_ROW2__CANFD_RX1 0x00C0 0x0408 0x0694 0x4 0x1
429#define MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x00C0 0x0408 0x0000 0x5 0x0 429#define MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x00C0 0x0408 0x0000 0x5 0x0
@@ -815,7 +815,7 @@
815#define MX6SX_PAD_NAND_DATA05__RAWNAND_DATA05 0x0164 0x04AC 0x0000 0x0 0x0 815#define MX6SX_PAD_NAND_DATA05__RAWNAND_DATA05 0x0164 0x04AC 0x0000 0x0 0x0
816#define MX6SX_PAD_NAND_DATA05__USDHC2_DATA5 0x0164 0x04AC 0x0000 0x1 0x0 816#define MX6SX_PAD_NAND_DATA05__USDHC2_DATA5 0x0164 0x04AC 0x0000 0x1 0x0
817#define MX6SX_PAD_NAND_DATA05__QSPI2_B_DQS 0x0164 0x04AC 0x0000 0x2 0x0 817#define MX6SX_PAD_NAND_DATA05__QSPI2_B_DQS 0x0164 0x04AC 0x0000 0x2 0x0
818#define MX6SX_PAD_NAND_DATA05__UART3_CTS_B 0x0164 0x04AC 0x083C 0x3 0x1 818#define MX6SX_PAD_NAND_DATA05__UART3_CTS_B 0x0164 0x04AC 0x0000 0x3 0x0
819#define MX6SX_PAD_NAND_DATA05__AUDMUX_AUD4_RXC 0x0164 0x04AC 0x064C 0x4 0x0 819#define MX6SX_PAD_NAND_DATA05__AUDMUX_AUD4_RXC 0x0164 0x04AC 0x064C 0x4 0x0
820#define MX6SX_PAD_NAND_DATA05__GPIO4_IO_9 0x0164 0x04AC 0x0000 0x5 0x0 820#define MX6SX_PAD_NAND_DATA05__GPIO4_IO_9 0x0164 0x04AC 0x0000 0x5 0x0
821#define MX6SX_PAD_NAND_DATA05__WEIM_AD_5 0x0164 0x04AC 0x0000 0x6 0x0 821#define MX6SX_PAD_NAND_DATA05__WEIM_AD_5 0x0164 0x04AC 0x0000 0x6 0x0
@@ -957,7 +957,7 @@
957#define MX6SX_PAD_QSPI1A_SS1_B__SIM_M_HADDR_12 0x019C 0x04E4 0x0000 0x7 0x0 957#define MX6SX_PAD_QSPI1A_SS1_B__SIM_M_HADDR_12 0x019C 0x04E4 0x0000 0x7 0x0
958#define MX6SX_PAD_QSPI1A_SS1_B__SDMA_DEBUG_PC_3 0x019C 0x04E4 0x0000 0x9 0x0 958#define MX6SX_PAD_QSPI1A_SS1_B__SDMA_DEBUG_PC_3 0x019C 0x04E4 0x0000 0x9 0x0
959#define MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0 0x01A0 0x04E8 0x0000 0x0 0x0 959#define MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0 0x01A0 0x04E8 0x0000 0x0 0x0
960#define MX6SX_PAD_QSPI1B_DATA0__UART3_CTS_B 0x01A0 0x04E8 0x083C 0x1 0x4 960#define MX6SX_PAD_QSPI1B_DATA0__UART3_CTS_B 0x01A0 0x04E8 0x0000 0x1 0x0
961#define MX6SX_PAD_QSPI1B_DATA0__ECSPI3_MOSI 0x01A0 0x04E8 0x0738 0x2 0x1 961#define MX6SX_PAD_QSPI1B_DATA0__ECSPI3_MOSI 0x01A0 0x04E8 0x0738 0x2 0x1
962#define MX6SX_PAD_QSPI1B_DATA0__ESAI_RX_FS 0x01A0 0x04E8 0x0778 0x3 0x2 962#define MX6SX_PAD_QSPI1B_DATA0__ESAI_RX_FS 0x01A0 0x04E8 0x0778 0x3 0x2
963#define MX6SX_PAD_QSPI1B_DATA0__CSI1_DATA_22 0x01A0 0x04E8 0x06F4 0x4 0x1 963#define MX6SX_PAD_QSPI1B_DATA0__CSI1_DATA_22 0x01A0 0x04E8 0x06F4 0x4 0x1
@@ -1236,7 +1236,7 @@
1236#define MX6SX_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS 0x0230 0x0578 0x0670 0x1 0x1 1236#define MX6SX_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS 0x0230 0x0578 0x0670 0x1 0x1
1237#define MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x0230 0x0578 0x0000 0x2 0x0 1237#define MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x0230 0x0578 0x0000 0x2 0x0
1238#define MX6SX_PAD_SD1_DATA2__GPT_COMPARE2 0x0230 0x0578 0x0000 0x3 0x0 1238#define MX6SX_PAD_SD1_DATA2__GPT_COMPARE2 0x0230 0x0578 0x0000 0x3 0x0
1239#define MX6SX_PAD_SD1_DATA2__UART2_CTS_B 0x0230 0x0578 0x0834 0x4 0x2 1239#define MX6SX_PAD_SD1_DATA2__UART2_CTS_B 0x0230 0x0578 0x0000 0x4 0x0
1240#define MX6SX_PAD_SD1_DATA2__GPIO6_IO_4 0x0230 0x0578 0x0000 0x5 0x0 1240#define MX6SX_PAD_SD1_DATA2__GPIO6_IO_4 0x0230 0x0578 0x0000 0x5 0x0
1241#define MX6SX_PAD_SD1_DATA2__ECSPI4_RDY 0x0230 0x0578 0x0000 0x6 0x0 1241#define MX6SX_PAD_SD1_DATA2__ECSPI4_RDY 0x0230 0x0578 0x0000 0x6 0x0
1242#define MX6SX_PAD_SD1_DATA2__CCM_OUT0 0x0230 0x0578 0x0000 0x7 0x0 1242#define MX6SX_PAD_SD1_DATA2__CCM_OUT0 0x0230 0x0578 0x0000 0x7 0x0
@@ -1315,7 +1315,7 @@
1315#define MX6SX_PAD_SD2_DATA3__VADC_CLAMP_CURRENT_3 0x024C 0x0594 0x0000 0x8 0x0 1315#define MX6SX_PAD_SD2_DATA3__VADC_CLAMP_CURRENT_3 0x024C 0x0594 0x0000 0x8 0x0
1316#define MX6SX_PAD_SD2_DATA3__MMDC_DEBUG_31 0x024C 0x0594 0x0000 0x9 0x0 1316#define MX6SX_PAD_SD2_DATA3__MMDC_DEBUG_31 0x024C 0x0594 0x0000 0x9 0x0
1317#define MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x0250 0x0598 0x0000 0x0 0x0 1317#define MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x0250 0x0598 0x0000 0x0 0x0
1318#define MX6SX_PAD_SD3_CLK__UART4_CTS_B 0x0250 0x0598 0x0844 0x1 0x0 1318#define MX6SX_PAD_SD3_CLK__UART4_CTS_B 0x0250 0x0598 0x0000 0x1 0x0
1319#define MX6SX_PAD_SD3_CLK__ECSPI4_SCLK 0x0250 0x0598 0x0740 0x2 0x0 1319#define MX6SX_PAD_SD3_CLK__ECSPI4_SCLK 0x0250 0x0598 0x0740 0x2 0x0
1320#define MX6SX_PAD_SD3_CLK__AUDMUX_AUD6_RXFS 0x0250 0x0598 0x0680 0x3 0x0 1320#define MX6SX_PAD_SD3_CLK__AUDMUX_AUD6_RXFS 0x0250 0x0598 0x0680 0x3 0x0
1321#define MX6SX_PAD_SD3_CLK__LCDIF2_VSYNC 0x0250 0x0598 0x0000 0x4 0x0 1321#define MX6SX_PAD_SD3_CLK__LCDIF2_VSYNC 0x0250 0x0598 0x0000 0x4 0x0
@@ -1409,7 +1409,7 @@
1409#define MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x0274 0x05BC 0x0000 0x0 0x0 1409#define MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x0274 0x05BC 0x0000 0x0 0x0
1410#define MX6SX_PAD_SD3_DATA7__CAN1_RX 0x0274 0x05BC 0x068C 0x1 0x0 1410#define MX6SX_PAD_SD3_DATA7__CAN1_RX 0x0274 0x05BC 0x068C 0x1 0x0
1411#define MX6SX_PAD_SD3_DATA7__CANFD_RX1 0x0274 0x05BC 0x0694 0x2 0x0 1411#define MX6SX_PAD_SD3_DATA7__CANFD_RX1 0x0274 0x05BC 0x0694 0x2 0x0
1412#define MX6SX_PAD_SD3_DATA7__UART3_CTS_B 0x0274 0x05BC 0x083C 0x3 0x3 1412#define MX6SX_PAD_SD3_DATA7__UART3_CTS_B 0x0274 0x05BC 0x0000 0x3 0x0
1413#define MX6SX_PAD_SD3_DATA7__LCDIF2_DATA_5 0x0274 0x05BC 0x0000 0x4 0x0 1413#define MX6SX_PAD_SD3_DATA7__LCDIF2_DATA_5 0x0274 0x05BC 0x0000 0x4 0x0
1414#define MX6SX_PAD_SD3_DATA7__GPIO7_IO_9 0x0274 0x05BC 0x0000 0x5 0x0 1414#define MX6SX_PAD_SD3_DATA7__GPIO7_IO_9 0x0274 0x05BC 0x0000 0x5 0x0
1415#define MX6SX_PAD_SD3_DATA7__ENET1_1588_EVENT0_IN 0x0274 0x05BC 0x0000 0x6 0x0 1415#define MX6SX_PAD_SD3_DATA7__ENET1_1588_EVENT0_IN 0x0274 0x05BC 0x0000 0x6 0x0
@@ -1510,7 +1510,7 @@
1510#define MX6SX_PAD_SD4_DATA6__SDMA_DEBUG_EVENT_CHANNEL_1 0x0298 0x05E0 0x0000 0x9 0x0 1510#define MX6SX_PAD_SD4_DATA6__SDMA_DEBUG_EVENT_CHANNEL_1 0x0298 0x05E0 0x0000 0x9 0x0
1511#define MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x029C 0x05E4 0x0000 0x0 0x0 1511#define MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x029C 0x05E4 0x0000 0x0 0x0
1512#define MX6SX_PAD_SD4_DATA7__RAWNAND_DATA08 0x029C 0x05E4 0x0000 0x1 0x0 1512#define MX6SX_PAD_SD4_DATA7__RAWNAND_DATA08 0x029C 0x05E4 0x0000 0x1 0x0
1513#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B 0x029C 0x05E4 0x084C 0x2 0x1 1513#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B 0x029C 0x05E4 0x0000 0x2 0x0
1514#define MX6SX_PAD_SD4_DATA7__ECSPI3_SS0 0x029C 0x05E4 0x073C 0x3 0x0 1514#define MX6SX_PAD_SD4_DATA7__ECSPI3_SS0 0x029C 0x05E4 0x073C 0x3 0x0
1515#define MX6SX_PAD_SD4_DATA7__LCDIF2_DATA_15 0x029C 0x05E4 0x0000 0x4 0x0 1515#define MX6SX_PAD_SD4_DATA7__LCDIF2_DATA_15 0x029C 0x05E4 0x0000 0x4 0x0
1516#define MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x029C 0x05E4 0x0000 0x5 0x0 1516#define MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x029C 0x05E4 0x0000 0x5 0x0
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 3c3e6da1deac..a9aae88b74f5 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -292,6 +292,7 @@
292&uart3 { 292&uart3 {
293 pinctrl-names = "default"; 293 pinctrl-names = "default";
294 pinctrl-0 = <&uart3_pins>; 294 pinctrl-0 = <&uart3_pins>;
295 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
295}; 296};
296 297
297&gpio1 { 298&gpio1 {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index b15f1a77d684..1fe45d1f75ec 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -353,7 +353,7 @@
353 }; 353 };
354 354
355 twl_power: power { 355 twl_power: power {
356 compatible = "ti,twl4030-power-n900"; 356 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
357 ti,use_poweroff; 357 ti,use_poweroff;
358 }; 358 };
359}; 359};
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index 02f69f4a8fd3..9bad94efe1c8 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -107,7 +107,7 @@
107 #address-cells = <1>; 107 #address-cells = <1>;
108 #size-cells = <1>; 108 #size-cells = <1>;
109 reg = <1 0 0x08000000>; 109 reg = <1 0 0x08000000>;
110 ti,nand-ecc-opt = "ham1"; 110 ti,nand-ecc-opt = "sw";
111 nand-bus-width = <8>; 111 nand-bus-width = <8>;
112 gpmc,cs-on-ns = <0>; 112 gpmc,cs-on-ns = <0>;
113 gpmc,cs-rd-off-ns = <36>; 113 gpmc,cs-rd-off-ns = <36>;
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index e47ff69dcf70..5c375003bad1 100644
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -467,6 +467,7 @@
467 ti,bit-shift = <0x1e>; 467 ti,bit-shift = <0x1e>;
468 reg = <0x0d00>; 468 reg = <0x0d00>;
469 ti,set-bit-to-disable; 469 ti,set-bit-to-disable;
470 ti,set-rate-parent;
470 }; 471 };
471 472
472 dpll4_m6_ck: dpll4_m6_ck { 473 dpll4_m6_ck: dpll4_m6_ck {
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index e67a23b5d788..58c27466f012 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -367,10 +367,12 @@
367 367
368 l3_iclk_div: l3_iclk_div { 368 l3_iclk_div: l3_iclk_div {
369 #clock-cells = <0>; 369 #clock-cells = <0>;
370 compatible = "fixed-factor-clock"; 370 compatible = "ti,divider-clock";
371 ti,max-div = <2>;
372 ti,bit-shift = <4>;
373 reg = <0x100>;
371 clocks = <&dpll_core_h12x2_ck>; 374 clocks = <&dpll_core_h12x2_ck>;
372 clock-mult = <1>; 375 ti,index-power-of-two;
373 clock-div = <1>;
374 }; 376 };
375 377
376 gpu_l3_iclk: gpu_l3_iclk { 378 gpu_l3_iclk: gpu_l3_iclk {
@@ -383,10 +385,12 @@
383 385
384 l4_root_clk_div: l4_root_clk_div { 386 l4_root_clk_div: l4_root_clk_div {
385 #clock-cells = <0>; 387 #clock-cells = <0>;
386 compatible = "fixed-factor-clock"; 388 compatible = "ti,divider-clock";
389 ti,max-div = <2>;
390 ti,bit-shift = <8>;
391 reg = <0x100>;
387 clocks = <&l3_iclk_div>; 392 clocks = <&l3_iclk_div>;
388 clock-mult = <1>; 393 ti,index-power-of-two;
389 clock-div = <1>;
390 }; 394 };
391 395
392 slimbus1_slimbus_clk: slimbus1_slimbus_clk { 396 slimbus1_slimbus_clk: slimbus1_slimbus_clk {
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 23486c081a69..be59014474b2 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -275,11 +275,6 @@
275 renesas,function = "msiof0"; 275 renesas,function = "msiof0";
276 }; 276 };
277 277
278 i2c6_pins: i2c6 {
279 renesas,groups = "i2c6";
280 renesas,function = "i2c6";
281 };
282
283 usb0_pins: usb0 { 278 usb0_pins: usb0 {
284 renesas,groups = "usb0"; 279 renesas,groups = "usb0";
285 renesas,function = "usb0"; 280 renesas,function = "usb0";
@@ -420,8 +415,6 @@
420}; 415};
421 416
422&i2c6 { 417&i2c6 {
423 pinctrl-names = "default";
424 pinctrl-0 = <&i2c6_pins>;
425 status = "okay"; 418 status = "okay";
426 clock-frequency = <100000>; 419 clock-frequency = <100000>;
427 420
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index 042f821d9e4d..c9d912da6141 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -149,6 +149,8 @@
149&mmc0 { /* sdmmc */ 149&mmc0 { /* sdmmc */
150 num-slots = <1>; 150 num-slots = <1>;
151 status = "okay"; 151 status = "okay";
152 pinctrl-names = "default";
153 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
152 vmmc-supply = <&vcc_sd0>; 154 vmmc-supply = <&vcc_sd0>;
153 155
154 slot@0 { 156 slot@0 {
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index 171b610db709..5e4e3c238b2d 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -179,6 +179,8 @@
179&mmc0 { 179&mmc0 {
180 num-slots = <1>; 180 num-slots = <1>;
181 status = "okay"; 181 status = "okay";
182 pinctrl-names = "default";
183 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
182 vmmc-supply = <&vcc_sd0>; 184 vmmc-supply = <&vcc_sd0>;
183 185
184 slot@0 { 186 slot@0 {
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index 4a2000c620ad..3e97a669f15e 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -116,7 +116,6 @@
116 msp2: msp@80117000 { 116 msp2: msp@80117000 {
117 pinctrl-names = "default"; 117 pinctrl-names = "default";
118 pinctrl-0 = <&msp2_default_mode>; 118 pinctrl-0 = <&msp2_default_mode>;
119 status = "okay";
120 }; 119 };
121 120
122 msp3: msp@80125000 { 121 msp3: msp@80125000 {
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 44b07e512c24..e06fbfc55bb7 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -660,6 +660,8 @@
660 clock-frequency = <100000>; 660 clock-frequency = <100000>;
661 resets = <&apb2_rst 0>; 661 resets = <&apb2_rst 0>;
662 status = "disabled"; 662 status = "disabled";
663 #address-cells = <1>;
664 #size-cells = <0>;
663 }; 665 };
664 666
665 i2c1: i2c@01c2b000 { 667 i2c1: i2c@01c2b000 {
@@ -670,6 +672,8 @@
670 clock-frequency = <100000>; 672 clock-frequency = <100000>;
671 resets = <&apb2_rst 1>; 673 resets = <&apb2_rst 1>;
672 status = "disabled"; 674 status = "disabled";
675 #address-cells = <1>;
676 #size-cells = <0>;
673 }; 677 };
674 678
675 i2c2: i2c@01c2b400 { 679 i2c2: i2c@01c2b400 {
@@ -680,6 +684,8 @@
680 clock-frequency = <100000>; 684 clock-frequency = <100000>;
681 resets = <&apb2_rst 2>; 685 resets = <&apb2_rst 2>;
682 status = "disabled"; 686 status = "disabled";
687 #address-cells = <1>;
688 #size-cells = <0>;
683 }; 689 };
684 690
685 i2c3: i2c@01c2b800 { 691 i2c3: i2c@01c2b800 {
@@ -690,6 +696,8 @@
690 clock-frequency = <100000>; 696 clock-frequency = <100000>;
691 resets = <&apb2_rst 3>; 697 resets = <&apb2_rst 3>;
692 status = "disabled"; 698 status = "disabled";
699 #address-cells = <1>;
700 #size-cells = <0>;
693 }; 701 };
694 702
695 gmac: ethernet@01c30000 { 703 gmac: ethernet@01c30000 {
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 8adaa7871dd3..a5446cba9804 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -423,7 +423,7 @@
423 vcc4-supply = <&sys_3v3_reg>; 423 vcc4-supply = <&sys_3v3_reg>;
424 vcc5-supply = <&sys_3v3_reg>; 424 vcc5-supply = <&sys_3v3_reg>;
425 vcc6-supply = <&vio_reg>; 425 vcc6-supply = <&vio_reg>;
426 vcc7-supply = <&sys_5v0_reg>; 426 vcc7-supply = <&charge_pump_5v0_reg>;
427 vccio-supply = <&sys_3v3_reg>; 427 vccio-supply = <&sys_3v3_reg>;
428 428
429 regulators { 429 regulators {
@@ -674,5 +674,14 @@
674 regulator-max-microvolt = <3300000>; 674 regulator-max-microvolt = <3300000>;
675 regulator-always-on; 675 regulator-always-on;
676 }; 676 };
677
678 charge_pump_5v0_reg: regulator@101 {
679 compatible = "regulator-fixed";
680 reg = <101>;
681 regulator-name = "5v0";
682 regulator-min-microvolt = <5000000>;
683 regulator-max-microvolt = <5000000>;
684 regulator-always-on;
685 };
677 }; 686 };
678}; 687};
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index bf16f8e65627..c4ed1bec4d92 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -201,7 +201,7 @@
201 vcc4-supply = <&sys_3v3_reg>; 201 vcc4-supply = <&sys_3v3_reg>;
202 vcc5-supply = <&sys_3v3_reg>; 202 vcc5-supply = <&sys_3v3_reg>;
203 vcc6-supply = <&vio_reg>; 203 vcc6-supply = <&vio_reg>;
204 vcc7-supply = <&sys_5v0_reg>; 204 vcc7-supply = <&charge_pump_5v0_reg>;
205 vccio-supply = <&sys_3v3_reg>; 205 vccio-supply = <&sys_3v3_reg>;
206 206
207 regulators { 207 regulators {
@@ -373,5 +373,14 @@
373 regulator-max-microvolt = <3300000>; 373 regulator-max-microvolt = <3300000>;
374 regulator-always-on; 374 regulator-always-on;
375 }; 375 };
376
377 charge_pump_5v0_reg: regulator@101 {
378 compatible = "regulator-fixed";
379 reg = <101>;
380 regulator-name = "5v0";
381 regulator-min-microvolt = <5000000>;
382 regulator-max-microvolt = <5000000>;
383 regulator-always-on;
384 };
376 }; 385 };
377}; 386};
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index 2e3bd3172b23..55eb35f068fb 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -83,10 +83,6 @@
83 regulator-always-on; 83 regulator-always-on;
84 }; 84 };
85 85
86 clk32kg: regulator-clk32kg {
87 compatible = "ti,twl6030-clk32kg";
88 };
89
90 twl_usb_comparator: usb-comparator { 86 twl_usb_comparator: usb-comparator {
91 compatible = "ti,twl6030-usb"; 87 compatible = "ti,twl6030-usb";
92 interrupts = <4>, <10>; 88 interrupts = <4>, <10>;
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 11d733406c7e..b8a5e8c68f06 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -168,7 +168,7 @@
168 }; 168 };
169 169
170 pinctrl_esdhc1: esdhc1grp { 170 pinctrl_esdhc1: esdhc1grp {
171 fsl,fsl,pins = < 171 fsl,pins = <
172 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef 172 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
173 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef 173 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
174 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef 174 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 88099175fc56..d86771abbf57 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1443,14 +1443,14 @@ void edma_assign_channel_eventq(unsigned channel, enum dma_event_q eventq_no)
1443EXPORT_SYMBOL(edma_assign_channel_eventq); 1443EXPORT_SYMBOL(edma_assign_channel_eventq);
1444 1444
1445static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata, 1445static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
1446 struct edma *edma_cc) 1446 struct edma *edma_cc, int cc_id)
1447{ 1447{
1448 int i; 1448 int i;
1449 u32 value, cccfg; 1449 u32 value, cccfg;
1450 s8 (*queue_priority_map)[2]; 1450 s8 (*queue_priority_map)[2];
1451 1451
1452 /* Decode the eDMA3 configuration from CCCFG register */ 1452 /* Decode the eDMA3 configuration from CCCFG register */
1453 cccfg = edma_read(0, EDMA_CCCFG); 1453 cccfg = edma_read(cc_id, EDMA_CCCFG);
1454 1454
1455 value = GET_NUM_REGN(cccfg); 1455 value = GET_NUM_REGN(cccfg);
1456 edma_cc->num_region = BIT(value); 1456 edma_cc->num_region = BIT(value);
@@ -1464,7 +1464,8 @@ static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
1464 value = GET_NUM_EVQUE(cccfg); 1464 value = GET_NUM_EVQUE(cccfg);
1465 edma_cc->num_tc = value + 1; 1465 edma_cc->num_tc = value + 1;
1466 1466
1467 dev_dbg(dev, "eDMA3 HW configuration (cccfg: 0x%08x):\n", cccfg); 1467 dev_dbg(dev, "eDMA3 CC%d HW configuration (cccfg: 0x%08x):\n", cc_id,
1468 cccfg);
1468 dev_dbg(dev, "num_region: %u\n", edma_cc->num_region); 1469 dev_dbg(dev, "num_region: %u\n", edma_cc->num_region);
1469 dev_dbg(dev, "num_channel: %u\n", edma_cc->num_channels); 1470 dev_dbg(dev, "num_channel: %u\n", edma_cc->num_channels);
1470 dev_dbg(dev, "num_slot: %u\n", edma_cc->num_slots); 1471 dev_dbg(dev, "num_slot: %u\n", edma_cc->num_slots);
@@ -1684,7 +1685,7 @@ static int edma_probe(struct platform_device *pdev)
1684 return -ENOMEM; 1685 return -ENOMEM;
1685 1686
1686 /* Get eDMA3 configuration from IP */ 1687 /* Get eDMA3 configuration from IP */
1687 ret = edma_setup_from_hw(dev, info[j], edma_cc[j]); 1688 ret = edma_setup_from_hw(dev, info[j], edma_cc[j], j);
1688 if (ret) 1689 if (ret)
1689 return ret; 1690 return ret;
1690 1691
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index fd43f7f55b70..79ecb4f34ffb 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -472,7 +472,6 @@ static inline void __sync_cache_range_r(volatile void *p, size_t size)
472 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR \n\t" \ 472 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR \n\t" \
473 "isb \n\t" \ 473 "isb \n\t" \
474 "bl v7_flush_dcache_"__stringify(level)" \n\t" \ 474 "bl v7_flush_dcache_"__stringify(level)" \n\t" \
475 "clrex \n\t" \
476 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \ 475 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \
477 "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" \ 476 "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" \
478 "mcr p15, 0, r0, c1, c0, 1 @ set ACTLR \n\t" \ 477 "mcr p15, 0, r0, c1, c0, 1 @ set ACTLR \n\t" \
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 963a2515906d..819777d0e91f 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -74,6 +74,7 @@
74#define ARM_CPU_PART_CORTEX_A12 0x4100c0d0 74#define ARM_CPU_PART_CORTEX_A12 0x4100c0d0
75#define ARM_CPU_PART_CORTEX_A17 0x4100c0e0 75#define ARM_CPU_PART_CORTEX_A17 0x4100c0e0
76#define ARM_CPU_PART_CORTEX_A15 0x4100c0f0 76#define ARM_CPU_PART_CORTEX_A15 0x4100c0f0
77#define ARM_CPU_PART_MASK 0xff00fff0
77 78
78#define ARM_CPU_XSCALE_ARCH_MASK 0xe000 79#define ARM_CPU_XSCALE_ARCH_MASK 0xe000
79#define ARM_CPU_XSCALE_ARCH_V1 0x2000 80#define ARM_CPU_XSCALE_ARCH_V1 0x2000
@@ -179,7 +180,7 @@ static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
179 */ 180 */
180static inline unsigned int __attribute_const__ read_cpuid_part(void) 181static inline unsigned int __attribute_const__ read_cpuid_part(void)
181{ 182{
182 return read_cpuid_id() & 0xff00fff0; 183 return read_cpuid_id() & ARM_CPU_PART_MASK;
183} 184}
184 185
185static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void) 186static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void)
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index f4b46d39b9cf..afb9cafd3786 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -50,6 +50,7 @@ typedef struct user_fp elf_fpregset_t;
50#define R_ARM_ABS32 2 50#define R_ARM_ABS32 2
51#define R_ARM_CALL 28 51#define R_ARM_CALL 28
52#define R_ARM_JUMP24 29 52#define R_ARM_JUMP24 29
53#define R_ARM_TARGET1 38
53#define R_ARM_V4BX 40 54#define R_ARM_V4BX 40
54#define R_ARM_PREL31 42 55#define R_ARM_PREL31 42
55#define R_ARM_MOVW_ABS_NC 43 56#define R_ARM_MOVW_ABS_NC 43
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index a252c0bfacf5..0ad7d490ee6f 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -8,6 +8,7 @@
8#include <linux/cpumask.h> 8#include <linux/cpumask.h>
9#include <linux/err.h> 9#include <linux/err.h>
10 10
11#include <asm/cpu.h>
11#include <asm/cputype.h> 12#include <asm/cputype.h>
12 13
13/* 14/*
@@ -25,6 +26,20 @@ static inline bool is_smp(void)
25#endif 26#endif
26} 27}
27 28
29/**
30 * smp_cpuid_part() - return part id for a given cpu
31 * @cpu: logical cpu id.
32 *
33 * Return: part id of logical cpu passed as argument.
34 */
35static inline unsigned int smp_cpuid_part(int cpu)
36{
37 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
38
39 return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
40 read_cpuid_part();
41}
42
28/* all SMP configurations have the extended CPUID registers */ 43/* all SMP configurations have the extended CPUID registers */
29#ifndef CONFIG_MMU 44#ifndef CONFIG_MMU
30#define tlb_ops_need_broadcast() 0 45#define tlb_ops_need_broadcast() 0
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 8db307d0954b..2fdf8679b46e 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -208,26 +208,21 @@
208#endif 208#endif
209 .endif 209 .endif
210 msr spsr_cxsf, \rpsr 210 msr spsr_cxsf, \rpsr
211#if defined(CONFIG_CPU_V6) 211#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
212 ldr r0, [sp] 212 @ We must avoid clrex due to Cortex-A15 erratum #830321
213 strex r1, r2, [sp] @ clear the exclusive monitor 213 sub r0, sp, #4 @ uninhabited address
214 ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr 214 strex r1, r2, [r0] @ clear the exclusive monitor
215#elif defined(CONFIG_CPU_32v6K)
216 clrex @ clear the exclusive monitor
217 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
218#else
219 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
220#endif 215#endif
216 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
221 .endm 217 .endm
222 218
223 .macro restore_user_regs, fast = 0, offset = 0 219 .macro restore_user_regs, fast = 0, offset = 0
224 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 220 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
225 ldr lr, [sp, #\offset + S_PC]! @ get pc 221 ldr lr, [sp, #\offset + S_PC]! @ get pc
226 msr spsr_cxsf, r1 @ save in spsr_svc 222 msr spsr_cxsf, r1 @ save in spsr_svc
227#if defined(CONFIG_CPU_V6) 223#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
224 @ We must avoid clrex due to Cortex-A15 erratum #830321
228 strex r1, r2, [sp] @ clear the exclusive monitor 225 strex r1, r2, [sp] @ clear the exclusive monitor
229#elif defined(CONFIG_CPU_32v6K)
230 clrex @ clear the exclusive monitor
231#endif 226#endif
232 .if \fast 227 .if \fast
233 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr 228 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
@@ -261,7 +256,10 @@
261 .endif 256 .endif
262 ldr lr, [sp, #S_SP] @ top of the stack 257 ldr lr, [sp, #S_SP] @ top of the stack
263 ldrd r0, r1, [sp, #S_LR] @ calling lr and pc 258 ldrd r0, r1, [sp, #S_LR] @ calling lr and pc
264 clrex @ clear the exclusive monitor 259
260 @ We must avoid clrex due to Cortex-A15 erratum #830321
261 strex r2, r1, [sp, #S_LR] @ clear the exclusive monitor
262
265 stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context 263 stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context
266 ldmia sp, {r0 - r12} 264 ldmia sp, {r0 - r12}
267 mov sp, lr 265 mov sp, lr
@@ -282,13 +280,16 @@
282 .endm 280 .endm
283#else /* ifdef CONFIG_CPU_V7M */ 281#else /* ifdef CONFIG_CPU_V7M */
284 .macro restore_user_regs, fast = 0, offset = 0 282 .macro restore_user_regs, fast = 0, offset = 0
285 clrex @ clear the exclusive monitor
286 mov r2, sp 283 mov r2, sp
287 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr 284 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
288 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 285 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
289 ldr lr, [sp, #\offset + S_PC] @ get pc 286 ldr lr, [sp, #\offset + S_PC] @ get pc
290 add sp, sp, #\offset + S_SP 287 add sp, sp, #\offset + S_SP
291 msr spsr_cxsf, r1 @ save in spsr_svc 288 msr spsr_cxsf, r1 @ save in spsr_svc
289
290 @ We must avoid clrex due to Cortex-A15 erratum #830321
291 strex r1, r2, [sp] @ clear the exclusive monitor
292
292 .if \fast 293 .if \fast
293 ldmdb sp, {r1 - r12} @ get calling r1 - r12 294 ldmdb sp, {r1 - r12} @ get calling r1 - r12
294 .else 295 .else
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 45e478157278..6a4dffefd357 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -91,6 +91,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
91 break; 91 break;
92 92
93 case R_ARM_ABS32: 93 case R_ARM_ABS32:
94 case R_ARM_TARGET1:
94 *(u32 *)loc += sym->st_value; 95 *(u32 *)loc += sym->st_value;
95 break; 96 break;
96 97
diff --git a/arch/arm/kvm/handle_exit.c b/arch/arm/kvm/handle_exit.c
index 4c979d466cc1..a96a8043277c 100644
--- a/arch/arm/kvm/handle_exit.c
+++ b/arch/arm/kvm/handle_exit.c
@@ -93,6 +93,8 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
93 else 93 else
94 kvm_vcpu_block(vcpu); 94 kvm_vcpu_block(vcpu);
95 95
96 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
97
96 return 1; 98 return 1;
97} 99}
98 100
diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
index 991415d978b6..3988e72d16ff 100644
--- a/arch/arm/kvm/init.S
+++ b/arch/arm/kvm/init.S
@@ -99,6 +99,10 @@ __do_hyp_init:
99 mrc p15, 0, r0, c10, c2, 1 99 mrc p15, 0, r0, c10, c2, 1
100 mcr p15, 4, r0, c10, c2, 1 100 mcr p15, 4, r0, c10, c2, 1
101 101
102 @ Invalidate the stale TLBs from Bootloader
103 mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH
104 dsb ish
105
102 @ Set the HSCTLR to: 106 @ Set the HSCTLR to:
103 @ - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel) 107 @ - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel)
104 @ - Endianness: Kernel config 108 @ - Endianness: Kernel config
diff --git a/arch/arm/mach-at91/board-dt-rm9200.c b/arch/arm/mach-at91/board-dt-rm9200.c
index 3a185faee795..f4b6e91843e4 100644
--- a/arch/arm/mach-at91/board-dt-rm9200.c
+++ b/arch/arm/mach-at91/board-dt-rm9200.c
@@ -14,6 +14,7 @@
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_irq.h> 16#include <linux/of_irq.h>
17#include <linux/clk-provider.h>
17 18
18#include <asm/setup.h> 19#include <asm/setup.h>
19#include <asm/irq.h> 20#include <asm/irq.h>
@@ -35,13 +36,21 @@ static void __init at91rm9200_dt_init_irq(void)
35 of_irq_init(irq_of_match); 36 of_irq_init(irq_of_match);
36} 37}
37 38
39static void __init at91rm9200_dt_timer_init(void)
40{
41#if defined(CONFIG_COMMON_CLK)
42 of_clk_init(NULL);
43#endif
44 at91rm9200_timer_init();
45}
46
38static const char *at91rm9200_dt_board_compat[] __initdata = { 47static const char *at91rm9200_dt_board_compat[] __initdata = {
39 "atmel,at91rm9200", 48 "atmel,at91rm9200",
40 NULL 49 NULL
41}; 50};
42 51
43DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)") 52DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
44 .init_time = at91rm9200_timer_init, 53 .init_time = at91rm9200_dt_timer_init,
45 .map_io = at91_map_io, 54 .map_io = at91_map_io,
46 .handle_irq = at91_aic_handle_irq, 55 .handle_irq = at91_aic_handle_irq,
47 .init_early = at91rm9200_dt_initialize, 56 .init_early = at91rm9200_dt_initialize,
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index 67c492aabf4d..b19a39652545 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -36,5 +36,4 @@ obj-$(CONFIG_ARCH_BCM_5301X) += bcm_5301x.o
36 36
37ifeq ($(CONFIG_ARCH_BRCMSTB),y) 37ifeq ($(CONFIG_ARCH_BRCMSTB),y)
38obj-y += brcmstb.o 38obj-y += brcmstb.o
39obj-$(CONFIG_SMP) += headsmp-brcmstb.o platsmp-brcmstb.o
40endif 39endif
diff --git a/arch/arm/mach-bcm/brcmstb.h b/arch/arm/mach-bcm/brcmstb.h
deleted file mode 100644
index ec0c3d112b36..000000000000
--- a/arch/arm/mach-bcm/brcmstb.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Copyright (C) 2013-2014 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __BRCMSTB_H__
15#define __BRCMSTB_H__
16
17void brcmstb_secondary_startup(void);
18
19#endif /* __BRCMSTB_H__ */
diff --git a/arch/arm/mach-bcm/headsmp-brcmstb.S b/arch/arm/mach-bcm/headsmp-brcmstb.S
deleted file mode 100644
index 199c1ea58248..000000000000
--- a/arch/arm/mach-bcm/headsmp-brcmstb.S
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * SMP boot code for secondary CPUs
3 * Based on arch/arm/mach-tegra/headsmp.S
4 *
5 * Copyright (C) 2010 NVIDIA, Inc.
6 * Copyright (C) 2013-2014 Broadcom Corporation
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <asm/assembler.h>
19#include <linux/linkage.h>
20#include <linux/init.h>
21
22 .section ".text.head", "ax"
23
24ENTRY(brcmstb_secondary_startup)
25 /*
26 * Ensure CPU is in a sane state by disabling all IRQs and switching
27 * into SVC mode.
28 */
29 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r0
30
31 bl v7_invalidate_l1
32 b secondary_startup
33ENDPROC(brcmstb_secondary_startup)
diff --git a/arch/arm/mach-bcm/platsmp-brcmstb.c b/arch/arm/mach-bcm/platsmp-brcmstb.c
deleted file mode 100644
index af780e9c23a6..000000000000
--- a/arch/arm/mach-bcm/platsmp-brcmstb.c
+++ /dev/null
@@ -1,363 +0,0 @@
1/*
2 * Broadcom STB CPU SMP and hotplug support for ARM
3 *
4 * Copyright (C) 2013-2014 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/delay.h>
17#include <linux/errno.h>
18#include <linux/init.h>
19#include <linux/io.h>
20#include <linux/of_address.h>
21#include <linux/of_platform.h>
22#include <linux/printk.h>
23#include <linux/regmap.h>
24#include <linux/smp.h>
25#include <linux/mfd/syscon.h>
26#include <linux/spinlock.h>
27
28#include <asm/cacheflush.h>
29#include <asm/cp15.h>
30#include <asm/mach-types.h>
31#include <asm/smp_plat.h>
32
33#include "brcmstb.h"
34
35enum {
36 ZONE_MAN_CLKEN_MASK = BIT(0),
37 ZONE_MAN_RESET_CNTL_MASK = BIT(1),
38 ZONE_MAN_MEM_PWR_MASK = BIT(4),
39 ZONE_RESERVED_1_MASK = BIT(5),
40 ZONE_MAN_ISO_CNTL_MASK = BIT(6),
41 ZONE_MANUAL_CONTROL_MASK = BIT(7),
42 ZONE_PWR_DN_REQ_MASK = BIT(9),
43 ZONE_PWR_UP_REQ_MASK = BIT(10),
44 ZONE_BLK_RST_ASSERT_MASK = BIT(12),
45 ZONE_PWR_OFF_STATE_MASK = BIT(25),
46 ZONE_PWR_ON_STATE_MASK = BIT(26),
47 ZONE_DPG_PWR_STATE_MASK = BIT(28),
48 ZONE_MEM_PWR_STATE_MASK = BIT(29),
49 ZONE_RESET_STATE_MASK = BIT(31),
50 CPU0_PWR_ZONE_CTRL_REG = 1,
51 CPU_RESET_CONFIG_REG = 2,
52};
53
54static void __iomem *cpubiuctrl_block;
55static void __iomem *hif_cont_block;
56static u32 cpu0_pwr_zone_ctrl_reg;
57static u32 cpu_rst_cfg_reg;
58static u32 hif_cont_reg;
59
60#ifdef CONFIG_HOTPLUG_CPU
61static DEFINE_PER_CPU_ALIGNED(int, per_cpu_sw_state);
62
63static int per_cpu_sw_state_rd(u32 cpu)
64{
65 sync_cache_r(SHIFT_PERCPU_PTR(&per_cpu_sw_state, per_cpu_offset(cpu)));
66 return per_cpu(per_cpu_sw_state, cpu);
67}
68
69static void per_cpu_sw_state_wr(u32 cpu, int val)
70{
71 per_cpu(per_cpu_sw_state, cpu) = val;
72 dmb();
73 sync_cache_w(SHIFT_PERCPU_PTR(&per_cpu_sw_state, per_cpu_offset(cpu)));
74 dsb_sev();
75}
76#else
77static inline void per_cpu_sw_state_wr(u32 cpu, int val) { }
78#endif
79
80static void __iomem *pwr_ctrl_get_base(u32 cpu)
81{
82 void __iomem *base = cpubiuctrl_block + cpu0_pwr_zone_ctrl_reg;
83 base += (cpu_logical_map(cpu) * 4);
84 return base;
85}
86
87static u32 pwr_ctrl_rd(u32 cpu)
88{
89 void __iomem *base = pwr_ctrl_get_base(cpu);
90 return readl_relaxed(base);
91}
92
93static void pwr_ctrl_wr(u32 cpu, u32 val)
94{
95 void __iomem *base = pwr_ctrl_get_base(cpu);
96 writel(val, base);
97}
98
99static void cpu_rst_cfg_set(u32 cpu, int set)
100{
101 u32 val;
102 val = readl_relaxed(cpubiuctrl_block + cpu_rst_cfg_reg);
103 if (set)
104 val |= BIT(cpu_logical_map(cpu));
105 else
106 val &= ~BIT(cpu_logical_map(cpu));
107 writel_relaxed(val, cpubiuctrl_block + cpu_rst_cfg_reg);
108}
109
110static void cpu_set_boot_addr(u32 cpu, unsigned long boot_addr)
111{
112 const int reg_ofs = cpu_logical_map(cpu) * 8;
113 writel_relaxed(0, hif_cont_block + hif_cont_reg + reg_ofs);
114 writel_relaxed(boot_addr, hif_cont_block + hif_cont_reg + 4 + reg_ofs);
115}
116
117static void brcmstb_cpu_boot(u32 cpu)
118{
119 pr_info("SMP: Booting CPU%d...\n", cpu);
120
121 /*
122 * set the reset vector to point to the secondary_startup
123 * routine
124 */
125 cpu_set_boot_addr(cpu, virt_to_phys(brcmstb_secondary_startup));
126
127 /* unhalt the cpu */
128 cpu_rst_cfg_set(cpu, 0);
129}
130
131static void brcmstb_cpu_power_on(u32 cpu)
132{
133 /*
134 * The secondary cores power was cut, so we must go through
135 * power-on initialization.
136 */
137 u32 tmp;
138
139 pr_info("SMP: Powering up CPU%d...\n", cpu);
140
141 /* Request zone power up */
142 pwr_ctrl_wr(cpu, ZONE_PWR_UP_REQ_MASK);
143
144 /* Wait for the power up FSM to complete */
145 do {
146 tmp = pwr_ctrl_rd(cpu);
147 } while (!(tmp & ZONE_PWR_ON_STATE_MASK));
148
149 per_cpu_sw_state_wr(cpu, 1);
150}
151
152static int brcmstb_cpu_get_power_state(u32 cpu)
153{
154 int tmp = pwr_ctrl_rd(cpu);
155 return (tmp & ZONE_RESET_STATE_MASK) ? 0 : 1;
156}
157
158#ifdef CONFIG_HOTPLUG_CPU
159
160static void brcmstb_cpu_die(u32 cpu)
161{
162 v7_exit_coherency_flush(all);
163
164 /* Prevent all interrupts from reaching this CPU. */
165 arch_local_irq_disable();
166
167 /*
168 * Final full barrier to ensure everything before this instruction has
169 * quiesced.
170 */
171 isb();
172 dsb();
173
174 per_cpu_sw_state_wr(cpu, 0);
175
176 /* Sit and wait to die */
177 wfi();
178
179 /* We should never get here... */
180 panic("Spurious interrupt on CPU %d received!\n", cpu);
181}
182
183static int brcmstb_cpu_kill(u32 cpu)
184{
185 u32 tmp;
186
187 pr_info("SMP: Powering down CPU%d...\n", cpu);
188
189 while (per_cpu_sw_state_rd(cpu))
190 ;
191
192 /* Program zone reset */
193 pwr_ctrl_wr(cpu, ZONE_RESET_STATE_MASK | ZONE_BLK_RST_ASSERT_MASK |
194 ZONE_PWR_DN_REQ_MASK);
195
196 /* Verify zone reset */
197 tmp = pwr_ctrl_rd(cpu);
198 if (!(tmp & ZONE_RESET_STATE_MASK))
199 pr_err("%s: Zone reset bit for CPU %d not asserted!\n",
200 __func__, cpu);
201
202 /* Wait for power down */
203 do {
204 tmp = pwr_ctrl_rd(cpu);
205 } while (!(tmp & ZONE_PWR_OFF_STATE_MASK));
206
207 /* Settle-time from Broadcom-internal DVT reference code */
208 udelay(7);
209
210 /* Assert reset on the CPU */
211 cpu_rst_cfg_set(cpu, 1);
212
213 return 1;
214}
215
216#endif /* CONFIG_HOTPLUG_CPU */
217
218static int __init setup_hifcpubiuctrl_regs(struct device_node *np)
219{
220 int rc = 0;
221 char *name;
222 struct device_node *syscon_np = NULL;
223
224 name = "syscon-cpu";
225
226 syscon_np = of_parse_phandle(np, name, 0);
227 if (!syscon_np) {
228 pr_err("can't find phandle %s\n", name);
229 rc = -EINVAL;
230 goto cleanup;
231 }
232
233 cpubiuctrl_block = of_iomap(syscon_np, 0);
234 if (!cpubiuctrl_block) {
235 pr_err("iomap failed for cpubiuctrl_block\n");
236 rc = -EINVAL;
237 goto cleanup;
238 }
239
240 rc = of_property_read_u32_index(np, name, CPU0_PWR_ZONE_CTRL_REG,
241 &cpu0_pwr_zone_ctrl_reg);
242 if (rc) {
243 pr_err("failed to read 1st entry from %s property (%d)\n", name,
244 rc);
245 rc = -EINVAL;
246 goto cleanup;
247 }
248
249 rc = of_property_read_u32_index(np, name, CPU_RESET_CONFIG_REG,
250 &cpu_rst_cfg_reg);
251 if (rc) {
252 pr_err("failed to read 2nd entry from %s property (%d)\n", name,
253 rc);
254 rc = -EINVAL;
255 goto cleanup;
256 }
257
258cleanup:
259 if (syscon_np)
260 of_node_put(syscon_np);
261
262 return rc;
263}
264
265static int __init setup_hifcont_regs(struct device_node *np)
266{
267 int rc = 0;
268 char *name;
269 struct device_node *syscon_np = NULL;
270
271 name = "syscon-cont";
272
273 syscon_np = of_parse_phandle(np, name, 0);
274 if (!syscon_np) {
275 pr_err("can't find phandle %s\n", name);
276 rc = -EINVAL;
277 goto cleanup;
278 }
279
280 hif_cont_block = of_iomap(syscon_np, 0);
281 if (!hif_cont_block) {
282 pr_err("iomap failed for hif_cont_block\n");
283 rc = -EINVAL;
284 goto cleanup;
285 }
286
287 /* offset is at top of hif_cont_block */
288 hif_cont_reg = 0;
289
290cleanup:
291 if (syscon_np)
292 of_node_put(syscon_np);
293
294 return rc;
295}
296
297static void __init brcmstb_cpu_ctrl_setup(unsigned int max_cpus)
298{
299 int rc;
300 struct device_node *np;
301 char *name;
302
303 name = "brcm,brcmstb-smpboot";
304 np = of_find_compatible_node(NULL, NULL, name);
305 if (!np) {
306 pr_err("can't find compatible node %s\n", name);
307 return;
308 }
309
310 rc = setup_hifcpubiuctrl_regs(np);
311 if (rc)
312 return;
313
314 rc = setup_hifcont_regs(np);
315 if (rc)
316 return;
317}
318
319static DEFINE_SPINLOCK(boot_lock);
320
321static void brcmstb_secondary_init(unsigned int cpu)
322{
323 /*
324 * Synchronise with the boot thread.
325 */
326 spin_lock(&boot_lock);
327 spin_unlock(&boot_lock);
328}
329
330static int brcmstb_boot_secondary(unsigned int cpu, struct task_struct *idle)
331{
332 /*
333 * set synchronisation state between this boot processor
334 * and the secondary one
335 */
336 spin_lock(&boot_lock);
337
338 /* Bring up power to the core if necessary */
339 if (brcmstb_cpu_get_power_state(cpu) == 0)
340 brcmstb_cpu_power_on(cpu);
341
342 brcmstb_cpu_boot(cpu);
343
344 /*
345 * now the secondary core is starting up let it run its
346 * calibrations, then wait for it to finish
347 */
348 spin_unlock(&boot_lock);
349
350 return 0;
351}
352
353static struct smp_operations brcmstb_smp_ops __initdata = {
354 .smp_prepare_cpus = brcmstb_cpu_ctrl_setup,
355 .smp_secondary_init = brcmstb_secondary_init,
356 .smp_boot_secondary = brcmstb_boot_secondary,
357#ifdef CONFIG_HOTPLUG_CPU
358 .cpu_kill = brcmstb_cpu_kill,
359 .cpu_die = brcmstb_cpu_die,
360#endif
361};
362
363CPU_METHOD_OF_DECLARE(brcmstb_smp, "brcm,brahma-b15", &brcmstb_smp_ops);
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index b2f8b60cf0e9..dc9a764a7c37 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -43,7 +43,6 @@
43 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR\n\t" \ 43 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR\n\t" \
44 "isb\n\t"\ 44 "isb\n\t"\
45 "bl v7_flush_dcache_"__stringify(level)"\n\t" \ 45 "bl v7_flush_dcache_"__stringify(level)"\n\t" \
46 "clrex\n\t"\
47 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR\n\t" \ 46 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR\n\t" \
48 "bic r0, r0, #(1 << 6) @ disable local coherency\n\t" \ 47 "bic r0, r0, #(1 << 6) @ disable local coherency\n\t" \
49 /* Dummy Load of a device register to avoid Erratum 799270 */ \ 48 /* Dummy Load of a device register to avoid Erratum 799270 */ \
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 9de84a215abd..be9a51afe05a 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -85,7 +85,6 @@ config SOC_IMX25
85 85
86config SOC_IMX27 86config SOC_IMX27
87 bool 87 bool
88 select ARCH_HAS_OPP
89 select CPU_ARM926T 88 select CPU_ARM926T
90 select IMX_HAVE_IOMUX_V1 89 select IMX_HAVE_IOMUX_V1
91 select MXC_AVIC 90 select MXC_AVIC
@@ -659,7 +658,6 @@ comment "Device tree only"
659 658
660config SOC_IMX5 659config SOC_IMX5
661 bool 660 bool
662 select ARCH_HAS_OPP
663 select HAVE_IMX_SRC 661 select HAVE_IMX_SRC
664 select MXC_TZIC 662 select MXC_TZIC
665 663
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index ac88599ca080..23c02932bf84 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -93,9 +93,11 @@ obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
93obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o 93obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
94obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o 94obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
95obj-$(CONFIG_HAVE_IMX_SRC) += src.o 95obj-$(CONFIG_HAVE_IMX_SRC) += src.o
96ifdef CONFIG_SOC_IMX6
96AFLAGS_headsmp.o :=-Wa,-march=armv7-a 97AFLAGS_headsmp.o :=-Wa,-march=armv7-a
97obj-$(CONFIG_SMP) += headsmp.o platsmp.o 98obj-$(CONFIG_SMP) += headsmp.o platsmp.o
98obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 99obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
100endif
99obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o 101obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
100obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o 102obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o
101obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o mach-imx6sx.o 103obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o mach-imx6sx.o
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 6cceb7765c14..29d412975aff 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -194,6 +194,10 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
194 clk[IMX6QDL_CLK_PLL3_80M] = imx_clk_fixed_factor("pll3_80m", "pll3_usb_otg", 1, 6); 194 clk[IMX6QDL_CLK_PLL3_80M] = imx_clk_fixed_factor("pll3_80m", "pll3_usb_otg", 1, 6);
195 clk[IMX6QDL_CLK_PLL3_60M] = imx_clk_fixed_factor("pll3_60m", "pll3_usb_otg", 1, 8); 195 clk[IMX6QDL_CLK_PLL3_60M] = imx_clk_fixed_factor("pll3_60m", "pll3_usb_otg", 1, 8);
196 clk[IMX6QDL_CLK_TWD] = imx_clk_fixed_factor("twd", "arm", 1, 2); 196 clk[IMX6QDL_CLK_TWD] = imx_clk_fixed_factor("twd", "arm", 1, 2);
197 if (cpu_is_imx6dl()) {
198 clk[IMX6QDL_CLK_GPU2D_AXI] = imx_clk_fixed_factor("gpu2d_axi", "mmdc_ch0_axi_podf", 1, 1);
199 clk[IMX6QDL_CLK_GPU3D_AXI] = imx_clk_fixed_factor("gpu3d_axi", "mmdc_ch0_axi_podf", 1, 1);
200 }
197 201
198 clk[IMX6QDL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); 202 clk[IMX6QDL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
199 clk[IMX6QDL_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", CLK_SET_RATE_PARENT, base + 0x170, 15, 1, 0, &imx_ccm_lock); 203 clk[IMX6QDL_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", CLK_SET_RATE_PARENT, base + 0x170, 15, 1, 0, &imx_ccm_lock);
@@ -217,8 +221,10 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
217 clk[IMX6QDL_CLK_ESAI_SEL] = imx_clk_mux("esai_sel", base + 0x20, 19, 2, audio_sels, ARRAY_SIZE(audio_sels)); 221 clk[IMX6QDL_CLK_ESAI_SEL] = imx_clk_mux("esai_sel", base + 0x20, 19, 2, audio_sels, ARRAY_SIZE(audio_sels));
218 clk[IMX6QDL_CLK_ASRC_SEL] = imx_clk_mux("asrc_sel", base + 0x30, 7, 2, audio_sels, ARRAY_SIZE(audio_sels)); 222 clk[IMX6QDL_CLK_ASRC_SEL] = imx_clk_mux("asrc_sel", base + 0x30, 7, 2, audio_sels, ARRAY_SIZE(audio_sels));
219 clk[IMX6QDL_CLK_SPDIF_SEL] = imx_clk_mux("spdif_sel", base + 0x30, 20, 2, audio_sels, ARRAY_SIZE(audio_sels)); 223 clk[IMX6QDL_CLK_SPDIF_SEL] = imx_clk_mux("spdif_sel", base + 0x30, 20, 2, audio_sels, ARRAY_SIZE(audio_sels));
220 clk[IMX6QDL_CLK_GPU2D_AXI] = imx_clk_mux("gpu2d_axi", base + 0x18, 0, 1, gpu_axi_sels, ARRAY_SIZE(gpu_axi_sels)); 224 if (cpu_is_imx6q()) {
221 clk[IMX6QDL_CLK_GPU3D_AXI] = imx_clk_mux("gpu3d_axi", base + 0x18, 1, 1, gpu_axi_sels, ARRAY_SIZE(gpu_axi_sels)); 225 clk[IMX6QDL_CLK_GPU2D_AXI] = imx_clk_mux("gpu2d_axi", base + 0x18, 0, 1, gpu_axi_sels, ARRAY_SIZE(gpu_axi_sels));
226 clk[IMX6QDL_CLK_GPU3D_AXI] = imx_clk_mux("gpu3d_axi", base + 0x18, 1, 1, gpu_axi_sels, ARRAY_SIZE(gpu_axi_sels));
227 }
222 clk[IMX6QDL_CLK_GPU2D_CORE_SEL] = imx_clk_mux("gpu2d_core_sel", base + 0x18, 16, 2, gpu2d_core_sels, ARRAY_SIZE(gpu2d_core_sels)); 228 clk[IMX6QDL_CLK_GPU2D_CORE_SEL] = imx_clk_mux("gpu2d_core_sel", base + 0x18, 16, 2, gpu2d_core_sels, ARRAY_SIZE(gpu2d_core_sels));
223 clk[IMX6QDL_CLK_GPU3D_CORE_SEL] = imx_clk_mux("gpu3d_core_sel", base + 0x18, 4, 2, gpu3d_core_sels, ARRAY_SIZE(gpu3d_core_sels)); 229 clk[IMX6QDL_CLK_GPU3D_CORE_SEL] = imx_clk_mux("gpu3d_core_sel", base + 0x18, 4, 2, gpu3d_core_sels, ARRAY_SIZE(gpu3d_core_sels));
224 clk[IMX6QDL_CLK_GPU3D_SHADER_SEL] = imx_clk_mux("gpu3d_shader_sel", base + 0x18, 8, 2, gpu3d_shader_sels, ARRAY_SIZE(gpu3d_shader_sels)); 230 clk[IMX6QDL_CLK_GPU3D_SHADER_SEL] = imx_clk_mux("gpu3d_shader_sel", base + 0x18, 8, 2, gpu3d_shader_sels, ARRAY_SIZE(gpu3d_shader_sels));
diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
index 74b50f1982db..ca4ea2daf25b 100644
--- a/arch/arm/mach-imx/suspend-imx6.S
+++ b/arch/arm/mach-imx/suspend-imx6.S
@@ -173,6 +173,8 @@ ENTRY(imx6_suspend)
173 ldr r6, [r11, #0x0] 173 ldr r6, [r11, #0x0]
174 ldr r11, [r0, #PM_INFO_MX6Q_GPC_V_OFFSET] 174 ldr r11, [r0, #PM_INFO_MX6Q_GPC_V_OFFSET]
175 ldr r6, [r11, #0x0] 175 ldr r6, [r11, #0x0]
176 ldr r11, [r0, #PM_INFO_MX6Q_IOMUXC_V_OFFSET]
177 ldr r6, [r11, #0x0]
176 178
177 /* use r11 to store the IO address */ 179 /* use r11 to store the IO address */
178 ldr r11, [r0, #PM_INFO_MX6Q_SRC_V_OFFSET] 180 ldr r11, [r0, #PM_INFO_MX6Q_SRC_V_OFFSET]
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index e87f2a83d6bf..2d245c2e641c 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
142 board_nand_data.nr_parts = nr_parts; 142 board_nand_data.nr_parts = nr_parts;
143 board_nand_data.devsize = nand_type; 143 board_nand_data.devsize = nand_type;
144 144
145 board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_HW; 145 board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_SW;
146 gpmc_nand_init(&board_nand_data, gpmc_t); 146 gpmc_nand_init(&board_nand_data, gpmc_t);
147} 147}
148#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ 148#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 8897ad7035fd..cb7764314f17 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -49,7 +49,8 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
49 return 0; 49 return 0;
50 50
51 /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */ 51 /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
52 if (ecc_opt == OMAP_ECC_HAM1_CODE_HW) 52 if (ecc_opt == OMAP_ECC_HAM1_CODE_HW ||
53 ecc_opt == OMAP_ECC_HAM1_CODE_SW)
53 return 1; 54 return 1;
54 else 55 else
55 return 0; 56 return 0;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 8bc13380f0a0..2f97228f188a 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1207,8 +1207,7 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p)
1207 } 1207 }
1208 } 1208 }
1209 1209
1210 if ((p->wait_on_read || p->wait_on_write) && 1210 if (p->wait_pin > gpmc_nr_waitpins) {
1211 (p->wait_pin > gpmc_nr_waitpins)) {
1212 pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); 1211 pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin);
1213 return -EINVAL; 1212 return -EINVAL;
1214 } 1213 }
@@ -1288,8 +1287,8 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p)
1288 p->wait_on_write = of_property_read_bool(np, 1287 p->wait_on_write = of_property_read_bool(np,
1289 "gpmc,wait-on-write"); 1288 "gpmc,wait-on-write");
1290 if (!p->wait_on_read && !p->wait_on_write) 1289 if (!p->wait_on_read && !p->wait_on_write)
1291 pr_warn("%s: read/write wait monitoring not enabled!\n", 1290 pr_debug("%s: rd/wr wait monitoring not enabled!\n",
1292 __func__); 1291 __func__);
1293 } 1292 }
1294} 1293}
1295 1294
@@ -1403,8 +1402,11 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
1403 pr_err("%s: ti,nand-ecc-opt not found\n", __func__); 1402 pr_err("%s: ti,nand-ecc-opt not found\n", __func__);
1404 return -ENODEV; 1403 return -ENODEV;
1405 } 1404 }
1406 if (!strcmp(s, "ham1") || !strcmp(s, "sw") || 1405
1407 !strcmp(s, "hw") || !strcmp(s, "hw-romcode")) 1406 if (!strcmp(s, "sw"))
1407 gpmc_nand_data->ecc_opt = OMAP_ECC_HAM1_CODE_SW;
1408 else if (!strcmp(s, "ham1") ||
1409 !strcmp(s, "hw") || !strcmp(s, "hw-romcode"))
1408 gpmc_nand_data->ecc_opt = 1410 gpmc_nand_data->ecc_opt =
1409 OMAP_ECC_HAM1_CODE_HW; 1411 OMAP_ECC_HAM1_CODE_HW;
1410 else if (!strcmp(s, "bch4")) 1412 else if (!strcmp(s, "bch4"))
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d42022f2a71e..53841dea80ea 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -663,7 +663,7 @@ void __init dra7xxx_check_revision(void)
663 663
664 default: 664 default:
665 /* Unknown default to latest silicon rev as default*/ 665 /* Unknown default to latest silicon rev as default*/
666 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n", 666 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%x)\n",
667 __func__, idcode, hawkeye, rev); 667 __func__, idcode, hawkeye, rev);
668 omap_revision = DRA752_REV_ES1_1; 668 omap_revision = DRA752_REV_ES1_1;
669 } 669 }
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 01ef59def44b..d22c30d3ccfa 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -56,7 +56,7 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,
56 56
57 r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias); 57 r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias);
58 if (!IS_ERR(r)) { 58 if (!IS_ERR(r)) {
59 dev_warn(&od->pdev->dev, 59 dev_dbg(&od->pdev->dev,
60 "alias %s already exists\n", clk_alias); 60 "alias %s already exists\n", clk_alias);
61 clk_put(r); 61 clk_put(r);
62 return; 62 return;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6c074f37cdd2..8fd87a3055bf 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2185,6 +2185,8 @@ static int _enable(struct omap_hwmod *oh)
2185 oh->mux->pads_dynamic))) { 2185 oh->mux->pads_dynamic))) {
2186 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 2186 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2187 _reconfigure_io_chain(); 2187 _reconfigure_io_chain();
2188 } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
2189 _reconfigure_io_chain();
2188 } 2190 }
2189 2191
2190 _add_initiator_dep(oh, mpu_oh); 2192 _add_initiator_dep(oh, mpu_oh);
@@ -2291,6 +2293,8 @@ static int _idle(struct omap_hwmod *oh)
2291 if (oh->mux && oh->mux->pads_dynamic) { 2293 if (oh->mux && oh->mux->pads_dynamic) {
2292 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 2294 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2293 _reconfigure_io_chain(); 2295 _reconfigure_io_chain();
2296 } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
2297 _reconfigure_io_chain();
2294 } 2298 }
2295 2299
2296 oh->_state = _HWMOD_STATE_IDLE; 2300 oh->_state = _HWMOD_STATE_IDLE;
@@ -3345,6 +3349,9 @@ int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3345 if (!ois) 3349 if (!ois)
3346 return 0; 3350 return 0;
3347 3351
3352 if (ois[0] == NULL) /* Empty list */
3353 return 0;
3354
3348 if (!linkspace) { 3355 if (!linkspace) {
3349 if (_alloc_linkspace(ois)) { 3356 if (_alloc_linkspace(ois)) {
3350 pr_err("omap_hwmod: could not allocate link space\n"); 3357 pr_err("omap_hwmod: could not allocate link space\n");
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 2757abf87fbc..5684f112654b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -35,6 +35,7 @@
35#include "i2c.h" 35#include "i2c.h"
36#include "mmc.h" 36#include "mmc.h"
37#include "wd_timer.h" 37#include "wd_timer.h"
38#include "soc.h"
38 39
39/* Base offset for all DRA7XX interrupts external to MPUSS */ 40/* Base offset for all DRA7XX interrupts external to MPUSS */
40#define DRA7XX_IRQ_GIC_START 32 41#define DRA7XX_IRQ_GIC_START 32
@@ -3261,7 +3262,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
3261 &dra7xx_l4_per3__usb_otg_ss1, 3262 &dra7xx_l4_per3__usb_otg_ss1,
3262 &dra7xx_l4_per3__usb_otg_ss2, 3263 &dra7xx_l4_per3__usb_otg_ss2,
3263 &dra7xx_l4_per3__usb_otg_ss3, 3264 &dra7xx_l4_per3__usb_otg_ss3,
3264 &dra7xx_l4_per3__usb_otg_ss4,
3265 &dra7xx_l3_main_1__vcp1, 3265 &dra7xx_l3_main_1__vcp1,
3266 &dra7xx_l4_per2__vcp1, 3266 &dra7xx_l4_per2__vcp1,
3267 &dra7xx_l3_main_1__vcp2, 3267 &dra7xx_l3_main_1__vcp2,
@@ -3270,8 +3270,26 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
3270 NULL, 3270 NULL,
3271}; 3271};
3272 3272
3273static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {
3274 &dra7xx_l4_per3__usb_otg_ss4,
3275 NULL,
3276};
3277
3278static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = {
3279 NULL,
3280};
3281
3273int __init dra7xx_hwmod_init(void) 3282int __init dra7xx_hwmod_init(void)
3274{ 3283{
3284 int ret;
3285
3275 omap_hwmod_init(); 3286 omap_hwmod_init();
3276 return omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs); 3287 ret = omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs);
3288
3289 if (!ret && soc_is_dra74x())
3290 return omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);
3291 else if (!ret && soc_is_dra72x())
3292 return omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);
3293
3294 return ret;
3277} 3295}
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 01ca8086fb6c..4376f59626d1 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -245,6 +245,8 @@ IS_AM_SUBCLASS(437x, 0x437)
245#define soc_is_omap54xx() 0 245#define soc_is_omap54xx() 0
246#define soc_is_omap543x() 0 246#define soc_is_omap543x() 0
247#define soc_is_dra7xx() 0 247#define soc_is_dra7xx() 0
248#define soc_is_dra74x() 0
249#define soc_is_dra72x() 0
248 250
249#if defined(MULTI_OMAP2) 251#if defined(MULTI_OMAP2)
250# if defined(CONFIG_ARCH_OMAP2) 252# if defined(CONFIG_ARCH_OMAP2)
@@ -393,7 +395,11 @@ IS_OMAP_TYPE(3430, 0x3430)
393 395
394#if defined(CONFIG_SOC_DRA7XX) 396#if defined(CONFIG_SOC_DRA7XX)
395#undef soc_is_dra7xx 397#undef soc_is_dra7xx
398#undef soc_is_dra74x
399#undef soc_is_dra72x
396#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7")) 400#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7"))
401#define soc_is_dra74x() (of_machine_is_compatible("ti,dra74"))
402#define soc_is_dra72x() (of_machine_is_compatible("ti,dra72"))
397#endif 403#endif
398 404
399/* Various silicon revisions for omap2 */ 405/* Various silicon revisions for omap2 */
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index e15dff790dbb..1e6c51c7c2d5 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -75,6 +75,7 @@ config ARCH_SH7372
75 select ARM_CPU_SUSPEND if PM || CPU_IDLE 75 select ARM_CPU_SUSPEND if PM || CPU_IDLE
76 select CPU_V7 76 select CPU_V7
77 select SH_CLK_CPG 77 select SH_CLK_CPG
78 select SH_INTC
78 select SYS_SUPPORTS_SH_CMT 79 select SYS_SUPPORTS_SH_CMT
79 select SYS_SUPPORTS_SH_TMU 80 select SYS_SUPPORTS_SH_TMU
80 81
@@ -85,6 +86,7 @@ config ARCH_SH73A0
85 select CPU_V7 86 select CPU_V7
86 select I2C 87 select I2C
87 select SH_CLK_CPG 88 select SH_CLK_CPG
89 select SH_INTC
88 select RENESAS_INTC_IRQPIN 90 select RENESAS_INTC_IRQPIN
89 select SYS_SUPPORTS_SH_CMT 91 select SYS_SUPPORTS_SH_CMT
90 select SYS_SUPPORTS_SH_TMU 92 select SYS_SUPPORTS_SH_TMU
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 17435c1aa2fe..126ddafad526 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -183,8 +183,8 @@ enum {
183 183
184static struct clk div4_clks[DIV4_NR] = { 184static struct clk div4_clks[DIV4_NR] = {
185 [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT), 185 [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
186 [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT), 186 [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT),
187 [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1de0, CLK_ENABLE_ON_INIT), 187 [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1df0, CLK_ENABLE_ON_INIT),
188}; 188};
189 189
190/* DIV6 clocks */ 190/* DIV6 clocks */
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 10e193d707f5..453b23129cfa 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -152,7 +152,7 @@ enum {
152 152
153static struct clk div4_clks[DIV4_NR] = { 153static struct clk div4_clks[DIV4_NR] = {
154 [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT), 154 [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
155 [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT), 155 [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT),
156}; 156};
157 157
158/* DIV6 clocks */ 158/* DIV6 clocks */
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index d8c4048b9e33..02a6f45a0b9e 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -644,7 +644,7 @@ static struct clk_lookup lookups[] = {
644 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ 644 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
645 CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), /* SCIFA5 */ 645 CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), /* SCIFA5 */
646 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ 646 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
647 CLKDEV_DEV_ID("0xe6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */ 647 CLKDEV_DEV_ID("e6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */
648 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ 648 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
649 CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), /* SCIFA0 */ 649 CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), /* SCIFA0 */
650 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */ 650 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index 2c2754e79cb3..f61158c6ce71 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -426,9 +426,15 @@ static int ve_spc_populate_opps(uint32_t cluster)
426 426
427static int ve_init_opp_table(struct device *cpu_dev) 427static int ve_init_opp_table(struct device *cpu_dev)
428{ 428{
429 int cluster = topology_physical_package_id(cpu_dev->id); 429 int cluster;
430 int idx, ret = 0, max_opp = info->num_opps[cluster]; 430 int idx, ret = 0, max_opp;
431 struct ve_spc_opp *opps = info->opps[cluster]; 431 struct ve_spc_opp *opps;
432
433 cluster = topology_physical_package_id(cpu_dev->id);
434 cluster = cluster < 0 ? 0 : cluster;
435
436 max_opp = info->num_opps[cluster];
437 opps = info->opps[cluster];
432 438
433 for (idx = 0; idx < max_opp; idx++, opps++) { 439 for (idx = 0; idx < max_opp; idx++, opps++) {
434 ret = dev_pm_opp_add(cpu_dev, opps->freq * 1000, opps->u_volt); 440 ret = dev_pm_opp_add(cpu_dev, opps->freq * 1000, opps->u_volt);
@@ -537,6 +543,8 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
537 spc->hw.init = &init; 543 spc->hw.init = &init;
538 spc->cluster = topology_physical_package_id(cpu_dev->id); 544 spc->cluster = topology_physical_package_id(cpu_dev->id);
539 545
546 spc->cluster = spc->cluster < 0 ? 0 : spc->cluster;
547
540 init.name = dev_name(cpu_dev); 548 init.name = dev_name(cpu_dev);
541 init.ops = &clk_spc_ops; 549 init.ops = &clk_spc_ops;
542 init.flags = CLK_IS_ROOT | CLK_GET_RATE_NOCACHE; 550 init.flags = CLK_IS_ROOT | CLK_GET_RATE_NOCACHE;
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index 3815a8262af0..8c48c5c22a33 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -17,12 +17,6 @@
17 */ 17 */
18 .align 5 18 .align 5
19ENTRY(v6_early_abort) 19ENTRY(v6_early_abort)
20#ifdef CONFIG_CPU_V6
21 sub r1, sp, #4 @ Get unused stack location
22 strex r0, r1, [r1] @ Clear the exclusive monitor
23#elif defined(CONFIG_CPU_32v6K)
24 clrex
25#endif
26 mrc p15, 0, r1, c5, c0, 0 @ get FSR 20 mrc p15, 0, r1, c5, c0, 0 @ get FSR
27 mrc p15, 0, r0, c6, c0, 0 @ get FAR 21 mrc p15, 0, r0, c6, c0, 0 @ get FAR
28/* 22/*
diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
index 703375277ba6..4812ad054214 100644
--- a/arch/arm/mm/abort-ev7.S
+++ b/arch/arm/mm/abort-ev7.S
@@ -13,12 +13,6 @@
13 */ 13 */
14 .align 5 14 .align 5
15ENTRY(v7_early_abort) 15ENTRY(v7_early_abort)
16 /*
17 * The effect of data aborts on on the exclusive access monitor are
18 * UNPREDICTABLE. Do a CLREX to clear the state
19 */
20 clrex
21
22 mrc p15, 0, r1, c5, c0, 0 @ get FSR 16 mrc p15, 0, r1, c5, c0, 0 @ get FSR
23 mrc p15, 0, r0, c6, c0, 0 @ get FAR 17 mrc p15, 0, r0, c6, c0, 0 @ get FAR
24 18
diff --git a/arch/arm64/crypto/sha2-ce-glue.c b/arch/arm64/crypto/sha2-ce-glue.c
index c294e67d3925..ae67e88c28b9 100644
--- a/arch/arm64/crypto/sha2-ce-glue.c
+++ b/arch/arm64/crypto/sha2-ce-glue.c
@@ -150,7 +150,6 @@ static void sha2_finup(struct shash_desc *desc, const u8 *data,
150 kernel_neon_begin_partial(28); 150 kernel_neon_begin_partial(28);
151 sha2_ce_transform(blocks, data, sctx->state, NULL, len); 151 sha2_ce_transform(blocks, data, sctx->state, NULL, len);
152 kernel_neon_end(); 152 kernel_neon_end();
153 data += blocks * SHA256_BLOCK_SIZE;
154} 153}
155 154
156static int sha224_finup(struct shash_desc *desc, const u8 *data, 155static int sha224_finup(struct shash_desc *desc, const u8 *data,
diff --git a/arch/arm64/include/asm/hw_breakpoint.h b/arch/arm64/include/asm/hw_breakpoint.h
index d064047612b1..52b484b6aa1a 100644
--- a/arch/arm64/include/asm/hw_breakpoint.h
+++ b/arch/arm64/include/asm/hw_breakpoint.h
@@ -79,7 +79,6 @@ static inline void decode_ctrl_reg(u32 reg,
79 */ 79 */
80#define ARM_MAX_BRP 16 80#define ARM_MAX_BRP 16
81#define ARM_MAX_WRP 16 81#define ARM_MAX_WRP 16
82#define ARM_MAX_HBP_SLOTS (ARM_MAX_BRP + ARM_MAX_WRP)
83 82
84/* Virtual debug register bases. */ 83/* Virtual debug register bases. */
85#define AARCH64_DBG_REG_BVR 0 84#define AARCH64_DBG_REG_BVR 0
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 3df21feeabdd..286b1bec547c 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -139,7 +139,7 @@ extern struct task_struct *cpu_switch_to(struct task_struct *prev,
139 ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1) 139 ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
140 140
141#define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc) 141#define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc)
142#define KSTK_ESP(tsk) ((unsigned long)task_pt_regs(tsk)->sp) 142#define KSTK_ESP(tsk) user_stack_pointer(task_pt_regs(tsk))
143 143
144/* 144/*
145 * Prefetching support 145 * Prefetching support
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index 501000fadb6f..41ed9e13795e 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -137,7 +137,7 @@ struct pt_regs {
137 (!((regs)->pstate & PSR_F_BIT)) 137 (!((regs)->pstate & PSR_F_BIT))
138 138
139#define user_stack_pointer(regs) \ 139#define user_stack_pointer(regs) \
140 (!compat_user_mode(regs)) ? ((regs)->sp) : ((regs)->compat_sp) 140 (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
141 141
142static inline unsigned long regs_return_value(struct pt_regs *regs) 142static inline unsigned long regs_return_value(struct pt_regs *regs)
143{ 143{
diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c
index 24f0c6fb61d8..03aaa99e1ea0 100644
--- a/arch/arm64/kernel/efi.c
+++ b/arch/arm64/kernel/efi.c
@@ -465,6 +465,8 @@ static int __init arm64_enter_virtual_mode(void)
465 efi_native_runtime_setup(); 465 efi_native_runtime_setup();
466 set_bit(EFI_RUNTIME_SERVICES, &efi.flags); 466 set_bit(EFI_RUNTIME_SERVICES, &efi.flags);
467 467
468 efi.runtime_version = efi.systab->hdr.revision;
469
468 return 0; 470 return 0;
469 471
470err_unmap: 472err_unmap:
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index ad8aebb1cdef..3dca15634e69 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -270,6 +270,7 @@ static int fpsimd_cpu_pm_notifier(struct notifier_block *self,
270 case CPU_PM_ENTER: 270 case CPU_PM_ENTER:
271 if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE)) 271 if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE))
272 fpsimd_save_state(&current->thread.fpsimd_state); 272 fpsimd_save_state(&current->thread.fpsimd_state);
273 this_cpu_write(fpsimd_last_state, NULL);
273 break; 274 break;
274 case CPU_PM_EXIT: 275 case CPU_PM_EXIT:
275 if (current->mm) 276 if (current->mm)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index bed028364a93..873069056229 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -373,10 +373,6 @@ ENTRY(__boot_cpu_mode)
373 .long 0 373 .long 0
374 .popsection 374 .popsection
375 375
376 .align 3
3772: .quad .
378 .quad PAGE_OFFSET
379
380#ifdef CONFIG_SMP 376#ifdef CONFIG_SMP
381 .align 3 377 .align 3
3821: .quad . 3781: .quad .
diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c
index 422ebd63b619..6762ad705587 100644
--- a/arch/arm64/kernel/perf_regs.c
+++ b/arch/arm64/kernel/perf_regs.c
@@ -24,6 +24,12 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
24 return regs->compat_lr; 24 return regs->compat_lr;
25 } 25 }
26 26
27 if ((u32)idx == PERF_REG_ARM64_SP)
28 return regs->sp;
29
30 if ((u32)idx == PERF_REG_ARM64_PC)
31 return regs->pc;
32
27 return regs->regs[idx]; 33 return regs->regs[idx];
28} 34}
29 35
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index 70526cfda056..fe63ac5e9bf5 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -87,7 +87,8 @@ static void ptrace_hbptriggered(struct perf_event *bp,
87 break; 87 break;
88 } 88 }
89 } 89 }
90 for (i = ARM_MAX_BRP; i < ARM_MAX_HBP_SLOTS && !bp; ++i) { 90
91 for (i = 0; i < ARM_MAX_WRP; ++i) {
91 if (current->thread.debug.hbp_watch[i] == bp) { 92 if (current->thread.debug.hbp_watch[i] == bp) {
92 info.si_errno = -((i << 1) + 1); 93 info.si_errno = -((i << 1) + 1);
93 break; 94 break;
@@ -662,8 +663,10 @@ static int compat_gpr_get(struct task_struct *target,
662 kbuf += sizeof(reg); 663 kbuf += sizeof(reg);
663 } else { 664 } else {
664 ret = copy_to_user(ubuf, &reg, sizeof(reg)); 665 ret = copy_to_user(ubuf, &reg, sizeof(reg));
665 if (ret) 666 if (ret) {
667 ret = -EFAULT;
666 break; 668 break;
669 }
667 670
668 ubuf += sizeof(reg); 671 ubuf += sizeof(reg);
669 } 672 }
@@ -701,8 +704,10 @@ static int compat_gpr_set(struct task_struct *target,
701 kbuf += sizeof(reg); 704 kbuf += sizeof(reg);
702 } else { 705 } else {
703 ret = copy_from_user(&reg, ubuf, sizeof(reg)); 706 ret = copy_from_user(&reg, ubuf, sizeof(reg));
704 if (ret) 707 if (ret) {
705 return ret; 708 ret = -EFAULT;
709 break;
710 }
706 711
707 ubuf += sizeof(reg); 712 ubuf += sizeof(reg);
708 } 713 }
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index f6f0ccf35ae6..edb146d01857 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -78,6 +78,7 @@ unsigned int compat_elf_hwcap2 __read_mostly;
78#endif 78#endif
79 79
80static const char *cpu_name; 80static const char *cpu_name;
81static const char *machine_name;
81phys_addr_t __fdt_pointer __initdata; 82phys_addr_t __fdt_pointer __initdata;
82 83
83/* 84/*
@@ -309,6 +310,8 @@ static void __init setup_machine_fdt(phys_addr_t dt_phys)
309 while (true) 310 while (true)
310 cpu_relax(); 311 cpu_relax();
311 } 312 }
313
314 machine_name = of_flat_dt_get_machine_name();
312} 315}
313 316
314/* 317/*
@@ -447,21 +450,10 @@ static int c_show(struct seq_file *m, void *v)
447{ 450{
448 int i; 451 int i;
449 452
450 /* 453 seq_printf(m, "Processor\t: %s rev %d (%s)\n",
451 * Dump out the common processor features in a single line. Userspace 454 cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);
452 * should read the hwcaps with getauxval(AT_HWCAP) rather than
453 * attempting to parse this.
454 */
455 seq_puts(m, "features\t:");
456 for (i = 0; hwcap_str[i]; i++)
457 if (elf_hwcap & (1 << i))
458 seq_printf(m, " %s", hwcap_str[i]);
459 seq_puts(m, "\n\n");
460 455
461 for_each_online_cpu(i) { 456 for_each_online_cpu(i) {
462 struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, i);
463 u32 midr = cpuinfo->reg_midr;
464
465 /* 457 /*
466 * glibc reads /proc/cpuinfo to determine the number of 458 * glibc reads /proc/cpuinfo to determine the number of
467 * online processors, looking for lines beginning with 459 * online processors, looking for lines beginning with
@@ -470,13 +462,25 @@ static int c_show(struct seq_file *m, void *v)
470#ifdef CONFIG_SMP 462#ifdef CONFIG_SMP
471 seq_printf(m, "processor\t: %d\n", i); 463 seq_printf(m, "processor\t: %d\n", i);
472#endif 464#endif
473 seq_printf(m, "implementer\t: 0x%02x\n",
474 MIDR_IMPLEMENTOR(midr));
475 seq_printf(m, "variant\t\t: 0x%x\n", MIDR_VARIANT(midr));
476 seq_printf(m, "partnum\t\t: 0x%03x\n", MIDR_PARTNUM(midr));
477 seq_printf(m, "revision\t: 0x%x\n\n", MIDR_REVISION(midr));
478 } 465 }
479 466
467 /* dump out the processor features */
468 seq_puts(m, "Features\t: ");
469
470 for (i = 0; hwcap_str[i]; i++)
471 if (elf_hwcap & (1 << i))
472 seq_printf(m, "%s ", hwcap_str[i]);
473
474 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
475 seq_printf(m, "CPU architecture: AArch64\n");
476 seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
477 seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
478 seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
479
480 seq_puts(m, "\n");
481
482 seq_printf(m, "Hardware\t: %s\n", machine_name);
483
480 return 0; 484 return 0;
481} 485}
482 486
diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
index e28be510380c..34b8bd0711e9 100644
--- a/arch/arm64/kvm/handle_exit.c
+++ b/arch/arm64/kvm/handle_exit.c
@@ -66,6 +66,8 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
66 else 66 else
67 kvm_vcpu_block(vcpu); 67 kvm_vcpu_block(vcpu);
68 68
69 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
70
69 return 1; 71 return 1;
70} 72}
71 73
diff --git a/arch/arm64/kvm/hyp-init.S b/arch/arm64/kvm/hyp-init.S
index d968796f4b2d..c3191168a994 100644
--- a/arch/arm64/kvm/hyp-init.S
+++ b/arch/arm64/kvm/hyp-init.S
@@ -80,6 +80,10 @@ __do_hyp_init:
80 msr mair_el2, x4 80 msr mair_el2, x4
81 isb 81 isb
82 82
83 /* Invalidate the stale TLBs from Bootloader */
84 tlbi alle2
85 dsb sy
86
83 mrs x4, sctlr_el2 87 mrs x4, sctlr_el2
84 and x4, x4, #SCTLR_EL2_EE // preserve endianness of EL2 88 and x4, x4, #SCTLR_EL2_EE // preserve endianness of EL2
85 ldr x5, =SCTLR_EL2_FLAGS 89 ldr x5, =SCTLR_EL2_FLAGS
diff --git a/arch/hexagon/mm/cache.c b/arch/hexagon/mm/cache.c
index fe14ccf28561..0c76c802e31c 100644
--- a/arch/hexagon/mm/cache.c
+++ b/arch/hexagon/mm/cache.c
@@ -68,6 +68,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
68 ); 68 );
69 local_irq_restore(flags); 69 local_irq_restore(flags);
70} 70}
71EXPORT_SYMBOL(flush_icache_range);
71 72
72void hexagon_clean_dcache_range(unsigned long start, unsigned long end) 73void hexagon_clean_dcache_range(unsigned long start, unsigned long end)
73{ 74{
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 64aefb76bd69..c84c88bbbbd7 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -549,8 +549,6 @@ source "drivers/sn/Kconfig"
549config KEXEC 549config KEXEC
550 bool "kexec system call" 550 bool "kexec system call"
551 depends on !IA64_HP_SIM && (!SMP || HOTPLUG_CPU) 551 depends on !IA64_HP_SIM && (!SMP || HOTPLUG_CPU)
552 select CRYPTO
553 select CRYPTO_SHA256
554 help 552 help
555 kexec is a system call that implements the ability to shutdown your 553 kexec is a system call that implements the ability to shutdown your
556 current kernel, and to start another kernel. It is like a reboot 554 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 3ff8c9a25335..87b7c7581b1d 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -91,8 +91,6 @@ config MMU_SUN3
91config KEXEC 91config KEXEC
92 bool "kexec system call" 92 bool "kexec system call"
93 depends on M68KCLASSIC 93 depends on M68KCLASSIC
94 select CRYPTO
95 select CRYPTO_SHA256
96 help 94 help
97 kexec is a system call that implements the ability to shutdown your 95 kexec is a system call that implements the ability to shutdown your
98 current kernel, and to start another kernel. It is like a reboot 96 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 1fcdd344c7ad..4ef7a54813e6 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6 6
7#define NR_syscalls 352 7#define NR_syscalls 354
8 8
9#define __ARCH_WANT_OLD_READDIR 9#define __ARCH_WANT_OLD_READDIR
10#define __ARCH_WANT_OLD_STAT 10#define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index 9cd82fbc7817..b419c6b7ac37 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -357,5 +357,7 @@
357#define __NR_sched_setattr 349 357#define __NR_sched_setattr 349
358#define __NR_sched_getattr 350 358#define __NR_sched_getattr 350
359#define __NR_renameat2 351 359#define __NR_renameat2 351
360#define __NR_getrandom 352
361#define __NR_memfd_create 353
360 362
361#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ 363#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index 501e10212789..05b46c2b08b8 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -372,4 +372,6 @@ ENTRY(sys_call_table)
372 .long sys_sched_setattr 372 .long sys_sched_setattr
373 .long sys_sched_getattr /* 350 */ 373 .long sys_sched_getattr /* 350 */
374 .long sys_renameat2 374 .long sys_renameat2
375 .long sys_getrandom
376 .long sys_memfd_create
375 377
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index df51e78a72cc..900c7e5333b6 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2396,8 +2396,6 @@ source "kernel/Kconfig.preempt"
2396 2396
2397config KEXEC 2397config KEXEC
2398 bool "Kexec system call" 2398 bool "Kexec system call"
2399 select CRYPTO
2400 select CRYPTO_SHA256
2401 help 2399 help
2402 kexec is a system call that implements the ability to shutdown your 2400 kexec is a system call that implements the ability to shutdown your
2403 current kernel, and to start another kernel. It is like a reboot 2401 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c
index 776188908dfc..8c13675a12e7 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -847,6 +847,7 @@ int __init db1200_dev_setup(void)
847 pr_warn("DB1200: cant get I2C close to 50MHz\n"); 847 pr_warn("DB1200: cant get I2C close to 50MHz\n");
848 else 848 else
849 clk_set_rate(c, pfc); 849 clk_set_rate(c, pfc);
850 clk_prepare_enable(c);
850 clk_put(c); 851 clk_put(c);
851 } 852 }
852 853
@@ -922,11 +923,6 @@ int __init db1200_dev_setup(void)
922 } 923 }
923 924
924 /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */ 925 /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
925 c = clk_get(NULL, "psc1_intclk");
926 if (!IS_ERR(c)) {
927 clk_prepare_enable(c);
928 clk_put(c);
929 }
930 __raw_writel(PSC_SEL_CLK_SERCLK, 926 __raw_writel(PSC_SEL_CLK_SERCLK,
931 (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); 927 (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
932 wmb(); 928 wmb();
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 2b63e7e7d3d3..ad439c273003 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -59,12 +59,21 @@ static void bcm47xx_machine_restart(char *command)
59 switch (bcm47xx_bus_type) { 59 switch (bcm47xx_bus_type) {
60#ifdef CONFIG_BCM47XX_SSB 60#ifdef CONFIG_BCM47XX_SSB
61 case BCM47XX_BUS_TYPE_SSB: 61 case BCM47XX_BUS_TYPE_SSB:
62 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 3); 62 if (bcm47xx_bus.ssb.chip_id == 0x4785)
63 write_c0_diag4(1 << 22);
64 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
65 if (bcm47xx_bus.ssb.chip_id == 0x4785) {
66 __asm__ __volatile__(
67 ".set\tmips3\n\t"
68 "sync\n\t"
69 "wait\n\t"
70 ".set\tmips0");
71 }
63 break; 72 break;
64#endif 73#endif
65#ifdef CONFIG_BCM47XX_BCMA 74#ifdef CONFIG_BCM47XX_BCMA
66 case BCM47XX_BUS_TYPE_BCMA: 75 case BCM47XX_BUS_TYPE_BCMA:
67 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 3); 76 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
68 break; 77 break;
69#endif 78#endif
70 } 79 }
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 008e9c8b8eac..38f4c32e2816 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -263,7 +263,6 @@ static uint64_t crashk_size, crashk_base;
263static int octeon_uart; 263static int octeon_uart;
264 264
265extern asmlinkage void handle_int(void); 265extern asmlinkage void handle_int(void);
266extern asmlinkage void plat_irq_dispatch(void);
267 266
268/** 267/**
269 * Return non zero if we are currently running in the Octeon simulator 268 * Return non zero if we are currently running in the Octeon simulator
@@ -458,6 +457,18 @@ static void octeon_halt(void)
458 octeon_kill_core(NULL); 457 octeon_kill_core(NULL);
459} 458}
460 459
460static char __read_mostly octeon_system_type[80];
461
462static int __init init_octeon_system_type(void)
463{
464 snprintf(octeon_system_type, sizeof(octeon_system_type), "%s (%s)",
465 cvmx_board_type_to_string(octeon_bootinfo->board_type),
466 octeon_model_get_string(read_c0_prid()));
467
468 return 0;
469}
470early_initcall(init_octeon_system_type);
471
461/** 472/**
462 * Return a string representing the system type 473 * Return a string representing the system type
463 * 474 *
@@ -465,11 +476,7 @@ static void octeon_halt(void)
465 */ 476 */
466const char *octeon_board_type_string(void) 477const char *octeon_board_type_string(void)
467{ 478{
468 static char name[80]; 479 return octeon_system_type;
469 sprintf(name, "%s (%s)",
470 cvmx_board_type_to_string(octeon_bootinfo->board_type),
471 octeon_model_get_string(read_c0_prid()));
472 return name;
473} 480}
474 481
475const char *get_system_type(void) 482const char *get_system_type(void)
diff --git a/arch/mips/include/asm/eva.h b/arch/mips/include/asm/eva.h
new file mode 100644
index 000000000000..a3d1807f227c
--- /dev/null
+++ b/arch/mips/include/asm/eva.h
@@ -0,0 +1,43 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2014, Imagination Technologies Ltd.
7 *
8 * EVA functions for generic code
9 */
10
11#ifndef _ASM_EVA_H
12#define _ASM_EVA_H
13
14#include <kernel-entry-init.h>
15
16#ifdef __ASSEMBLY__
17
18#ifdef CONFIG_EVA
19
20/*
21 * EVA early init code
22 *
23 * Platforms must define their own 'platform_eva_init' macro in
24 * their kernel-entry-init.h header. This macro usually does the
25 * platform specific configuration of the segmentation registers,
26 * and it is normally called from assembly code.
27 *
28 */
29
30.macro eva_init
31platform_eva_init
32.endm
33
34#else
35
36.macro eva_init
37.endm
38
39#endif /* CONFIG_EVA */
40
41#endif /* __ASSEMBLY__ */
42
43#endif
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 3f20b2111d56..d7699cf7e135 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -49,7 +49,7 @@
49#endif 49#endif
50#define GICBIS(reg, mask, bits) \ 50#define GICBIS(reg, mask, bits) \
51 do { u32 data; \ 51 do { u32 data; \
52 GICREAD((reg), data); \ 52 GICREAD(reg, data); \
53 data &= ~(mask); \ 53 data &= ~(mask); \
54 data |= ((bits) & (mask)); \ 54 data |= ((bits) & (mask)); \
55 GICWRITE((reg), data); \ 55 GICWRITE((reg), data); \
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index ae1f7b24dd1a..39f07aec640c 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -26,6 +26,8 @@ static inline int irq_canonicalize(int irq)
26#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ 26#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
27#endif 27#endif
28 28
29asmlinkage void plat_irq_dispatch(void);
30
29extern void do_IRQ(unsigned int irq); 31extern void do_IRQ(unsigned int irq);
30 32
31extern void arch_init_irq(void); 33extern void arch_init_irq(void);
diff --git a/arch/mips/include/asm/mach-malta/kernel-entry-init.h b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
index 77eeda77e73c..0cf8622db27f 100644
--- a/arch/mips/include/asm/mach-malta/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
@@ -10,14 +10,15 @@
10#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H 10#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
11#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H 11#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
12 12
13#include <asm/regdef.h>
14#include <asm/mipsregs.h>
15
13 /* 16 /*
14 * Prepare segments for EVA boot: 17 * Prepare segments for EVA boot:
15 * 18 *
16 * This is in case the processor boots in legacy configuration 19 * This is in case the processor boots in legacy configuration
17 * (SI_EVAReset is de-asserted and CONFIG5.K == 0) 20 * (SI_EVAReset is de-asserted and CONFIG5.K == 0)
18 * 21 *
19 * On entry, t1 is loaded with CP0_CONFIG
20 *
21 * ========================= Mappings ============================= 22 * ========================= Mappings =============================
22 * Virtual memory Physical memory Mapping 23 * Virtual memory Physical memory Mapping
23 * 0x00000000 - 0x7fffffff 0x80000000 - 0xfffffffff MUSUK (kuseg) 24 * 0x00000000 - 0x7fffffff 0x80000000 - 0xfffffffff MUSUK (kuseg)
@@ -30,12 +31,20 @@
30 * 31 *
31 * 32 *
32 * Lowmem is expanded to 2GB 33 * Lowmem is expanded to 2GB
34 *
35 * The following code uses the t0, t1, t2 and ra registers without
36 * previously preserving them.
37 *
33 */ 38 */
34 .macro eva_entry 39 .macro platform_eva_init
40
41 .set push
42 .set reorder
35 /* 43 /*
36 * Get Config.K0 value and use it to program 44 * Get Config.K0 value and use it to program
37 * the segmentation registers 45 * the segmentation registers
38 */ 46 */
47 mfc0 t1, CP0_CONFIG
39 andi t1, 0x7 /* CCA */ 48 andi t1, 0x7 /* CCA */
40 move t2, t1 49 move t2, t1
41 ins t2, t1, 16, 3 50 ins t2, t1, 16, 3
@@ -77,6 +86,8 @@
77 mtc0 t0, $16, 5 86 mtc0 t0, $16, 5
78 sync 87 sync
79 jal mips_ihb 88 jal mips_ihb
89
90 .set pop
80 .endm 91 .endm
81 92
82 .macro kernel_entry_setup 93 .macro kernel_entry_setup
@@ -95,7 +106,7 @@
95 sll t0, t0, 6 /* SC bit */ 106 sll t0, t0, 6 /* SC bit */
96 bgez t0, 9f 107 bgez t0, 9f
97 108
98 eva_entry 109 platform_eva_init
99 b 0f 110 b 0f
1009: 1119:
101 /* Assume we came from YAMON... */ 112 /* Assume we came from YAMON... */
@@ -127,8 +138,7 @@ nonsc_processor:
127#ifdef CONFIG_EVA 138#ifdef CONFIG_EVA
128 sync 139 sync
129 ehb 140 ehb
130 mfc0 t1, CP0_CONFIG 141 platform_eva_init
131 eva_entry
132#endif 142#endif
133 .endm 143 .endm
134 144
diff --git a/arch/mips/include/asm/mach-netlogic/topology.h b/arch/mips/include/asm/mach-netlogic/topology.h
index ceeb1f5e7129..0eb43c832b25 100644
--- a/arch/mips/include/asm/mach-netlogic/topology.h
+++ b/arch/mips/include/asm/mach-netlogic/topology.h
@@ -10,13 +10,6 @@
10 10
11#include <asm/mach-netlogic/multi-node.h> 11#include <asm/mach-netlogic/multi-node.h>
12 12
13#ifdef CONFIG_SMP
14#define topology_physical_package_id(cpu) cpu_to_node(cpu)
15#define topology_core_id(cpu) (cpu_logical_map(cpu) / NLM_THREADS_PER_CORE)
16#define topology_thread_cpumask(cpu) (&cpu_sibling_map[cpu])
17#define topology_core_cpumask(cpu) cpumask_of_node(cpu_to_node(cpu))
18#endif
19
20#include <asm-generic/topology.h> 13#include <asm-generic/topology.h>
21 14
22#endif /* _ASM_MACH_NETLOGIC_TOPOLOGY_H */ 15#endif /* _ASM_MACH_NETLOGIC_TOPOLOGY_H */
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index 027c74db13f9..df49a308085c 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -122,6 +122,9 @@ do { \
122 } \ 122 } \
123} while(0) 123} while(0)
124 124
125extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
126 pte_t pteval);
127
125#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 128#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
126 129
127#define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL)) 130#define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
@@ -145,7 +148,6 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
145 } 148 }
146 } 149 }
147} 150}
148#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
149 151
150static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 152static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
151{ 153{
@@ -183,7 +185,6 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
183 } 185 }
184#endif 186#endif
185} 187}
186#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
187 188
188static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 189static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
189{ 190{
@@ -390,15 +391,12 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
390 391
391extern void __update_tlb(struct vm_area_struct *vma, unsigned long address, 392extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
392 pte_t pte); 393 pte_t pte);
393extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
394 pte_t pte);
395 394
396static inline void update_mmu_cache(struct vm_area_struct *vma, 395static inline void update_mmu_cache(struct vm_area_struct *vma,
397 unsigned long address, pte_t *ptep) 396 unsigned long address, pte_t *ptep)
398{ 397{
399 pte_t pte = *ptep; 398 pte_t pte = *ptep;
400 __update_tlb(vma, address, pte); 399 __update_tlb(vma, address, pte);
401 __update_cache(vma, address, pte);
402} 400}
403 401
404static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 402static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h
index 17960fe7a8ce..cdf68b33bd65 100644
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -131,10 +131,12 @@ static inline int syscall_get_arch(void)
131{ 131{
132 int arch = EM_MIPS; 132 int arch = EM_MIPS;
133#ifdef CONFIG_64BIT 133#ifdef CONFIG_64BIT
134 if (!test_thread_flag(TIF_32BIT_REGS)) 134 if (!test_thread_flag(TIF_32BIT_REGS)) {
135 arch |= __AUDIT_ARCH_64BIT; 135 arch |= __AUDIT_ARCH_64BIT;
136 if (test_thread_flag(TIF_32BIT_ADDR)) 136 /* N32 sets only TIF_32BIT_ADDR */
137 arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32; 137 if (test_thread_flag(TIF_32BIT_ADDR))
138 arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32;
139 }
138#endif 140#endif
139#if defined(__LITTLE_ENDIAN) 141#if defined(__LITTLE_ENDIAN)
140 arch |= __AUDIT_ARCH_LE; 142 arch |= __AUDIT_ARCH_LE;
diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
index 6f4f739dad96..e6e97d2a5c9e 100644
--- a/arch/mips/kernel/cps-vec.S
+++ b/arch/mips/kernel/cps-vec.S
@@ -13,6 +13,7 @@
13#include <asm/asm-offsets.h> 13#include <asm/asm-offsets.h>
14#include <asm/asmmacro.h> 14#include <asm/asmmacro.h>
15#include <asm/cacheops.h> 15#include <asm/cacheops.h>
16#include <asm/eva.h>
16#include <asm/mipsregs.h> 17#include <asm/mipsregs.h>
17#include <asm/mipsmtregs.h> 18#include <asm/mipsmtregs.h>
18#include <asm/pm.h> 19#include <asm/pm.h>
@@ -166,6 +167,9 @@ dcache_done:
1661: jal mips_cps_core_init 1671: jal mips_cps_core_init
167 nop 168 nop
168 169
170 /* Do any EVA initialization if necessary */
171 eva_init
172
169 /* 173 /*
170 * Boot any other VPEs within this core that should be online, and 174 * Boot any other VPEs within this core that should be online, and
171 * deactivate this VPE if it should be offline. 175 * deactivate this VPE if it should be offline.
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 14bf74b0f51c..b63f2482f288 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -558,7 +558,7 @@ static int mipspmu_get_irq(void)
558 if (mipspmu.irq >= 0) { 558 if (mipspmu.irq >= 0) {
559 /* Request my own irq handler. */ 559 /* Request my own irq handler. */
560 err = request_irq(mipspmu.irq, mipsxx_pmu_handle_irq, 560 err = request_irq(mipspmu.irq, mipsxx_pmu_handle_irq,
561 IRQF_PERCPU | IRQF_NOBALANCING, 561 IRQF_PERCPU | IRQF_NOBALANCING | IRQF_NO_THREAD,
562 "mips_perf_pmu", NULL); 562 "mips_perf_pmu", NULL);
563 if (err) { 563 if (err) {
564 pr_warning("Unable to request IRQ%d for MIPS " 564 pr_warning("Unable to request IRQ%d for MIPS "
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 13b964fddc4a..25bb8400156d 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -113,15 +113,19 @@ trace_a_syscall:
113 move s0, t2 # Save syscall pointer 113 move s0, t2 # Save syscall pointer
114 move a0, sp 114 move a0, sp
115 /* 115 /*
116 * syscall number is in v0 unless we called syscall(__NR_###) 116 * absolute syscall number is in v0 unless we called syscall(__NR_###)
117 * where the real syscall number is in a0 117 * where the real syscall number is in a0
118 * note: NR_syscall is the first O32 syscall but the macro is 118 * note: NR_syscall is the first O32 syscall but the macro is
119 * only defined when compiling with -mabi=32 (CONFIG_32BIT) 119 * only defined when compiling with -mabi=32 (CONFIG_32BIT)
120 * therefore __NR_O32_Linux is used (4000) 120 * therefore __NR_O32_Linux is used (4000)
121 */ 121 */
122 addiu a1, v0, __NR_O32_Linux 122 .set push
123 bnez v0, 1f /* __NR_syscall at offset 0 */ 123 .set reorder
124 lw a1, PT_R4(sp) 124 subu t1, v0, __NR_O32_Linux
125 move a1, v0
126 bnez t1, 1f /* __NR_syscall at offset 0 */
127 lw a1, PT_R4(sp) /* Arg1 for __NR_syscall case */
128 .set pop
125 129
1261: jal syscall_trace_enter 1301: jal syscall_trace_enter
127 131
diff --git a/arch/mips/loongson/loongson-3/cop2-ex.c b/arch/mips/loongson/loongson-3/cop2-ex.c
index 9182e8d2967c..b03e37d2071a 100644
--- a/arch/mips/loongson/loongson-3/cop2-ex.c
+++ b/arch/mips/loongson/loongson-3/cop2-ex.c
@@ -22,13 +22,13 @@
22static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action, 22static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
23 void *data) 23 void *data)
24{ 24{
25 int fpu_enabled; 25 int fpu_owned;
26 int fr = !test_thread_flag(TIF_32BIT_FPREGS); 26 int fr = !test_thread_flag(TIF_32BIT_FPREGS);
27 27
28 switch (action) { 28 switch (action) {
29 case CU2_EXCEPTION: 29 case CU2_EXCEPTION:
30 preempt_disable(); 30 preempt_disable();
31 fpu_enabled = read_c0_status() & ST0_CU1; 31 fpu_owned = __is_fpu_owner();
32 if (!fr) 32 if (!fr)
33 set_c0_status(ST0_CU1 | ST0_CU2); 33 set_c0_status(ST0_CU1 | ST0_CU2);
34 else 34 else
@@ -39,8 +39,8 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
39 KSTK_STATUS(current) |= ST0_FR; 39 KSTK_STATUS(current) |= ST0_FR;
40 else 40 else
41 KSTK_STATUS(current) &= ~ST0_FR; 41 KSTK_STATUS(current) &= ~ST0_FR;
42 /* If FPU is enabled, we needn't init or restore fp */ 42 /* If FPU is owned, we needn't init or restore fp */
43 if(!fpu_enabled) { 43 if (!fpu_owned) {
44 set_thread_flag(TIF_USEDFPU); 44 set_thread_flag(TIF_USEDFPU);
45 if (!used_math()) { 45 if (!used_math()) {
46 _init_fpu(); 46 _init_fpu();
diff --git a/arch/mips/loongson/loongson-3/numa.c b/arch/mips/loongson/loongson-3/numa.c
index ca025a6ba559..37ed184398c6 100644
--- a/arch/mips/loongson/loongson-3/numa.c
+++ b/arch/mips/loongson/loongson-3/numa.c
@@ -24,8 +24,6 @@
24#include <asm/page.h> 24#include <asm/page.h>
25#include <asm/pgalloc.h> 25#include <asm/pgalloc.h>
26#include <asm/sections.h> 26#include <asm/sections.h>
27#include <linux/bootmem.h>
28#include <linux/init.h>
29#include <linux/irq.h> 27#include <linux/irq.h>
30#include <asm/bootinfo.h> 28#include <asm/bootinfo.h>
31#include <asm/mc146818-time.h> 29#include <asm/mc146818-time.h>
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index f7b91d3a371d..7e3ea7766822 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -119,25 +119,36 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
119 119
120EXPORT_SYMBOL(__flush_anon_page); 120EXPORT_SYMBOL(__flush_anon_page);
121 121
122void __update_cache(struct vm_area_struct *vma, unsigned long address, 122static void mips_flush_dcache_from_pte(pte_t pteval, unsigned long address)
123 pte_t pte)
124{ 123{
125 struct page *page; 124 struct page *page;
126 unsigned long pfn, addr; 125 unsigned long pfn = pte_pfn(pteval);
127 int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
128 126
129 pfn = pte_pfn(pte);
130 if (unlikely(!pfn_valid(pfn))) 127 if (unlikely(!pfn_valid(pfn)))
131 return; 128 return;
129
132 page = pfn_to_page(pfn); 130 page = pfn_to_page(pfn);
133 if (page_mapping(page) && Page_dcache_dirty(page)) { 131 if (page_mapping(page) && Page_dcache_dirty(page)) {
134 addr = (unsigned long) page_address(page); 132 unsigned long page_addr = (unsigned long) page_address(page);
135 if (exec || pages_do_alias(addr, address & PAGE_MASK)) 133
136 flush_data_cache_page(addr); 134 if (!cpu_has_ic_fills_f_dc ||
135 pages_do_alias(page_addr, address & PAGE_MASK))
136 flush_data_cache_page(page_addr);
137 ClearPageDcacheDirty(page); 137 ClearPageDcacheDirty(page);
138 } 138 }
139} 139}
140 140
141void set_pte_at(struct mm_struct *mm, unsigned long addr,
142 pte_t *ptep, pte_t pteval)
143{
144 if (cpu_has_dc_aliases || !cpu_has_ic_fills_f_dc) {
145 if (pte_present(pteval))
146 mips_flush_dcache_from_pte(pteval, addr);
147 }
148
149 set_pte(ptep, pteval);
150}
151
141unsigned long _page_cachable_default; 152unsigned long _page_cachable_default;
142EXPORT_SYMBOL(_page_cachable_default); 153EXPORT_SYMBOL(_page_cachable_default);
143 154
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
index 0c35dee0a215..8fddd2cdbff7 100644
--- a/arch/mips/mti-malta/malta-memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -35,13 +35,19 @@ fw_memblock_t * __init fw_getmdesc(int eva)
35 /* otherwise look in the environment */ 35 /* otherwise look in the environment */
36 36
37 memsize_str = fw_getenv("memsize"); 37 memsize_str = fw_getenv("memsize");
38 if (memsize_str) 38 if (memsize_str) {
39 tmp = kstrtol(memsize_str, 0, &memsize); 39 tmp = kstrtoul(memsize_str, 0, &memsize);
40 if (tmp)
41 pr_warn("Failed to read the 'memsize' env variable.\n");
42 }
40 if (eva) { 43 if (eva) {
41 /* Look for ememsize for EVA */ 44 /* Look for ememsize for EVA */
42 ememsize_str = fw_getenv("ememsize"); 45 ememsize_str = fw_getenv("ememsize");
43 if (ememsize_str) 46 if (ememsize_str) {
44 tmp = kstrtol(ememsize_str, 0, &ememsize); 47 tmp = kstrtoul(ememsize_str, 0, &ememsize);
48 if (tmp)
49 pr_warn("Failed to read the 'ememsize' env variable.\n");
50 }
45 } 51 }
46 if (!memsize && !ememsize) { 52 if (!memsize && !ememsize) {
47 pr_warn("memsize not set in YAMON, set to default (32Mb)\n"); 53 pr_warn("memsize not set in YAMON, set to default (32Mb)\n");
diff --git a/arch/mips/pmcs-msp71xx/msp_irq.c b/arch/mips/pmcs-msp71xx/msp_irq.c
index 941744aabb51..f914c753de21 100644
--- a/arch/mips/pmcs-msp71xx/msp_irq.c
+++ b/arch/mips/pmcs-msp71xx/msp_irq.c
@@ -51,7 +51,7 @@ static inline void sec_int_dispatch(void) { do_IRQ(MSP_INT_SEC); }
51 * the range 40-71. 51 * the range 40-71.
52 */ 52 */
53 53
54asmlinkage void plat_irq_dispatch(struct pt_regs *regs) 54asmlinkage void plat_irq_dispatch(void)
55{ 55{
56 u32 pending; 56 u32 pending;
57 57
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a577609f8ed6..4bc7b62fb4b6 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -399,8 +399,6 @@ config PPC64_SUPPORTS_MEMORY_FAILURE
399config KEXEC 399config KEXEC
400 bool "kexec system call" 400 bool "kexec system call"
401 depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP)) 401 depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP))
402 select CRYPTO
403 select CRYPTO_SHA256
404 help 402 help
405 kexec is a system call that implements the ability to shutdown your 403 kexec is a system call that implements the ability to shutdown your
406 current kernel, and to start another kernel. It is like a reboot 404 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c
index 72c20bb16d26..79294c4c5015 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
@@ -62,10 +62,10 @@ long kvmppc_alloc_hpt(struct kvm *kvm, u32 *htab_orderp)
62 } 62 }
63 63
64 kvm->arch.hpt_cma_alloc = 0; 64 kvm->arch.hpt_cma_alloc = 0;
65 page = kvm_alloc_hpt(1 << (order - PAGE_SHIFT)); 65 page = kvm_alloc_hpt(1ul << (order - PAGE_SHIFT));
66 if (page) { 66 if (page) {
67 hpt = (unsigned long)pfn_to_kaddr(page_to_pfn(page)); 67 hpt = (unsigned long)pfn_to_kaddr(page_to_pfn(page));
68 memset((void *)hpt, 0, (1 << order)); 68 memset((void *)hpt, 0, (1ul << order));
69 kvm->arch.hpt_cma_alloc = 1; 69 kvm->arch.hpt_cma_alloc = 1;
70 } 70 }
71 71
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index ab39ceb89ecf..05c78bb5f570 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -48,8 +48,6 @@ config ARCH_SUPPORTS_DEBUG_PAGEALLOC
48 48
49config KEXEC 49config KEXEC
50 def_bool y 50 def_bool y
51 select CRYPTO
52 select CRYPTO_SHA256
53 51
54config AUDIT_ARCH 52config AUDIT_ARCH
55 def_bool y 53 def_bool y
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index b76317c1f3eb..5efb2fe186e7 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -1127,7 +1127,7 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
1127 unsigned long addr, pte_t *ptep) 1127 unsigned long addr, pte_t *ptep)
1128{ 1128{
1129 pgste_t pgste; 1129 pgste_t pgste;
1130 pte_t pte; 1130 pte_t pte, oldpte;
1131 int young; 1131 int young;
1132 1132
1133 if (mm_has_pgste(vma->vm_mm)) { 1133 if (mm_has_pgste(vma->vm_mm)) {
@@ -1135,12 +1135,13 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
1135 pgste = pgste_ipte_notify(vma->vm_mm, ptep, pgste); 1135 pgste = pgste_ipte_notify(vma->vm_mm, ptep, pgste);
1136 } 1136 }
1137 1137
1138 pte = *ptep; 1138 oldpte = pte = *ptep;
1139 ptep_flush_direct(vma->vm_mm, addr, ptep); 1139 ptep_flush_direct(vma->vm_mm, addr, ptep);
1140 young = pte_young(pte); 1140 young = pte_young(pte);
1141 pte = pte_mkold(pte); 1141 pte = pte_mkold(pte);
1142 1142
1143 if (mm_has_pgste(vma->vm_mm)) { 1143 if (mm_has_pgste(vma->vm_mm)) {
1144 pgste = pgste_update_all(&oldpte, pgste, vma->vm_mm);
1144 pgste = pgste_set_pte(ptep, pgste, pte); 1145 pgste = pgste_set_pte(ptep, pgste, pte);
1145 pgste_set_unlock(ptep, pgste); 1146 pgste_set_unlock(ptep, pgste);
1146 } else 1147 } else
@@ -1330,6 +1331,7 @@ static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1330 ptep_flush_direct(vma->vm_mm, address, ptep); 1331 ptep_flush_direct(vma->vm_mm, address, ptep);
1331 1332
1332 if (mm_has_pgste(vma->vm_mm)) { 1333 if (mm_has_pgste(vma->vm_mm)) {
1334 pgste_set_key(ptep, pgste, entry, vma->vm_mm);
1333 pgste = pgste_set_pte(ptep, pgste, entry); 1335 pgste = pgste_set_pte(ptep, pgste, entry);
1334 pgste_set_unlock(ptep, pgste); 1336 pgste_set_unlock(ptep, pgste);
1335 } else 1337 } else
diff --git a/arch/s390/include/uapi/asm/unistd.h b/arch/s390/include/uapi/asm/unistd.h
index 3802d2d3a18d..940ac49198db 100644
--- a/arch/s390/include/uapi/asm/unistd.h
+++ b/arch/s390/include/uapi/asm/unistd.h
@@ -283,7 +283,10 @@
283#define __NR_sched_setattr 345 283#define __NR_sched_setattr 345
284#define __NR_sched_getattr 346 284#define __NR_sched_getattr 346
285#define __NR_renameat2 347 285#define __NR_renameat2 347
286#define NR_syscalls 348 286#define __NR_seccomp 348
287#define __NR_getrandom 349
288#define __NR_memfd_create 350
289#define NR_syscalls 351
287 290
288/* 291/*
289 * There are some system calls that are not present on 64 bit, some 292 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/compat_wrapper.c b/arch/s390/kernel/compat_wrapper.c
index 45cdb37aa6f8..faf6caa510dc 100644
--- a/arch/s390/kernel/compat_wrapper.c
+++ b/arch/s390/kernel/compat_wrapper.c
@@ -214,3 +214,6 @@ COMPAT_SYSCALL_WRAP3(finit_module, int, fd, const char __user *, uargs, int, fla
214COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags); 214COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags);
215COMPAT_SYSCALL_WRAP4(sched_getattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, size, unsigned int, flags); 215COMPAT_SYSCALL_WRAP4(sched_getattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, size, unsigned int, flags);
216COMPAT_SYSCALL_WRAP5(renameat2, int, olddfd, const char __user *, oldname, int, newdfd, const char __user *, newname, unsigned int, flags); 216COMPAT_SYSCALL_WRAP5(renameat2, int, olddfd, const char __user *, oldname, int, newdfd, const char __user *, newname, unsigned int, flags);
217COMPAT_SYSCALL_WRAP3(seccomp, unsigned int, op, unsigned int, flags, const char __user *, uargs)
218COMPAT_SYSCALL_WRAP3(getrandom, char __user *, buf, size_t, count, unsigned int, flags)
219COMPAT_SYSCALL_WRAP2(memfd_create, const char __user *, uname, unsigned int, flags)
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index 633ca7504536..22aac5885ba2 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -2060,6 +2060,13 @@ void s390_reset_system(void (*func)(void *), void *data)
2060 S390_lowcore.program_new_psw.addr = 2060 S390_lowcore.program_new_psw.addr =
2061 PSW_ADDR_AMODE | (unsigned long) s390_base_pgm_handler; 2061 PSW_ADDR_AMODE | (unsigned long) s390_base_pgm_handler;
2062 2062
2063 /*
2064 * Clear subchannel ID and number to signal new kernel that no CCW or
2065 * SCSI IPL has been done (for kexec and kdump)
2066 */
2067 S390_lowcore.subchannel_id = 0;
2068 S390_lowcore.subchannel_nr = 0;
2069
2063 /* Store status at absolute zero */ 2070 /* Store status at absolute zero */
2064 store_status(); 2071 store_status();
2065 2072
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index ae1d5be7dd88..82bc113e8c1d 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -24,6 +24,7 @@
24#include <linux/stddef.h> 24#include <linux/stddef.h>
25#include <linux/unistd.h> 25#include <linux/unistd.h>
26#include <linux/ptrace.h> 26#include <linux/ptrace.h>
27#include <linux/random.h>
27#include <linux/user.h> 28#include <linux/user.h>
28#include <linux/tty.h> 29#include <linux/tty.h>
29#include <linux/ioport.h> 30#include <linux/ioport.h>
@@ -61,6 +62,7 @@
61#include <asm/diag.h> 62#include <asm/diag.h>
62#include <asm/os_info.h> 63#include <asm/os_info.h>
63#include <asm/sclp.h> 64#include <asm/sclp.h>
65#include <asm/sysinfo.h>
64#include "entry.h" 66#include "entry.h"
65 67
66/* 68/*
@@ -766,6 +768,7 @@ static void __init setup_hwcaps(void)
766#endif 768#endif
767 769
768 get_cpu_id(&cpu_id); 770 get_cpu_id(&cpu_id);
771 add_device_randomness(&cpu_id, sizeof(cpu_id));
769 switch (cpu_id.machine) { 772 switch (cpu_id.machine) {
770 case 0x9672: 773 case 0x9672:
771#if !defined(CONFIG_64BIT) 774#if !defined(CONFIG_64BIT)
@@ -804,6 +807,19 @@ static void __init setup_hwcaps(void)
804} 807}
805 808
806/* 809/*
810 * Add system information as device randomness
811 */
812static void __init setup_randomness(void)
813{
814 struct sysinfo_3_2_2 *vmms;
815
816 vmms = (struct sysinfo_3_2_2 *) alloc_page(GFP_KERNEL);
817 if (vmms && stsi(vmms, 3, 2, 2) == 0 && vmms->count)
818 add_device_randomness(&vmms, vmms->count);
819 free_page((unsigned long) vmms);
820}
821
822/*
807 * Setup function called from init/main.c just after the banner 823 * Setup function called from init/main.c just after the banner
808 * was printed. 824 * was printed.
809 */ 825 */
@@ -901,6 +917,9 @@ void __init setup_arch(char **cmdline_p)
901 917
902 /* Setup zfcpdump support */ 918 /* Setup zfcpdump support */
903 setup_zfcpdump(); 919 setup_zfcpdump();
920
921 /* Add system specific data to the random pool */
922 setup_randomness();
904} 923}
905 924
906#ifdef CONFIG_32BIT 925#ifdef CONFIG_32BIT
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index fe5cdf29a001..6fe886ac2db5 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -356,3 +356,6 @@ SYSCALL(sys_finit_module,sys_finit_module,compat_sys_finit_module)
356SYSCALL(sys_sched_setattr,sys_sched_setattr,compat_sys_sched_setattr) /* 345 */ 356SYSCALL(sys_sched_setattr,sys_sched_setattr,compat_sys_sched_setattr) /* 345 */
357SYSCALL(sys_sched_getattr,sys_sched_getattr,compat_sys_sched_getattr) 357SYSCALL(sys_sched_getattr,sys_sched_getattr,compat_sys_sched_getattr)
358SYSCALL(sys_renameat2,sys_renameat2,compat_sys_renameat2) 358SYSCALL(sys_renameat2,sys_renameat2,compat_sys_renameat2)
359SYSCALL(sys_seccomp,sys_seccomp,compat_sys_seccomp)
360SYSCALL(sys_getrandom,sys_getrandom,compat_sys_getrandom)
361SYSCALL(sys_memfd_create,sys_memfd_create,compat_sys_memfd_create) /* 350 */
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index ce81eb2ab76a..81b0e11521e4 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -1317,19 +1317,6 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1317 return -EINVAL; 1317 return -EINVAL;
1318 } 1318 }
1319 1319
1320 switch (kvm_run->exit_reason) {
1321 case KVM_EXIT_S390_SIEIC:
1322 case KVM_EXIT_UNKNOWN:
1323 case KVM_EXIT_INTR:
1324 case KVM_EXIT_S390_RESET:
1325 case KVM_EXIT_S390_UCONTROL:
1326 case KVM_EXIT_S390_TSCH:
1327 case KVM_EXIT_DEBUG:
1328 break;
1329 default:
1330 BUG();
1331 }
1332
1333 vcpu->arch.sie_block->gpsw.mask = kvm_run->psw_mask; 1320 vcpu->arch.sie_block->gpsw.mask = kvm_run->psw_mask;
1334 vcpu->arch.sie_block->gpsw.addr = kvm_run->psw_addr; 1321 vcpu->arch.sie_block->gpsw.addr = kvm_run->psw_addr;
1335 if (kvm_run->kvm_dirty_regs & KVM_SYNC_PREFIX) { 1322 if (kvm_run->kvm_dirty_regs & KVM_SYNC_PREFIX) {
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 19daa53a3da4..5404a6261db9 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -986,11 +986,21 @@ int set_guest_storage_key(struct mm_struct *mm, unsigned long addr,
986 pte_t *ptep; 986 pte_t *ptep;
987 987
988 down_read(&mm->mmap_sem); 988 down_read(&mm->mmap_sem);
989retry:
989 ptep = get_locked_pte(current->mm, addr, &ptl); 990 ptep = get_locked_pte(current->mm, addr, &ptl);
990 if (unlikely(!ptep)) { 991 if (unlikely(!ptep)) {
991 up_read(&mm->mmap_sem); 992 up_read(&mm->mmap_sem);
992 return -EFAULT; 993 return -EFAULT;
993 } 994 }
995 if (!(pte_val(*ptep) & _PAGE_INVALID) &&
996 (pte_val(*ptep) & _PAGE_PROTECT)) {
997 pte_unmap_unlock(*ptep, ptl);
998 if (fixup_user_fault(current, mm, addr, FAULT_FLAG_WRITE)) {
999 up_read(&mm->mmap_sem);
1000 return -EFAULT;
1001 }
1002 goto retry;
1003 }
994 1004
995 new = old = pgste_get_lock(ptep); 1005 new = old = pgste_get_lock(ptep);
996 pgste_val(new) &= ~(PGSTE_GR_BIT | PGSTE_GC_BIT | 1006 pgste_val(new) &= ~(PGSTE_GR_BIT | PGSTE_GC_BIT |
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 453fa5c09550..244fb4c81e25 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -172,6 +172,7 @@ menu "System type"
172# 172#
173config CPU_SH2 173config CPU_SH2
174 bool 174 bool
175 select SH_INTC
175 176
176config CPU_SH2A 177config CPU_SH2A
177 bool 178 bool
@@ -182,6 +183,7 @@ config CPU_SH3
182 bool 183 bool
183 select CPU_HAS_INTEVT 184 select CPU_HAS_INTEVT
184 select CPU_HAS_SR_RB 185 select CPU_HAS_SR_RB
186 select SH_INTC
185 select SYS_SUPPORTS_SH_TMU 187 select SYS_SUPPORTS_SH_TMU
186 188
187config CPU_SH4 189config CPU_SH4
@@ -189,6 +191,7 @@ config CPU_SH4
189 select CPU_HAS_INTEVT 191 select CPU_HAS_INTEVT
190 select CPU_HAS_SR_RB 192 select CPU_HAS_SR_RB
191 select CPU_HAS_FPU if !CPU_SH4AL_DSP 193 select CPU_HAS_FPU if !CPU_SH4AL_DSP
194 select SH_INTC
192 select SYS_SUPPORTS_SH_TMU 195 select SYS_SUPPORTS_SH_TMU
193 select SYS_SUPPORTS_HUGETLBFS if MMU 196 select SYS_SUPPORTS_HUGETLBFS if MMU
194 197
@@ -595,8 +598,6 @@ source kernel/Kconfig.hz
595config KEXEC 598config KEXEC
596 bool "kexec system call (EXPERIMENTAL)" 599 bool "kexec system call (EXPERIMENTAL)"
597 depends on SUPERH32 && MMU 600 depends on SUPERH32 && MMU
598 select CRYPTO
599 select CRYPTO_SHA256
600 help 601 help
601 kexec is a system call that implements the ability to shutdown your 602 kexec is a system call that implements the ability to shutdown your
602 current kernel, and to start another kernel. It is like a reboot 603 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index 097c2cdd117f..f770e3992620 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -229,6 +229,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
229 229
230 cacheop_on_each_cpu(local_flush_icache_range, (void *)&data, 1); 230 cacheop_on_each_cpu(local_flush_icache_range, (void *)&data, 1);
231} 231}
232EXPORT_SYMBOL(flush_icache_range);
232 233
233void flush_icache_page(struct vm_area_struct *vma, struct page *page) 234void flush_icache_page(struct vm_area_struct *vma, struct page *page)
234{ 235{
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index a3ffe2dd4832..7fcd492adbfc 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -191,8 +191,6 @@ source "kernel/Kconfig.hz"
191 191
192config KEXEC 192config KEXEC
193 bool "kexec system call" 193 bool "kexec system call"
194 select CRYPTO
195 select CRYPTO_SHA256
196 ---help--- 194 ---help---
197 kexec is a system call that implements the ability to shutdown your 195 kexec is a system call that implements the ability to shutdown your
198 current kernel, and to start another kernel. It is like a reboot 196 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/tile/kernel/smp.c b/arch/tile/kernel/smp.c
index 01e8ab29f43a..19eaa62d456a 100644
--- a/arch/tile/kernel/smp.c
+++ b/arch/tile/kernel/smp.c
@@ -183,6 +183,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
183 preempt_enable(); 183 preempt_enable();
184 } 184 }
185} 185}
186EXPORT_SYMBOL(flush_icache_range);
186 187
187 188
188/* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */ 189/* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */
diff --git a/arch/unicore32/kernel/signal.c b/arch/unicore32/kernel/signal.c
index 780d77388dec..7c8fb7018dc6 100644
--- a/arch/unicore32/kernel/signal.c
+++ b/arch/unicore32/kernel/signal.c
@@ -254,7 +254,8 @@ static int setup_frame(struct ksignal *ksig, sigset_t *set,
254 254
255 err |= setup_sigframe(frame, regs, set); 255 err |= setup_sigframe(frame, regs, set);
256 if (err == 0) 256 if (err == 0)
257 err |= setup_return(regs, &ksig->ka, frame->retcode, frame, usig); 257 err |= setup_return(regs, &ksig->ka, frame->retcode, frame,
258 ksig->sig);
258 259
259 return err; 260 return err;
260} 261}
@@ -276,7 +277,8 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
276 err |= __save_altstack(&frame->sig.uc.uc_stack, regs->UCreg_sp); 277 err |= __save_altstack(&frame->sig.uc.uc_stack, regs->UCreg_sp);
277 err |= setup_sigframe(&frame->sig, regs, set); 278 err |= setup_sigframe(&frame->sig, regs, set);
278 if (err == 0) 279 if (err == 0)
279 err |= setup_return(regs, &ksig->ka, frame->sig.retcode, frame, usig); 280 err |= setup_return(regs, &ksig->ka, frame->sig.retcode, frame,
281 ksig->sig);
280 282
281 if (err == 0) { 283 if (err == 0) {
282 /* 284 /*
@@ -303,7 +305,6 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs,
303 int syscall) 305 int syscall)
304{ 306{
305 struct thread_info *thread = current_thread_info(); 307 struct thread_info *thread = current_thread_info();
306 struct task_struct *tsk = current;
307 sigset_t *oldset = sigmask_to_save(); 308 sigset_t *oldset = sigmask_to_save();
308 int usig = ksig->sig; 309 int usig = ksig->sig;
309 int ret; 310 int ret;
@@ -373,7 +374,7 @@ static void do_signal(struct pt_regs *regs, int syscall)
373 if (!user_mode(regs)) 374 if (!user_mode(regs))
374 return; 375 return;
375 376
376 if (get_signsl(&ksig)) { 377 if (get_signal(&ksig)) {
377 handle_signal(&ksig, regs, syscall); 378 handle_signal(&ksig, regs, syscall);
378 return; 379 return;
379 } 380 }
diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild
index 61b6d51866f8..3942f74c92d7 100644
--- a/arch/x86/Kbuild
+++ b/arch/x86/Kbuild
@@ -17,6 +17,4 @@ obj-$(CONFIG_IA32_EMULATION) += ia32/
17obj-y += platform/ 17obj-y += platform/
18obj-y += net/ 18obj-y += net/
19 19
20ifeq ($(CONFIG_X86_64),y) 20obj-$(CONFIG_KEXEC_FILE) += purgatory/
21obj-$(CONFIG_KEXEC) += purgatory/
22endif
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5d0bf1aa9dcb..778178f4c7d1 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1585,9 +1585,6 @@ source kernel/Kconfig.hz
1585 1585
1586config KEXEC 1586config KEXEC
1587 bool "kexec system call" 1587 bool "kexec system call"
1588 select BUILD_BIN2C
1589 select CRYPTO
1590 select CRYPTO_SHA256
1591 ---help--- 1588 ---help---
1592 kexec is a system call that implements the ability to shutdown your 1589 kexec is a system call that implements the ability to shutdown your
1593 current kernel, and to start another kernel. It is like a reboot 1590 current kernel, and to start another kernel. It is like a reboot
@@ -1602,9 +1599,22 @@ config KEXEC
1602 interface is strongly in flux, so no good recommendation can be 1599 interface is strongly in flux, so no good recommendation can be
1603 made. 1600 made.
1604 1601
1602config KEXEC_FILE
1603 bool "kexec file based system call"
1604 select BUILD_BIN2C
1605 depends on KEXEC
1606 depends on X86_64
1607 depends on CRYPTO=y
1608 depends on CRYPTO_SHA256=y
1609 ---help---
1610 This is new version of kexec system call. This system call is
1611 file based and takes file descriptors as system call argument
1612 for kernel and initramfs as opposed to list of segments as
1613 accepted by previous system call.
1614
1605config KEXEC_VERIFY_SIG 1615config KEXEC_VERIFY_SIG
1606 bool "Verify kernel signature during kexec_file_load() syscall" 1616 bool "Verify kernel signature during kexec_file_load() syscall"
1607 depends on KEXEC 1617 depends on KEXEC_FILE
1608 ---help--- 1618 ---help---
1609 This option makes kernel signature verification mandatory for 1619 This option makes kernel signature verification mandatory for
1610 kexec_file_load() syscall. If kernel is signature can not be 1620 kexec_file_load() syscall. If kernel is signature can not be
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index c1aa36887843..60087ca37679 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -184,11 +184,8 @@ archheaders:
184 $(Q)$(MAKE) $(build)=arch/x86/syscalls all 184 $(Q)$(MAKE) $(build)=arch/x86/syscalls all
185 185
186archprepare: 186archprepare:
187ifeq ($(CONFIG_KEXEC),y) 187ifeq ($(CONFIG_KEXEC_FILE),y)
188# Build only for 64bit. No loaders for 32bit yet.
189 ifeq ($(CONFIG_X86_64),y)
190 $(Q)$(MAKE) $(build)=arch/x86/purgatory arch/x86/purgatory/kexec-purgatory.c 188 $(Q)$(MAKE) $(build)=arch/x86/purgatory arch/x86/purgatory/kexec-purgatory.c
191 endif
192endif 189endif
193 190
194### 191###
@@ -254,6 +251,7 @@ archclean:
254 $(Q)rm -rf $(objtree)/arch/x86_64 251 $(Q)rm -rf $(objtree)/arch/x86_64
255 $(Q)$(MAKE) $(clean)=$(boot) 252 $(Q)$(MAKE) $(clean)=$(boot)
256 $(Q)$(MAKE) $(clean)=arch/x86/tools 253 $(Q)$(MAKE) $(clean)=arch/x86/tools
254 $(Q)$(MAKE) $(clean)=arch/x86/purgatory
257 255
258PHONY += kvmconfig 256PHONY += kvmconfig
259kvmconfig: 257kvmconfig:
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 0aeed5ca356e..478c490f3654 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -227,6 +227,8 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned
227 227
228extern void io_apic_eoi(unsigned int apic, unsigned int vector); 228extern void io_apic_eoi(unsigned int apic, unsigned int vector);
229 229
230extern bool mp_should_keep_irq(struct device *dev);
231
230#else /* !CONFIG_X86_IO_APIC */ 232#else /* !CONFIG_X86_IO_APIC */
231 233
232#define io_apic_assign_pci_irqs 0 234#define io_apic_assign_pci_irqs 0
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 0ec056012618..aa97a070f09f 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -131,8 +131,13 @@ static inline int pte_exec(pte_t pte)
131 131
132static inline int pte_special(pte_t pte) 132static inline int pte_special(pte_t pte)
133{ 133{
134 return (pte_flags(pte) & (_PAGE_PRESENT|_PAGE_SPECIAL)) == 134 /*
135 (_PAGE_PRESENT|_PAGE_SPECIAL); 135 * See CONFIG_NUMA_BALANCING pte_numa in include/asm-generic/pgtable.h.
136 * On x86 we have _PAGE_BIT_NUMA == _PAGE_BIT_GLOBAL+1 ==
137 * __PAGE_BIT_SOFTW1 == _PAGE_BIT_SPECIAL.
138 */
139 return (pte_flags(pte) & _PAGE_SPECIAL) &&
140 (pte_flags(pte) & (_PAGE_PRESENT|_PAGE_PROTNONE));
136} 141}
137 142
138static inline unsigned long pte_pfn(pte_t pte) 143static inline unsigned long pte_pfn(pte_t pte)
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index b5ea75c4a4b4..ada2e2d6be3e 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -71,6 +71,7 @@ obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
71obj-$(CONFIG_X86_TSC) += trace_clock.o 71obj-$(CONFIG_X86_TSC) += trace_clock.o
72obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o 72obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o
73obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o 73obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o
74obj-$(CONFIG_KEXEC_FILE) += kexec-bzimage64.o
74obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o 75obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o
75obj-y += kprobes/ 76obj-y += kprobes/
76obj-$(CONFIG_MODULES) += module.o 77obj-$(CONFIG_MODULES) += module.o
@@ -118,5 +119,4 @@ ifeq ($(CONFIG_X86_64),y)
118 119
119 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o 120 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o
120 obj-y += vsmp_64.o 121 obj-y += vsmp_64.o
121 obj-$(CONFIG_KEXEC) += kexec-bzimage64.o
122endif 122endif
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 29290f554e79..337ce5a9b15c 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1070,6 +1070,11 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
1070 } 1070 }
1071 1071
1072 if (flags & IOAPIC_MAP_ALLOC) { 1072 if (flags & IOAPIC_MAP_ALLOC) {
1073 /* special handling for legacy IRQs */
1074 if (irq < nr_legacy_irqs() && info->count == 1 &&
1075 mp_irqdomain_map(domain, irq, pin) != 0)
1076 irq = -1;
1077
1073 if (irq > 0) 1078 if (irq > 0)
1074 info->count++; 1079 info->count++;
1075 else if (info->count == 0) 1080 else if (info->count == 0)
@@ -3896,7 +3901,15 @@ int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
3896 info->polarity = 1; 3901 info->polarity = 1;
3897 } 3902 }
3898 info->node = NUMA_NO_NODE; 3903 info->node = NUMA_NO_NODE;
3899 info->set = 1; 3904
3905 /*
3906 * setup_IO_APIC_irqs() programs all legacy IRQs with default
3907 * trigger and polarity attributes. Don't set the flag for that
3908 * case so the first legacy IRQ user could reprogram the pin
3909 * with real trigger and polarity attributes.
3910 */
3911 if (virq >= nr_legacy_irqs() || info->count)
3912 info->set = 1;
3900 } 3913 }
3901 set_io_apic_irq_attr(&attr, ioapic, hwirq, info->trigger, 3914 set_io_apic_irq_attr(&attr, ioapic, hwirq, info->trigger,
3902 info->polarity); 3915 info->polarity);
@@ -3946,6 +3959,18 @@ int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node)
3946 return ret; 3959 return ret;
3947} 3960}
3948 3961
3962bool mp_should_keep_irq(struct device *dev)
3963{
3964 if (dev->power.is_prepared)
3965 return true;
3966#ifdef CONFIG_PM_RUNTIME
3967 if (dev->power.runtime_status == RPM_SUSPENDING)
3968 return true;
3969#endif
3970
3971 return false;
3972}
3973
3949/* Enable IOAPIC early just for system timer */ 3974/* Enable IOAPIC early just for system timer */
3950void __init pre_init_apic_IRQ0(void) 3975void __init pre_init_apic_IRQ0(void)
3951{ 3976{
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index 0553a34fa0df..a618fcd2c07d 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -182,8 +182,7 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
182 crash_save_cpu(regs, safe_smp_processor_id()); 182 crash_save_cpu(regs, safe_smp_processor_id());
183} 183}
184 184
185#ifdef CONFIG_X86_64 185#ifdef CONFIG_KEXEC_FILE
186
187static int get_nr_ram_ranges_callback(unsigned long start_pfn, 186static int get_nr_ram_ranges_callback(unsigned long start_pfn,
188 unsigned long nr_pfn, void *arg) 187 unsigned long nr_pfn, void *arg)
189{ 188{
@@ -696,5 +695,4 @@ int crash_load_segments(struct kimage *image)
696 695
697 return ret; 696 return ret;
698} 697}
699 698#endif /* CONFIG_KEXEC_FILE */
700#endif /* CONFIG_X86_64 */
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 47c410d99f5d..4b0e1dfa2226 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -683,7 +683,7 @@ END(syscall_badsys)
683sysenter_badsys: 683sysenter_badsys:
684 movl $-ENOSYS,%eax 684 movl $-ENOSYS,%eax
685 jmp sysenter_after_call 685 jmp sysenter_after_call
686END(syscall_badsys) 686END(sysenter_badsys)
687 CFI_ENDPROC 687 CFI_ENDPROC
688 688
689.macro FIXUP_ESPFIX_STACK 689.macro FIXUP_ESPFIX_STACK
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 1e6cff5814fa..44f1ed42fdf2 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -203,7 +203,7 @@ void __init native_init_IRQ(void)
203 set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]); 203 set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]);
204 } 204 }
205 205
206 if (!acpi_ioapic && !of_ioapic) 206 if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs())
207 setup_irq(2, &irq2); 207 setup_irq(2, &irq2);
208 208
209#ifdef CONFIG_X86_32 209#ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 8b04018e5d1f..485981059a40 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -25,9 +25,11 @@
25#include <asm/debugreg.h> 25#include <asm/debugreg.h>
26#include <asm/kexec-bzimage64.h> 26#include <asm/kexec-bzimage64.h>
27 27
28#ifdef CONFIG_KEXEC_FILE
28static struct kexec_file_ops *kexec_file_loaders[] = { 29static struct kexec_file_ops *kexec_file_loaders[] = {
29 &kexec_bzImage64_ops, 30 &kexec_bzImage64_ops,
30}; 31};
32#endif
31 33
32static void free_transition_pgtable(struct kimage *image) 34static void free_transition_pgtable(struct kimage *image)
33{ 35{
@@ -178,6 +180,7 @@ static void load_segments(void)
178 ); 180 );
179} 181}
180 182
183#ifdef CONFIG_KEXEC_FILE
181/* Update purgatory as needed after various image segments have been prepared */ 184/* Update purgatory as needed after various image segments have been prepared */
182static int arch_update_purgatory(struct kimage *image) 185static int arch_update_purgatory(struct kimage *image)
183{ 186{
@@ -209,6 +212,12 @@ static int arch_update_purgatory(struct kimage *image)
209 212
210 return ret; 213 return ret;
211} 214}
215#else /* !CONFIG_KEXEC_FILE */
216static inline int arch_update_purgatory(struct kimage *image)
217{
218 return 0;
219}
220#endif /* CONFIG_KEXEC_FILE */
212 221
213int machine_kexec_prepare(struct kimage *image) 222int machine_kexec_prepare(struct kimage *image)
214{ 223{
@@ -329,6 +338,7 @@ void arch_crash_save_vmcoreinfo(void)
329 338
330/* arch-dependent functionality related to kexec file-based syscall */ 339/* arch-dependent functionality related to kexec file-based syscall */
331 340
341#ifdef CONFIG_KEXEC_FILE
332int arch_kexec_kernel_image_probe(struct kimage *image, void *buf, 342int arch_kexec_kernel_image_probe(struct kimage *image, void *buf,
333 unsigned long buf_len) 343 unsigned long buf_len)
334{ 344{
@@ -522,3 +532,4 @@ overflow:
522 (int)ELF64_R_TYPE(rel[i].r_info), value); 532 (int)ELF64_R_TYPE(rel[i].r_info), value);
523 return -ENOEXEC; 533 return -ENOEXEC;
524} 534}
535#endif /* CONFIG_KEXEC_FILE */
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c
index bf7ef5ce29df..0fa29609b2c4 100644
--- a/arch/x86/kernel/time.c
+++ b/arch/x86/kernel/time.c
@@ -68,6 +68,8 @@ static struct irqaction irq0 = {
68 68
69void __init setup_default_timer_irq(void) 69void __init setup_default_timer_irq(void)
70{ 70{
71 if (!nr_legacy_irqs())
72 return;
71 setup_irq(0, &irq0); 73 setup_irq(0, &irq0);
72} 74}
73 75
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 1fe33987de02..ee61c36d64f8 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -49,7 +49,13 @@ void leave_mm(int cpu)
49 if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) { 49 if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) {
50 cpumask_clear_cpu(cpu, mm_cpumask(active_mm)); 50 cpumask_clear_cpu(cpu, mm_cpumask(active_mm));
51 load_cr3(swapper_pg_dir); 51 load_cr3(swapper_pg_dir);
52 trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL); 52 /*
53 * This gets called in the idle path where RCU
54 * functions differently. Tracing normally
55 * uses RCU, so we have to call the tracepoint
56 * specially here.
57 */
58 trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
53 } 59 }
54} 60}
55EXPORT_SYMBOL_GPL(leave_mm); 61EXPORT_SYMBOL_GPL(leave_mm);
@@ -174,7 +180,7 @@ void flush_tlb_current_task(void)
174 * 180 *
175 * This is in units of pages. 181 * This is in units of pages.
176 */ 182 */
177unsigned long tlb_single_page_flush_ceiling = 33; 183static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;
178 184
179void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, 185void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
180 unsigned long end, unsigned long vmflag) 186 unsigned long end, unsigned long vmflag)
diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
index 3865116c51fb..b9958c364075 100644
--- a/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -229,7 +229,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
229 229
230static void intel_mid_pci_irq_disable(struct pci_dev *dev) 230static void intel_mid_pci_irq_disable(struct pci_dev *dev)
231{ 231{
232 if (!dev->dev.power.is_prepared && dev->irq > 0) 232 if (!mp_should_keep_irq(&dev->dev) && dev->irq > 0)
233 mp_unmap_irq(dev->irq); 233 mp_unmap_irq(dev->irq);
234} 234}
235 235
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index bc1a2c341891..eb500c2592ad 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -1256,7 +1256,7 @@ static int pirq_enable_irq(struct pci_dev *dev)
1256 1256
1257static void pirq_disable_irq(struct pci_dev *dev) 1257static void pirq_disable_irq(struct pci_dev *dev)
1258{ 1258{
1259 if (io_apic_assign_pci_irqs && !dev->dev.power.is_prepared && 1259 if (io_apic_assign_pci_irqs && !mp_should_keep_irq(&dev->dev) &&
1260 dev->irq) { 1260 dev->irq) {
1261 mp_unmap_irq(dev->irq); 1261 mp_unmap_irq(dev->irq);
1262 dev->irq = 0; 1262 dev->irq = 0;
diff --git a/arch/x86/purgatory/Makefile b/arch/x86/purgatory/Makefile
index 7fde9ee438a4..899dd2454256 100644
--- a/arch/x86/purgatory/Makefile
+++ b/arch/x86/purgatory/Makefile
@@ -11,6 +11,7 @@ targets += purgatory.ro
11# sure how to relocate those. Like kexec-tools, use custom flags. 11# sure how to relocate those. Like kexec-tools, use custom flags.
12 12
13KBUILD_CFLAGS := -fno-strict-aliasing -Wall -Wstrict-prototypes -fno-zero-initialized-in-bss -fno-builtin -ffreestanding -c -MD -Os -mcmodel=large 13KBUILD_CFLAGS := -fno-strict-aliasing -Wall -Wstrict-prototypes -fno-zero-initialized-in-bss -fno-builtin -ffreestanding -c -MD -Os -mcmodel=large
14KBUILD_CFLAGS += -m$(BITS)
14 15
15$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE 16$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE
16 $(call if_changed,ld) 17 $(call if_changed,ld)
@@ -24,7 +25,4 @@ $(obj)/kexec-purgatory.c: $(obj)/purgatory.ro FORCE
24 $(call if_changed,bin2c) 25 $(call if_changed,bin2c)
25 26
26 27
27# No loaders for 32bits yet. 28obj-$(CONFIG_KEXEC_FILE) += kexec-purgatory.o
28ifeq ($(CONFIG_X86_64),y)
29 obj-$(CONFIG_KEXEC) += kexec-purgatory.o
30endif
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 3a617af60d46..49c6c3d94449 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -4,24 +4,23 @@ config ZONE_DMA
4config XTENSA 4config XTENSA
5 def_bool y 5 def_bool y
6 select ARCH_WANT_FRAME_POINTERS 6 select ARCH_WANT_FRAME_POINTERS
7 select HAVE_IDE
8 select GENERIC_ATOMIC64
9 select GENERIC_CLOCKEVENTS
10 select VIRT_TO_BUS
11 select GENERIC_IRQ_SHOW
12 select GENERIC_SCHED_CLOCK
13 select MODULES_USE_ELF_RELA
14 select GENERIC_PCI_IOMAP
15 select ARCH_WANT_IPC_PARSE_VERSION 7 select ARCH_WANT_IPC_PARSE_VERSION
16 select ARCH_WANT_OPTIONAL_GPIOLIB 8 select ARCH_WANT_OPTIONAL_GPIOLIB
17 select BUILDTIME_EXTABLE_SORT 9 select BUILDTIME_EXTABLE_SORT
18 select CLONE_BACKWARDS 10 select CLONE_BACKWARDS
19 select IRQ_DOMAIN 11 select COMMON_CLK
20 select HAVE_OPROFILE 12 select GENERIC_ATOMIC64
13 select GENERIC_CLOCKEVENTS
14 select GENERIC_IRQ_SHOW
15 select GENERIC_PCI_IOMAP
16 select GENERIC_SCHED_CLOCK
21 select HAVE_FUNCTION_TRACER 17 select HAVE_FUNCTION_TRACER
22 select HAVE_IRQ_TIME_ACCOUNTING 18 select HAVE_IRQ_TIME_ACCOUNTING
19 select HAVE_OPROFILE
23 select HAVE_PERF_EVENTS 20 select HAVE_PERF_EVENTS
24 select COMMON_CLK 21 select IRQ_DOMAIN
22 select MODULES_USE_ELF_RELA
23 select VIRT_TO_BUS
25 help 24 help
26 Xtensa processors are 32-bit RISC machines designed by Tensilica 25 Xtensa processors are 32-bit RISC machines designed by Tensilica
27 primarily for embedded systems. These processors are both 26 primarily for embedded systems. These processors are both
@@ -62,7 +61,9 @@ config TRACE_IRQFLAGS_SUPPORT
62 def_bool y 61 def_bool y
63 62
64config MMU 63config MMU
65 def_bool n 64 bool
65 default n if !XTENSA_VARIANT_CUSTOM
66 default XTENSA_VARIANT_MMU if XTENSA_VARIANT_CUSTOM
66 67
67config VARIANT_IRQ_SWITCH 68config VARIANT_IRQ_SWITCH
68 def_bool n 69 def_bool n
@@ -102,8 +103,40 @@ config XTENSA_VARIANT_S6000
102 select VARIANT_IRQ_SWITCH 103 select VARIANT_IRQ_SWITCH
103 select ARCH_REQUIRE_GPIOLIB 104 select ARCH_REQUIRE_GPIOLIB
104 select XTENSA_CALIBRATE_CCOUNT 105 select XTENSA_CALIBRATE_CCOUNT
106
107config XTENSA_VARIANT_CUSTOM
108 bool "Custom Xtensa processor configuration"
109 select MAY_HAVE_SMP
110 select HAVE_XTENSA_GPIO32
111 help
112 Select this variant to use a custom Xtensa processor configuration.
113 You will be prompted for a processor variant CORENAME.
105endchoice 114endchoice
106 115
116config XTENSA_VARIANT_CUSTOM_NAME
117 string "Xtensa Processor Custom Core Variant Name"
118 depends on XTENSA_VARIANT_CUSTOM
119 help
120 Provide the name of a custom Xtensa processor variant.
121 This CORENAME selects arch/xtensa/variant/CORENAME.
122 Dont forget you have to select MMU if you have one.
123
124config XTENSA_VARIANT_NAME
125 string
126 default "dc232b" if XTENSA_VARIANT_DC232B
127 default "dc233c" if XTENSA_VARIANT_DC233C
128 default "fsf" if XTENSA_VARIANT_FSF
129 default "s6000" if XTENSA_VARIANT_S6000
130 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
131
132config XTENSA_VARIANT_MMU
133 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
134 depends on XTENSA_VARIANT_CUSTOM
135 default y
136 help
137 Build a Conventional Kernel with full MMU support,
138 ie: it supports a TLB with auto-loading, page protection.
139
107config XTENSA_UNALIGNED_USER 140config XTENSA_UNALIGNED_USER
108 bool "Unaligned memory access in use space" 141 bool "Unaligned memory access in use space"
109 help 142 help
@@ -156,13 +189,9 @@ config HOTPLUG_CPU
156 189
157 Say N if you want to disable CPU hotplug. 190 Say N if you want to disable CPU hotplug.
158 191
159config MATH_EMULATION
160 bool "Math emulation"
161 help
162 Can we use information of configuration file?
163
164config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX 192config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
165 bool "Initialize Xtensa MMU inside the Linux kernel code" 193 bool "Initialize Xtensa MMU inside the Linux kernel code"
194 depends on MMU
166 default y 195 default y
167 help 196 help
168 Earlier version initialized the MMU in the exception vector 197 Earlier version initialized the MMU in the exception vector
@@ -192,6 +221,7 @@ config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
192 221
193config HIGHMEM 222config HIGHMEM
194 bool "High Memory Support" 223 bool "High Memory Support"
224 depends on MMU
195 help 225 help
196 Linux can use the full amount of RAM in the system by 226 Linux can use the full amount of RAM in the system by
197 default. However, the default MMUv2 setup only maps the 227 default. However, the default MMUv2 setup only maps the
@@ -208,6 +238,32 @@ config HIGHMEM
208 238
209 If unsure, say Y. 239 If unsure, say Y.
210 240
241config FAST_SYSCALL_XTENSA
242 bool "Enable fast atomic syscalls"
243 default n
244 help
245 fast_syscall_xtensa is a syscall that can make atomic operations
246 on UP kernel when processor has no s32c1i support.
247
248 This syscall is deprecated. It may have issues when called with
249 invalid arguments. It is provided only for backwards compatibility.
250 Only enable it if your userspace software requires it.
251
252 If unsure, say N.
253
254config FAST_SYSCALL_SPILL_REGISTERS
255 bool "Enable spill registers syscall"
256 default n
257 help
258 fast_syscall_spill_registers is a syscall that spills all active
259 register windows of a calling userspace task onto its stack.
260
261 This syscall is deprecated. It may have issues when called with
262 invalid arguments. It is provided only for backwards compatibility.
263 Only enable it if your userspace software requires it.
264
265 If unsure, say N.
266
211endmenu 267endmenu
212 268
213config XTENSA_CALIBRATE_CCOUNT 269config XTENSA_CALIBRATE_CCOUNT
@@ -250,12 +306,14 @@ config XTENSA_PLATFORM_ISS
250 306
251config XTENSA_PLATFORM_XT2000 307config XTENSA_PLATFORM_XT2000
252 bool "XT2000" 308 bool "XT2000"
309 select HAVE_IDE
253 help 310 help
254 XT2000 is the name of Tensilica's feature-rich emulation platform. 311 XT2000 is the name of Tensilica's feature-rich emulation platform.
255 This hardware is capable of running a full Linux distribution. 312 This hardware is capable of running a full Linux distribution.
256 313
257config XTENSA_PLATFORM_S6105 314config XTENSA_PLATFORM_S6105
258 bool "S6105" 315 bool "S6105"
316 select HAVE_IDE
259 select SERIAL_CONSOLE 317 select SERIAL_CONSOLE
260 select NO_IOPORT_MAP 318 select NO_IOPORT_MAP
261 319
diff --git a/arch/xtensa/Makefile b/arch/xtensa/Makefile
index 81250ece3062..472533064b46 100644
--- a/arch/xtensa/Makefile
+++ b/arch/xtensa/Makefile
@@ -4,6 +4,7 @@
4# for more details. 4# for more details.
5# 5#
6# Copyright (C) 2001 - 2005 Tensilica Inc. 6# Copyright (C) 2001 - 2005 Tensilica Inc.
7# Copyright (C) 2014 Cadence Design Systems Inc.
7# 8#
8# This file is included by the global makefile so that you can add your own 9# This file is included by the global makefile so that you can add your own
9# architecture-specific flags and dependencies. Remember to do have actions 10# architecture-specific flags and dependencies. Remember to do have actions
@@ -13,11 +14,7 @@
13# Core configuration. 14# Core configuration.
14# (Use VAR=<xtensa_config> to use another default compiler.) 15# (Use VAR=<xtensa_config> to use another default compiler.)
15 16
16variant-$(CONFIG_XTENSA_VARIANT_FSF) := fsf 17variant-y := $(patsubst "%",%,$(CONFIG_XTENSA_VARIANT_NAME))
17variant-$(CONFIG_XTENSA_VARIANT_DC232B) := dc232b
18variant-$(CONFIG_XTENSA_VARIANT_DC233C) := dc233c
19variant-$(CONFIG_XTENSA_VARIANT_S6000) := s6000
20variant-$(CONFIG_XTENSA_VARIANT_LINUX_CUSTOM) := custom
21 18
22VARIANT = $(variant-y) 19VARIANT = $(variant-y)
23export VARIANT 20export VARIANT
diff --git a/arch/xtensa/boot/dts/kc705.dts b/arch/xtensa/boot/dts/kc705.dts
index 742a347be67a..c4d17a34ab86 100644
--- a/arch/xtensa/boot/dts/kc705.dts
+++ b/arch/xtensa/boot/dts/kc705.dts
@@ -4,8 +4,11 @@
4 4
5/ { 5/ {
6 compatible = "cdns,xtensa-kc705"; 6 compatible = "cdns,xtensa-kc705";
7 chosen {
8 bootargs = "earlycon=uart8250,mmio32,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=0x38000000";
9 };
7 memory@0 { 10 memory@0 {
8 device_type = "memory"; 11 device_type = "memory";
9 reg = <0x00000000 0x08000000>; 12 reg = <0x00000000 0x38000000>;
10 }; 13 };
11}; 14};
diff --git a/arch/xtensa/configs/common_defconfig b/arch/xtensa/configs/common_defconfig
index f6000fe05119..721df1214bc3 100644
--- a/arch/xtensa/configs/common_defconfig
+++ b/arch/xtensa/configs/common_defconfig
@@ -66,7 +66,6 @@ CONFIG_XTENSA_ARCH_LINUX_BE=y
66CONFIG_MMU=y 66CONFIG_MMU=y
67# CONFIG_XTENSA_UNALIGNED_USER is not set 67# CONFIG_XTENSA_UNALIGNED_USER is not set
68# CONFIG_PREEMPT is not set 68# CONFIG_PREEMPT is not set
69# CONFIG_MATH_EMULATION is not set
70# CONFIG_HIGHMEM is not set 69# CONFIG_HIGHMEM is not set
71 70
72# 71#
diff --git a/arch/xtensa/configs/iss_defconfig b/arch/xtensa/configs/iss_defconfig
index 1493c68352d1..b966baf82cae 100644
--- a/arch/xtensa/configs/iss_defconfig
+++ b/arch/xtensa/configs/iss_defconfig
@@ -146,7 +146,6 @@ CONFIG_XTENSA_VARIANT_FSF=y
146# CONFIG_XTENSA_VARIANT_S6000 is not set 146# CONFIG_XTENSA_VARIANT_S6000 is not set
147# CONFIG_XTENSA_UNALIGNED_USER is not set 147# CONFIG_XTENSA_UNALIGNED_USER is not set
148# CONFIG_PREEMPT is not set 148# CONFIG_PREEMPT is not set
149# CONFIG_MATH_EMULATION is not set
150CONFIG_XTENSA_CALIBRATE_CCOUNT=y 149CONFIG_XTENSA_CALIBRATE_CCOUNT=y
151CONFIG_SERIAL_CONSOLE=y 150CONFIG_SERIAL_CONSOLE=y
152CONFIG_XTENSA_ISS_NETWORK=y 151CONFIG_XTENSA_ISS_NETWORK=y
@@ -308,7 +307,7 @@ CONFIG_MISC_DEVICES=y
308# EEPROM support 307# EEPROM support
309# 308#
310# CONFIG_EEPROM_93CX6 is not set 309# CONFIG_EEPROM_93CX6 is not set
311CONFIG_HAVE_IDE=y 310# CONFIG_HAVE_IDE is not set
312# CONFIG_IDE is not set 311# CONFIG_IDE is not set
313 312
314# 313#
diff --git a/arch/xtensa/configs/s6105_defconfig b/arch/xtensa/configs/s6105_defconfig
index 12a492ab6d17..9471265b8ca6 100644
--- a/arch/xtensa/configs/s6105_defconfig
+++ b/arch/xtensa/configs/s6105_defconfig
@@ -109,7 +109,6 @@ CONFIG_VARIANT_IRQ_SWITCH=y
109CONFIG_XTENSA_VARIANT_S6000=y 109CONFIG_XTENSA_VARIANT_S6000=y
110# CONFIG_XTENSA_UNALIGNED_USER is not set 110# CONFIG_XTENSA_UNALIGNED_USER is not set
111CONFIG_PREEMPT=y 111CONFIG_PREEMPT=y
112# CONFIG_MATH_EMULATION is not set
113# CONFIG_HIGHMEM is not set 112# CONFIG_HIGHMEM is not set
114CONFIG_XTENSA_CALIBRATE_CCOUNT=y 113CONFIG_XTENSA_CALIBRATE_CCOUNT=y
115CONFIG_SERIAL_CONSOLE=y 114CONFIG_SERIAL_CONSOLE=y
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 555a98a18453..e72aaca7a77f 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -37,6 +37,7 @@
37 * specials for cache aliasing: 37 * specials for cache aliasing:
38 * 38 *
39 * __flush_invalidate_dcache_page_alias(vaddr,paddr) 39 * __flush_invalidate_dcache_page_alias(vaddr,paddr)
40 * __invalidate_dcache_page_alias(vaddr,paddr)
40 * __invalidate_icache_page_alias(vaddr,paddr) 41 * __invalidate_icache_page_alias(vaddr,paddr)
41 */ 42 */
42 43
@@ -62,6 +63,7 @@ extern void __flush_invalidate_dcache_range(unsigned long, unsigned long);
62 63
63#if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE) 64#if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
64extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long); 65extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long);
66extern void __invalidate_dcache_page_alias(unsigned long, unsigned long);
65#else 67#else
66static inline void __flush_invalidate_dcache_page_alias(unsigned long virt, 68static inline void __flush_invalidate_dcache_page_alias(unsigned long virt,
67 unsigned long phys) { } 69 unsigned long phys) { }
diff --git a/arch/xtensa/include/asm/fixmap.h b/arch/xtensa/include/asm/fixmap.h
index 9f6c33d0428a..62b507deea9d 100644
--- a/arch/xtensa/include/asm/fixmap.h
+++ b/arch/xtensa/include/asm/fixmap.h
@@ -23,8 +23,8 @@
23 * Here we define all the compile-time 'special' virtual 23 * Here we define all the compile-time 'special' virtual
24 * addresses. The point is to have a constant address at 24 * addresses. The point is to have a constant address at
25 * compile time, but to set the physical address only 25 * compile time, but to set the physical address only
26 * in the boot process. We allocate these special addresses 26 * in the boot process. We allocate these special addresses
27 * from the end of the consistent memory region backwards. 27 * from the start of the consistent memory region upwards.
28 * Also this lets us do fail-safe vmalloc(), we 28 * Also this lets us do fail-safe vmalloc(), we
29 * can guarantee that these special addresses and 29 * can guarantee that these special addresses and
30 * vmalloc()-ed addresses never overlap. 30 * vmalloc()-ed addresses never overlap.
@@ -38,7 +38,8 @@ enum fixed_addresses {
38#ifdef CONFIG_HIGHMEM 38#ifdef CONFIG_HIGHMEM
39 /* reserved pte's for temporary kernel mappings */ 39 /* reserved pte's for temporary kernel mappings */
40 FIX_KMAP_BEGIN, 40 FIX_KMAP_BEGIN,
41 FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1, 41 FIX_KMAP_END = FIX_KMAP_BEGIN +
42 (KM_TYPE_NR * NR_CPUS * DCACHE_N_COLORS) - 1,
42#endif 43#endif
43 __end_of_fixed_addresses 44 __end_of_fixed_addresses
44}; 45};
@@ -47,7 +48,28 @@ enum fixed_addresses {
47#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) 48#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
48#define FIXADDR_START ((FIXADDR_TOP - FIXADDR_SIZE) & PMD_MASK) 49#define FIXADDR_START ((FIXADDR_TOP - FIXADDR_SIZE) & PMD_MASK)
49 50
50#include <asm-generic/fixmap.h> 51#define __fix_to_virt(x) (FIXADDR_START + ((x) << PAGE_SHIFT))
52#define __virt_to_fix(x) (((x) - FIXADDR_START) >> PAGE_SHIFT)
53
54#ifndef __ASSEMBLY__
55/*
56 * 'index to address' translation. If anyone tries to use the idx
57 * directly without translation, we catch the bug with a NULL-deference
58 * kernel oops. Illegal ranges of incoming indices are caught too.
59 */
60static __always_inline unsigned long fix_to_virt(const unsigned int idx)
61{
62 BUILD_BUG_ON(idx >= __end_of_fixed_addresses);
63 return __fix_to_virt(idx);
64}
65
66static inline unsigned long virt_to_fix(const unsigned long vaddr)
67{
68 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
69 return __virt_to_fix(vaddr);
70}
71
72#endif
51 73
52#define kmap_get_fixmap_pte(vaddr) \ 74#define kmap_get_fixmap_pte(vaddr) \
53 pte_offset_kernel( \ 75 pte_offset_kernel( \
diff --git a/arch/xtensa/include/asm/highmem.h b/arch/xtensa/include/asm/highmem.h
index 2653ef5d55f1..2c7901edffaf 100644
--- a/arch/xtensa/include/asm/highmem.h
+++ b/arch/xtensa/include/asm/highmem.h
@@ -12,19 +12,55 @@
12#ifndef _XTENSA_HIGHMEM_H 12#ifndef _XTENSA_HIGHMEM_H
13#define _XTENSA_HIGHMEM_H 13#define _XTENSA_HIGHMEM_H
14 14
15#include <linux/wait.h>
15#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
16#include <asm/fixmap.h> 17#include <asm/fixmap.h>
17#include <asm/kmap_types.h> 18#include <asm/kmap_types.h>
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19 20
20#define PKMAP_BASE (FIXADDR_START - PMD_SIZE) 21#define PKMAP_BASE ((FIXADDR_START - \
21#define LAST_PKMAP PTRS_PER_PTE 22 (LAST_PKMAP + 1) * PAGE_SIZE) & PMD_MASK)
23#define LAST_PKMAP (PTRS_PER_PTE * DCACHE_N_COLORS)
22#define LAST_PKMAP_MASK (LAST_PKMAP - 1) 24#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
23#define PKMAP_NR(virt) (((virt) - PKMAP_BASE) >> PAGE_SHIFT) 25#define PKMAP_NR(virt) (((virt) - PKMAP_BASE) >> PAGE_SHIFT)
24#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) 26#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
25 27
26#define kmap_prot PAGE_KERNEL 28#define kmap_prot PAGE_KERNEL
27 29
30#if DCACHE_WAY_SIZE > PAGE_SIZE
31#define get_pkmap_color get_pkmap_color
32static inline int get_pkmap_color(struct page *page)
33{
34 return DCACHE_ALIAS(page_to_phys(page));
35}
36
37extern unsigned int last_pkmap_nr_arr[];
38
39static inline unsigned int get_next_pkmap_nr(unsigned int color)
40{
41 last_pkmap_nr_arr[color] =
42 (last_pkmap_nr_arr[color] + DCACHE_N_COLORS) & LAST_PKMAP_MASK;
43 return last_pkmap_nr_arr[color] + color;
44}
45
46static inline int no_more_pkmaps(unsigned int pkmap_nr, unsigned int color)
47{
48 return pkmap_nr < DCACHE_N_COLORS;
49}
50
51static inline int get_pkmap_entries_count(unsigned int color)
52{
53 return LAST_PKMAP / DCACHE_N_COLORS;
54}
55
56extern wait_queue_head_t pkmap_map_wait_arr[];
57
58static inline wait_queue_head_t *get_pkmap_wait_queue_head(unsigned int color)
59{
60 return pkmap_map_wait_arr + color;
61}
62#endif
63
28extern pte_t *pkmap_page_table; 64extern pte_t *pkmap_page_table;
29 65
30void *kmap_high(struct page *page); 66void *kmap_high(struct page *page);
diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h
index 47f582333f6b..abe24c6f8b2f 100644
--- a/arch/xtensa/include/asm/page.h
+++ b/arch/xtensa/include/asm/page.h
@@ -78,7 +78,9 @@
78# define DCACHE_ALIAS_EQ(a,b) ((((a) ^ (b)) & DCACHE_ALIAS_MASK) == 0) 78# define DCACHE_ALIAS_EQ(a,b) ((((a) ^ (b)) & DCACHE_ALIAS_MASK) == 0)
79#else 79#else
80# define DCACHE_ALIAS_ORDER 0 80# define DCACHE_ALIAS_ORDER 0
81# define DCACHE_ALIAS(a) ((void)(a), 0)
81#endif 82#endif
83#define DCACHE_N_COLORS (1 << DCACHE_ALIAS_ORDER)
82 84
83#if ICACHE_WAY_SIZE > PAGE_SIZE 85#if ICACHE_WAY_SIZE > PAGE_SIZE
84# define ICACHE_ALIAS_ORDER (ICACHE_WAY_SHIFT - PAGE_SHIFT) 86# define ICACHE_ALIAS_ORDER (ICACHE_WAY_SHIFT - PAGE_SHIFT)
@@ -134,6 +136,7 @@ static inline __attribute_const__ int get_order(unsigned long size)
134#endif 136#endif
135 137
136struct page; 138struct page;
139struct vm_area_struct;
137extern void clear_page(void *page); 140extern void clear_page(void *page);
138extern void copy_page(void *to, void *from); 141extern void copy_page(void *to, void *from);
139 142
@@ -143,8 +146,15 @@ extern void copy_page(void *to, void *from);
143 */ 146 */
144 147
145#if DCACHE_WAY_SIZE > PAGE_SIZE 148#if DCACHE_WAY_SIZE > PAGE_SIZE
146extern void clear_user_page(void*, unsigned long, struct page*); 149extern void clear_page_alias(void *vaddr, unsigned long paddr);
147extern void copy_user_page(void*, void*, unsigned long, struct page*); 150extern void copy_page_alias(void *to, void *from,
151 unsigned long to_paddr, unsigned long from_paddr);
152
153#define clear_user_highpage clear_user_highpage
154void clear_user_highpage(struct page *page, unsigned long vaddr);
155#define __HAVE_ARCH_COPY_USER_HIGHPAGE
156void copy_user_highpage(struct page *to, struct page *from,
157 unsigned long vaddr, struct vm_area_struct *vma);
148#else 158#else
149# define clear_user_page(page, vaddr, pg) clear_page(page) 159# define clear_user_page(page, vaddr, pg) clear_page(page)
150# define copy_user_page(to, from, vaddr, pg) copy_page(to, from) 160# define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h
index 4b0ca35a93b1..b2173e5da601 100644
--- a/arch/xtensa/include/asm/pgtable.h
+++ b/arch/xtensa/include/asm/pgtable.h
@@ -67,7 +67,12 @@
67#define VMALLOC_START 0xC0000000 67#define VMALLOC_START 0xC0000000
68#define VMALLOC_END 0xC7FEFFFF 68#define VMALLOC_END 0xC7FEFFFF
69#define TLBTEMP_BASE_1 0xC7FF0000 69#define TLBTEMP_BASE_1 0xC7FF0000
70#define TLBTEMP_BASE_2 0xC7FF8000 70#define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE)
71#if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE
72#define TLBTEMP_SIZE (2 * DCACHE_WAY_SIZE)
73#else
74#define TLBTEMP_SIZE ICACHE_WAY_SIZE
75#endif
71 76
72/* 77/*
73 * For the Xtensa architecture, the PTE layout is as follows: 78 * For the Xtensa architecture, the PTE layout is as follows:
diff --git a/arch/xtensa/include/asm/uaccess.h b/arch/xtensa/include/asm/uaccess.h
index fd686dc45d1a..c7211e7e182d 100644
--- a/arch/xtensa/include/asm/uaccess.h
+++ b/arch/xtensa/include/asm/uaccess.h
@@ -52,7 +52,12 @@
52 */ 52 */
53 .macro get_fs ad, sp 53 .macro get_fs ad, sp
54 GET_CURRENT(\ad,\sp) 54 GET_CURRENT(\ad,\sp)
55#if THREAD_CURRENT_DS > 1020
56 addi \ad, \ad, TASK_THREAD
57 l32i \ad, \ad, THREAD_CURRENT_DS - TASK_THREAD
58#else
55 l32i \ad, \ad, THREAD_CURRENT_DS 59 l32i \ad, \ad, THREAD_CURRENT_DS
60#endif
56 .endm 61 .endm
57 62
58/* 63/*
diff --git a/arch/xtensa/include/uapi/asm/ioctls.h b/arch/xtensa/include/uapi/asm/ioctls.h
index b4cb1100c0fb..a47909f0c34b 100644
--- a/arch/xtensa/include/uapi/asm/ioctls.h
+++ b/arch/xtensa/include/uapi/asm/ioctls.h
@@ -28,17 +28,17 @@
28#define TCSETSW 0x5403 28#define TCSETSW 0x5403
29#define TCSETSF 0x5404 29#define TCSETSF 0x5404
30 30
31#define TCGETA _IOR('t', 23, struct termio) 31#define TCGETA 0x80127417 /* _IOR('t', 23, struct termio) */
32#define TCSETA _IOW('t', 24, struct termio) 32#define TCSETA 0x40127418 /* _IOW('t', 24, struct termio) */
33#define TCSETAW _IOW('t', 25, struct termio) 33#define TCSETAW 0x40127419 /* _IOW('t', 25, struct termio) */
34#define TCSETAF _IOW('t', 28, struct termio) 34#define TCSETAF 0x4012741C /* _IOW('t', 28, struct termio) */
35 35
36#define TCSBRK _IO('t', 29) 36#define TCSBRK _IO('t', 29)
37#define TCXONC _IO('t', 30) 37#define TCXONC _IO('t', 30)
38#define TCFLSH _IO('t', 31) 38#define TCFLSH _IO('t', 31)
39 39
40#define TIOCSWINSZ _IOW('t', 103, struct winsize) 40#define TIOCSWINSZ 0x40087467 /* _IOW('t', 103, struct winsize) */
41#define TIOCGWINSZ _IOR('t', 104, struct winsize) 41#define TIOCGWINSZ 0x80087468 /* _IOR('t', 104, struct winsize) */
42#define TIOCSTART _IO('t', 110) /* start output, like ^Q */ 42#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
43#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */ 43#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */
44#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */ 44#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */
@@ -88,7 +88,6 @@
88#define TIOCSETD _IOW('T', 35, int) 88#define TIOCSETD _IOW('T', 35, int)
89#define TIOCGETD _IOR('T', 36, int) 89#define TIOCGETD _IOR('T', 36, int)
90#define TCSBRKP _IOW('T', 37, int) /* Needed for POSIX tcsendbreak()*/ 90#define TCSBRKP _IOW('T', 37, int) /* Needed for POSIX tcsendbreak()*/
91#define TIOCTTYGSTRUCT _IOR('T', 38, struct tty_struct) /* For debugging only*/
92#define TIOCSBRK _IO('T', 39) /* BSD compatibility */ 91#define TIOCSBRK _IO('T', 39) /* BSD compatibility */
93#define TIOCCBRK _IO('T', 40) /* BSD compatibility */ 92#define TIOCCBRK _IO('T', 40) /* BSD compatibility */
94#define TIOCGSID _IOR('T', 41, pid_t) /* Return the session ID of FD*/ 93#define TIOCGSID _IOR('T', 41, pid_t) /* Return the session ID of FD*/
@@ -114,8 +113,10 @@
114#define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* Get line status reg. */ 113#define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* Get line status reg. */
115 /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ 114 /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
116# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ 115# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
117#define TIOCSERGETMULTI _IOR('T', 90, struct serial_multiport_struct) /* Get multiport config */ 116#define TIOCSERGETMULTI 0x80a8545a /* Get multiport config */
118#define TIOCSERSETMULTI _IOW('T', 91, struct serial_multiport_struct) /* Set multiport config */ 117 /* _IOR('T', 90, struct serial_multiport_struct) */
118#define TIOCSERSETMULTI 0x40a8545b /* Set multiport config */
119 /* _IOW('T', 91, struct serial_multiport_struct) */
119 120
120#define TIOCMIWAIT _IO('T', 92) /* wait for a change on serial input line(s) */ 121#define TIOCMIWAIT _IO('T', 92) /* wait for a change on serial input line(s) */
121#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ 122#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h
index b9395529f02d..8883fc877c5c 100644
--- a/arch/xtensa/include/uapi/asm/unistd.h
+++ b/arch/xtensa/include/uapi/asm/unistd.h
@@ -739,7 +739,10 @@ __SYSCALL(334, sys_sched_setattr, 2)
739#define __NR_sched_getattr 335 739#define __NR_sched_getattr 335
740__SYSCALL(335, sys_sched_getattr, 3) 740__SYSCALL(335, sys_sched_getattr, 3)
741 741
742#define __NR_syscall_count 336 742#define __NR_renameat2 336
743__SYSCALL(336, sys_renameat2, 5)
744
745#define __NR_syscall_count 337
743 746
744/* 747/*
745 * sysxtensa syscall handler 748 * sysxtensa syscall handler
diff --git a/arch/xtensa/kernel/align.S b/arch/xtensa/kernel/align.S
index d4cef6039a5c..890004af03a9 100644
--- a/arch/xtensa/kernel/align.S
+++ b/arch/xtensa/kernel/align.S
@@ -8,6 +8,7 @@
8 * this archive for more details. 8 * this archive for more details.
9 * 9 *
10 * Copyright (C) 2001 - 2005 Tensilica, Inc. 10 * Copyright (C) 2001 - 2005 Tensilica, Inc.
11 * Copyright (C) 2014 Cadence Design Systems Inc.
11 * 12 *
12 * Rewritten by Chris Zankel <chris@zankel.net> 13 * Rewritten by Chris Zankel <chris@zankel.net>
13 * 14 *
@@ -174,6 +175,10 @@ ENTRY(fast_unaligned)
174 s32i a0, a2, PT_AREG2 175 s32i a0, a2, PT_AREG2
175 s32i a3, a2, PT_AREG3 176 s32i a3, a2, PT_AREG3
176 177
178 rsr a3, excsave1
179 movi a4, fast_unaligned_fixup
180 s32i a4, a3, EXC_TABLE_FIXUP
181
177 /* Keep value of SAR in a0 */ 182 /* Keep value of SAR in a0 */
178 183
179 rsr a0, sar 184 rsr a0, sar
@@ -225,10 +230,6 @@ ENTRY(fast_unaligned)
225 addx8 a5, a6, a5 230 addx8 a5, a6, a5
226 jx a5 # jump into table 231 jx a5 # jump into table
227 232
228 /* Invalid instruction, CRITICAL! */
229.Linvalid_instruction_load:
230 j .Linvalid_instruction
231
232 /* Load: Load memory address. */ 233 /* Load: Load memory address. */
233 234
234.Lload: movi a3, ~3 235.Lload: movi a3, ~3
@@ -272,18 +273,6 @@ ENTRY(fast_unaligned)
272 /* Set target register. */ 273 /* Set target register. */
273 274
2741: 2751:
275
276#if XCHAL_HAVE_LOOPS
277 rsr a5, lend # check if we reached LEND
278 bne a7, a5, 1f
279 rsr a5, lcount # and LCOUNT != 0
280 beqz a5, 1f
281 addi a5, a5, -1 # decrement LCOUNT and set
282 rsr a7, lbeg # set PC to LBEGIN
283 wsr a5, lcount
284#endif
285
2861: wsr a7, epc1 # skip load instruction
287 extui a4, a4, INSN_T, 4 # extract target register 276 extui a4, a4, INSN_T, 4 # extract target register
288 movi a5, .Lload_table 277 movi a5, .Lload_table
289 addx8 a4, a4, a5 278 addx8 a4, a4, a5
@@ -326,6 +315,35 @@ ENTRY(fast_unaligned)
326 mov a3, a14 ; _j 1f; .align 8 315 mov a3, a14 ; _j 1f; .align 8
327 mov a3, a15 ; _j 1f; .align 8 316 mov a3, a15 ; _j 1f; .align 8
328 317
318 /* We cannot handle this exception. */
319
320 .extern _kernel_exception
321.Linvalid_instruction_load:
322.Linvalid_instruction_store:
323
324 movi a4, 0
325 rsr a3, excsave1
326 s32i a4, a3, EXC_TABLE_FIXUP
327
328 /* Restore a4...a8 and SAR, set SP, and jump to default exception. */
329
330 l32i a8, a2, PT_AREG8
331 l32i a7, a2, PT_AREG7
332 l32i a6, a2, PT_AREG6
333 l32i a5, a2, PT_AREG5
334 l32i a4, a2, PT_AREG4
335 wsr a0, sar
336 mov a1, a2
337
338 rsr a0, ps
339 bbsi.l a0, PS_UM_BIT, 2f # jump if user mode
340
341 movi a0, _kernel_exception
342 jx a0
343
3442: movi a0, _user_exception
345 jx a0
346
3291: # a7: instruction pointer, a4: instruction, a3: value 3471: # a7: instruction pointer, a4: instruction, a3: value
330 348
331 movi a6, 0 # mask: ffffffff:00000000 349 movi a6, 0 # mask: ffffffff:00000000
@@ -353,17 +371,6 @@ ENTRY(fast_unaligned)
353 /* Get memory address */ 371 /* Get memory address */
354 372
3551: 3731:
356#if XCHAL_HAVE_LOOPS
357 rsr a4, lend # check if we reached LEND
358 bne a7, a4, 1f
359 rsr a4, lcount # and LCOUNT != 0
360 beqz a4, 1f
361 addi a4, a4, -1 # decrement LCOUNT and set
362 rsr a7, lbeg # set PC to LBEGIN
363 wsr a4, lcount
364#endif
365
3661: wsr a7, epc1 # skip store instruction
367 movi a4, ~3 374 movi a4, ~3
368 and a4, a4, a8 # align memory address 375 and a4, a4, a8 # align memory address
369 376
@@ -375,25 +382,25 @@ ENTRY(fast_unaligned)
375#endif 382#endif
376 383
377 __ssa8r a8 384 __ssa8r a8
378 __src_b a7, a5, a6 # lo-mask F..F0..0 (BE) 0..0F..F (LE) 385 __src_b a8, a5, a6 # lo-mask F..F0..0 (BE) 0..0F..F (LE)
379 __src_b a6, a6, a5 # hi-mask 0..0F..F (BE) F..F0..0 (LE) 386 __src_b a6, a6, a5 # hi-mask 0..0F..F (BE) F..F0..0 (LE)
380#ifdef UNALIGNED_USER_EXCEPTION 387#ifdef UNALIGNED_USER_EXCEPTION
381 l32e a5, a4, -8 388 l32e a5, a4, -8
382#else 389#else
383 l32i a5, a4, 0 # load lower address word 390 l32i a5, a4, 0 # load lower address word
384#endif 391#endif
385 and a5, a5, a7 # mask 392 and a5, a5, a8 # mask
386 __sh a7, a3 # shift value 393 __sh a8, a3 # shift value
387 or a5, a5, a7 # or with original value 394 or a5, a5, a8 # or with original value
388#ifdef UNALIGNED_USER_EXCEPTION 395#ifdef UNALIGNED_USER_EXCEPTION
389 s32e a5, a4, -8 396 s32e a5, a4, -8
390 l32e a7, a4, -4 397 l32e a8, a4, -4
391#else 398#else
392 s32i a5, a4, 0 # store 399 s32i a5, a4, 0 # store
393 l32i a7, a4, 4 # same for upper address word 400 l32i a8, a4, 4 # same for upper address word
394#endif 401#endif
395 __sl a5, a3 402 __sl a5, a3
396 and a6, a7, a6 403 and a6, a8, a6
397 or a6, a6, a5 404 or a6, a6, a5
398#ifdef UNALIGNED_USER_EXCEPTION 405#ifdef UNALIGNED_USER_EXCEPTION
399 s32e a6, a4, -4 406 s32e a6, a4, -4
@@ -401,9 +408,27 @@ ENTRY(fast_unaligned)
401 s32i a6, a4, 4 408 s32i a6, a4, 4
402#endif 409#endif
403 410
404 /* Done. restore stack and return */
405
406.Lexit: 411.Lexit:
412#if XCHAL_HAVE_LOOPS
413 rsr a4, lend # check if we reached LEND
414 bne a7, a4, 1f
415 rsr a4, lcount # and LCOUNT != 0
416 beqz a4, 1f
417 addi a4, a4, -1 # decrement LCOUNT and set
418 rsr a7, lbeg # set PC to LBEGIN
419 wsr a4, lcount
420#endif
421
4221: wsr a7, epc1 # skip emulated instruction
423
424 /* Update icount if we're single-stepping in userspace. */
425 rsr a4, icountlevel
426 beqz a4, 1f
427 bgeui a4, LOCKLEVEL + 1, 1f
428 rsr a4, icount
429 addi a4, a4, 1
430 wsr a4, icount
4311:
407 movi a4, 0 432 movi a4, 0
408 rsr a3, excsave1 433 rsr a3, excsave1
409 s32i a4, a3, EXC_TABLE_FIXUP 434 s32i a4, a3, EXC_TABLE_FIXUP
@@ -424,31 +449,40 @@ ENTRY(fast_unaligned)
424 l32i a2, a2, PT_AREG2 449 l32i a2, a2, PT_AREG2
425 rfe 450 rfe
426 451
427 /* We cannot handle this exception. */ 452ENDPROC(fast_unaligned)
428 453
429 .extern _kernel_exception 454ENTRY(fast_unaligned_fixup)
430.Linvalid_instruction_store:
431.Linvalid_instruction:
432 455
433 /* Restore a4...a8 and SAR, set SP, and jump to default exception. */ 456 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE
457 wsr a3, excsave1
434 458
435 l32i a8, a2, PT_AREG8 459 l32i a8, a2, PT_AREG8
436 l32i a7, a2, PT_AREG7 460 l32i a7, a2, PT_AREG7
437 l32i a6, a2, PT_AREG6 461 l32i a6, a2, PT_AREG6
438 l32i a5, a2, PT_AREG5 462 l32i a5, a2, PT_AREG5
439 l32i a4, a2, PT_AREG4 463 l32i a4, a2, PT_AREG4
464 l32i a0, a2, PT_AREG2
465 xsr a0, depc # restore depc and a0
440 wsr a0, sar 466 wsr a0, sar
441 mov a1, a2 467
468 rsr a0, exccause
469 s32i a0, a2, PT_DEPC # mark as a regular exception
442 470
443 rsr a0, ps 471 rsr a0, ps
444 bbsi.l a2, PS_UM_BIT, 1f # jump if user mode 472 bbsi.l a0, PS_UM_BIT, 1f # jump if user mode
445 473
446 movi a0, _kernel_exception 474 rsr a0, exccause
475 addx4 a0, a0, a3 # find entry in table
476 l32i a0, a0, EXC_TABLE_FAST_KERNEL # load handler
477 l32i a3, a2, PT_AREG3
447 jx a0 478 jx a0
448 4791:
4491: movi a0, _user_exception 480 rsr a0, exccause
481 addx4 a0, a0, a3 # find entry in table
482 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
483 l32i a3, a2, PT_AREG3
450 jx a0 484 jx a0
451 485
452ENDPROC(fast_unaligned) 486ENDPROC(fast_unaligned_fixup)
453 487
454#endif /* XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION */ 488#endif /* XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION */
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index ef7f4990722b..82bbfa5a05b3 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -986,6 +986,8 @@ ENDPROC(fast_syscall_unrecoverable)
986 * j done 986 * j done
987 */ 987 */
988 988
989#ifdef CONFIG_FAST_SYSCALL_XTENSA
990
989#define TRY \ 991#define TRY \
990 .section __ex_table, "a"; \ 992 .section __ex_table, "a"; \
991 .word 66f, 67f; \ 993 .word 66f, 67f; \
@@ -1001,9 +1003,8 @@ ENTRY(fast_syscall_xtensa)
1001 movi a7, 4 # sizeof(unsigned int) 1003 movi a7, 4 # sizeof(unsigned int)
1002 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp 1004 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1003 1005
1004 addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1 1006 _bgeui a6, SYS_XTENSA_COUNT, .Lill
1005 _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill 1007 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP, .Lnswp
1006 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp
1007 1008
1008 /* Fall through for ATOMIC_CMP_SWP. */ 1009 /* Fall through for ATOMIC_CMP_SWP. */
1009 1010
@@ -1015,27 +1016,26 @@ TRY s32i a5, a3, 0 # different, modify value
1015 l32i a7, a2, PT_AREG7 # restore a7 1016 l32i a7, a2, PT_AREG7 # restore a7
1016 l32i a0, a2, PT_AREG0 # restore a0 1017 l32i a0, a2, PT_AREG0 # restore a0
1017 movi a2, 1 # and return 1 1018 movi a2, 1 # and return 1
1018 addi a6, a6, 1 # restore a6 (really necessary?)
1019 rfe 1019 rfe
1020 1020
10211: l32i a7, a2, PT_AREG7 # restore a7 10211: l32i a7, a2, PT_AREG7 # restore a7
1022 l32i a0, a2, PT_AREG0 # restore a0 1022 l32i a0, a2, PT_AREG0 # restore a0
1023 movi a2, 0 # return 0 (note that we cannot set 1023 movi a2, 0 # return 0 (note that we cannot set
1024 addi a6, a6, 1 # restore a6 (really necessary?)
1025 rfe 1024 rfe
1026 1025
1027.Lnswp: /* Atomic set, add, and exg_add. */ 1026.Lnswp: /* Atomic set, add, and exg_add. */
1028 1027
1029TRY l32i a7, a3, 0 # orig 1028TRY l32i a7, a3, 0 # orig
1029 addi a6, a6, -SYS_XTENSA_ATOMIC_SET
1030 add a0, a4, a7 # + arg 1030 add a0, a4, a7 # + arg
1031 moveqz a0, a4, a6 # set 1031 moveqz a0, a4, a6 # set
1032 addi a6, a6, SYS_XTENSA_ATOMIC_SET
1032TRY s32i a0, a3, 0 # write new value 1033TRY s32i a0, a3, 0 # write new value
1033 1034
1034 mov a0, a2 1035 mov a0, a2
1035 mov a2, a7 1036 mov a2, a7
1036 l32i a7, a0, PT_AREG7 # restore a7 1037 l32i a7, a0, PT_AREG7 # restore a7
1037 l32i a0, a0, PT_AREG0 # restore a0 1038 l32i a0, a0, PT_AREG0 # restore a0
1038 addi a6, a6, 1 # restore a6 (really necessary?)
1039 rfe 1039 rfe
1040 1040
1041CATCH 1041CATCH
@@ -1044,13 +1044,25 @@ CATCH
1044 movi a2, -EFAULT 1044 movi a2, -EFAULT
1045 rfe 1045 rfe
1046 1046
1047.Lill: l32i a7, a2, PT_AREG0 # restore a7 1047.Lill: l32i a7, a2, PT_AREG7 # restore a7
1048 l32i a0, a2, PT_AREG0 # restore a0 1048 l32i a0, a2, PT_AREG0 # restore a0
1049 movi a2, -EINVAL 1049 movi a2, -EINVAL
1050 rfe 1050 rfe
1051 1051
1052ENDPROC(fast_syscall_xtensa) 1052ENDPROC(fast_syscall_xtensa)
1053 1053
1054#else /* CONFIG_FAST_SYSCALL_XTENSA */
1055
1056ENTRY(fast_syscall_xtensa)
1057
1058 l32i a0, a2, PT_AREG0 # restore a0
1059 movi a2, -ENOSYS
1060 rfe
1061
1062ENDPROC(fast_syscall_xtensa)
1063
1064#endif /* CONFIG_FAST_SYSCALL_XTENSA */
1065
1054 1066
1055/* fast_syscall_spill_registers. 1067/* fast_syscall_spill_registers.
1056 * 1068 *
@@ -1066,6 +1078,8 @@ ENDPROC(fast_syscall_xtensa)
1066 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler. 1078 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1067 */ 1079 */
1068 1080
1081#ifdef CONFIG_FAST_SYSCALL_SPILL_REGISTERS
1082
1069ENTRY(fast_syscall_spill_registers) 1083ENTRY(fast_syscall_spill_registers)
1070 1084
1071 /* Register a FIXUP handler (pass current wb as a parameter) */ 1085 /* Register a FIXUP handler (pass current wb as a parameter) */
@@ -1400,6 +1414,18 @@ ENTRY(fast_syscall_spill_registers_fixup_return)
1400 1414
1401ENDPROC(fast_syscall_spill_registers_fixup_return) 1415ENDPROC(fast_syscall_spill_registers_fixup_return)
1402 1416
1417#else /* CONFIG_FAST_SYSCALL_SPILL_REGISTERS */
1418
1419ENTRY(fast_syscall_spill_registers)
1420
1421 l32i a0, a2, PT_AREG0 # restore a0
1422 movi a2, -ENOSYS
1423 rfe
1424
1425ENDPROC(fast_syscall_spill_registers)
1426
1427#endif /* CONFIG_FAST_SYSCALL_SPILL_REGISTERS */
1428
1403#ifdef CONFIG_MMU 1429#ifdef CONFIG_MMU
1404/* 1430/*
1405 * We should never get here. Bail out! 1431 * We should never get here. Bail out!
@@ -1565,7 +1591,7 @@ ENTRY(fast_second_level_miss)
1565 rsr a0, excvaddr 1591 rsr a0, excvaddr
1566 bltu a0, a3, 2f 1592 bltu a0, a3, 2f
1567 1593
1568 addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT)) 1594 addi a1, a0, -TLBTEMP_SIZE
1569 bgeu a1, a3, 2f 1595 bgeu a1, a3, 2f
1570 1596
1571 /* Check if we have to restore an ITLB mapping. */ 1597 /* Check if we have to restore an ITLB mapping. */
@@ -1820,7 +1846,6 @@ ENTRY(_switch_to)
1820 1846
1821 entry a1, 16 1847 entry a1, 16
1822 1848
1823 mov a10, a2 # preserve 'prev' (a2)
1824 mov a11, a3 # and 'next' (a3) 1849 mov a11, a3 # and 'next' (a3)
1825 1850
1826 l32i a4, a2, TASK_THREAD_INFO 1851 l32i a4, a2, TASK_THREAD_INFO
@@ -1828,8 +1853,14 @@ ENTRY(_switch_to)
1828 1853
1829 save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER 1854 save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1830 1855
1831 s32i a0, a10, THREAD_RA # save return address 1856#if THREAD_RA > 1020 || THREAD_SP > 1020
1832 s32i a1, a10, THREAD_SP # save stack pointer 1857 addi a10, a2, TASK_THREAD
1858 s32i a0, a10, THREAD_RA - TASK_THREAD # save return address
1859 s32i a1, a10, THREAD_SP - TASK_THREAD # save stack pointer
1860#else
1861 s32i a0, a2, THREAD_RA # save return address
1862 s32i a1, a2, THREAD_SP # save stack pointer
1863#endif
1833 1864
1834 /* Disable ints while we manipulate the stack pointer. */ 1865 /* Disable ints while we manipulate the stack pointer. */
1835 1866
@@ -1870,7 +1901,6 @@ ENTRY(_switch_to)
1870 load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER 1901 load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1871 1902
1872 wsr a14, ps 1903 wsr a14, ps
1873 mov a2, a10 # return 'prev'
1874 rsync 1904 rsync
1875 1905
1876 retw 1906 retw
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 2d9cc6dbfd78..e8b76b8e4b29 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -49,9 +49,8 @@ dma_alloc_coherent(struct device *dev,size_t size,dma_addr_t *handle,gfp_t flag)
49 49
50 /* We currently don't support coherent memory outside KSEG */ 50 /* We currently don't support coherent memory outside KSEG */
51 51
52 if (ret < XCHAL_KSEG_CACHED_VADDR 52 BUG_ON(ret < XCHAL_KSEG_CACHED_VADDR ||
53 || ret >= XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE) 53 ret > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
54 BUG();
55 54
56 55
57 if (ret != 0) { 56 if (ret != 0) {
@@ -68,10 +67,11 @@ EXPORT_SYMBOL(dma_alloc_coherent);
68void dma_free_coherent(struct device *hwdev, size_t size, 67void dma_free_coherent(struct device *hwdev, size_t size,
69 void *vaddr, dma_addr_t dma_handle) 68 void *vaddr, dma_addr_t dma_handle)
70{ 69{
71 long addr=(long)vaddr+XCHAL_KSEG_CACHED_VADDR-XCHAL_KSEG_BYPASS_VADDR; 70 unsigned long addr = (unsigned long)vaddr +
71 XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR;
72 72
73 if (addr < 0 || addr >= XCHAL_KSEG_SIZE) 73 BUG_ON(addr < XCHAL_KSEG_CACHED_VADDR ||
74 BUG(); 74 addr > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
75 75
76 free_pages(addr, get_order(size)); 76 free_pages(addr, get_order(size));
77} 77}
diff --git a/arch/xtensa/kernel/smp.c b/arch/xtensa/kernel/smp.c
index 40b5a3771fb0..4d02e38514f5 100644
--- a/arch/xtensa/kernel/smp.c
+++ b/arch/xtensa/kernel/smp.c
@@ -571,6 +571,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
571 }; 571 };
572 on_each_cpu(ipi_flush_icache_range, &fd, 1); 572 on_each_cpu(ipi_flush_icache_range, &fd, 1);
573} 573}
574EXPORT_SYMBOL(flush_icache_range);
574 575
575/* ------------------------------------------------------------------------- */ 576/* ------------------------------------------------------------------------- */
576 577
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index eebbfd8c26fc..9d2f45f010ef 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -101,9 +101,8 @@ static dispatch_init_table_t __initdata dispatch_init_table[] = {
101#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION 101#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
102#ifdef CONFIG_XTENSA_UNALIGNED_USER 102#ifdef CONFIG_XTENSA_UNALIGNED_USER
103{ EXCCAUSE_UNALIGNED, USER, fast_unaligned }, 103{ EXCCAUSE_UNALIGNED, USER, fast_unaligned },
104#else
105{ EXCCAUSE_UNALIGNED, 0, do_unaligned_user },
106#endif 104#endif
105{ EXCCAUSE_UNALIGNED, 0, do_unaligned_user },
107{ EXCCAUSE_UNALIGNED, KRNL, fast_unaligned }, 106{ EXCCAUSE_UNALIGNED, KRNL, fast_unaligned },
108#endif 107#endif
109#ifdef CONFIG_MMU 108#ifdef CONFIG_MMU
@@ -264,7 +263,6 @@ do_illegal_instruction(struct pt_regs *regs)
264 */ 263 */
265 264
266#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION 265#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
267#ifndef CONFIG_XTENSA_UNALIGNED_USER
268void 266void
269do_unaligned_user (struct pt_regs *regs) 267do_unaligned_user (struct pt_regs *regs)
270{ 268{
@@ -286,7 +284,6 @@ do_unaligned_user (struct pt_regs *regs)
286 284
287} 285}
288#endif 286#endif
289#endif
290 287
291void 288void
292do_debug(struct pt_regs *regs) 289do_debug(struct pt_regs *regs)
diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S
index 8453e6e39895..1b397a902292 100644
--- a/arch/xtensa/kernel/vectors.S
+++ b/arch/xtensa/kernel/vectors.S
@@ -454,8 +454,14 @@ _DoubleExceptionVector_WindowOverflow:
454 s32i a0, a2, PT_DEPC 454 s32i a0, a2, PT_DEPC
455 455
456_DoubleExceptionVector_handle_exception: 456_DoubleExceptionVector_handle_exception:
457 addi a0, a0, -EXCCAUSE_UNALIGNED
458 beqz a0, 2f
457 addx4 a0, a0, a3 459 addx4 a0, a0, a3
458 l32i a0, a0, EXC_TABLE_FAST_USER 460 l32i a0, a0, EXC_TABLE_FAST_USER + 4 * EXCCAUSE_UNALIGNED
461 xsr a3, excsave1
462 jx a0
4632:
464 movi a0, user_exception
459 xsr a3, excsave1 465 xsr a3, excsave1
460 jx a0 466 jx a0
461 467
diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S
index d16db6df86f8..fc1bc2ba8d5d 100644
--- a/arch/xtensa/kernel/vmlinux.lds.S
+++ b/arch/xtensa/kernel/vmlinux.lds.S
@@ -269,13 +269,13 @@ SECTIONS
269 .UserExceptionVector.literal) 269 .UserExceptionVector.literal)
270 SECTION_VECTOR (_DoubleExceptionVector_literal, 270 SECTION_VECTOR (_DoubleExceptionVector_literal,
271 .DoubleExceptionVector.literal, 271 .DoubleExceptionVector.literal,
272 DOUBLEEXC_VECTOR_VADDR - 40, 272 DOUBLEEXC_VECTOR_VADDR - 48,
273 SIZEOF(.UserExceptionVector.text), 273 SIZEOF(.UserExceptionVector.text),
274 .UserExceptionVector.text) 274 .UserExceptionVector.text)
275 SECTION_VECTOR (_DoubleExceptionVector_text, 275 SECTION_VECTOR (_DoubleExceptionVector_text,
276 .DoubleExceptionVector.text, 276 .DoubleExceptionVector.text,
277 DOUBLEEXC_VECTOR_VADDR, 277 DOUBLEEXC_VECTOR_VADDR,
278 40, 278 48,
279 .DoubleExceptionVector.literal) 279 .DoubleExceptionVector.literal)
280 280
281 . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3; 281 . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
diff --git a/arch/xtensa/mm/cache.c b/arch/xtensa/mm/cache.c
index 63cbb867dadd..d75aa1476da7 100644
--- a/arch/xtensa/mm/cache.c
+++ b/arch/xtensa/mm/cache.c
@@ -59,9 +59,68 @@
59 * 59 *
60 */ 60 */
61 61
62#if (DCACHE_WAY_SIZE > PAGE_SIZE) && defined(CONFIG_HIGHMEM) 62#if (DCACHE_WAY_SIZE > PAGE_SIZE)
63#error "HIGHMEM is not supported on cores with aliasing cache." 63static inline void kmap_invalidate_coherent(struct page *page,
64#endif 64 unsigned long vaddr)
65{
66 if (!DCACHE_ALIAS_EQ(page_to_phys(page), vaddr)) {
67 unsigned long kvaddr;
68
69 if (!PageHighMem(page)) {
70 kvaddr = (unsigned long)page_to_virt(page);
71
72 __invalidate_dcache_page(kvaddr);
73 } else {
74 kvaddr = TLBTEMP_BASE_1 +
75 (page_to_phys(page) & DCACHE_ALIAS_MASK);
76
77 __invalidate_dcache_page_alias(kvaddr,
78 page_to_phys(page));
79 }
80 }
81}
82
83static inline void *coherent_kvaddr(struct page *page, unsigned long base,
84 unsigned long vaddr, unsigned long *paddr)
85{
86 if (PageHighMem(page) || !DCACHE_ALIAS_EQ(page_to_phys(page), vaddr)) {
87 *paddr = page_to_phys(page);
88 return (void *)(base + (vaddr & DCACHE_ALIAS_MASK));
89 } else {
90 *paddr = 0;
91 return page_to_virt(page);
92 }
93}
94
95void clear_user_highpage(struct page *page, unsigned long vaddr)
96{
97 unsigned long paddr;
98 void *kvaddr = coherent_kvaddr(page, TLBTEMP_BASE_1, vaddr, &paddr);
99
100 pagefault_disable();
101 kmap_invalidate_coherent(page, vaddr);
102 set_bit(PG_arch_1, &page->flags);
103 clear_page_alias(kvaddr, paddr);
104 pagefault_enable();
105}
106
107void copy_user_highpage(struct page *dst, struct page *src,
108 unsigned long vaddr, struct vm_area_struct *vma)
109{
110 unsigned long dst_paddr, src_paddr;
111 void *dst_vaddr = coherent_kvaddr(dst, TLBTEMP_BASE_1, vaddr,
112 &dst_paddr);
113 void *src_vaddr = coherent_kvaddr(src, TLBTEMP_BASE_2, vaddr,
114 &src_paddr);
115
116 pagefault_disable();
117 kmap_invalidate_coherent(dst, vaddr);
118 set_bit(PG_arch_1, &dst->flags);
119 copy_page_alias(dst_vaddr, src_vaddr, dst_paddr, src_paddr);
120 pagefault_enable();
121}
122
123#endif /* DCACHE_WAY_SIZE > PAGE_SIZE */
65 124
66#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK 125#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
67 126
@@ -103,7 +162,8 @@ void flush_dcache_page(struct page *page)
103 if (!alias && !mapping) 162 if (!alias && !mapping)
104 return; 163 return;
105 164
106 __flush_invalidate_dcache_page((long)page_address(page)); 165 virt = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK);
166 __flush_invalidate_dcache_page_alias(virt, phys);
107 167
108 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK); 168 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK);
109 169
@@ -168,13 +228,12 @@ update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)
168#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK 228#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
169 229
170 if (!PageReserved(page) && test_bit(PG_arch_1, &page->flags)) { 230 if (!PageReserved(page) && test_bit(PG_arch_1, &page->flags)) {
171
172 unsigned long paddr = (unsigned long) page_address(page);
173 unsigned long phys = page_to_phys(page); 231 unsigned long phys = page_to_phys(page);
174 unsigned long tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK); 232 unsigned long tmp;
175
176 __flush_invalidate_dcache_page(paddr);
177 233
234 tmp = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK);
235 __flush_invalidate_dcache_page_alias(tmp, phys);
236 tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK);
178 __flush_invalidate_dcache_page_alias(tmp, phys); 237 __flush_invalidate_dcache_page_alias(tmp, phys);
179 __invalidate_icache_page_alias(tmp, phys); 238 __invalidate_icache_page_alias(tmp, phys);
180 239
diff --git a/arch/xtensa/mm/highmem.c b/arch/xtensa/mm/highmem.c
index 17a8c0d6fd17..8cfb71ec0937 100644
--- a/arch/xtensa/mm/highmem.c
+++ b/arch/xtensa/mm/highmem.c
@@ -14,23 +14,45 @@
14 14
15static pte_t *kmap_pte; 15static pte_t *kmap_pte;
16 16
17#if DCACHE_WAY_SIZE > PAGE_SIZE
18unsigned int last_pkmap_nr_arr[DCACHE_N_COLORS];
19wait_queue_head_t pkmap_map_wait_arr[DCACHE_N_COLORS];
20
21static void __init kmap_waitqueues_init(void)
22{
23 unsigned int i;
24
25 for (i = 0; i < ARRAY_SIZE(pkmap_map_wait_arr); ++i)
26 init_waitqueue_head(pkmap_map_wait_arr + i);
27}
28#else
29static inline void kmap_waitqueues_init(void)
30{
31}
32#endif
33
34static inline enum fixed_addresses kmap_idx(int type, unsigned long color)
35{
36 return (type + KM_TYPE_NR * smp_processor_id()) * DCACHE_N_COLORS +
37 color;
38}
39
17void *kmap_atomic(struct page *page) 40void *kmap_atomic(struct page *page)
18{ 41{
19 enum fixed_addresses idx; 42 enum fixed_addresses idx;
20 unsigned long vaddr; 43 unsigned long vaddr;
21 int type;
22 44
23 pagefault_disable(); 45 pagefault_disable();
24 if (!PageHighMem(page)) 46 if (!PageHighMem(page))
25 return page_address(page); 47 return page_address(page);
26 48
27 type = kmap_atomic_idx_push(); 49 idx = kmap_idx(kmap_atomic_idx_push(),
28 idx = type + KM_TYPE_NR * smp_processor_id(); 50 DCACHE_ALIAS(page_to_phys(page)));
29 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); 51 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
30#ifdef CONFIG_DEBUG_HIGHMEM 52#ifdef CONFIG_DEBUG_HIGHMEM
31 BUG_ON(!pte_none(*(kmap_pte - idx))); 53 BUG_ON(!pte_none(*(kmap_pte + idx)));
32#endif 54#endif
33 set_pte(kmap_pte - idx, mk_pte(page, PAGE_KERNEL_EXEC)); 55 set_pte(kmap_pte + idx, mk_pte(page, PAGE_KERNEL_EXEC));
34 56
35 return (void *)vaddr; 57 return (void *)vaddr;
36} 58}
@@ -38,12 +60,10 @@ EXPORT_SYMBOL(kmap_atomic);
38 60
39void __kunmap_atomic(void *kvaddr) 61void __kunmap_atomic(void *kvaddr)
40{ 62{
41 int idx, type;
42
43 if (kvaddr >= (void *)FIXADDR_START && 63 if (kvaddr >= (void *)FIXADDR_START &&
44 kvaddr < (void *)FIXADDR_TOP) { 64 kvaddr < (void *)FIXADDR_TOP) {
45 type = kmap_atomic_idx(); 65 int idx = kmap_idx(kmap_atomic_idx(),
46 idx = type + KM_TYPE_NR * smp_processor_id(); 66 DCACHE_ALIAS((unsigned long)kvaddr));
47 67
48 /* 68 /*
49 * Force other mappings to Oops if they'll try to access this 69 * Force other mappings to Oops if they'll try to access this
@@ -51,7 +71,7 @@ void __kunmap_atomic(void *kvaddr)
51 * is a bad idea also, in case the page changes cacheability 71 * is a bad idea also, in case the page changes cacheability
52 * attributes or becomes a protected page in a hypervisor. 72 * attributes or becomes a protected page in a hypervisor.
53 */ 73 */
54 pte_clear(&init_mm, kvaddr, kmap_pte - idx); 74 pte_clear(&init_mm, kvaddr, kmap_pte + idx);
55 local_flush_tlb_kernel_range((unsigned long)kvaddr, 75 local_flush_tlb_kernel_range((unsigned long)kvaddr,
56 (unsigned long)kvaddr + PAGE_SIZE); 76 (unsigned long)kvaddr + PAGE_SIZE);
57 77
@@ -69,4 +89,5 @@ void __init kmap_init(void)
69 /* cache the first kmap pte */ 89 /* cache the first kmap pte */
70 kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); 90 kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
71 kmap_pte = kmap_get_fixmap_pte(kmap_vstart); 91 kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
92 kmap_waitqueues_init();
72} 93}
diff --git a/arch/xtensa/mm/misc.S b/arch/xtensa/mm/misc.S
index 1f68558dbcc2..11a01c3e9cea 100644
--- a/arch/xtensa/mm/misc.S
+++ b/arch/xtensa/mm/misc.S
@@ -110,41 +110,24 @@ ENTRY(__tlbtemp_mapping_start)
110#if (DCACHE_WAY_SIZE > PAGE_SIZE) 110#if (DCACHE_WAY_SIZE > PAGE_SIZE)
111 111
112/* 112/*
113 * clear_user_page (void *addr, unsigned long vaddr, struct page *page) 113 * clear_page_alias(void *addr, unsigned long paddr)
114 * a2 a3 a4 114 * a2 a3
115 */ 115 */
116 116
117ENTRY(clear_user_page) 117ENTRY(clear_page_alias)
118 118
119 entry a1, 32 119 entry a1, 32
120 120
121 /* Mark page dirty and determine alias. */ 121 /* Skip setting up a temporary DTLB if not aliased low page. */
122 122
123 movi a7, (1 << PG_ARCH_1) 123 movi a5, PAGE_OFFSET
124 l32i a5, a4, PAGE_FLAGS 124 movi a6, 0
125 xor a6, a2, a3 125 beqz a3, 1f
126 extui a3, a3, PAGE_SHIFT, DCACHE_ALIAS_ORDER
127 extui a6, a6, PAGE_SHIFT, DCACHE_ALIAS_ORDER
128 or a5, a5, a7
129 slli a3, a3, PAGE_SHIFT
130 s32i a5, a4, PAGE_FLAGS
131 126
132 /* Skip setting up a temporary DTLB if not aliased. */ 127 /* Setup a temporary DTLB for the addr. */
133
134 beqz a6, 1f
135
136 /* Invalidate kernel page. */
137
138 mov a10, a2
139 call8 __invalidate_dcache_page
140
141 /* Setup a temporary DTLB with the color of the VPN */
142
143 movi a4, ((PAGE_KERNEL | _PAGE_HW_WRITE) - PAGE_OFFSET) & 0xffffffff
144 movi a5, TLBTEMP_BASE_1 # virt
145 add a6, a2, a4 # ppn
146 add a2, a5, a3 # add 'color'
147 128
129 addi a6, a3, (PAGE_KERNEL | _PAGE_HW_WRITE)
130 mov a4, a2
148 wdtlb a6, a2 131 wdtlb a6, a2
149 dsync 132 dsync
150 133
@@ -165,62 +148,43 @@ ENTRY(clear_user_page)
165 148
166 /* We need to invalidate the temporary idtlb entry, if any. */ 149 /* We need to invalidate the temporary idtlb entry, if any. */
167 150
1681: addi a2, a2, -PAGE_SIZE 1511: idtlb a4
169 idtlb a2
170 dsync 152 dsync
171 153
172 retw 154 retw
173 155
174ENDPROC(clear_user_page) 156ENDPROC(clear_page_alias)
175 157
176/* 158/*
177 * copy_page_user (void *to, void *from, unsigned long vaddr, struct page *page) 159 * copy_page_alias(void *to, void *from,
178 * a2 a3 a4 a5 160 * a2 a3
161 * unsigned long to_paddr, unsigned long from_paddr)
162 * a4 a5
179 */ 163 */
180 164
181ENTRY(copy_user_page) 165ENTRY(copy_page_alias)
182 166
183 entry a1, 32 167 entry a1, 32
184 168
185 /* Mark page dirty and determine alias for destination. */ 169 /* Skip setting up a temporary DTLB for destination if not aliased. */
186
187 movi a8, (1 << PG_ARCH_1)
188 l32i a9, a5, PAGE_FLAGS
189 xor a6, a2, a4
190 xor a7, a3, a4
191 extui a4, a4, PAGE_SHIFT, DCACHE_ALIAS_ORDER
192 extui a6, a6, PAGE_SHIFT, DCACHE_ALIAS_ORDER
193 extui a7, a7, PAGE_SHIFT, DCACHE_ALIAS_ORDER
194 or a9, a9, a8
195 slli a4, a4, PAGE_SHIFT
196 s32i a9, a5, PAGE_FLAGS
197 movi a5, ((PAGE_KERNEL | _PAGE_HW_WRITE) - PAGE_OFFSET) & 0xffffffff
198
199 beqz a6, 1f
200
201 /* Invalidate dcache */
202
203 mov a10, a2
204 call8 __invalidate_dcache_page
205 170
206 /* Setup a temporary DTLB with a matching color. */ 171 movi a6, 0
172 movi a7, 0
173 beqz a4, 1f
207 174
208 movi a8, TLBTEMP_BASE_1 # base 175 /* Setup a temporary DTLB for destination. */
209 add a6, a2, a5 # ppn
210 add a2, a8, a4 # add 'color'
211 176
177 addi a6, a4, (PAGE_KERNEL | _PAGE_HW_WRITE)
212 wdtlb a6, a2 178 wdtlb a6, a2
213 dsync 179 dsync
214 180
215 /* Skip setting up a temporary DTLB for destination if not aliased. */ 181 /* Skip setting up a temporary DTLB for source if not aliased. */
216 182
2171: beqz a7, 1f 1831: beqz a5, 1f
218 184
219 /* Setup a temporary DTLB with a matching color. */ 185 /* Setup a temporary DTLB for source. */
220 186
221 movi a8, TLBTEMP_BASE_2 # base 187 addi a7, a5, PAGE_KERNEL
222 add a7, a3, a5 # ppn
223 add a3, a8, a4
224 addi a8, a3, 1 # way1 188 addi a8, a3, 1 # way1
225 189
226 wdtlb a7, a8 190 wdtlb a7, a8
@@ -271,7 +235,7 @@ ENTRY(copy_user_page)
271 235
272 retw 236 retw
273 237
274ENDPROC(copy_user_page) 238ENDPROC(copy_page_alias)
275 239
276#endif 240#endif
277 241
@@ -300,6 +264,30 @@ ENTRY(__flush_invalidate_dcache_page_alias)
300 retw 264 retw
301 265
302ENDPROC(__flush_invalidate_dcache_page_alias) 266ENDPROC(__flush_invalidate_dcache_page_alias)
267
268/*
269 * void __invalidate_dcache_page_alias (addr, phys)
270 * a2 a3
271 */
272
273ENTRY(__invalidate_dcache_page_alias)
274
275 entry sp, 16
276
277 movi a7, 0 # required for exception handler
278 addi a6, a3, (PAGE_KERNEL | _PAGE_HW_WRITE)
279 mov a4, a2
280 wdtlb a6, a2
281 dsync
282
283 ___invalidate_dcache_page a2 a3
284
285 idtlb a4
286 dsync
287
288 retw
289
290ENDPROC(__invalidate_dcache_page_alias)
303#endif 291#endif
304 292
305ENTRY(__tlbtemp_mapping_itlb) 293ENTRY(__tlbtemp_mapping_itlb)
diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c
index 3429b483d9f8..abe4513eb0dd 100644
--- a/arch/xtensa/mm/mmu.c
+++ b/arch/xtensa/mm/mmu.c
@@ -18,32 +18,38 @@
18#include <asm/io.h> 18#include <asm/io.h>
19 19
20#if defined(CONFIG_HIGHMEM) 20#if defined(CONFIG_HIGHMEM)
21static void * __init init_pmd(unsigned long vaddr) 21static void * __init init_pmd(unsigned long vaddr, unsigned long n_pages)
22{ 22{
23 pgd_t *pgd = pgd_offset_k(vaddr); 23 pgd_t *pgd = pgd_offset_k(vaddr);
24 pmd_t *pmd = pmd_offset(pgd, vaddr); 24 pmd_t *pmd = pmd_offset(pgd, vaddr);
25 pte_t *pte;
26 unsigned long i;
25 27
26 if (pmd_none(*pmd)) { 28 n_pages = ALIGN(n_pages, PTRS_PER_PTE);
27 unsigned i;
28 pte_t *pte = alloc_bootmem_low_pages(PAGE_SIZE);
29 29
30 for (i = 0; i < 1024; i++) 30 pr_debug("%s: vaddr: 0x%08lx, n_pages: %ld\n",
31 pte_clear(NULL, 0, pte + i); 31 __func__, vaddr, n_pages);
32 32
33 set_pmd(pmd, __pmd(((unsigned long)pte) & PAGE_MASK)); 33 pte = alloc_bootmem_low_pages(n_pages * sizeof(pte_t));
34 BUG_ON(pte != pte_offset_kernel(pmd, 0)); 34
35 pr_debug("%s: vaddr: 0x%08lx, pmd: 0x%p, pte: 0x%p\n", 35 for (i = 0; i < n_pages; ++i)
36 __func__, vaddr, pmd, pte); 36 pte_clear(NULL, 0, pte + i);
37 return pte; 37
38 } else { 38 for (i = 0; i < n_pages; i += PTRS_PER_PTE, ++pmd) {
39 return pte_offset_kernel(pmd, 0); 39 pte_t *cur_pte = pte + i;
40
41 BUG_ON(!pmd_none(*pmd));
42 set_pmd(pmd, __pmd(((unsigned long)cur_pte) & PAGE_MASK));
43 BUG_ON(cur_pte != pte_offset_kernel(pmd, 0));
44 pr_debug("%s: pmd: 0x%p, pte: 0x%p\n",
45 __func__, pmd, cur_pte);
40 } 46 }
47 return pte;
41} 48}
42 49
43static void __init fixedrange_init(void) 50static void __init fixedrange_init(void)
44{ 51{
45 BUILD_BUG_ON(FIXADDR_SIZE > PMD_SIZE); 52 init_pmd(__fix_to_virt(0), __end_of_fixed_addresses);
46 init_pmd(__fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK);
47} 53}
48#endif 54#endif
49 55
@@ -52,7 +58,7 @@ void __init paging_init(void)
52 memset(swapper_pg_dir, 0, PAGE_SIZE); 58 memset(swapper_pg_dir, 0, PAGE_SIZE);
53#ifdef CONFIG_HIGHMEM 59#ifdef CONFIG_HIGHMEM
54 fixedrange_init(); 60 fixedrange_init();
55 pkmap_page_table = init_pmd(PKMAP_BASE); 61 pkmap_page_table = init_pmd(PKMAP_BASE, LAST_PKMAP);
56 kmap_init(); 62 kmap_init();
57#endif 63#endif
58} 64}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-17 12:05:22 -0500