diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2012-08-23 09:35:26 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-08-23 09:44:47 -0400 |
commit | a1dca315ce3f78347bca8ce8befe3cc71ae63b7e (patch) | |
tree | d86f7a45cb7c631e0e2c295e3f70d1bed1d849f7 /arch | |
parent | 16cc2cf642eb73978a3ebde66dc94d24d46b4798 (diff) |
MIPS: pci-ar724x: avoid data bus error due to a missing PCIe module
If the controller has no PCIe module attached, accessing of the device
configuration space causes a data bus error. Avoid this by checking the
status of the PCIe link in advance, and indicate an error if the link
is down.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4293/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/pci/pci-ar724x.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c index 414a7459858d..86d77a666458 100644 --- a/arch/mips/pci/pci-ar724x.c +++ b/arch/mips/pci/pci-ar724x.c | |||
@@ -23,9 +23,12 @@ | |||
23 | #define AR724X_PCI_MEM_BASE 0x10000000 | 23 | #define AR724X_PCI_MEM_BASE 0x10000000 |
24 | #define AR724X_PCI_MEM_SIZE 0x08000000 | 24 | #define AR724X_PCI_MEM_SIZE 0x08000000 |
25 | 25 | ||
26 | #define AR724X_PCI_REG_RESET 0x18 | ||
26 | #define AR724X_PCI_REG_INT_STATUS 0x4c | 27 | #define AR724X_PCI_REG_INT_STATUS 0x4c |
27 | #define AR724X_PCI_REG_INT_MASK 0x50 | 28 | #define AR724X_PCI_REG_INT_MASK 0x50 |
28 | 29 | ||
30 | #define AR724X_PCI_RESET_LINK_UP BIT(0) | ||
31 | |||
29 | #define AR724X_PCI_INT_DEV0 BIT(14) | 32 | #define AR724X_PCI_INT_DEV0 BIT(14) |
30 | 33 | ||
31 | #define AR724X_PCI_IRQ_COUNT 1 | 34 | #define AR724X_PCI_IRQ_COUNT 1 |
@@ -38,6 +41,15 @@ static void __iomem *ar724x_pci_ctrl_base; | |||
38 | 41 | ||
39 | static u32 ar724x_pci_bar0_value; | 42 | static u32 ar724x_pci_bar0_value; |
40 | static bool ar724x_pci_bar0_is_cached; | 43 | static bool ar724x_pci_bar0_is_cached; |
44 | static bool ar724x_pci_link_up; | ||
45 | |||
46 | static inline bool ar724x_pci_check_link(void) | ||
47 | { | ||
48 | u32 reset; | ||
49 | |||
50 | reset = __raw_readl(ar724x_pci_ctrl_base + AR724X_PCI_REG_RESET); | ||
51 | return reset & AR724X_PCI_RESET_LINK_UP; | ||
52 | } | ||
41 | 53 | ||
42 | static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, | 54 | static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, |
43 | int size, uint32_t *value) | 55 | int size, uint32_t *value) |
@@ -46,6 +58,9 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, | |||
46 | void __iomem *base; | 58 | void __iomem *base; |
47 | u32 data; | 59 | u32 data; |
48 | 60 | ||
61 | if (!ar724x_pci_link_up) | ||
62 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
63 | |||
49 | if (devfn) | 64 | if (devfn) |
50 | return PCIBIOS_DEVICE_NOT_FOUND; | 65 | return PCIBIOS_DEVICE_NOT_FOUND; |
51 | 66 | ||
@@ -96,6 +111,9 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, | |||
96 | u32 data; | 111 | u32 data; |
97 | int s; | 112 | int s; |
98 | 113 | ||
114 | if (!ar724x_pci_link_up) | ||
115 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
116 | |||
99 | if (devfn) | 117 | if (devfn) |
100 | return PCIBIOS_DEVICE_NOT_FOUND; | 118 | return PCIBIOS_DEVICE_NOT_FOUND; |
101 | 119 | ||
@@ -280,6 +298,10 @@ int __init ar724x_pcibios_init(int irq) | |||
280 | if (ar724x_pci_ctrl_base == NULL) | 298 | if (ar724x_pci_ctrl_base == NULL) |
281 | goto err_unmap_devcfg; | 299 | goto err_unmap_devcfg; |
282 | 300 | ||
301 | ar724x_pci_link_up = ar724x_pci_check_link(); | ||
302 | if (!ar724x_pci_link_up) | ||
303 | pr_warn("ar724x: PCIe link is down\n"); | ||
304 | |||
283 | ar724x_pci_irq_init(irq); | 305 | ar724x_pci_irq_init(irq); |
284 | register_pci_controller(&ar724x_pci_controller); | 306 | register_pci_controller(&ar724x_pci_controller); |
285 | 307 | ||