diff options
author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2011-04-06 13:29:24 -0400 |
---|---|---|
committer | Sekhar Nori <nsekhar@ti.com> | 2011-05-06 02:40:54 -0400 |
commit | 8ac764e3479f6057c1cc85bd960dd2aa0fb82fea (patch) | |
tree | 024c30e3a6025d4532a8b3ed48aee11d89ffb46b /arch | |
parent | e0c199d0989e2f9fa2683e817624779f55abfa7f (diff) |
DA8xx: move base address #define's to their proper place
Move DA8XX_MMCSD0_BASE, DA8XX_LCD_CNTRL_BASE, and DA8XX_DDR2_CTL_BASE from
<mach/da8xx.h> to devices-da8xx.c as the latter file is the only place where
these macros are used.
While at it, restore sorting the base address macros by address value in
devices-da8xx.c...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-davinci/devices-da8xx.c | 15 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/da8xx.h | 3 |
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index feffafa121e4..4e66881c7aee 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -24,22 +24,25 @@ | |||
24 | #include "clock.h" | 24 | #include "clock.h" |
25 | 25 | ||
26 | #define DA8XX_TPCC_BASE 0x01c00000 | 26 | #define DA8XX_TPCC_BASE 0x01c00000 |
27 | #define DA850_MMCSD1_BASE 0x01e1b000 | ||
28 | #define DA850_TPCC1_BASE 0x01e30000 | ||
29 | #define DA8XX_TPTC0_BASE 0x01c08000 | 27 | #define DA8XX_TPTC0_BASE 0x01c08000 |
30 | #define DA8XX_TPTC1_BASE 0x01c08400 | 28 | #define DA8XX_TPTC1_BASE 0x01c08400 |
31 | #define DA850_TPTC2_BASE 0x01e38000 | ||
32 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ | 29 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ |
33 | #define DA8XX_I2C0_BASE 0x01c22000 | 30 | #define DA8XX_I2C0_BASE 0x01c22000 |
34 | #define DA8XX_RTC_BASE 0x01C23000 | 31 | #define DA8XX_RTC_BASE 0x01c23000 |
32 | #define DA8XX_MMCSD0_BASE 0x01c40000 | ||
33 | #define DA8XX_SPI0_BASE 0x01c41000 | ||
34 | #define DA830_SPI1_BASE 0x01e12000 | ||
35 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 | ||
36 | #define DA850_MMCSD1_BASE 0x01e1b000 | ||
35 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 | 37 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 |
36 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 | 38 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 |
37 | #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 | 39 | #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 |
38 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 | 40 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 |
39 | #define DA8XX_I2C1_BASE 0x01e28000 | 41 | #define DA8XX_I2C1_BASE 0x01e28000 |
40 | #define DA8XX_SPI0_BASE 0x01c41000 | 42 | #define DA850_TPCC1_BASE 0x01e30000 |
41 | #define DA830_SPI1_BASE 0x01e12000 | 43 | #define DA850_TPTC2_BASE 0x01e38000 |
42 | #define DA850_SPI1_BASE 0x01f0e000 | 44 | #define DA850_SPI1_BASE 0x01f0e000 |
45 | #define DA8XX_DDR2_CTL_BASE 0xb0000000 | ||
43 | 46 | ||
44 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 | 47 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 |
45 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 | 48 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 |
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 2897014a7e58..ad64da713fc8 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
@@ -64,12 +64,9 @@ extern unsigned int da850_max_speed; | |||
64 | #define DA8XX_TIMER64P1_BASE 0x01c21000 | 64 | #define DA8XX_TIMER64P1_BASE 0x01c21000 |
65 | #define DA8XX_GPIO_BASE 0x01e26000 | 65 | #define DA8XX_GPIO_BASE 0x01e26000 |
66 | #define DA8XX_PSC1_BASE 0x01e27000 | 66 | #define DA8XX_PSC1_BASE 0x01e27000 |
67 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 | ||
68 | #define DA8XX_MMCSD0_BASE 0x01c40000 | ||
69 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 | 67 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 |
70 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 | 68 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 |
71 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 | 69 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 |
72 | #define DA8XX_DDR2_CTL_BASE 0xb0000000 | ||
73 | #define DA8XX_ARM_RAM_BASE 0xffff0000 | 70 | #define DA8XX_ARM_RAM_BASE 0xffff0000 |
74 | 71 | ||
75 | void __init da830_init(void); | 72 | void __init da830_init(void); |