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authorKevin Hilman <khilman@ti.com>2011-03-28 14:57:18 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 15:02:07 -0400
commit842ec22852cf843558828e6f7a6da2bf72f341a5 (patch)
tree4f9c5792b6694452bbc7ba8e89da9ae68ccb7c17 /arch
parent58aaa599a97308c0f4a68ef07039157807fa8324 (diff)
OMAP3+ VP: replace transaction done check/clear with VP ops
Replace the VP tranxdone check/clear with helper functions from the PRM layer. In the process, remove prm_irqst_* voltage structure fields for IRQ status checking which are no longer needed. Since these reads/writes of the IRQ status bits were the only PRM accesses that were not to VC/VP registers, this allows the rest of the register accesses in the VC/VP code to use VC/VP specific register access functions (done in the following patch.) Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/voltage.h3
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c4
-rw-r--r--arch/arm/mach-omap2/voltagedomains44xx_data.c6
-rw-r--r--arch/arm/mach-omap2/vp.c16
4 files changed, 5 insertions, 24 deletions
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 5ca30fca114d..04e06266dbd7 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -133,7 +133,6 @@ struct omap_volt_pmic_info {
133 * @vfsm : voltage manager FSM data 133 * @vfsm : voltage manager FSM data
134 * @debug_dir : debug directory for this voltage domain. 134 * @debug_dir : debug directory for this voltage domain.
135 * @curr_volt : current voltage for this vdd. 135 * @curr_volt : current voltage for this vdd.
136 * @prm_irqst_mod : PRM module id used for PRM IRQ status register access
137 * @vp_enabled : flag to keep track of whether vp is enabled or not 136 * @vp_enabled : flag to keep track of whether vp is enabled or not
138 * @volt_scale : API to scale the voltage of the vdd. 137 * @volt_scale : API to scale the voltage of the vdd.
139 */ 138 */
@@ -147,8 +146,6 @@ struct omap_vdd_info {
147 u32 curr_volt; 146 u32 curr_volt;
148 bool vp_enabled; 147 bool vp_enabled;
149 148
150 s16 prm_irqst_mod;
151 u8 prm_irqst_reg;
152 u32 (*read_reg) (u16 mod, u8 offset); 149 u32 (*read_reg) (u16 mod, u8 offset);
153 void (*write_reg) (u32 val, u16 mod, u8 offset); 150 void (*write_reg) (u32 val, u16 mod, u8 offset);
154 int (*volt_scale) (struct voltagedomain *voltdm, 151 int (*volt_scale) (struct voltagedomain *voltdm,
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 7cb27ec64890..ad8f05b6a889 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -38,8 +38,6 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = {
38}; 38};
39 39
40static struct omap_vdd_info omap3_vdd1_info = { 40static struct omap_vdd_info omap3_vdd1_info = {
41 .prm_irqst_mod = OCP_MOD,
42 .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
43 .vp_data = &omap3_vp1_data, 41 .vp_data = &omap3_vp1_data,
44 .vfsm = &omap3_vdd1_vfsm_data, 42 .vfsm = &omap3_vdd1_vfsm_data,
45}; 43};
@@ -51,8 +49,6 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = {
51}; 49};
52 50
53static struct omap_vdd_info omap3_vdd2_info = { 51static struct omap_vdd_info omap3_vdd2_info = {
54 .prm_irqst_mod = OCP_MOD,
55 .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
56 .vp_data = &omap3_vp2_data, 52 .vp_data = &omap3_vp2_data,
57 .vfsm = &omap3_vdd2_vfsm_data, 53 .vfsm = &omap3_vdd2_vfsm_data,
58}; 54};
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index a05d90ab6869..43e1d3817244 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -37,8 +37,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = {
37}; 37};
38 38
39static struct omap_vdd_info omap4_vdd_mpu_info = { 39static struct omap_vdd_info omap4_vdd_mpu_info = {
40 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
41 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
42 .vp_data = &omap4_vp_mpu_data, 40 .vp_data = &omap4_vp_mpu_data,
43 .vfsm = &omap4_vdd_mpu_vfsm_data, 41 .vfsm = &omap4_vdd_mpu_vfsm_data,
44}; 42};
@@ -48,8 +46,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = {
48}; 46};
49 47
50static struct omap_vdd_info omap4_vdd_iva_info = { 48static struct omap_vdd_info omap4_vdd_iva_info = {
51 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
52 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
53 .vp_data = &omap4_vp_iva_data, 49 .vp_data = &omap4_vp_iva_data,
54 .vfsm = &omap4_vdd_iva_vfsm_data, 50 .vfsm = &omap4_vdd_iva_vfsm_data,
55}; 51};
@@ -59,8 +55,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = {
59}; 55};
60 56
61static struct omap_vdd_info omap4_vdd_core_info = { 57static struct omap_vdd_info omap4_vdd_core_info = {
62 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
63 .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
64 .vp_data = &omap4_vp_core_data, 58 .vp_data = &omap4_vp_core_data,
65 .vfsm = &omap4_vdd_core_vfsm_data, 59 .vfsm = &omap4_vdd_core_vfsm_data,
66}; 60};
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index f3503de5d8fd..113c839f6e23 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -111,10 +111,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
111 * is <3us 111 * is <3us
112 */ 112 */
113 while (timeout++ < VP_TRANXDONE_TIMEOUT) { 113 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
114 vdd->write_reg(vp->prm_irqst_data->tranxdone_status, 114 vp->vp_common->ops->clear_txdone(vp->id);
115 vdd->prm_irqst_mod, vdd->prm_irqst_reg); 115 if (!vp->vp_common->ops->check_txdone(vp->id))
116 if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) &
117 vp->prm_irqst_data->tranxdone_status))
118 break; 116 break;
119 udelay(1); 117 udelay(1);
120 } 118 }
@@ -146,9 +144,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
146 * Depends on SMPSWAITTIMEMIN/MAX and voltage change 144 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
147 */ 145 */
148 timeout = 0; 146 timeout = 0;
149 omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, 147 omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id),
150 vdd->prm_irqst_reg) &
151 vp->prm_irqst_data->tranxdone_status),
152 VP_TRANXDONE_TIMEOUT, timeout); 148 VP_TRANXDONE_TIMEOUT, timeout);
153 if (timeout >= VP_TRANXDONE_TIMEOUT) 149 if (timeout >= VP_TRANXDONE_TIMEOUT)
154 pr_err("%s: vdd_%s TRANXDONE timeout exceeded." 150 pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
@@ -163,10 +159,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
163 */ 159 */
164 timeout = 0; 160 timeout = 0;
165 while (timeout++ < VP_TRANXDONE_TIMEOUT) { 161 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
166 vdd->write_reg(vp->prm_irqst_data->tranxdone_status, 162 vp->vp_common->ops->clear_txdone(vp->id);
167 vdd->prm_irqst_mod, vdd->prm_irqst_reg); 163 if (!vp->vp_common->ops->check_txdone(vp->id))
168 if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) &
169 vp->prm_irqst_data->tranxdone_status))
170 break; 164 break;
171 udelay(1); 165 udelay(1);
172 } 166 }