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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-11-08 15:48:27 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-11-27 07:38:24 -0500
commit5e1dbdb458ada37f7e97265cb2ea87c55fd5d034 (patch)
tree57c133e831ed1a0c7daaf14d5e4df02902d60812 /arch
parente0d8b13ae1e3ea747620580b6f777992148de182 (diff)
[ARM] sa1100: match clock by dev_name(dev)
Continuing the move away from implementations which give an excuse for other bad implementations, convert SA1100 to lookup its singular clock by dev_name(dev) rather than by id. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-sa1100/clock.c100
1 files changed, 27 insertions, 73 deletions
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index 43c30f84abf2..dab3c6347a8f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -3,6 +3,7 @@
3 */ 3 */
4#include <linux/module.h> 4#include <linux/module.h>
5#include <linux/kernel.h> 5#include <linux/kernel.h>
6#include <linux/device.h>
6#include <linux/list.h> 7#include <linux/list.h>
7#include <linux/errno.h> 8#include <linux/errno.h>
8#include <linux/err.h> 9#include <linux/err.h>
@@ -14,36 +15,39 @@
14#include <mach/hardware.h> 15#include <mach/hardware.h>
15 16
16/* 17/*
17 * Very simple clock implementation - we only have one clock to 18 * Very simple clock implementation - we only have one clock to deal with.
18 * deal with at the moment, so we only match using the "name".
19 */ 19 */
20struct clk { 20struct clk {
21 struct list_head node;
22 unsigned long rate;
23 const char *name;
24 unsigned int enabled; 21 unsigned int enabled;
25 void (*enable)(void);
26 void (*disable)(void);
27}; 22};
28 23
29static LIST_HEAD(clocks); 24static void clk_gpio27_enable(void)
30static DEFINE_MUTEX(clocks_mutex); 25{
26 /*
27 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
28 * (SA-1110 Developer's Manual, section 9.1.2.1)
29 */
30 GAFR |= GPIO_32_768kHz;
31 GPDR |= GPIO_32_768kHz;
32 TUCR = TUCR_3_6864MHz;
33}
34
35static void clk_gpio27_disable(void)
36{
37 TUCR = 0;
38 GPDR &= ~GPIO_32_768kHz;
39 GAFR &= ~GPIO_32_768kHz;
40}
41
42static struct clk clk_gpio27;
43
31static DEFINE_SPINLOCK(clocks_lock); 44static DEFINE_SPINLOCK(clocks_lock);
32 45
33struct clk *clk_get(struct device *dev, const char *id) 46struct clk *clk_get(struct device *dev, const char *id)
34{ 47{
35 struct clk *p, *clk = ERR_PTR(-ENOENT); 48 const char *devname = dev_name(dev);
36
37 mutex_lock(&clocks_mutex);
38 list_for_each_entry(p, &clocks, node) {
39 if (strcmp(id, p->name) == 0) {
40 clk = p;
41 break;
42 }
43 }
44 mutex_unlock(&clocks_mutex);
45 49
46 return clk; 50 return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
47} 51}
48EXPORT_SYMBOL(clk_get); 52EXPORT_SYMBOL(clk_get);
49 53
@@ -58,7 +62,7 @@ int clk_enable(struct clk *clk)
58 62
59 spin_lock_irqsave(&clocks_lock, flags); 63 spin_lock_irqsave(&clocks_lock, flags);
60 if (clk->enabled++ == 0) 64 if (clk->enabled++ == 0)
61 clk->enable(); 65 clk_gpio27_enable();
62 spin_unlock_irqrestore(&clocks_lock, flags); 66 spin_unlock_irqrestore(&clocks_lock, flags);
63 return 0; 67 return 0;
64} 68}
@@ -72,63 +76,13 @@ void clk_disable(struct clk *clk)
72 76
73 spin_lock_irqsave(&clocks_lock, flags); 77 spin_lock_irqsave(&clocks_lock, flags);
74 if (--clk->enabled == 0) 78 if (--clk->enabled == 0)
75 clk->disable(); 79 clk_gpio27_disable();
76 spin_unlock_irqrestore(&clocks_lock, flags); 80 spin_unlock_irqrestore(&clocks_lock, flags);
77} 81}
78EXPORT_SYMBOL(clk_disable); 82EXPORT_SYMBOL(clk_disable);
79 83
80unsigned long clk_get_rate(struct clk *clk) 84unsigned long clk_get_rate(struct clk *clk)
81{ 85{
82 return clk->rate; 86 return 3686400;
83} 87}
84EXPORT_SYMBOL(clk_get_rate); 88EXPORT_SYMBOL(clk_get_rate);
85
86
87static void clk_gpio27_enable(void)
88{
89 /*
90 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
91 * (SA-1110 Developer's Manual, section 9.1.2.1)
92 */
93 GAFR |= GPIO_32_768kHz;
94 GPDR |= GPIO_32_768kHz;
95 TUCR = TUCR_3_6864MHz;
96}
97
98static void clk_gpio27_disable(void)
99{
100 TUCR = 0;
101 GPDR &= ~GPIO_32_768kHz;
102 GAFR &= ~GPIO_32_768kHz;
103}
104
105static struct clk clk_gpio27 = {
106 .name = "SA1111_CLK",
107 .rate = 3686400,
108 .enable = clk_gpio27_enable,
109 .disable = clk_gpio27_disable,
110};
111
112int clk_register(struct clk *clk)
113{
114 mutex_lock(&clocks_mutex);
115 list_add(&clk->node, &clocks);
116 mutex_unlock(&clocks_mutex);
117 return 0;
118}
119EXPORT_SYMBOL(clk_register);
120
121void clk_unregister(struct clk *clk)
122{
123 mutex_lock(&clocks_mutex);
124 list_del(&clk->node);
125 mutex_unlock(&clocks_mutex);
126}
127EXPORT_SYMBOL(clk_unregister);
128
129static int __init clk_init(void)
130{
131 clk_register(&clk_gpio27);
132 return 0;
133}
134arch_initcall(clk_init);