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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-07-24 17:46:11 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-21 18:19:17 -0400
commit17eac031b7cad5eff7610639041967d06aa1e553 (patch)
tree63fcd99b5c97079d63a507cbf2f8e4ca8706685b /arch
parent69fb3c047e720a317757f54be08679ab7caeaf91 (diff)
ARM: sun7i: Add the PIO controller node to the DTSI
The PIO controller is responsible for the GPIO/muxing/external interrupts handling. Now that we have support for the A20 pin set in the pinctrl driver, we can start using it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 33391517118c..980ec7522fa8 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -61,6 +61,18 @@
61 #size-cells = <1>; 61 #size-cells = <1>;
62 ranges; 62 ranges;
63 63
64 pio: pinctrl@01c20800 {
65 compatible = "allwinner,sun7i-a20-pinctrl";
66 reg = <0x01c20800 0x400>;
67 interrupts = <0 28 1>;
68 clocks = <&osc24M>;
69 gpio-controller;
70 interrupt-controller;
71 #address-cells = <1>;
72 #size-cells = <0>;
73 #gpio-cells = <3>;
74 };
75
64 timer@01c20c00 { 76 timer@01c20c00 {
65 compatible = "allwinner,sun4i-timer"; 77 compatible = "allwinner,sun4i-timer";
66 reg = <0x01c20c00 0x90>; 78 reg = <0x01c20c00 0x90>;