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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-07 08:20:57 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-07 08:20:57 -0400
commit0e51793e162ca432fc5f04178cf82b80a92c2659 (patch)
treecf7ffdb5064e2f7b6647a63e7323d1c4e99b7739 /arch
parent5cad3598ea0cdb817681f74518d3213583a04f7a (diff)
parentb4874a3d298606c20118d1ead73235439bbc2823 (diff)
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM updates from Russell King: "This is the first chunk of ARM updates for this merge window. Conflicts are expected in two files - asm/timex.h and mach-integrator/integrator_cp.c. Nothing particularly stands out more than anything else. Most of the growth is down to the opcodes stuff from Dave Martin, which is countered by Rob's patches to use more of the asm-generic headers on ARM." (A few more conflicts grew since then, but it all looked fairly trivial) * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (44 commits) ARM: 7548/1: include linux/sched.h in syscall.h ARM: 7541/1: Add ARM ERRATA 775420 workaround ARM: ensure vm_struct has its phys_addr member filled in ARM: 7540/1: kexec: Check segment memory addresses ARM: 7539/1: kexec: scan for dtb magic in segments ARM: 7538/1: delay: add registration mechanism for delay timer sources ARM: 7536/1: smp: Formalize an IPI for wakeup ARM: 7525/1: ptrace: use updated syscall number for syscall auditing ARM: 7524/1: support syscall tracing ARM: 7519/1: integrator: convert platform devices to Device Tree ARM: 7518/1: integrator: convert AMBA devices to device tree ARM: 7517/1: integrator: initial device tree support ARM: 7516/1: plat-versatile: add DT support to FPGA IRQ ARM: 7515/1: integrator: check PL010 base address from resource ARM: 7514/1: integrator: call common init function from machine ARM: 7522/1: arch_timers: register a time/cycle counter ARM: 7523/1: arch_timers: enable the use of the virtual timer ARM: 7531/1: mark kernelmode mem{cpy,set} non-experimental ARM: 7520/1: Build dtb files in all target ARM: Fix build warning in arch/arm/mm/alignment.c ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig41
-rw-r--r--arch/arm/Makefile9
-rw-r--r--arch/arm/boot/compressed/decompress.c3
-rw-r--r--arch/arm/boot/dts/integrator.dtsi76
-rw-r--r--arch/arm/boot/dts/integratorap.dts68
-rw-r--r--arch/arm/boot/dts/integratorcp.dts110
-rw-r--r--arch/arm/include/asm/Kbuild17
-rw-r--r--arch/arm/include/asm/arch_timer.h8
-rw-r--r--arch/arm/include/asm/current.h15
-rw-r--r--arch/arm/include/asm/delay.h9
-rw-r--r--arch/arm/include/asm/exec.h6
-rw-r--r--arch/arm/include/asm/glue-cache.h16
-rw-r--r--arch/arm/include/asm/hardirq.h2
-rw-r--r--arch/arm/include/asm/hardware/linkup-l1110.h48
-rw-r--r--arch/arm/include/asm/io.h67
-rw-r--r--arch/arm/include/asm/ipcbuf.h1
-rw-r--r--arch/arm/include/asm/msgbuf.h31
-rw-r--r--arch/arm/include/asm/mutex.h9
-rw-r--r--arch/arm/include/asm/opcodes-virt.h29
-rw-r--r--arch/arm/include/asm/opcodes.h181
-rw-r--r--arch/arm/include/asm/param.h31
-rw-r--r--arch/arm/include/asm/parport.h18
-rw-r--r--arch/arm/include/asm/segment.h11
-rw-r--r--arch/arm/include/asm/sembuf.h25
-rw-r--r--arch/arm/include/asm/serial.h19
-rw-r--r--arch/arm/include/asm/shmbuf.h42
-rw-r--r--arch/arm/include/asm/socket.h72
-rw-r--r--arch/arm/include/asm/sockios.h13
-rw-r--r--arch/arm/include/asm/syscall.h5
-rw-r--r--arch/arm/include/asm/termbits.h198
-rw-r--r--arch/arm/include/asm/termios.h92
-rw-r--r--arch/arm/include/asm/thread_info.h6
-rw-r--r--arch/arm/include/asm/timex.h6
-rw-r--r--arch/arm/include/asm/types.h16
-rw-r--r--arch/arm/include/asm/unaligned.h19
-rw-r--r--arch/arm/include/asm/unistd.h8
-rw-r--r--arch/arm/kernel/Makefile5
-rw-r--r--arch/arm/kernel/arch_timer.c383
-rw-r--r--arch/arm/kernel/asm-offsets.c2
-rw-r--r--arch/arm/kernel/atags.h14
-rw-r--r--arch/arm/kernel/atags_compat.c (renamed from arch/arm/kernel/compat.c)4
-rw-r--r--arch/arm/kernel/atags_parse.c238
-rw-r--r--arch/arm/kernel/atags_proc.c (renamed from arch/arm/kernel/atags.c)0
-rw-r--r--arch/arm/kernel/compat.h11
-rw-r--r--arch/arm/kernel/entry-common.S9
-rw-r--r--arch/arm/kernel/machine_kexec.c29
-rw-r--r--arch/arm/kernel/ptrace.c19
-rw-r--r--arch/arm/kernel/sched_clock.c8
-rw-r--r--arch/arm/kernel/setup.c236
-rw-r--r--arch/arm/kernel/smp.c13
-rw-r--r--arch/arm/lib/delay.c35
-rw-r--r--arch/arm/mach-exynos/platsmp.c2
-rw-r--r--arch/arm/mach-integrator/common.h3
-rw-r--r--arch/arm/mach-integrator/core.c17
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c276
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c325
-rw-r--r--arch/arm/mach-sa1100/include/mach/SA-1111.h5
-rw-r--r--arch/arm/mach-sa1100/include/mach/lart.h13
-rw-r--r--arch/arm/mach-shmobile/smp-emev2.c2
-rw-r--r--arch/arm/mm/alignment.c6
-rw-r--r--arch/arm/mm/cache-l2x0.c8
-rw-r--r--arch/arm/mm/cache-v7.S3
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/ioremap.c1
-rw-r--r--arch/arm/plat-versatile/fpga-irq.c72
-rw-r--r--arch/arm/plat-versatile/include/plat/fpga-irq.h2
66 files changed, 1766 insertions, 1304 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8ac460a8f4ca..6d2f7f5c0036 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -16,6 +16,7 @@ config ARM
16 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 16 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
17 select HAVE_ARCH_KGDB 17 select HAVE_ARCH_KGDB
18 select HAVE_ARCH_TRACEHOOK 18 select HAVE_ARCH_TRACEHOOK
19 select HAVE_SYSCALL_TRACEPOINTS
19 select HAVE_KPROBES if !XIP_KERNEL 20 select HAVE_KPROBES if !XIP_KERNEL
20 select HAVE_KRETPROBES if (HAVE_KPROBES) 21 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 22 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
@@ -1402,6 +1403,16 @@ config PL310_ERRATA_769419
1402 on systems with an outer cache, the store buffer is drained 1403 on systems with an outer cache, the store buffer is drained
1403 explicitly. 1404 explicitly.
1404 1405
1406config ARM_ERRATA_775420
1407 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1408 depends on CPU_V7
1409 help
1410 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1411 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1412 operation aborts with MMU exception, it might cause the processor
1413 to deadlock. This workaround puts DSB before executing ISB if
1414 an abort may occur on cache maintenance.
1415
1405endmenu 1416endmenu
1406 1417
1407source "arch/arm/common/Kconfig" 1418source "arch/arm/common/Kconfig"
@@ -1786,8 +1797,8 @@ config ALIGNMENT_TRAP
1786 configuration it is safe to say N, otherwise say Y. 1797 configuration it is safe to say N, otherwise say Y.
1787 1798
1788config UACCESS_WITH_MEMCPY 1799config UACCESS_WITH_MEMCPY
1789 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1800 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1790 depends on MMU && EXPERIMENTAL 1801 depends on MMU
1791 default y if CPU_FEROCEON 1802 default y if CPU_FEROCEON
1792 help 1803 help
1793 Implement faster copy_to_user and clear_user methods for CPU 1804 Implement faster copy_to_user and clear_user methods for CPU
@@ -1828,12 +1839,6 @@ config CC_STACKPROTECTOR
1828 neutralized via a kernel panic. 1839 neutralized via a kernel panic.
1829 This feature requires gcc version 4.2 or above. 1840 This feature requires gcc version 4.2 or above.
1830 1841
1831config DEPRECATED_PARAM_STRUCT
1832 bool "Provide old way to pass kernel parameters"
1833 help
1834 This was deprecated in 2001 and announced to live on for 5 years.
1835 Some old boot loaders still use this way.
1836
1837config XEN_DOM0 1842config XEN_DOM0
1838 def_bool y 1843 def_bool y
1839 depends on XEN 1844 depends on XEN
@@ -1856,6 +1861,23 @@ config USE_OF
1856 help 1861 help
1857 Include support for flattened device tree machine descriptions. 1862 Include support for flattened device tree machine descriptions.
1858 1863
1864config ATAGS
1865 bool "Support for the traditional ATAGS boot data passing" if USE_OF
1866 default y
1867 help
1868 This is the traditional way of passing data to the kernel at boot
1869 time. If you are solely relying on the flattened device tree (or
1870 the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1871 to remove ATAGS support from your kernel binary. If unsure,
1872 leave this to y.
1873
1874config DEPRECATED_PARAM_STRUCT
1875 bool "Provide old way to pass kernel parameters"
1876 depends on ATAGS
1877 help
1878 This was deprecated in 2001 and announced to live on for 5 years.
1879 Some old boot loaders still use this way.
1880
1859# Compressed boot loader in ROM. Yes, we really want to ask about 1881# Compressed boot loader in ROM. Yes, we really want to ask about
1860# TEXT and BSS so we preserve their values in the config files. 1882# TEXT and BSS so we preserve their values in the config files.
1861config ZBOOT_ROM_TEXT 1883config ZBOOT_ROM_TEXT
@@ -1982,6 +2004,7 @@ config CMDLINE
1982choice 2004choice
1983 prompt "Kernel command line type" if CMDLINE != "" 2005 prompt "Kernel command line type" if CMDLINE != ""
1984 default CMDLINE_FROM_BOOTLOADER 2006 default CMDLINE_FROM_BOOTLOADER
2007 depends on ATAGS
1985 2008
1986config CMDLINE_FROM_BOOTLOADER 2009config CMDLINE_FROM_BOOTLOADER
1987 bool "Use bootloader kernel arguments if available" 2010 bool "Use bootloader kernel arguments if available"
@@ -2051,7 +2074,7 @@ config KEXEC
2051 2074
2052config ATAGS_PROC 2075config ATAGS_PROC
2053 bool "Export atags in procfs" 2076 bool "Export atags in procfs"
2054 depends on KEXEC 2077 depends on ATAGS && KEXEC
2055 default y 2078 default y
2056 help 2079 help
2057 Should the atags used to boot the kernel be exported in an "atags" 2080 Should the atags used to boot the kernel be exported in an "atags"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 40ea991b6782..f023e3acdfbd 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -269,7 +269,12 @@ else
269KBUILD_IMAGE := zImage 269KBUILD_IMAGE := zImage
270endif 270endif
271 271
272all: $(KBUILD_IMAGE) 272# Build the DT binary blobs if we have OF configured
273ifeq ($(CONFIG_USE_OF),y)
274KBUILD_DTBS := dtbs
275endif
276
277all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
273 278
274boot := arch/arm/boot 279boot := arch/arm/boot
275 280
@@ -307,7 +312,7 @@ define archhelp
307 echo ' uImage - U-Boot wrapped zImage' 312 echo ' uImage - U-Boot wrapped zImage'
308 echo ' bootpImage - Combined zImage and initial RAM disk' 313 echo ' bootpImage - Combined zImage and initial RAM disk'
309 echo ' (supply initrd image via make variable INITRD=<path>)' 314 echo ' (supply initrd image via make variable INITRD=<path>)'
310 echo ' dtbs - Build device tree blobs for enabled boards' 315 echo '* dtbs - Build device tree blobs for enabled boards'
311 echo ' install - Install uncompressed kernel' 316 echo ' install - Install uncompressed kernel'
312 echo ' zinstall - Install compressed kernel' 317 echo ' zinstall - Install compressed kernel'
313 echo ' uinstall - Install U-Boot wrapped compressed kernel' 318 echo ' uinstall - Install U-Boot wrapped compressed kernel'
diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index f41b38cafce8..9deb56a702ce 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -32,6 +32,9 @@ extern void error(char *);
32# define Tracecv(c,x) 32# define Tracecv(c,x)
33#endif 33#endif
34 34
35/* Not needed, but used in some headers pulled in by decompressors */
36extern char * strstr(const char * s1, const char *s2);
37
35#ifdef CONFIG_KERNEL_GZIP 38#ifdef CONFIG_KERNEL_GZIP
36#include "../../../../lib/decompress_inflate.c" 39#include "../../../../lib/decompress_inflate.c"
37#endif 40#endif
diff --git a/arch/arm/boot/dts/integrator.dtsi b/arch/arm/boot/dts/integrator.dtsi
new file mode 100644
index 000000000000..813b91d7bea2
--- /dev/null
+++ b/arch/arm/boot/dts/integrator.dtsi
@@ -0,0 +1,76 @@
1/*
2 * SoC core Device Tree for the ARM Integrator platforms
3 */
4
5/include/ "skeleton.dtsi"
6
7/ {
8 timer@13000000 {
9 reg = <0x13000000 0x100>;
10 interrupt-parent = <&pic>;
11 interrupts = <5>;
12 };
13
14 timer@13000100 {
15 reg = <0x13000100 0x100>;
16 interrupt-parent = <&pic>;
17 interrupts = <6>;
18 };
19
20 timer@13000200 {
21 reg = <0x13000200 0x100>;
22 interrupt-parent = <&pic>;
23 interrupts = <7>;
24 };
25
26 pic@14000000 {
27 compatible = "arm,versatile-fpga-irq";
28 #interrupt-cells = <1>;
29 interrupt-controller;
30 reg = <0x14000000 0x100>;
31 clear-mask = <0xffffffff>;
32 };
33
34 flash@24000000 {
35 compatible = "cfi-flash";
36 reg = <0x24000000 0x02000000>;
37 };
38
39 fpga {
40 compatible = "arm,amba-bus", "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
43 ranges;
44 interrupt-parent = <&pic>;
45
46 /*
47 * These PrimeCells are in the same locations and using the
48 * same interrupts in all Integrators, however the silicon
49 * version deployed is different.
50 */
51 rtc@15000000 {
52 reg = <0x15000000 0x1000>;
53 interrupts = <8>;
54 };
55
56 uart@16000000 {
57 reg = <0x16000000 0x1000>;
58 interrupts = <1>;
59 };
60
61 uart@17000000 {
62 reg = <0x17000000 0x1000>;
63 interrupts = <2>;
64 };
65
66 kmi@18000000 {
67 reg = <0x18000000 0x1000>;
68 interrupts = <3>;
69 };
70
71 kmi@19000000 {
72 reg = <0x19000000 0x1000>;
73 interrupts = <4>;
74 };
75 };
76};
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
new file mode 100644
index 000000000000..61767757b50a
--- /dev/null
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -0,0 +1,68 @@
1/*
2 * Device Tree for the ARM Integrator/AP platform
3 */
4
5/dts-v1/;
6/include/ "integrator.dtsi"
7
8/ {
9 model = "ARM Integrator/AP";
10 compatible = "arm,integrator-ap";
11
12 aliases {
13 arm,timer-primary = &timer2;
14 arm,timer-secondary = &timer1;
15 };
16
17 chosen {
18 bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
19 };
20
21 timer0: timer@13000000 {
22 compatible = "arm,integrator-timer";
23 };
24
25 timer1: timer@13000100 {
26 compatible = "arm,integrator-timer";
27 };
28
29 timer2: timer@13000200 {
30 compatible = "arm,integrator-timer";
31 };
32
33 pic: pic@14000000 {
34 valid-mask = <0x003fffff>;
35 };
36
37 fpga {
38 /*
39 * The Integator/AP predates the idea to have magic numbers
40 * identifying the PrimeCell in hardware, thus we have to
41 * supply these from the device tree.
42 */
43 rtc: rtc@15000000 {
44 compatible = "arm,pl030", "arm,primecell";
45 arm,primecell-periphid = <0x00041030>;
46 };
47
48 uart0: uart@16000000 {
49 compatible = "arm,pl010", "arm,primecell";
50 arm,primecell-periphid = <0x00041010>;
51 };
52
53 uart1: uart@17000000 {
54 compatible = "arm,pl010", "arm,primecell";
55 arm,primecell-periphid = <0x00041010>;
56 };
57
58 kmi0: kmi@18000000 {
59 compatible = "arm,pl050", "arm,primecell";
60 arm,primecell-periphid = <0x00041050>;
61 };
62
63 kmi1: kmi@19000000 {
64 compatible = "arm,pl050", "arm,primecell";
65 arm,primecell-periphid = <0x00041050>;
66 };
67 };
68};
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
new file mode 100644
index 000000000000..2dd5e4e48481
--- /dev/null
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -0,0 +1,110 @@
1/*
2 * Device Tree for the ARM Integrator/CP platform
3 */
4
5/dts-v1/;
6/include/ "integrator.dtsi"
7
8/ {
9 model = "ARM Integrator/CP";
10 compatible = "arm,integrator-cp";
11
12 aliases {
13 arm,timer-primary = &timer2;
14 arm,timer-secondary = &timer1;
15 };
16
17 chosen {
18 bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
19 };
20
21 timer0: timer@13000000 {
22 compatible = "arm,sp804", "arm,primecell";
23 };
24
25 timer1: timer@13000100 {
26 compatible = "arm,sp804", "arm,primecell";
27 };
28
29 timer2: timer@13000200 {
30 compatible = "arm,sp804", "arm,primecell";
31 };
32
33 pic: pic@14000000 {
34 valid-mask = <0x1fc003ff>;
35 };
36
37 cic: cic@10000040 {
38 compatible = "arm,versatile-fpga-irq";
39 #interrupt-cells = <1>;
40 interrupt-controller;
41 reg = <0x10000040 0x100>;
42 clear-mask = <0xffffffff>;
43 valid-mask = <0x00000007>;
44 };
45
46 sic: sic@ca000000 {
47 compatible = "arm,versatile-fpga-irq";
48 #interrupt-cells = <1>;
49 interrupt-controller;
50 reg = <0xca000000 0x100>;
51 clear-mask = <0x00000fff>;
52 valid-mask = <0x00000fff>;
53 };
54
55 ethernet@c8000000 {
56 compatible = "smsc,lan91c111";
57 reg = <0xc8000000 0x10>;
58 interrupt-parent = <&pic>;
59 interrupts = <27>;
60 };
61
62 fpga {
63 /*
64 * These PrimeCells are at the same location and using
65 * the same interrupts in all Integrators, but in the CP
66 * slightly newer versions are deployed.
67 */
68 rtc@15000000 {
69 compatible = "arm,pl031", "arm,primecell";
70 };
71
72 uart@16000000 {
73 compatible = "arm,pl011", "arm,primecell";
74 };
75
76 uart@17000000 {
77 compatible = "arm,pl011", "arm,primecell";
78 };
79
80 kmi@18000000 {
81 compatible = "arm,pl050", "arm,primecell";
82 };
83
84 kmi@19000000 {
85 compatible = "arm,pl050", "arm,primecell";
86 };
87
88 /*
89 * These PrimeCells are only available on the Integrator/CP
90 */
91 mmc@1c000000 {
92 compatible = "arm,pl180", "arm,primecell";
93 reg = <0x1c000000 0x1000>;
94 interrupts = <23 24>;
95 max-frequency = <515633>;
96 };
97
98 aaci@1d000000 {
99 compatible = "arm,pl041", "arm,primecell";
100 reg = <0x1d000000 0x1000>;
101 interrupts = <25>;
102 };
103
104 clcd@c0000000 {
105 compatible = "arm,pl110", "arm,primecell";
106 reg = <0xC0000000 0x1000>;
107 interrupts = <22>;
108 };
109 };
110};
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index 960abceb8e14..8a7196ca5106 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -5,16 +5,33 @@ header-y += hwcap.h
5generic-y += auxvec.h 5generic-y += auxvec.h
6generic-y += bitsperlong.h 6generic-y += bitsperlong.h
7generic-y += cputime.h 7generic-y += cputime.h
8generic-y += current.h
8generic-y += emergency-restart.h 9generic-y += emergency-restart.h
9generic-y += errno.h 10generic-y += errno.h
11generic-y += exec.h
10generic-y += ioctl.h 12generic-y += ioctl.h
13generic-y += ipcbuf.h
11generic-y += irq_regs.h 14generic-y += irq_regs.h
12generic-y += kdebug.h 15generic-y += kdebug.h
13generic-y += local.h 16generic-y += local.h
14generic-y += local64.h 17generic-y += local64.h
18generic-y += msgbuf.h
19generic-y += param.h
20generic-y += parport.h
15generic-y += percpu.h 21generic-y += percpu.h
16generic-y += poll.h 22generic-y += poll.h
17generic-y += resource.h 23generic-y += resource.h
18generic-y += sections.h 24generic-y += sections.h
25generic-y += segment.h
26generic-y += sembuf.h
27generic-y += serial.h
28generic-y += shmbuf.h
19generic-y += siginfo.h 29generic-y += siginfo.h
20generic-y += sizes.h 30generic-y += sizes.h
31generic-y += socket.h
32generic-y += sockios.h
33generic-y += termbits.h
34generic-y += termios.h
35generic-y += timex.h
36generic-y += types.h
37generic-y += unaligned.h
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index 62e75475e57e..d40229d9a1c9 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -2,11 +2,12 @@
2#define __ASMARM_ARCH_TIMER_H 2#define __ASMARM_ARCH_TIMER_H
3 3
4#include <asm/errno.h> 4#include <asm/errno.h>
5#include <linux/clocksource.h>
5 6
6#ifdef CONFIG_ARM_ARCH_TIMER 7#ifdef CONFIG_ARM_ARCH_TIMER
7#define ARCH_HAS_READ_CURRENT_TIMER
8int arch_timer_of_register(void); 8int arch_timer_of_register(void);
9int arch_timer_sched_clock_init(void); 9int arch_timer_sched_clock_init(void);
10struct timecounter *arch_timer_get_timecounter(void);
10#else 11#else
11static inline int arch_timer_of_register(void) 12static inline int arch_timer_of_register(void)
12{ 13{
@@ -17,6 +18,11 @@ static inline int arch_timer_sched_clock_init(void)
17{ 18{
18 return -ENXIO; 19 return -ENXIO;
19} 20}
21
22static inline struct timecounter *arch_timer_get_timecounter(void)
23{
24 return NULL;
25}
20#endif 26#endif
21 27
22#endif 28#endif
diff --git a/arch/arm/include/asm/current.h b/arch/arm/include/asm/current.h
deleted file mode 100644
index 75d21e2a3ff7..000000000000
--- a/arch/arm/include/asm/current.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _ASMARM_CURRENT_H
2#define _ASMARM_CURRENT_H
3
4#include <linux/thread_info.h>
5
6static inline struct task_struct *get_current(void) __attribute_const__;
7
8static inline struct task_struct *get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current (get_current())
14
15#endif /* _ASMARM_CURRENT_H */
diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h
index dc6145120de3..ab98fdd083bd 100644
--- a/arch/arm/include/asm/delay.h
+++ b/arch/arm/include/asm/delay.h
@@ -15,6 +15,11 @@
15 15
16#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
17 17
18struct delay_timer {
19 unsigned long (*read_current_timer)(void);
20 unsigned long freq;
21};
22
18extern struct arm_delay_ops { 23extern struct arm_delay_ops {
19 void (*delay)(unsigned long); 24 void (*delay)(unsigned long);
20 void (*const_udelay)(unsigned long); 25 void (*const_udelay)(unsigned long);
@@ -56,6 +61,10 @@ extern void __loop_delay(unsigned long loops);
56extern void __loop_udelay(unsigned long usecs); 61extern void __loop_udelay(unsigned long usecs);
57extern void __loop_const_udelay(unsigned long); 62extern void __loop_const_udelay(unsigned long);
58 63
64/* Delay-loop timer registration. */
65#define ARCH_HAS_READ_CURRENT_TIMER
66extern void register_current_timer_delay(const struct delay_timer *timer);
67
59#endif /* __ASSEMBLY__ */ 68#endif /* __ASSEMBLY__ */
60 69
61#endif /* defined(_ARM_DELAY_H) */ 70#endif /* defined(_ARM_DELAY_H) */
diff --git a/arch/arm/include/asm/exec.h b/arch/arm/include/asm/exec.h
deleted file mode 100644
index 7c4fbef72b3a..000000000000
--- a/arch/arm/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_ARM_EXEC_H
2#define __ASM_ARM_EXEC_H
3
4#define arch_align_stack(x) (x)
5
6#endif /* __ASM_ARM_EXEC_H */
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index 7e30874377e6..4f8d2c0dc441 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -110,19 +110,19 @@
110#endif 110#endif
111 111
112#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 112#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
113//# ifdef _CACHE 113# ifdef _CACHE
114# define MULTI_CACHE 1 114# define MULTI_CACHE 1
115//# else 115# else
116//# define _CACHE v6 116# define _CACHE v6
117//# endif 117# endif
118#endif 118#endif
119 119
120#if defined(CONFIG_CPU_V7) 120#if defined(CONFIG_CPU_V7)
121//# ifdef _CACHE 121# ifdef _CACHE
122# define MULTI_CACHE 1 122# define MULTI_CACHE 1
123//# else 123# else
124//# define _CACHE v7 124# define _CACHE v7
125//# endif 125# endif
126#endif 126#endif
127 127
128#if !defined(_CACHE) && !defined(MULTI_CACHE) 128#if !defined(_CACHE) && !defined(MULTI_CACHE)
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h
index 436e60b2cf7a..2740c2a2df63 100644
--- a/arch/arm/include/asm/hardirq.h
+++ b/arch/arm/include/asm/hardirq.h
@@ -5,7 +5,7 @@
5#include <linux/threads.h> 5#include <linux/threads.h>
6#include <asm/irq.h> 6#include <asm/irq.h>
7 7
8#define NR_IPI 5 8#define NR_IPI 6
9 9
10typedef struct { 10typedef struct {
11 unsigned int __softirq_pending; 11 unsigned int __softirq_pending;
diff --git a/arch/arm/include/asm/hardware/linkup-l1110.h b/arch/arm/include/asm/hardware/linkup-l1110.h
deleted file mode 100644
index 7ec91168a576..000000000000
--- a/arch/arm/include/asm/hardware/linkup-l1110.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2*
3* Definitions for H3600 Handheld Computer
4*
5* Copyright 2001 Compaq Computer Corporation.
6*
7* Use consistent with the GNU GPL is permitted,
8* provided that this copyright notice is
9* preserved in its entirety in all copies and derived works.
10*
11* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
12* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
13* FITNESS FOR ANY PARTICULAR PURPOSE.
14*
15* Author: Jamey Hicks.
16*
17*/
18
19/* LinkUp Systems PCCard/CompactFlash Interface for SA-1100 */
20
21/* PC Card Status Register */
22#define LINKUP_PRS_S1 (1 << 0) /* voltage control bits S1-S4 */
23#define LINKUP_PRS_S2 (1 << 1)
24#define LINKUP_PRS_S3 (1 << 2)
25#define LINKUP_PRS_S4 (1 << 3)
26#define LINKUP_PRS_BVD1 (1 << 4)
27#define LINKUP_PRS_BVD2 (1 << 5)
28#define LINKUP_PRS_VS1 (1 << 6)
29#define LINKUP_PRS_VS2 (1 << 7)
30#define LINKUP_PRS_RDY (1 << 8)
31#define LINKUP_PRS_CD1 (1 << 9)
32#define LINKUP_PRS_CD2 (1 << 10)
33
34/* PC Card Command Register */
35#define LINKUP_PRC_S1 (1 << 0)
36#define LINKUP_PRC_S2 (1 << 1)
37#define LINKUP_PRC_S3 (1 << 2)
38#define LINKUP_PRC_S4 (1 << 3)
39#define LINKUP_PRC_RESET (1 << 4)
40#define LINKUP_PRC_APOE (1 << 5) /* Auto Power Off Enable: clears S1-S4 when either nCD goes high */
41#define LINKUP_PRC_CFE (1 << 6) /* CompactFlash mode Enable: addresses A[10:0] only, A[25:11] high */
42#define LINKUP_PRC_SOE (1 << 7) /* signal output driver enable */
43#define LINKUP_PRC_SSP (1 << 8) /* sock select polarity: 0 for socket 0, 1 for socket 1 */
44#define LINKUP_PRC_MBZ (1 << 15) /* must be zero */
45
46struct linkup_l1110 {
47 volatile short prc;
48};
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 8f4db67533e5..35c1ed89b936 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -47,13 +47,68 @@ extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
47extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); 47extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
48extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); 48extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
49 49
50#define __raw_writeb(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))) 50#if __LINUX_ARM_ARCH__ < 6
51#define __raw_writew(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))) 51/*
52#define __raw_writel(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v))) 52 * Half-word accesses are problematic with RiscPC due to limitations of
53 * the bus. Rather than special-case the machine, just let the compiler
54 * generate the access for CPUs prior to ARMv6.
55 */
56#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
57#define __raw_writew(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)))
58#else
59/*
60 * When running under a hypervisor, we want to avoid I/O accesses with
61 * writeback addressing modes as these incur a significant performance
62 * overhead (the address generation must be emulated in software).
63 */
64static inline void __raw_writew(u16 val, volatile void __iomem *addr)
65{
66 asm volatile("strh %1, %0"
67 : "+Qo" (*(volatile u16 __force *)addr)
68 : "r" (val));
69}
70
71static inline u16 __raw_readw(const volatile void __iomem *addr)
72{
73 u16 val;
74 asm volatile("ldrh %1, %0"
75 : "+Qo" (*(volatile u16 __force *)addr),
76 "=r" (val));
77 return val;
78}
79#endif
53 80
54#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a)) 81static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
55#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a)) 82{
56#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) 83 asm volatile("strb %1, %0"
84 : "+Qo" (*(volatile u8 __force *)addr)
85 : "r" (val));
86}
87
88static inline void __raw_writel(u32 val, volatile void __iomem *addr)
89{
90 asm volatile("str %1, %0"
91 : "+Qo" (*(volatile u32 __force *)addr)
92 : "r" (val));
93}
94
95static inline u8 __raw_readb(const volatile void __iomem *addr)
96{
97 u8 val;
98 asm volatile("ldrb %1, %0"
99 : "+Qo" (*(volatile u8 __force *)addr),
100 "=r" (val));
101 return val;
102}
103
104static inline u32 __raw_readl(const volatile void __iomem *addr)
105{
106 u32 val;
107 asm volatile("ldr %1, %0"
108 : "+Qo" (*(volatile u32 __force *)addr),
109 "=r" (val));
110 return val;
111}
57 112
58/* 113/*
59 * Architecture ioremap implementation. 114 * Architecture ioremap implementation.
diff --git a/arch/arm/include/asm/ipcbuf.h b/arch/arm/include/asm/ipcbuf.h
deleted file mode 100644
index 84c7e51cb6d0..000000000000
--- a/arch/arm/include/asm/ipcbuf.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ipcbuf.h>
diff --git a/arch/arm/include/asm/msgbuf.h b/arch/arm/include/asm/msgbuf.h
deleted file mode 100644
index 33b35b946eaa..000000000000
--- a/arch/arm/include/asm/msgbuf.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _ASMARM_MSGBUF_H
2#define _ASMARM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASMARM_MSGBUF_H */
diff --git a/arch/arm/include/asm/mutex.h b/arch/arm/include/asm/mutex.h
index b1479fd04a95..87c044910fe0 100644
--- a/arch/arm/include/asm/mutex.h
+++ b/arch/arm/include/asm/mutex.h
@@ -9,8 +9,13 @@
9#define _ASM_MUTEX_H 9#define _ASM_MUTEX_H
10/* 10/*
11 * On pre-ARMv6 hardware this results in a swp-based implementation, 11 * On pre-ARMv6 hardware this results in a swp-based implementation,
12 * which is the most efficient. For ARMv6+, we emit a pair of exclusive 12 * which is the most efficient. For ARMv6+, we have exclusive memory
13 * accesses instead. 13 * accessors and use atomic_dec to avoid the extra xchg operations
14 * on the locking slowpaths.
14 */ 15 */
16#if __LINUX_ARM_ARCH__ < 6
15#include <asm-generic/mutex-xchg.h> 17#include <asm-generic/mutex-xchg.h>
18#else
19#include <asm-generic/mutex-dec.h>
16#endif 20#endif
21#endif /* _ASM_MUTEX_H */
diff --git a/arch/arm/include/asm/opcodes-virt.h b/arch/arm/include/asm/opcodes-virt.h
new file mode 100644
index 000000000000..b85665a96f8e
--- /dev/null
+++ b/arch/arm/include/asm/opcodes-virt.h
@@ -0,0 +1,29 @@
1/*
2 * opcodes-virt.h: Opcode definitions for the ARM virtualization extensions
3 * Copyright (C) 2012 Linaro Limited
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 */
19#ifndef __ASM_ARM_OPCODES_VIRT_H
20#define __ASM_ARM_OPCODES_VIRT_H
21
22#include <asm/opcodes.h>
23
24#define __HVC(imm16) __inst_arm_thumb32( \
25 0xE1400070 | (((imm16) & 0xFFF0) << 4) | ((imm16) & 0x000F), \
26 0xF7E08000 | (((imm16) & 0xF000) << 4) | ((imm16) & 0x0FFF) \
27)
28
29#endif /* ! __ASM_ARM_OPCODES_VIRT_H */
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
index 19c48deda70f..74e211a6fb24 100644
--- a/arch/arm/include/asm/opcodes.h
+++ b/arch/arm/include/asm/opcodes.h
@@ -19,6 +19,33 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
19 19
20 20
21/* 21/*
22 * Assembler opcode byteswap helpers.
23 * These are only intended for use by this header: don't use them directly,
24 * because they will be suboptimal in most cases.
25 */
26#define ___asm_opcode_swab32(x) ( \
27 (((x) << 24) & 0xFF000000) \
28 | (((x) << 8) & 0x00FF0000) \
29 | (((x) >> 8) & 0x0000FF00) \
30 | (((x) >> 24) & 0x000000FF) \
31)
32#define ___asm_opcode_swab16(x) ( \
33 (((x) << 8) & 0xFF00) \
34 | (((x) >> 8) & 0x00FF) \
35)
36#define ___asm_opcode_swahb32(x) ( \
37 (((x) << 8) & 0xFF00FF00) \
38 | (((x) >> 8) & 0x00FF00FF) \
39)
40#define ___asm_opcode_swahw32(x) ( \
41 (((x) << 16) & 0xFFFF0000) \
42 | (((x) >> 16) & 0x0000FFFF) \
43)
44#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
45#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
46
47
48/*
22 * Opcode byteswap helpers 49 * Opcode byteswap helpers
23 * 50 *
24 * These macros help with converting instructions between a canonical integer 51 * These macros help with converting instructions between a canonical integer
@@ -41,39 +68,163 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
41 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not 68 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
42 * represent any valid Thumb-2 instruction. For this range, 69 * represent any valid Thumb-2 instruction. For this range,
43 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false. 70 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
71 *
72 * The ___asm variants are intended only for use by this header, in situations
73 * involving inline assembler. For .S files, the normal __opcode_*() macros
74 * should do the right thing.
44 */ 75 */
76#ifdef __ASSEMBLY__
45 77
46#ifndef __ASSEMBLY__ 78#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
79#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
80#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
81#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
82#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
83#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
84
85#else /* ! __ASSEMBLY__ */
47 86
48#include <linux/types.h> 87#include <linux/types.h>
49#include <linux/swab.h> 88#include <linux/swab.h>
50 89
90#define ___opcode_swab32(x) swab32(x)
91#define ___opcode_swab16(x) swab16(x)
92#define ___opcode_swahb32(x) swahb32(x)
93#define ___opcode_swahw32(x) swahw32(x)
94#define ___opcode_identity32(x) ((u32)(x))
95#define ___opcode_identity16(x) ((u16)(x))
96
97#endif /* ! __ASSEMBLY__ */
98
99
51#ifdef CONFIG_CPU_ENDIAN_BE8 100#ifdef CONFIG_CPU_ENDIAN_BE8
52#define __opcode_to_mem_arm(x) swab32(x) 101
53#define __opcode_to_mem_thumb16(x) swab16(x) 102#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
54#define __opcode_to_mem_thumb32(x) swahb32(x) 103#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
55#else 104#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
56#define __opcode_to_mem_arm(x) ((u32)(x)) 105#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
57#define __opcode_to_mem_thumb16(x) ((u16)(x)) 106#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
58#define __opcode_to_mem_thumb32(x) swahw32(x) 107#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
108
109#else /* ! CONFIG_CPU_ENDIAN_BE8 */
110
111#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
112#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
113#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
114#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
115#ifndef CONFIG_CPU_ENDIAN_BE32
116/*
117 * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
118 * work in all cases, due to alignment constraints. For now, a correct
119 * version is not provided for BE32.
120 */
121#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
122#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
59#endif 123#endif
60 124
125#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
126
61#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x) 127#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
62#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x) 128#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
129#ifndef CONFIG_CPU_ENDIAN_BE32
63#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x) 130#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
131#endif
64 132
65/* Operations specific to Thumb opcodes */ 133/* Operations specific to Thumb opcodes */
66 134
67/* Instruction size checks: */ 135/* Instruction size checks: */
68#define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL) 136#define __opcode_is_thumb32(x) ( \
69#define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL) 137 ((x) & 0xF8000000) == 0xE8000000 \
138 || ((x) & 0xF0000000) == 0xF0000000 \
139)
140#define __opcode_is_thumb16(x) ( \
141 ((x) & 0xFFFF0000) == 0 \
142 && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \
143)
70 144
71/* Operations to construct or split 32-bit Thumb instructions: */ 145/* Operations to construct or split 32-bit Thumb instructions: */
72#define __opcode_thumb32_first(x) ((u16)((x) >> 16)) 146#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
73#define __opcode_thumb32_second(x) ((u16)(x)) 147#define __opcode_thumb32_second(x) (___opcode_identity16(x))
74#define __opcode_thumb32_compose(first, second) \ 148#define __opcode_thumb32_compose(first, second) ( \
75 (((u32)(u16)(first) << 16) | (u32)(u16)(second)) 149 (___opcode_identity32(___opcode_identity16(first)) << 16) \
150 | ___opcode_identity32(___opcode_identity16(second)) \
151)
152#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
153#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
154#define ___asm_opcode_thumb32_compose(first, second) ( \
155 (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
156 | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \
157)
76 158
77#endif /* __ASSEMBLY__ */ 159/*
160 * Opcode injection helpers
161 *
162 * In rare cases it is necessary to assemble an opcode which the
163 * assembler does not support directly, or which would normally be
164 * rejected because of the CFLAGS or AFLAGS used to build the affected
165 * file.
166 *
167 * Before using these macros, consider carefully whether it is feasible
168 * instead to change the build flags for your file, or whether it really
169 * makes sense to support old assembler versions when building that
170 * particular kernel feature.
171 *
172 * The macros defined here should only be used where there is no viable
173 * alternative.
174 *
175 *
176 * __inst_arm(x): emit the specified ARM opcode
177 * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
178 * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
179 *
180 * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
181 * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2
182 * kernel is being built
183 *
184 * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
185 * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2
186 * kernel is being built
187 *
188 *
189 * Note that using these macros directly is poor practice. Instead, you
190 * should use them to define human-readable wrapper macros to encode the
191 * instructions that you care about. In code which might run on ARMv7 or
192 * above, you can usually use the __inst_arm_thumb{16,32} macros to
193 * specify the ARM and Thumb alternatives at the same time. This ensures
194 * that the correct opcode gets emitted depending on the instruction set
195 * used for the kernel build.
196 *
197 * Look at opcodes-virt.h for an example of how to use these macros.
198 */
199#include <linux/stringify.h>
200
201#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
202#define __inst_thumb32(x) ___inst_thumb32( \
203 ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \
204 ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \
205)
206#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
207
208#ifdef CONFIG_THUMB2_KERNEL
209#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
210 __inst_thumb16(thumb_opcode)
211#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
212 __inst_thumb32(thumb_opcode)
213#else
214#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
215#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
216#endif
217
218/* Helpers for the helpers. Don't use these directly. */
219#ifdef __ASSEMBLY__
220#define ___inst_arm(x) .long x
221#define ___inst_thumb16(x) .short x
222#define ___inst_thumb32(first, second) .short first, second
223#else
224#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
225#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
226#define ___inst_thumb32(first, second) \
227 ".short " __stringify(first) ", " __stringify(second) "\n\t"
228#endif
78 229
79#endif /* __ASM_ARM_OPCODES_H */ 230#endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/param.h b/arch/arm/include/asm/param.h
deleted file mode 100644
index 8b24bf94c06b..000000000000
--- a/arch/arm/include/asm/param.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * arch/arm/include/asm/param.h
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_PARAM_H
11#define __ASM_PARAM_H
12
13#ifdef __KERNEL__
14# define HZ CONFIG_HZ /* Internal kernel timer frequency */
15# define USER_HZ 100 /* User interfaces are in "ticks" */
16# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
17#else
18# define HZ 100
19#endif
20
21#define EXEC_PAGESIZE 4096
22
23#ifndef NOGROUP
24#define NOGROUP (-1)
25#endif
26
27/* max length of hostname */
28#define MAXHOSTNAMELEN 64
29
30#endif
31
diff --git a/arch/arm/include/asm/parport.h b/arch/arm/include/asm/parport.h
deleted file mode 100644
index 26e94b09035a..000000000000
--- a/arch/arm/include/asm/parport.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * arch/arm/include/asm/parport.h: ARM-specific parport initialisation
3 *
4 * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk>
5 *
6 * This file should only be included by drivers/parport/parport_pc.c.
7 */
8
9#ifndef __ASMARM_PARPORT_H
10#define __ASMARM_PARPORT_H
11
12static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
13static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
14{
15 return parport_pc_find_isa_ports (autoirq, autodma);
16}
17
18#endif /* !(_ASMARM_PARPORT_H) */
diff --git a/arch/arm/include/asm/segment.h b/arch/arm/include/asm/segment.h
deleted file mode 100644
index 9e24c21f6304..000000000000
--- a/arch/arm/include/asm/segment.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __ASM_ARM_SEGMENT_H
2#define __ASM_ARM_SEGMENT_H
3
4#define __KERNEL_CS 0x0
5#define __KERNEL_DS 0x0
6
7#define __USER_CS 0x1
8#define __USER_DS 0x1
9
10#endif /* __ASM_ARM_SEGMENT_H */
11
diff --git a/arch/arm/include/asm/sembuf.h b/arch/arm/include/asm/sembuf.h
deleted file mode 100644
index 1c0283954289..000000000000
--- a/arch/arm/include/asm/sembuf.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _ASMARM_SEMBUF_H
2#define _ASMARM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASMARM_SEMBUF_H */
diff --git a/arch/arm/include/asm/serial.h b/arch/arm/include/asm/serial.h
deleted file mode 100644
index ebb049091e26..000000000000
--- a/arch/arm/include/asm/serial.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/include/asm/serial.h
3 *
4 * Copyright (C) 1996 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 15-10-1996 RMK Created
12 */
13
14#ifndef __ASM_SERIAL_H
15#define __ASM_SERIAL_H
16
17#define BASE_BAUD (1843200 / 16)
18
19#endif
diff --git a/arch/arm/include/asm/shmbuf.h b/arch/arm/include/asm/shmbuf.h
deleted file mode 100644
index 2e5c67ba1c97..000000000000
--- a/arch/arm/include/asm/shmbuf.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef _ASMARM_SHMBUF_H
2#define _ASMARM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASMARM_SHMBUF_H */
diff --git a/arch/arm/include/asm/socket.h b/arch/arm/include/asm/socket.h
deleted file mode 100644
index 6433cadb6ed4..000000000000
--- a/arch/arm/include/asm/socket.h
+++ /dev/null
@@ -1,72 +0,0 @@
1#ifndef _ASMARM_SOCKET_H
2#define _ASMARM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#define SO_PROTOCOL 38
61#define SO_DOMAIN 39
62
63#define SO_RXQ_OVFL 40
64
65#define SO_WIFI_STATUS 41
66#define SCM_WIFI_STATUS SO_WIFI_STATUS
67#define SO_PEEK_OFF 42
68
69/* Instruct lower device to use last 4-bytes of skb data as FCS */
70#define SO_NOFCS 43
71
72#endif /* _ASM_SOCKET_H */
diff --git a/arch/arm/include/asm/sockios.h b/arch/arm/include/asm/sockios.h
deleted file mode 100644
index a2588a2512df..000000000000
--- a/arch/arm/include/asm/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ARCH_ARM_SOCKIOS_H
2#define __ARCH_ARM_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif
diff --git a/arch/arm/include/asm/syscall.h b/arch/arm/include/asm/syscall.h
index c334a23ddf75..9fdded6b1089 100644
--- a/arch/arm/include/asm/syscall.h
+++ b/arch/arm/include/asm/syscall.h
@@ -8,6 +8,11 @@
8#define _ASM_ARM_SYSCALL_H 8#define _ASM_ARM_SYSCALL_H
9 9
10#include <linux/err.h> 10#include <linux/err.h>
11#include <linux/sched.h>
12
13#include <asm/unistd.h>
14
15#define NR_syscalls (__NR_syscalls)
11 16
12extern const unsigned long sys_call_table[]; 17extern const unsigned long sys_call_table[];
13 18
diff --git a/arch/arm/include/asm/termbits.h b/arch/arm/include/asm/termbits.h
deleted file mode 100644
index 704135d28d1d..000000000000
--- a/arch/arm/include/asm/termbits.h
+++ /dev/null
@@ -1,198 +0,0 @@
1#ifndef __ASM_ARM_TERMBITS_H
2#define __ASM_ARM_TERMBITS_H
3
4typedef unsigned char cc_t;
5typedef unsigned int speed_t;
6typedef unsigned int tcflag_t;
7
8#define NCCS 19
9struct termios {
10 tcflag_t c_iflag; /* input mode flags */
11 tcflag_t c_oflag; /* output mode flags */
12 tcflag_t c_cflag; /* control mode flags */
13 tcflag_t c_lflag; /* local mode flags */
14 cc_t c_line; /* line discipline */
15 cc_t c_cc[NCCS]; /* control characters */
16};
17
18struct termios2 {
19 tcflag_t c_iflag; /* input mode flags */
20 tcflag_t c_oflag; /* output mode flags */
21 tcflag_t c_cflag; /* control mode flags */
22 tcflag_t c_lflag; /* local mode flags */
23 cc_t c_line; /* line discipline */
24 cc_t c_cc[NCCS]; /* control characters */
25 speed_t c_ispeed; /* input speed */
26 speed_t c_ospeed; /* output speed */
27};
28
29struct ktermios {
30 tcflag_t c_iflag; /* input mode flags */
31 tcflag_t c_oflag; /* output mode flags */
32 tcflag_t c_cflag; /* control mode flags */
33 tcflag_t c_lflag; /* local mode flags */
34 cc_t c_line; /* line discipline */
35 cc_t c_cc[NCCS]; /* control characters */
36 speed_t c_ispeed; /* input speed */
37 speed_t c_ospeed; /* output speed */
38};
39
40
41/* c_cc characters */
42#define VINTR 0
43#define VQUIT 1
44#define VERASE 2
45#define VKILL 3
46#define VEOF 4
47#define VTIME 5
48#define VMIN 6
49#define VSWTC 7
50#define VSTART 8
51#define VSTOP 9
52#define VSUSP 10
53#define VEOL 11
54#define VREPRINT 12
55#define VDISCARD 13
56#define VWERASE 14
57#define VLNEXT 15
58#define VEOL2 16
59
60/* c_iflag bits */
61#define IGNBRK 0000001
62#define BRKINT 0000002
63#define IGNPAR 0000004
64#define PARMRK 0000010
65#define INPCK 0000020
66#define ISTRIP 0000040
67#define INLCR 0000100
68#define IGNCR 0000200
69#define ICRNL 0000400
70#define IUCLC 0001000
71#define IXON 0002000
72#define IXANY 0004000
73#define IXOFF 0010000
74#define IMAXBEL 0020000
75#define IUTF8 0040000
76
77/* c_oflag bits */
78#define OPOST 0000001
79#define OLCUC 0000002
80#define ONLCR 0000004
81#define OCRNL 0000010
82#define ONOCR 0000020
83#define ONLRET 0000040
84#define OFILL 0000100
85#define OFDEL 0000200
86#define NLDLY 0000400
87#define NL0 0000000
88#define NL1 0000400
89#define CRDLY 0003000
90#define CR0 0000000
91#define CR1 0001000
92#define CR2 0002000
93#define CR3 0003000
94#define TABDLY 0014000
95#define TAB0 0000000
96#define TAB1 0004000
97#define TAB2 0010000
98#define TAB3 0014000
99#define XTABS 0014000
100#define BSDLY 0020000
101#define BS0 0000000
102#define BS1 0020000
103#define VTDLY 0040000
104#define VT0 0000000
105#define VT1 0040000
106#define FFDLY 0100000
107#define FF0 0000000
108#define FF1 0100000
109
110/* c_cflag bit meaning */
111#define CBAUD 0010017
112#define B0 0000000 /* hang up */
113#define B50 0000001
114#define B75 0000002
115#define B110 0000003
116#define B134 0000004
117#define B150 0000005
118#define B200 0000006
119#define B300 0000007
120#define B600 0000010
121#define B1200 0000011
122#define B1800 0000012
123#define B2400 0000013
124#define B4800 0000014
125#define B9600 0000015
126#define B19200 0000016
127#define B38400 0000017
128#define EXTA B19200
129#define EXTB B38400
130#define CSIZE 0000060
131#define CS5 0000000
132#define CS6 0000020
133#define CS7 0000040
134#define CS8 0000060
135#define CSTOPB 0000100
136#define CREAD 0000200
137#define PARENB 0000400
138#define PARODD 0001000
139#define HUPCL 0002000
140#define CLOCAL 0004000
141#define CBAUDEX 0010000
142#define BOTHER 0010000
143#define B57600 0010001
144#define B115200 0010002
145#define B230400 0010003
146#define B460800 0010004
147#define B500000 0010005
148#define B576000 0010006
149#define B921600 0010007
150#define B1000000 0010010
151#define B1152000 0010011
152#define B1500000 0010012
153#define B2000000 0010013
154#define B2500000 0010014
155#define B3000000 0010015
156#define B3500000 0010016
157#define B4000000 0010017
158#define CIBAUD 002003600000 /* input baud rate */
159#define CMSPAR 010000000000 /* mark or space (stick) parity */
160#define CRTSCTS 020000000000 /* flow control */
161
162#define IBSHIFT 16
163
164/* c_lflag bits */
165#define ISIG 0000001
166#define ICANON 0000002
167#define XCASE 0000004
168#define ECHO 0000010
169#define ECHOE 0000020
170#define ECHOK 0000040
171#define ECHONL 0000100
172#define NOFLSH 0000200
173#define TOSTOP 0000400
174#define ECHOCTL 0001000
175#define ECHOPRT 0002000
176#define ECHOKE 0004000
177#define FLUSHO 0010000
178#define PENDIN 0040000
179#define IEXTEN 0100000
180#define EXTPROC 0200000
181
182/* tcflow() and TCXONC use these */
183#define TCOOFF 0
184#define TCOON 1
185#define TCIOFF 2
186#define TCION 3
187
188/* tcflush() and TCFLSH use these */
189#define TCIFLUSH 0
190#define TCOFLUSH 1
191#define TCIOFLUSH 2
192
193/* tcsetattr uses these */
194#define TCSANOW 0
195#define TCSADRAIN 1
196#define TCSAFLUSH 2
197
198#endif /* __ASM_ARM_TERMBITS_H */
diff --git a/arch/arm/include/asm/termios.h b/arch/arm/include/asm/termios.h
deleted file mode 100644
index 293e3f1bc3f2..000000000000
--- a/arch/arm/include/asm/termios.h
+++ /dev/null
@@ -1,92 +0,0 @@
1#ifndef __ASM_ARM_TERMIOS_H
2#define __ASM_ARM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
51
52#ifdef __KERNEL__
53
54/*
55 * Translate a "termio" structure into a "termios". Ugh.
56 */
57#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
58 unsigned short __tmp; \
59 get_user(__tmp,&(termio)->x); \
60 *(unsigned short *) &(termios)->x = __tmp; \
61}
62
63#define user_termio_to_kernel_termios(termios, termio) \
64({ \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
67 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
68 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
69 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
70})
71
72/*
73 * Translate a "termios" structure into a "termio". Ugh.
74 */
75#define kernel_termios_to_user_termio(termio, termios) \
76({ \
77 put_user((termios)->c_iflag, &(termio)->c_iflag); \
78 put_user((termios)->c_oflag, &(termio)->c_oflag); \
79 put_user((termios)->c_cflag, &(termio)->c_cflag); \
80 put_user((termios)->c_lflag, &(termio)->c_lflag); \
81 put_user((termios)->c_line, &(termio)->c_line); \
82 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
83})
84
85#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
86#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
88#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
89
90#endif /* __KERNEL__ */
91
92#endif /* __ASM_ARM_TERMIOS_H */
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index af7b0bda3355..f71cdab18b87 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -59,7 +59,9 @@ struct thread_info {
59 __u32 syscall; /* syscall number */ 59 __u32 syscall; /* syscall number */
60 __u8 used_cp[16]; /* thread used copro */ 60 __u8 used_cp[16]; /* thread used copro */
61 unsigned long tp_value; 61 unsigned long tp_value;
62#ifdef CONFIG_CRUNCH
62 struct crunch_state crunchstate; 63 struct crunch_state crunchstate;
64#endif
63 union fp_state fpstate __attribute__((aligned(8))); 65 union fp_state fpstate __attribute__((aligned(8)));
64 union vfp_state vfpstate; 66 union vfp_state vfpstate;
65#ifdef CONFIG_ARM_THUMBEE 67#ifdef CONFIG_ARM_THUMBEE
@@ -148,6 +150,7 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
148#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ 150#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */
149#define TIF_SYSCALL_TRACE 8 151#define TIF_SYSCALL_TRACE 8
150#define TIF_SYSCALL_AUDIT 9 152#define TIF_SYSCALL_AUDIT 9
153#define TIF_SYSCALL_TRACEPOINT 10
151#define TIF_POLLING_NRFLAG 16 154#define TIF_POLLING_NRFLAG 16
152#define TIF_USING_IWMMXT 17 155#define TIF_USING_IWMMXT 17
153#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ 156#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
@@ -160,12 +163,13 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
160#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 163#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
161#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 164#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
162#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) 165#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
166#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
163#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 167#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
164#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) 168#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
165#define _TIF_SECCOMP (1 << TIF_SECCOMP) 169#define _TIF_SECCOMP (1 << TIF_SECCOMP)
166 170
167/* Checks for any syscall work in entry-common.S */ 171/* Checks for any syscall work in entry-common.S */
168#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT) 172#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
169 173
170/* 174/*
171 * Change these and you break ASM code in entry-common.S 175 * Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/include/asm/timex.h b/arch/arm/include/asm/timex.h
index 963342acebb7..83f2aa83899c 100644
--- a/arch/arm/include/asm/timex.h
+++ b/arch/arm/include/asm/timex.h
@@ -12,7 +12,6 @@
12#ifndef _ASMARM_TIMEX_H 12#ifndef _ASMARM_TIMEX_H
13#define _ASMARM_TIMEX_H 13#define _ASMARM_TIMEX_H
14 14
15#include <asm/arch_timer.h>
16#ifdef CONFIG_ARCH_MULTIPLATFORM 15#ifdef CONFIG_ARCH_MULTIPLATFORM
17#define CLOCK_TICK_RATE 1000000 16#define CLOCK_TICK_RATE 1000000
18#else 17#else
@@ -20,11 +19,6 @@
20#endif 19#endif
21 20
22typedef unsigned long cycles_t; 21typedef unsigned long cycles_t;
23
24#ifdef ARCH_HAS_READ_CURRENT_TIMER
25#define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; }) 22#define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; })
26#else
27#define get_cycles() (0)
28#endif
29 23
30#endif 24#endif
diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
deleted file mode 100644
index 28beab917ffc..000000000000
--- a/arch/arm/include/asm/types.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef __ASM_ARM_TYPES_H
2#define __ASM_ARM_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6/*
7 * These aren't exported outside the kernel to avoid name space clashes
8 */
9#ifdef __KERNEL__
10
11#define BITS_PER_LONG 32
12
13#endif /* __KERNEL__ */
14
15#endif
16
diff --git a/arch/arm/include/asm/unaligned.h b/arch/arm/include/asm/unaligned.h
deleted file mode 100644
index 44593a894903..000000000000
--- a/arch/arm/include/asm/unaligned.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_ARM_UNALIGNED_H
2#define _ASM_ARM_UNALIGNED_H
3
4#include <linux/unaligned/le_byteshift.h>
5#include <linux/unaligned/be_byteshift.h>
6#include <linux/unaligned/generic.h>
7
8/*
9 * Select endianness
10 */
11#ifndef __ARMEB__
12#define get_unaligned __get_unaligned_le
13#define put_unaligned __put_unaligned_le
14#else
15#define get_unaligned __get_unaligned_be
16#define put_unaligned __put_unaligned_be
17#endif
18
19#endif /* _ASM_ARM_UNALIGNED_H */
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 2fde5fd1acce..d9ff5cc3a506 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -407,6 +407,14 @@
407 /* 378 for kcmp */ 407 /* 378 for kcmp */
408 408
409/* 409/*
410 * This may need to be greater than __NR_last_syscall+1 in order to
411 * account for the padding in the syscall table
412 */
413#ifdef __KERNEL__
414#define __NR_syscalls (380)
415#endif /* __KERNEL__ */
416
417/*
410 * The following SWIs are ARM private. 418 * The following SWIs are ARM private.
411 */ 419 */
412#define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000) 420#define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index d81f3a6d9ad8..5dfef9d97ed9 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -19,7 +19,9 @@ obj-y := elf.o entry-armv.o entry-common.o irq.o opcodes.o \
19 process.o ptrace.o return_address.o sched_clock.o \ 19 process.o ptrace.o return_address.o sched_clock.o \
20 setup.o signal.o stacktrace.o sys_arm.o time.o traps.o 20 setup.o signal.o stacktrace.o sys_arm.o time.o traps.o
21 21
22obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += compat.o 22obj-$(CONFIG_ATAGS) += atags_parse.o
23obj-$(CONFIG_ATAGS_PROC) += atags_proc.o
24obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += atags_compat.o
23 25
24obj-$(CONFIG_OC_ETM) += etm.o 26obj-$(CONFIG_OC_ETM) += etm.o
25obj-$(CONFIG_CPU_IDLE) += cpuidle.o 27obj-$(CONFIG_CPU_IDLE) += cpuidle.o
@@ -51,7 +53,6 @@ test-kprobes-objs += kprobes-test-thumb.o
51else 53else
52test-kprobes-objs += kprobes-test-arm.o 54test-kprobes-objs += kprobes-test-arm.o
53endif 55endif
54obj-$(CONFIG_ATAGS_PROC) += atags.o
55obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o 56obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
56obj-$(CONFIG_ARM_THUMBEE) += thumbee.o 57obj-$(CONFIG_ARM_THUMBEE) += thumbee.o
57obj-$(CONFIG_KGDB) += kgdb.o 58obj-$(CONFIG_KGDB) += kgdb.o
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index cf258807160d..c8ef20747ee7 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -21,18 +21,28 @@
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23#include <asm/cputype.h> 23#include <asm/cputype.h>
24#include <asm/delay.h>
24#include <asm/localtimer.h> 25#include <asm/localtimer.h>
25#include <asm/arch_timer.h> 26#include <asm/arch_timer.h>
26#include <asm/system_info.h> 27#include <asm/system_info.h>
27#include <asm/sched_clock.h> 28#include <asm/sched_clock.h>
28 29
29static unsigned long arch_timer_rate; 30static unsigned long arch_timer_rate;
30static int arch_timer_ppi; 31
31static int arch_timer_ppi2; 32enum ppi_nr {
33 PHYS_SECURE_PPI,
34 PHYS_NONSECURE_PPI,
35 VIRT_PPI,
36 HYP_PPI,
37 MAX_TIMER_PPI
38};
39
40static int arch_timer_ppi[MAX_TIMER_PPI];
32 41
33static struct clock_event_device __percpu **arch_timer_evt; 42static struct clock_event_device __percpu **arch_timer_evt;
43static struct delay_timer arch_delay_timer;
34 44
35extern void init_current_timer_delay(unsigned long freq); 45static bool arch_timer_use_virtual = true;
36 46
37/* 47/*
38 * Architected system timer support. 48 * Architected system timer support.
@@ -46,50 +56,104 @@ extern void init_current_timer_delay(unsigned long freq);
46#define ARCH_TIMER_REG_FREQ 1 56#define ARCH_TIMER_REG_FREQ 1
47#define ARCH_TIMER_REG_TVAL 2 57#define ARCH_TIMER_REG_TVAL 2
48 58
49static void arch_timer_reg_write(int reg, u32 val) 59#define ARCH_TIMER_PHYS_ACCESS 0
60#define ARCH_TIMER_VIRT_ACCESS 1
61
62/*
63 * These register accessors are marked inline so the compiler can
64 * nicely work out which register we want, and chuck away the rest of
65 * the code. At least it does so with a recent GCC (4.6.3).
66 */
67static inline void arch_timer_reg_write(const int access, const int reg, u32 val)
50{ 68{
51 switch (reg) { 69 if (access == ARCH_TIMER_PHYS_ACCESS) {
52 case ARCH_TIMER_REG_CTRL: 70 switch (reg) {
53 asm volatile("mcr p15, 0, %0, c14, c2, 1" : : "r" (val)); 71 case ARCH_TIMER_REG_CTRL:
54 break; 72 asm volatile("mcr p15, 0, %0, c14, c2, 1" : : "r" (val));
55 case ARCH_TIMER_REG_TVAL: 73 break;
56 asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val)); 74 case ARCH_TIMER_REG_TVAL:
57 break; 75 asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val));
76 break;
77 }
78 }
79
80 if (access == ARCH_TIMER_VIRT_ACCESS) {
81 switch (reg) {
82 case ARCH_TIMER_REG_CTRL:
83 asm volatile("mcr p15, 0, %0, c14, c3, 1" : : "r" (val));
84 break;
85 case ARCH_TIMER_REG_TVAL:
86 asm volatile("mcr p15, 0, %0, c14, c3, 0" : : "r" (val));
87 break;
88 }
58 } 89 }
59 90
60 isb(); 91 isb();
61} 92}
62 93
63static u32 arch_timer_reg_read(int reg) 94static inline u32 arch_timer_reg_read(const int access, const int reg)
64{ 95{
65 u32 val; 96 u32 val = 0;
97
98 if (access == ARCH_TIMER_PHYS_ACCESS) {
99 switch (reg) {
100 case ARCH_TIMER_REG_CTRL:
101 asm volatile("mrc p15, 0, %0, c14, c2, 1" : "=r" (val));
102 break;
103 case ARCH_TIMER_REG_TVAL:
104 asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val));
105 break;
106 case ARCH_TIMER_REG_FREQ:
107 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val));
108 break;
109 }
110 }
66 111
67 switch (reg) { 112 if (access == ARCH_TIMER_VIRT_ACCESS) {
68 case ARCH_TIMER_REG_CTRL: 113 switch (reg) {
69 asm volatile("mrc p15, 0, %0, c14, c2, 1" : "=r" (val)); 114 case ARCH_TIMER_REG_CTRL:
70 break; 115 asm volatile("mrc p15, 0, %0, c14, c3, 1" : "=r" (val));
71 case ARCH_TIMER_REG_FREQ: 116 break;
72 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val)); 117 case ARCH_TIMER_REG_TVAL:
73 break; 118 asm volatile("mrc p15, 0, %0, c14, c3, 0" : "=r" (val));
74 case ARCH_TIMER_REG_TVAL: 119 break;
75 asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val)); 120 }
76 break;
77 default:
78 BUG();
79 } 121 }
80 122
81 return val; 123 return val;
82} 124}
83 125
84static irqreturn_t arch_timer_handler(int irq, void *dev_id) 126static inline cycle_t arch_timer_counter_read(const int access)
85{ 127{
86 struct clock_event_device *evt = *(struct clock_event_device **)dev_id; 128 cycle_t cval = 0;
87 unsigned long ctrl; 129
130 if (access == ARCH_TIMER_PHYS_ACCESS)
131 asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
132
133 if (access == ARCH_TIMER_VIRT_ACCESS)
134 asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval));
135
136 return cval;
137}
138
139static inline cycle_t arch_counter_get_cntpct(void)
140{
141 return arch_timer_counter_read(ARCH_TIMER_PHYS_ACCESS);
142}
88 143
89 ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL); 144static inline cycle_t arch_counter_get_cntvct(void)
145{
146 return arch_timer_counter_read(ARCH_TIMER_VIRT_ACCESS);
147}
148
149static irqreturn_t inline timer_handler(const int access,
150 struct clock_event_device *evt)
151{
152 unsigned long ctrl;
153 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
90 if (ctrl & ARCH_TIMER_CTRL_IT_STAT) { 154 if (ctrl & ARCH_TIMER_CTRL_IT_STAT) {
91 ctrl |= ARCH_TIMER_CTRL_IT_MASK; 155 ctrl |= ARCH_TIMER_CTRL_IT_MASK;
92 arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl); 156 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
93 evt->event_handler(evt); 157 evt->event_handler(evt);
94 return IRQ_HANDLED; 158 return IRQ_HANDLED;
95 } 159 }
@@ -97,63 +161,100 @@ static irqreturn_t arch_timer_handler(int irq, void *dev_id)
97 return IRQ_NONE; 161 return IRQ_NONE;
98} 162}
99 163
100static void arch_timer_disable(void) 164static irqreturn_t arch_timer_handler_virt(int irq, void *dev_id)
101{ 165{
102 unsigned long ctrl; 166 struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
103 167
104 ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL); 168 return timer_handler(ARCH_TIMER_VIRT_ACCESS, evt);
105 ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
106 arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
107} 169}
108 170
109static void arch_timer_set_mode(enum clock_event_mode mode, 171static irqreturn_t arch_timer_handler_phys(int irq, void *dev_id)
110 struct clock_event_device *clk)
111{ 172{
173 struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
174
175 return timer_handler(ARCH_TIMER_PHYS_ACCESS, evt);
176}
177
178static inline void timer_set_mode(const int access, int mode)
179{
180 unsigned long ctrl;
112 switch (mode) { 181 switch (mode) {
113 case CLOCK_EVT_MODE_UNUSED: 182 case CLOCK_EVT_MODE_UNUSED:
114 case CLOCK_EVT_MODE_SHUTDOWN: 183 case CLOCK_EVT_MODE_SHUTDOWN:
115 arch_timer_disable(); 184 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
185 ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
186 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
116 break; 187 break;
117 default: 188 default:
118 break; 189 break;
119 } 190 }
120} 191}
121 192
122static int arch_timer_set_next_event(unsigned long evt, 193static void arch_timer_set_mode_virt(enum clock_event_mode mode,
123 struct clock_event_device *unused) 194 struct clock_event_device *clk)
124{ 195{
125 unsigned long ctrl; 196 timer_set_mode(ARCH_TIMER_VIRT_ACCESS, mode);
197}
126 198
127 ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL); 199static void arch_timer_set_mode_phys(enum clock_event_mode mode,
200 struct clock_event_device *clk)
201{
202 timer_set_mode(ARCH_TIMER_PHYS_ACCESS, mode);
203}
204
205static inline void set_next_event(const int access, unsigned long evt)
206{
207 unsigned long ctrl;
208 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
128 ctrl |= ARCH_TIMER_CTRL_ENABLE; 209 ctrl |= ARCH_TIMER_CTRL_ENABLE;
129 ctrl &= ~ARCH_TIMER_CTRL_IT_MASK; 210 ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
211 arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt);
212 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
213}
130 214
131 arch_timer_reg_write(ARCH_TIMER_REG_TVAL, evt); 215static int arch_timer_set_next_event_virt(unsigned long evt,
132 arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl); 216 struct clock_event_device *unused)
217{
218 set_next_event(ARCH_TIMER_VIRT_ACCESS, evt);
219 return 0;
220}
133 221
222static int arch_timer_set_next_event_phys(unsigned long evt,
223 struct clock_event_device *unused)
224{
225 set_next_event(ARCH_TIMER_PHYS_ACCESS, evt);
134 return 0; 226 return 0;
135} 227}
136 228
137static int __cpuinit arch_timer_setup(struct clock_event_device *clk) 229static int __cpuinit arch_timer_setup(struct clock_event_device *clk)
138{ 230{
139 /* Be safe... */
140 arch_timer_disable();
141
142 clk->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP; 231 clk->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP;
143 clk->name = "arch_sys_timer"; 232 clk->name = "arch_sys_timer";
144 clk->rating = 450; 233 clk->rating = 450;
145 clk->set_mode = arch_timer_set_mode; 234 if (arch_timer_use_virtual) {
146 clk->set_next_event = arch_timer_set_next_event; 235 clk->irq = arch_timer_ppi[VIRT_PPI];
147 clk->irq = arch_timer_ppi; 236 clk->set_mode = arch_timer_set_mode_virt;
237 clk->set_next_event = arch_timer_set_next_event_virt;
238 } else {
239 clk->irq = arch_timer_ppi[PHYS_SECURE_PPI];
240 clk->set_mode = arch_timer_set_mode_phys;
241 clk->set_next_event = arch_timer_set_next_event_phys;
242 }
243
244 clk->set_mode(CLOCK_EVT_MODE_SHUTDOWN, NULL);
148 245
149 clockevents_config_and_register(clk, arch_timer_rate, 246 clockevents_config_and_register(clk, arch_timer_rate,
150 0xf, 0x7fffffff); 247 0xf, 0x7fffffff);
151 248
152 *__this_cpu_ptr(arch_timer_evt) = clk; 249 *__this_cpu_ptr(arch_timer_evt) = clk;
153 250
154 enable_percpu_irq(clk->irq, 0); 251 if (arch_timer_use_virtual)
155 if (arch_timer_ppi2) 252 enable_percpu_irq(arch_timer_ppi[VIRT_PPI], 0);
156 enable_percpu_irq(arch_timer_ppi2, 0); 253 else {
254 enable_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI], 0);
255 if (arch_timer_ppi[PHYS_NONSECURE_PPI])
256 enable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI], 0);
257 }
157 258
158 return 0; 259 return 0;
159} 260}
@@ -173,8 +274,8 @@ static int arch_timer_available(void)
173 return -ENXIO; 274 return -ENXIO;
174 275
175 if (arch_timer_rate == 0) { 276 if (arch_timer_rate == 0) {
176 arch_timer_reg_write(ARCH_TIMER_REG_CTRL, 0); 277 freq = arch_timer_reg_read(ARCH_TIMER_PHYS_ACCESS,
177 freq = arch_timer_reg_read(ARCH_TIMER_REG_FREQ); 278 ARCH_TIMER_REG_FREQ);
178 279
179 /* Check the timer frequency. */ 280 /* Check the timer frequency. */
180 if (freq == 0) { 281 if (freq == 0) {
@@ -185,52 +286,57 @@ static int arch_timer_available(void)
185 arch_timer_rate = freq; 286 arch_timer_rate = freq;
186 } 287 }
187 288
188 pr_info_once("Architected local timer running at %lu.%02luMHz.\n", 289 pr_info_once("Architected local timer running at %lu.%02luMHz (%s).\n",
189 arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100); 290 arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100,
291 arch_timer_use_virtual ? "virt" : "phys");
190 return 0; 292 return 0;
191} 293}
192 294
193static inline cycle_t arch_counter_get_cntpct(void) 295static u32 notrace arch_counter_get_cntpct32(void)
194{ 296{
195 u32 cvall, cvalh; 297 cycle_t cnt = arch_counter_get_cntpct();
196
197 asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (cvall), "=r" (cvalh));
198 298
199 return ((cycle_t) cvalh << 32) | cvall; 299 /*
200} 300 * The sched_clock infrastructure only knows about counters
201 301 * with at most 32bits. Forget about the upper 24 bits for the
202static inline cycle_t arch_counter_get_cntvct(void) 302 * time being...
203{ 303 */
204 u32 cvall, cvalh; 304 return (u32)cnt;
205
206 asm volatile("mrrc p15, 1, %0, %1, c14" : "=r" (cvall), "=r" (cvalh));
207
208 return ((cycle_t) cvalh << 32) | cvall;
209} 305}
210 306
211static u32 notrace arch_counter_get_cntvct32(void) 307static u32 notrace arch_counter_get_cntvct32(void)
212{ 308{
213 cycle_t cntvct = arch_counter_get_cntvct(); 309 cycle_t cnt = arch_counter_get_cntvct();
214 310
215 /* 311 /*
216 * The sched_clock infrastructure only knows about counters 312 * The sched_clock infrastructure only knows about counters
217 * with at most 32bits. Forget about the upper 24 bits for the 313 * with at most 32bits. Forget about the upper 24 bits for the
218 * time being... 314 * time being...
219 */ 315 */
220 return (u32)(cntvct & (u32)~0); 316 return (u32)cnt;
221} 317}
222 318
223static cycle_t arch_counter_read(struct clocksource *cs) 319static cycle_t arch_counter_read(struct clocksource *cs)
224{ 320{
321 /*
322 * Always use the physical counter for the clocksource.
323 * CNTHCTL.PL1PCTEN must be set to 1.
324 */
225 return arch_counter_get_cntpct(); 325 return arch_counter_get_cntpct();
226} 326}
227 327
228int read_current_timer(unsigned long *timer_val) 328static unsigned long arch_timer_read_current_timer(void)
229{ 329{
230 if (!arch_timer_rate) 330 return arch_counter_get_cntpct();
231 return -ENXIO; 331}
232 *timer_val = arch_counter_get_cntpct(); 332
233 return 0; 333static cycle_t arch_counter_read_cc(const struct cyclecounter *cc)
334{
335 /*
336 * Always use the physical counter for the clocksource.
337 * CNTHCTL.PL1PCTEN must be set to 1.
338 */
339 return arch_counter_get_cntpct();
234} 340}
235 341
236static struct clocksource clocksource_counter = { 342static struct clocksource clocksource_counter = {
@@ -241,14 +347,32 @@ static struct clocksource clocksource_counter = {
241 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 347 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
242}; 348};
243 349
350static struct cyclecounter cyclecounter = {
351 .read = arch_counter_read_cc,
352 .mask = CLOCKSOURCE_MASK(56),
353};
354
355static struct timecounter timecounter;
356
357struct timecounter *arch_timer_get_timecounter(void)
358{
359 return &timecounter;
360}
361
244static void __cpuinit arch_timer_stop(struct clock_event_device *clk) 362static void __cpuinit arch_timer_stop(struct clock_event_device *clk)
245{ 363{
246 pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n", 364 pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n",
247 clk->irq, smp_processor_id()); 365 clk->irq, smp_processor_id());
248 disable_percpu_irq(clk->irq); 366
249 if (arch_timer_ppi2) 367 if (arch_timer_use_virtual)
250 disable_percpu_irq(arch_timer_ppi2); 368 disable_percpu_irq(arch_timer_ppi[VIRT_PPI]);
251 arch_timer_set_mode(CLOCK_EVT_MODE_UNUSED, clk); 369 else {
370 disable_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI]);
371 if (arch_timer_ppi[PHYS_NONSECURE_PPI])
372 disable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI]);
373 }
374
375 clk->set_mode(CLOCK_EVT_MODE_UNUSED, clk);
252} 376}
253 377
254static struct local_timer_ops arch_timer_ops __cpuinitdata = { 378static struct local_timer_ops arch_timer_ops __cpuinitdata = {
@@ -261,36 +385,48 @@ static struct clock_event_device arch_timer_global_evt;
261static int __init arch_timer_register(void) 385static int __init arch_timer_register(void)
262{ 386{
263 int err; 387 int err;
388 int ppi;
264 389
265 err = arch_timer_available(); 390 err = arch_timer_available();
266 if (err) 391 if (err)
267 return err; 392 goto out;
268 393
269 arch_timer_evt = alloc_percpu(struct clock_event_device *); 394 arch_timer_evt = alloc_percpu(struct clock_event_device *);
270 if (!arch_timer_evt) 395 if (!arch_timer_evt) {
271 return -ENOMEM; 396 err = -ENOMEM;
397 goto out;
398 }
272 399
273 clocksource_register_hz(&clocksource_counter, arch_timer_rate); 400 clocksource_register_hz(&clocksource_counter, arch_timer_rate);
401 cyclecounter.mult = clocksource_counter.mult;
402 cyclecounter.shift = clocksource_counter.shift;
403 timecounter_init(&timecounter, &cyclecounter,
404 arch_counter_get_cntpct());
405
406 if (arch_timer_use_virtual) {
407 ppi = arch_timer_ppi[VIRT_PPI];
408 err = request_percpu_irq(ppi, arch_timer_handler_virt,
409 "arch_timer", arch_timer_evt);
410 } else {
411 ppi = arch_timer_ppi[PHYS_SECURE_PPI];
412 err = request_percpu_irq(ppi, arch_timer_handler_phys,
413 "arch_timer", arch_timer_evt);
414 if (!err && arch_timer_ppi[PHYS_NONSECURE_PPI]) {
415 ppi = arch_timer_ppi[PHYS_NONSECURE_PPI];
416 err = request_percpu_irq(ppi, arch_timer_handler_phys,
417 "arch_timer", arch_timer_evt);
418 if (err)
419 free_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI],
420 arch_timer_evt);
421 }
422 }
274 423
275 err = request_percpu_irq(arch_timer_ppi, arch_timer_handler,
276 "arch_timer", arch_timer_evt);
277 if (err) { 424 if (err) {
278 pr_err("arch_timer: can't register interrupt %d (%d)\n", 425 pr_err("arch_timer: can't register interrupt %d (%d)\n",
279 arch_timer_ppi, err); 426 ppi, err);
280 goto out_free; 427 goto out_free;
281 } 428 }
282 429
283 if (arch_timer_ppi2) {
284 err = request_percpu_irq(arch_timer_ppi2, arch_timer_handler,
285 "arch_timer", arch_timer_evt);
286 if (err) {
287 pr_err("arch_timer: can't register interrupt %d (%d)\n",
288 arch_timer_ppi2, err);
289 arch_timer_ppi2 = 0;
290 goto out_free_irq;
291 }
292 }
293
294 err = local_timer_register(&arch_timer_ops); 430 err = local_timer_register(&arch_timer_ops);
295 if (err) { 431 if (err) {
296 /* 432 /*
@@ -302,21 +438,29 @@ static int __init arch_timer_register(void)
302 arch_timer_global_evt.cpumask = cpumask_of(0); 438 arch_timer_global_evt.cpumask = cpumask_of(0);
303 err = arch_timer_setup(&arch_timer_global_evt); 439 err = arch_timer_setup(&arch_timer_global_evt);
304 } 440 }
305
306 if (err) 441 if (err)
307 goto out_free_irq; 442 goto out_free_irq;
308 443
309 init_current_timer_delay(arch_timer_rate); 444 /* Use the architected timer for the delay loop. */
445 arch_delay_timer.read_current_timer = &arch_timer_read_current_timer;
446 arch_delay_timer.freq = arch_timer_rate;
447 register_current_timer_delay(&arch_delay_timer);
310 return 0; 448 return 0;
311 449
312out_free_irq: 450out_free_irq:
313 free_percpu_irq(arch_timer_ppi, arch_timer_evt); 451 if (arch_timer_use_virtual)
314 if (arch_timer_ppi2) 452 free_percpu_irq(arch_timer_ppi[VIRT_PPI], arch_timer_evt);
315 free_percpu_irq(arch_timer_ppi2, arch_timer_evt); 453 else {
454 free_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI],
455 arch_timer_evt);
456 if (arch_timer_ppi[PHYS_NONSECURE_PPI])
457 free_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI],
458 arch_timer_evt);
459 }
316 460
317out_free: 461out_free:
318 free_percpu(arch_timer_evt); 462 free_percpu(arch_timer_evt);
319 463out:
320 return err; 464 return err;
321} 465}
322 466
@@ -329,6 +473,7 @@ int __init arch_timer_of_register(void)
329{ 473{
330 struct device_node *np; 474 struct device_node *np;
331 u32 freq; 475 u32 freq;
476 int i;
332 477
333 np = of_find_matching_node(NULL, arch_timer_of_match); 478 np = of_find_matching_node(NULL, arch_timer_of_match);
334 if (!np) { 479 if (!np) {
@@ -340,22 +485,40 @@ int __init arch_timer_of_register(void)
340 if (!of_property_read_u32(np, "clock-frequency", &freq)) 485 if (!of_property_read_u32(np, "clock-frequency", &freq))
341 arch_timer_rate = freq; 486 arch_timer_rate = freq;
342 487
343 arch_timer_ppi = irq_of_parse_and_map(np, 0); 488 for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++)
344 arch_timer_ppi2 = irq_of_parse_and_map(np, 1); 489 arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
345 pr_info("arch_timer: found %s irqs %d %d\n", 490
346 np->name, arch_timer_ppi, arch_timer_ppi2); 491 /*
492 * If no interrupt provided for virtual timer, we'll have to
493 * stick to the physical timer. It'd better be accessible...
494 */
495 if (!arch_timer_ppi[VIRT_PPI]) {
496 arch_timer_use_virtual = false;
497
498 if (!arch_timer_ppi[PHYS_SECURE_PPI] ||
499 !arch_timer_ppi[PHYS_NONSECURE_PPI]) {
500 pr_warn("arch_timer: No interrupt available, giving up\n");
501 return -EINVAL;
502 }
503 }
347 504
348 return arch_timer_register(); 505 return arch_timer_register();
349} 506}
350 507
351int __init arch_timer_sched_clock_init(void) 508int __init arch_timer_sched_clock_init(void)
352{ 509{
510 u32 (*cnt32)(void);
353 int err; 511 int err;
354 512
355 err = arch_timer_available(); 513 err = arch_timer_available();
356 if (err) 514 if (err)
357 return err; 515 return err;
358 516
359 setup_sched_clock(arch_counter_get_cntvct32, 32, arch_timer_rate); 517 if (arch_timer_use_virtual)
518 cnt32 = arch_counter_get_cntvct32;
519 else
520 cnt32 = arch_counter_get_cntpct32;
521
522 setup_sched_clock(cnt32, 32, arch_timer_rate);
360 return 0; 523 return 0;
361} 524}
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 1429d8989fb9..c985b481192c 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -59,10 +59,12 @@ int main(void)
59 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp)); 59 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
60 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value)); 60 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
61 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate)); 61 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
62#ifdef CONFIG_VFP
62 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate)); 63 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
63#ifdef CONFIG_SMP 64#ifdef CONFIG_SMP
64 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu)); 65 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
65#endif 66#endif
67#endif
66#ifdef CONFIG_ARM_THUMBEE 68#ifdef CONFIG_ARM_THUMBEE
67 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state)); 69 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
68#endif 70#endif
diff --git a/arch/arm/kernel/atags.h b/arch/arm/kernel/atags.h
index e5f028d214a1..9edc9692332d 100644
--- a/arch/arm/kernel/atags.h
+++ b/arch/arm/kernel/atags.h
@@ -3,3 +3,17 @@ extern void save_atags(struct tag *tags);
3#else 3#else
4static inline void save_atags(struct tag *tags) { } 4static inline void save_atags(struct tag *tags) { }
5#endif 5#endif
6
7void convert_to_tag_list(struct tag *tags);
8
9#ifdef CONFIG_ATAGS
10struct machine_desc *setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr);
11#else
12static inline struct machine_desc *
13setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
14{
15 early_print("no ATAGS support: can't continue\n");
16 while (true);
17 unreachable();
18}
19#endif
diff --git a/arch/arm/kernel/compat.c b/arch/arm/kernel/atags_compat.c
index 925652318b8b..5236ad38f417 100644
--- a/arch/arm/kernel/compat.c
+++ b/arch/arm/kernel/atags_compat.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/kernel/compat.c 2 * linux/arch/arm/kernel/atags_compat.c
3 * 3 *
4 * Copyright (C) 2001 Russell King 4 * Copyright (C) 2001 Russell King
5 * 5 *
@@ -26,7 +26,7 @@
26 26
27#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
28 28
29#include "compat.h" 29#include "atags.h"
30 30
31/* 31/*
32 * Usage: 32 * Usage:
diff --git a/arch/arm/kernel/atags_parse.c b/arch/arm/kernel/atags_parse.c
new file mode 100644
index 000000000000..14512e6931d8
--- /dev/null
+++ b/arch/arm/kernel/atags_parse.c
@@ -0,0 +1,238 @@
1/*
2 * Tag parsing.
3 *
4 * Copyright (C) 1995-2001 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/*
12 * This is the traditional way of passing data to the kernel at boot time. Rather
13 * than passing a fixed inflexible structure to the kernel, we pass a list
14 * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
15 * tag for the list to be recognised (to distinguish the tagged list from
16 * a param_struct). The list is terminated with a zero-length tag (this tag
17 * is not parsed in any way).
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/fs.h>
23#include <linux/root_dev.h>
24#include <linux/screen_info.h>
25
26#include <asm/setup.h>
27#include <asm/system_info.h>
28#include <asm/page.h>
29#include <asm/mach/arch.h>
30
31#include "atags.h"
32
33static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
34
35#ifndef MEM_SIZE
36#define MEM_SIZE (16*1024*1024)
37#endif
38
39static struct {
40 struct tag_header hdr1;
41 struct tag_core core;
42 struct tag_header hdr2;
43 struct tag_mem32 mem;
44 struct tag_header hdr3;
45} default_tags __initdata = {
46 { tag_size(tag_core), ATAG_CORE },
47 { 1, PAGE_SIZE, 0xff },
48 { tag_size(tag_mem32), ATAG_MEM },
49 { MEM_SIZE },
50 { 0, ATAG_NONE }
51};
52
53static int __init parse_tag_core(const struct tag *tag)
54{
55 if (tag->hdr.size > 2) {
56 if ((tag->u.core.flags & 1) == 0)
57 root_mountflags &= ~MS_RDONLY;
58 ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
59 }
60 return 0;
61}
62
63__tagtable(ATAG_CORE, parse_tag_core);
64
65static int __init parse_tag_mem32(const struct tag *tag)
66{
67 return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
68}
69
70__tagtable(ATAG_MEM, parse_tag_mem32);
71
72#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
73static int __init parse_tag_videotext(const struct tag *tag)
74{
75 screen_info.orig_x = tag->u.videotext.x;
76 screen_info.orig_y = tag->u.videotext.y;
77 screen_info.orig_video_page = tag->u.videotext.video_page;
78 screen_info.orig_video_mode = tag->u.videotext.video_mode;
79 screen_info.orig_video_cols = tag->u.videotext.video_cols;
80 screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
81 screen_info.orig_video_lines = tag->u.videotext.video_lines;
82 screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
83 screen_info.orig_video_points = tag->u.videotext.video_points;
84 return 0;
85}
86
87__tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
88#endif
89
90#ifdef CONFIG_BLK_DEV_RAM
91static int __init parse_tag_ramdisk(const struct tag *tag)
92{
93 extern int rd_size, rd_image_start, rd_prompt, rd_doload;
94
95 rd_image_start = tag->u.ramdisk.start;
96 rd_doload = (tag->u.ramdisk.flags & 1) == 0;
97 rd_prompt = (tag->u.ramdisk.flags & 2) == 0;
98
99 if (tag->u.ramdisk.size)
100 rd_size = tag->u.ramdisk.size;
101
102 return 0;
103}
104
105__tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
106#endif
107
108static int __init parse_tag_serialnr(const struct tag *tag)
109{
110 system_serial_low = tag->u.serialnr.low;
111 system_serial_high = tag->u.serialnr.high;
112 return 0;
113}
114
115__tagtable(ATAG_SERIAL, parse_tag_serialnr);
116
117static int __init parse_tag_revision(const struct tag *tag)
118{
119 system_rev = tag->u.revision.rev;
120 return 0;
121}
122
123__tagtable(ATAG_REVISION, parse_tag_revision);
124
125static int __init parse_tag_cmdline(const struct tag *tag)
126{
127#if defined(CONFIG_CMDLINE_EXTEND)
128 strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
129 strlcat(default_command_line, tag->u.cmdline.cmdline,
130 COMMAND_LINE_SIZE);
131#elif defined(CONFIG_CMDLINE_FORCE)
132 pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
133#else
134 strlcpy(default_command_line, tag->u.cmdline.cmdline,
135 COMMAND_LINE_SIZE);
136#endif
137 return 0;
138}
139
140__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
141
142/*
143 * Scan the tag table for this tag, and call its parse function.
144 * The tag table is built by the linker from all the __tagtable
145 * declarations.
146 */
147static int __init parse_tag(const struct tag *tag)
148{
149 extern struct tagtable __tagtable_begin, __tagtable_end;
150 struct tagtable *t;
151
152 for (t = &__tagtable_begin; t < &__tagtable_end; t++)
153 if (tag->hdr.tag == t->tag) {
154 t->parse(tag);
155 break;
156 }
157
158 return t < &__tagtable_end;
159}
160
161/*
162 * Parse all tags in the list, checking both the global and architecture
163 * specific tag tables.
164 */
165static void __init parse_tags(const struct tag *t)
166{
167 for (; t->hdr.size; t = tag_next(t))
168 if (!parse_tag(t))
169 printk(KERN_WARNING
170 "Ignoring unrecognised tag 0x%08x\n",
171 t->hdr.tag);
172}
173
174static void __init squash_mem_tags(struct tag *tag)
175{
176 for (; tag->hdr.size; tag = tag_next(tag))
177 if (tag->hdr.tag == ATAG_MEM)
178 tag->hdr.tag = ATAG_NONE;
179}
180
181struct machine_desc * __init setup_machine_tags(phys_addr_t __atags_pointer,
182 unsigned int machine_nr)
183{
184 struct tag *tags = (struct tag *)&default_tags;
185 struct machine_desc *mdesc = NULL, *p;
186 char *from = default_command_line;
187
188 default_tags.mem.start = PHYS_OFFSET;
189
190 /*
191 * locate machine in the list of supported machines.
192 */
193 for_each_machine_desc(p)
194 if (machine_nr == p->nr) {
195 printk("Machine: %s\n", p->name);
196 mdesc = p;
197 break;
198 }
199
200 if (!mdesc) {
201 early_print("\nError: unrecognized/unsupported machine ID"
202 " (r1 = 0x%08x).\n\n", machine_nr);
203 dump_machine_table(); /* does not return */
204 }
205
206 if (__atags_pointer)
207 tags = phys_to_virt(__atags_pointer);
208 else if (mdesc->atag_offset)
209 tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
210
211#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
212 /*
213 * If we have the old style parameters, convert them to
214 * a tag list.
215 */
216 if (tags->hdr.tag != ATAG_CORE)
217 convert_to_tag_list(tags);
218#endif
219 if (tags->hdr.tag != ATAG_CORE) {
220 early_print("Warning: Neither atags nor dtb found\n");
221 tags = (struct tag *)&default_tags;
222 }
223
224 if (mdesc->fixup)
225 mdesc->fixup(tags, &from, &meminfo);
226
227 if (tags->hdr.tag == ATAG_CORE) {
228 if (meminfo.nr_banks != 0)
229 squash_mem_tags(tags);
230 save_atags(tags);
231 parse_tags(tags);
232 }
233
234 /* parse_early_param needs a boot_command_line */
235 strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
236
237 return mdesc;
238}
diff --git a/arch/arm/kernel/atags.c b/arch/arm/kernel/atags_proc.c
index 42a1a1415fa6..42a1a1415fa6 100644
--- a/arch/arm/kernel/atags.c
+++ b/arch/arm/kernel/atags_proc.c
diff --git a/arch/arm/kernel/compat.h b/arch/arm/kernel/compat.h
deleted file mode 100644
index 39264ab1b9c6..000000000000
--- a/arch/arm/kernel/compat.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/*
2 * linux/arch/arm/kernel/compat.h
3 *
4 * Copyright (C) 2001 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11extern void convert_to_tag_list(struct tag *tags);
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 978eac57e04a..f45987037bf1 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -94,6 +94,15 @@ ENDPROC(ret_from_fork)
94 .equ NR_syscalls,0 94 .equ NR_syscalls,0
95#define CALL(x) .equ NR_syscalls,NR_syscalls+1 95#define CALL(x) .equ NR_syscalls,NR_syscalls+1
96#include "calls.S" 96#include "calls.S"
97
98/*
99 * Ensure that the system call table is equal to __NR_syscalls,
100 * which is the value the rest of the system sees
101 */
102.ifne NR_syscalls - __NR_syscalls
103.error "__NR_syscalls is not equal to the size of the syscall table"
104.endif
105
97#undef CALL 106#undef CALL
98#define CALL(x) .long x 107#define CALL(x) .long x
99 108
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index dfcdb9f7c126..e29c3337ca81 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -8,7 +8,9 @@
8#include <linux/reboot.h> 8#include <linux/reboot.h>
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/irq.h> 10#include <linux/irq.h>
11#include <linux/memblock.h>
11#include <asm/pgtable.h> 12#include <asm/pgtable.h>
13#include <linux/of_fdt.h>
12#include <asm/pgalloc.h> 14#include <asm/pgalloc.h>
13#include <asm/mmu_context.h> 15#include <asm/mmu_context.h>
14#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
@@ -32,6 +34,29 @@ static atomic_t waiting_for_crash_ipi;
32 34
33int machine_kexec_prepare(struct kimage *image) 35int machine_kexec_prepare(struct kimage *image)
34{ 36{
37 struct kexec_segment *current_segment;
38 __be32 header;
39 int i, err;
40
41 /*
42 * No segment at default ATAGs address. try to locate
43 * a dtb using magic.
44 */
45 for (i = 0; i < image->nr_segments; i++) {
46 current_segment = &image->segment[i];
47
48 err = memblock_is_region_memory(current_segment->mem,
49 current_segment->memsz);
50 if (err)
51 return - EINVAL;
52
53 err = get_user(header, (__be32*)current_segment->buf);
54 if (err)
55 return err;
56
57 if (be32_to_cpu(header) == OF_DT_HEADER)
58 kexec_boot_atags = current_segment->mem;
59 }
35 return 0; 60 return 0;
36} 61}
37 62
@@ -122,7 +147,9 @@ void machine_kexec(struct kimage *image)
122 kexec_start_address = image->start; 147 kexec_start_address = image->start;
123 kexec_indirection_page = page_list; 148 kexec_indirection_page = page_list;
124 kexec_mach_type = machine_arch_type; 149 kexec_mach_type = machine_arch_type;
125 kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; 150 if (!kexec_boot_atags)
151 kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
152
126 153
127 /* copy our kernel relocation code to the control code page */ 154 /* copy our kernel relocation code to the control code page */
128 memcpy(reboot_code_buffer, 155 memcpy(reboot_code_buffer,
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 3e0fc5f7ed4b..739db3a1b2d2 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -30,6 +30,9 @@
30#include <asm/pgtable.h> 30#include <asm/pgtable.h>
31#include <asm/traps.h> 31#include <asm/traps.h>
32 32
33#define CREATE_TRACE_POINTS
34#include <trace/events/syscalls.h>
35
33#define REG_PC 15 36#define REG_PC 15
34#define REG_PSR 16 37#define REG_PSR 16
35/* 38/*
@@ -918,11 +921,11 @@ static int ptrace_syscall_trace(struct pt_regs *regs, int scno,
918{ 921{
919 unsigned long ip; 922 unsigned long ip;
920 923
924 current_thread_info()->syscall = scno;
925
921 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 926 if (!test_thread_flag(TIF_SYSCALL_TRACE))
922 return scno; 927 return scno;
923 928
924 current_thread_info()->syscall = scno;
925
926 /* 929 /*
927 * IP is used to denote syscall entry/exit: 930 * IP is used to denote syscall entry/exit:
928 * IP = 0 -> entry, =1 -> exit 931 * IP = 0 -> entry, =1 -> exit
@@ -941,15 +944,19 @@ static int ptrace_syscall_trace(struct pt_regs *regs, int scno,
941 944
942asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno) 945asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
943{ 946{
944 int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER); 947 scno = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER);
948 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
949 trace_sys_enter(regs, scno);
945 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1, 950 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1,
946 regs->ARM_r2, regs->ARM_r3); 951 regs->ARM_r2, regs->ARM_r3);
947 return ret; 952 return scno;
948} 953}
949 954
950asmlinkage int syscall_trace_exit(struct pt_regs *regs, int scno) 955asmlinkage int syscall_trace_exit(struct pt_regs *regs, int scno)
951{ 956{
952 int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT); 957 scno = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT);
958 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
959 trace_sys_exit(regs, scno);
953 audit_syscall_exit(regs); 960 audit_syscall_exit(regs);
954 return ret; 961 return scno;
955} 962}
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index f4515393248d..e21bac20d90d 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -9,6 +9,7 @@
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/jiffies.h> 10#include <linux/jiffies.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/moduleparam.h>
12#include <linux/sched.h> 13#include <linux/sched.h>
13#include <linux/syscore_ops.h> 14#include <linux/syscore_ops.h>
14#include <linux/timer.h> 15#include <linux/timer.h>
@@ -27,6 +28,9 @@ struct clock_data {
27 28
28static void sched_clock_poll(unsigned long wrap_ticks); 29static void sched_clock_poll(unsigned long wrap_ticks);
29static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0); 30static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
31static int irqtime = -1;
32
33core_param(irqtime, irqtime, int, 0400);
30 34
31static struct clock_data cd = { 35static struct clock_data cd = {
32 .mult = NSEC_PER_SEC / HZ, 36 .mult = NSEC_PER_SEC / HZ,
@@ -157,6 +161,10 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
157 */ 161 */
158 cd.epoch_ns = 0; 162 cd.epoch_ns = 0;
159 163
164 /* Enable IRQ time accounting if we have a fast enough sched_clock */
165 if (irqtime > 0 || (irqtime == -1 && rate >= 1000000))
166 enable_sched_clock_irqtime();
167
160 pr_debug("Registered %pF as sched_clock source\n", read); 168 pr_debug("Registered %pF as sched_clock source\n", read);
161} 169}
162 170
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 725f9f2a9541..febafa0f552d 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -21,11 +21,9 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kexec.h> 22#include <linux/kexec.h>
23#include <linux/of_fdt.h> 23#include <linux/of_fdt.h>
24#include <linux/root_dev.h>
25#include <linux/cpu.h> 24#include <linux/cpu.h>
26#include <linux/interrupt.h> 25#include <linux/interrupt.h>
27#include <linux/smp.h> 26#include <linux/smp.h>
28#include <linux/fs.h>
29#include <linux/proc_fs.h> 27#include <linux/proc_fs.h>
30#include <linux/memblock.h> 28#include <linux/memblock.h>
31#include <linux/bug.h> 29#include <linux/bug.h>
@@ -56,15 +54,9 @@
56#include <asm/unwind.h> 54#include <asm/unwind.h>
57#include <asm/memblock.h> 55#include <asm/memblock.h>
58 56
59#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
60#include "compat.h"
61#endif
62#include "atags.h" 57#include "atags.h"
63#include "tcm.h" 58#include "tcm.h"
64 59
65#ifndef MEM_SIZE
66#define MEM_SIZE (16*1024*1024)
67#endif
68 60
69#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE) 61#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
70char fpe_type[8]; 62char fpe_type[8];
@@ -145,7 +137,6 @@ static const char *machine_name;
145static char __initdata cmd_line[COMMAND_LINE_SIZE]; 137static char __initdata cmd_line[COMMAND_LINE_SIZE];
146struct machine_desc *machine_desc __initdata; 138struct machine_desc *machine_desc __initdata;
147 139
148static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
149static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } }; 140static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
150#define ENDIANNESS ((char)endian_test.l) 141#define ENDIANNESS ((char)endian_test.l)
151 142
@@ -583,21 +574,6 @@ static int __init early_mem(char *p)
583} 574}
584early_param("mem", early_mem); 575early_param("mem", early_mem);
585 576
586static void __init
587setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
588{
589#ifdef CONFIG_BLK_DEV_RAM
590 extern int rd_size, rd_image_start, rd_prompt, rd_doload;
591
592 rd_image_start = image_start;
593 rd_prompt = prompt;
594 rd_doload = doload;
595
596 if (rd_sz)
597 rd_size = rd_sz;
598#endif
599}
600
601static void __init request_standard_resources(struct machine_desc *mdesc) 577static void __init request_standard_resources(struct machine_desc *mdesc)
602{ 578{
603 struct memblock_region *region; 579 struct memblock_region *region;
@@ -643,35 +619,6 @@ static void __init request_standard_resources(struct machine_desc *mdesc)
643 request_resource(&ioport_resource, &lp2); 619 request_resource(&ioport_resource, &lp2);
644} 620}
645 621
646/*
647 * Tag parsing.
648 *
649 * This is the new way of passing data to the kernel at boot time. Rather
650 * than passing a fixed inflexible structure to the kernel, we pass a list
651 * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
652 * tag for the list to be recognised (to distinguish the tagged list from
653 * a param_struct). The list is terminated with a zero-length tag (this tag
654 * is not parsed in any way).
655 */
656static int __init parse_tag_core(const struct tag *tag)
657{
658 if (tag->hdr.size > 2) {
659 if ((tag->u.core.flags & 1) == 0)
660 root_mountflags &= ~MS_RDONLY;
661 ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
662 }
663 return 0;
664}
665
666__tagtable(ATAG_CORE, parse_tag_core);
667
668static int __init parse_tag_mem32(const struct tag *tag)
669{
670 return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
671}
672
673__tagtable(ATAG_MEM, parse_tag_mem32);
674
675#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) 622#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
676struct screen_info screen_info = { 623struct screen_info screen_info = {
677 .orig_video_lines = 30, 624 .orig_video_lines = 30,
@@ -681,117 +628,8 @@ struct screen_info screen_info = {
681 .orig_video_isVGA = 1, 628 .orig_video_isVGA = 1,
682 .orig_video_points = 8 629 .orig_video_points = 8
683}; 630};
684
685static int __init parse_tag_videotext(const struct tag *tag)
686{
687 screen_info.orig_x = tag->u.videotext.x;
688 screen_info.orig_y = tag->u.videotext.y;
689 screen_info.orig_video_page = tag->u.videotext.video_page;
690 screen_info.orig_video_mode = tag->u.videotext.video_mode;
691 screen_info.orig_video_cols = tag->u.videotext.video_cols;
692 screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
693 screen_info.orig_video_lines = tag->u.videotext.video_lines;
694 screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
695 screen_info.orig_video_points = tag->u.videotext.video_points;
696 return 0;
697}
698
699__tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
700#endif 631#endif
701 632
702static int __init parse_tag_ramdisk(const struct tag *tag)
703{
704 setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
705 (tag->u.ramdisk.flags & 2) == 0,
706 tag->u.ramdisk.start, tag->u.ramdisk.size);
707 return 0;
708}
709
710__tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
711
712static int __init parse_tag_serialnr(const struct tag *tag)
713{
714 system_serial_low = tag->u.serialnr.low;
715 system_serial_high = tag->u.serialnr.high;
716 return 0;
717}
718
719__tagtable(ATAG_SERIAL, parse_tag_serialnr);
720
721static int __init parse_tag_revision(const struct tag *tag)
722{
723 system_rev = tag->u.revision.rev;
724 return 0;
725}
726
727__tagtable(ATAG_REVISION, parse_tag_revision);
728
729static int __init parse_tag_cmdline(const struct tag *tag)
730{
731#if defined(CONFIG_CMDLINE_EXTEND)
732 strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
733 strlcat(default_command_line, tag->u.cmdline.cmdline,
734 COMMAND_LINE_SIZE);
735#elif defined(CONFIG_CMDLINE_FORCE)
736 pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
737#else
738 strlcpy(default_command_line, tag->u.cmdline.cmdline,
739 COMMAND_LINE_SIZE);
740#endif
741 return 0;
742}
743
744__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
745
746/*
747 * Scan the tag table for this tag, and call its parse function.
748 * The tag table is built by the linker from all the __tagtable
749 * declarations.
750 */
751static int __init parse_tag(const struct tag *tag)
752{
753 extern struct tagtable __tagtable_begin, __tagtable_end;
754 struct tagtable *t;
755
756 for (t = &__tagtable_begin; t < &__tagtable_end; t++)
757 if (tag->hdr.tag == t->tag) {
758 t->parse(tag);
759 break;
760 }
761
762 return t < &__tagtable_end;
763}
764
765/*
766 * Parse all tags in the list, checking both the global and architecture
767 * specific tag tables.
768 */
769static void __init parse_tags(const struct tag *t)
770{
771 for (; t->hdr.size; t = tag_next(t))
772 if (!parse_tag(t))
773 printk(KERN_WARNING
774 "Ignoring unrecognised tag 0x%08x\n",
775 t->hdr.tag);
776}
777
778/*
779 * This holds our defaults.
780 */
781static struct init_tags {
782 struct tag_header hdr1;
783 struct tag_core core;
784 struct tag_header hdr2;
785 struct tag_mem32 mem;
786 struct tag_header hdr3;
787} init_tags __initdata = {
788 { tag_size(tag_core), ATAG_CORE },
789 { 1, PAGE_SIZE, 0xff },
790 { tag_size(tag_mem32), ATAG_MEM },
791 { MEM_SIZE },
792 { 0, ATAG_NONE }
793};
794
795static int __init customize_machine(void) 633static int __init customize_machine(void)
796{ 634{
797 /* customizes platform devices, or adds new ones */ 635 /* customizes platform devices, or adds new ones */
@@ -858,78 +696,6 @@ static void __init reserve_crashkernel(void)
858static inline void reserve_crashkernel(void) {} 696static inline void reserve_crashkernel(void) {}
859#endif /* CONFIG_KEXEC */ 697#endif /* CONFIG_KEXEC */
860 698
861static void __init squash_mem_tags(struct tag *tag)
862{
863 for (; tag->hdr.size; tag = tag_next(tag))
864 if (tag->hdr.tag == ATAG_MEM)
865 tag->hdr.tag = ATAG_NONE;
866}
867
868static struct machine_desc * __init setup_machine_tags(unsigned int nr)
869{
870 struct tag *tags = (struct tag *)&init_tags;
871 struct machine_desc *mdesc = NULL, *p;
872 char *from = default_command_line;
873
874 init_tags.mem.start = PHYS_OFFSET;
875
876 /*
877 * locate machine in the list of supported machines.
878 */
879 for_each_machine_desc(p)
880 if (nr == p->nr) {
881 printk("Machine: %s\n", p->name);
882 mdesc = p;
883 break;
884 }
885
886 if (!mdesc) {
887 early_print("\nError: unrecognized/unsupported machine ID"
888 " (r1 = 0x%08x).\n\n", nr);
889 dump_machine_table(); /* does not return */
890 }
891
892 if (__atags_pointer)
893 tags = phys_to_virt(__atags_pointer);
894 else if (mdesc->atag_offset)
895 tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
896
897#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
898 /*
899 * If we have the old style parameters, convert them to
900 * a tag list.
901 */
902 if (tags->hdr.tag != ATAG_CORE)
903 convert_to_tag_list(tags);
904#endif
905
906 if (tags->hdr.tag != ATAG_CORE) {
907#if defined(CONFIG_OF)
908 /*
909 * If CONFIG_OF is set, then assume this is a reasonably
910 * modern system that should pass boot parameters
911 */
912 early_print("Warning: Neither atags nor dtb found\n");
913#endif
914 tags = (struct tag *)&init_tags;
915 }
916
917 if (mdesc->fixup)
918 mdesc->fixup(tags, &from, &meminfo);
919
920 if (tags->hdr.tag == ATAG_CORE) {
921 if (meminfo.nr_banks != 0)
922 squash_mem_tags(tags);
923 save_atags(tags);
924 parse_tags(tags);
925 }
926
927 /* parse_early_param needs a boot_command_line */
928 strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
929
930 return mdesc;
931}
932
933static int __init meminfo_cmp(const void *_a, const void *_b) 699static int __init meminfo_cmp(const void *_a, const void *_b)
934{ 700{
935 const struct membank *a = _a, *b = _b; 701 const struct membank *a = _a, *b = _b;
@@ -944,7 +710,7 @@ void __init setup_arch(char **cmdline_p)
944 setup_processor(); 710 setup_processor();
945 mdesc = setup_machine_fdt(__atags_pointer); 711 mdesc = setup_machine_fdt(__atags_pointer);
946 if (!mdesc) 712 if (!mdesc)
947 mdesc = setup_machine_tags(machine_arch_type); 713 mdesc = setup_machine_tags(__atags_pointer, machine_arch_type);
948 machine_desc = mdesc; 714 machine_desc = mdesc;
949 machine_name = mdesc->name; 715 machine_name = mdesc->name;
950 716
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index dea7a925c7e2..d100eacdb798 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -59,7 +59,8 @@ struct secondary_data secondary_data;
59volatile int __cpuinitdata pen_release = -1; 59volatile int __cpuinitdata pen_release = -1;
60 60
61enum ipi_msg_type { 61enum ipi_msg_type {
62 IPI_TIMER = 2, 62 IPI_WAKEUP,
63 IPI_TIMER,
63 IPI_RESCHEDULE, 64 IPI_RESCHEDULE,
64 IPI_CALL_FUNC, 65 IPI_CALL_FUNC,
65 IPI_CALL_FUNC_SINGLE, 66 IPI_CALL_FUNC_SINGLE,
@@ -414,7 +415,8 @@ void arch_send_call_function_single_ipi(int cpu)
414} 415}
415 416
416static const char *ipi_types[NR_IPI] = { 417static const char *ipi_types[NR_IPI] = {
417#define S(x,s) [x - IPI_TIMER] = s 418#define S(x,s) [x] = s
419 S(IPI_WAKEUP, "CPU wakeup interrupts"),
418 S(IPI_TIMER, "Timer broadcast interrupts"), 420 S(IPI_TIMER, "Timer broadcast interrupts"),
419 S(IPI_RESCHEDULE, "Rescheduling interrupts"), 421 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
420 S(IPI_CALL_FUNC, "Function call interrupts"), 422 S(IPI_CALL_FUNC, "Function call interrupts"),
@@ -567,10 +569,13 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
567 unsigned int cpu = smp_processor_id(); 569 unsigned int cpu = smp_processor_id();
568 struct pt_regs *old_regs = set_irq_regs(regs); 570 struct pt_regs *old_regs = set_irq_regs(regs);
569 571
570 if (ipinr >= IPI_TIMER && ipinr < IPI_TIMER + NR_IPI) 572 if (ipinr < NR_IPI)
571 __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_TIMER]); 573 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
572 574
573 switch (ipinr) { 575 switch (ipinr) {
576 case IPI_WAKEUP:
577 break;
578
574 case IPI_TIMER: 579 case IPI_TIMER:
575 irq_enter(); 580 irq_enter();
576 ipi_timer(); 581 ipi_timer();
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index 395d5fbb8fa2..9d0a30032d7f 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -34,7 +34,18 @@ struct arm_delay_ops arm_delay_ops = {
34 .udelay = __loop_udelay, 34 .udelay = __loop_udelay,
35}; 35};
36 36
37#ifdef ARCH_HAS_READ_CURRENT_TIMER 37static const struct delay_timer *delay_timer;
38static bool delay_calibrated;
39
40int read_current_timer(unsigned long *timer_val)
41{
42 if (!delay_timer)
43 return -ENXIO;
44
45 *timer_val = delay_timer->read_current_timer();
46 return 0;
47}
48
38static void __timer_delay(unsigned long cycles) 49static void __timer_delay(unsigned long cycles)
39{ 50{
40 cycles_t start = get_cycles(); 51 cycles_t start = get_cycles();
@@ -55,18 +66,24 @@ static void __timer_udelay(unsigned long usecs)
55 __timer_const_udelay(usecs * UDELAY_MULT); 66 __timer_const_udelay(usecs * UDELAY_MULT);
56} 67}
57 68
58void __init init_current_timer_delay(unsigned long freq) 69void __init register_current_timer_delay(const struct delay_timer *timer)
59{ 70{
60 pr_info("Switching to timer-based delay loop\n"); 71 if (!delay_calibrated) {
61 lpj_fine = freq / HZ; 72 pr_info("Switching to timer-based delay loop\n");
62 loops_per_jiffy = lpj_fine; 73 delay_timer = timer;
63 arm_delay_ops.delay = __timer_delay; 74 lpj_fine = timer->freq / HZ;
64 arm_delay_ops.const_udelay = __timer_const_udelay; 75 loops_per_jiffy = lpj_fine;
65 arm_delay_ops.udelay = __timer_udelay; 76 arm_delay_ops.delay = __timer_delay;
77 arm_delay_ops.const_udelay = __timer_const_udelay;
78 arm_delay_ops.udelay = __timer_udelay;
79 delay_calibrated = true;
80 } else {
81 pr_info("Ignoring duplicate/late registration of read_current_timer delay\n");
82 }
66} 83}
67 84
68unsigned long __cpuinit calibrate_delay_is_known(void) 85unsigned long __cpuinit calibrate_delay_is_known(void)
69{ 86{
87 delay_calibrated = true;
70 return lpj_fine; 88 return lpj_fine;
71} 89}
72#endif
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 8d57e4223bdb..f93d820ecab5 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -134,7 +134,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
134 134
135 __raw_writel(virt_to_phys(exynos4_secondary_startup), 135 __raw_writel(virt_to_phys(exynos4_secondary_startup),
136 CPU1_BOOT_REG); 136 CPU1_BOOT_REG);
137 gic_raise_softirq(cpumask_of(cpu), 1); 137 gic_raise_softirq(cpumask_of(cpu), 0);
138 138
139 if (pen_release == -1) 139 if (pen_release == -1)
140 break; 140 break;
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index 899561d8db28..c3ff21b5ea24 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,3 +1,6 @@
1#include <linux/amba/serial.h>
2extern struct amba_pl010_data integrator_uart_data;
1void integrator_init_early(void); 3void integrator_init_early(void);
4int integrator_init(bool is_cp);
2void integrator_reserve(void); 5void integrator_reserve(void);
3void integrator_restart(char, const char *); 6void integrator_restart(char, const char *);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index dad3cb74ed31..ea22a17246d7 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -32,7 +32,9 @@
32#include <asm/mach/time.h> 32#include <asm/mach/time.h>
33#include <asm/pgtable.h> 33#include <asm/pgtable.h>
34 34
35static struct amba_pl010_data integrator_uart_data; 35#include "common.h"
36
37#ifdef CONFIG_ATAGS
36 38
37#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT } 39#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT }
38#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 } 40#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 }
@@ -60,7 +62,7 @@ static struct amba_device *amba_devs[] __initdata = {
60 &kmi1_device, 62 &kmi1_device,
61}; 63};
62 64
63static int __init integrator_init(void) 65int __init integrator_init(bool is_cp)
64{ 66{
65 int i; 67 int i;
66 68
@@ -69,7 +71,7 @@ static int __init integrator_init(void)
69 * hard-code them. The Integator/CP and forward have proper cell IDs. 71 * hard-code them. The Integator/CP and forward have proper cell IDs.
70 * Else we leave them undefined to the bus driver can autoprobe them. 72 * Else we leave them undefined to the bus driver can autoprobe them.
71 */ 73 */
72 if (machine_is_integrator()) { 74 if (!is_cp) {
73 rtc_device.periphid = 0x00041030; 75 rtc_device.periphid = 0x00041030;
74 uart0_device.periphid = 0x00041010; 76 uart0_device.periphid = 0x00041010;
75 uart1_device.periphid = 0x00041010; 77 uart1_device.periphid = 0x00041010;
@@ -85,7 +87,7 @@ static int __init integrator_init(void)
85 return 0; 87 return 0;
86} 88}
87 89
88arch_initcall(integrator_init); 90#endif
89 91
90/* 92/*
91 * On the Integrator platform, the port RTS and DTR are provided by 93 * On the Integrator platform, the port RTS and DTR are provided by
@@ -100,11 +102,14 @@ arch_initcall(integrator_init);
100static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl) 102static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
101{ 103{
102 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask; 104 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
105 u32 phybase = dev->res.start;
103 106
104 if (dev == &uart0_device) { 107 if (phybase == INTEGRATOR_UART0_BASE) {
108 /* UART0 */
105 rts_mask = 1 << 4; 109 rts_mask = 1 << 4;
106 dtr_mask = 1 << 5; 110 dtr_mask = 1 << 5;
107 } else { 111 } else {
112 /* UART1 */
108 rts_mask = 1 << 6; 113 rts_mask = 1 << 6;
109 dtr_mask = 1 << 7; 114 dtr_mask = 1 << 7;
110 } 115 }
@@ -123,7 +128,7 @@ static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *bas
123 __raw_writel(ctrlc, SC_CTRLC); 128 __raw_writel(ctrlc, SC_CTRLC);
124} 129}
125 130
126static struct amba_pl010_data integrator_uart_data = { 131struct amba_pl010_data integrator_uart_data = {
127 .set_mctrl = integrator_uart_set_mctrl, 132 .set_mctrl = integrator_uart_set_mctrl,
128}; 133};
129 134
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 2215d96cd735..d5b5435a09ae 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -34,6 +34,9 @@
34#include <linux/mtd/physmap.h> 34#include <linux/mtd/physmap.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/platform_data/clk-integrator.h> 36#include <linux/platform_data/clk-integrator.h>
37#include <linux/of_irq.h>
38#include <linux/of_address.h>
39#include <linux/of_platform.h>
37#include <video/vga.h> 40#include <video/vga.h>
38 41
39#include <mach/hardware.h> 42#include <mach/hardware.h>
@@ -158,23 +161,6 @@ static void __init ap_map_io(void)
158 pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE)); 161 pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
159} 162}
160 163
161#define INTEGRATOR_SC_VALID_INT 0x003fffff
162
163static void __init ap_init_irq(void)
164{
165 /* Disable all interrupts initially. */
166 /* Do the core module ones */
167 writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
168
169 /* do the header card stuff next */
170 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
171 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
172
173 fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
174 -1, INTEGRATOR_SC_VALID_INT, NULL);
175 integrator_clk_init(false);
176}
177
178#ifdef CONFIG_PM 164#ifdef CONFIG_PM
179static unsigned long ic_irq_enable; 165static unsigned long ic_irq_enable;
180 166
@@ -267,50 +253,6 @@ static struct physmap_flash_data ap_flash_data = {
267 .set_vpp = ap_flash_set_vpp, 253 .set_vpp = ap_flash_set_vpp,
268}; 254};
269 255
270static struct resource cfi_flash_resource = {
271 .start = INTEGRATOR_FLASH_BASE,
272 .end = INTEGRATOR_FLASH_BASE + INTEGRATOR_FLASH_SIZE - 1,
273 .flags = IORESOURCE_MEM,
274};
275
276static struct platform_device cfi_flash_device = {
277 .name = "physmap-flash",
278 .id = 0,
279 .dev = {
280 .platform_data = &ap_flash_data,
281 },
282 .num_resources = 1,
283 .resource = &cfi_flash_resource,
284};
285
286static void __init ap_init(void)
287{
288 unsigned long sc_dec;
289 int i;
290
291 platform_device_register(&cfi_flash_device);
292
293 sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
294 for (i = 0; i < 4; i++) {
295 struct lm_device *lmdev;
296
297 if ((sc_dec & (16 << i)) == 0)
298 continue;
299
300 lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
301 if (!lmdev)
302 continue;
303
304 lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
305 lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
306 lmdev->resource.flags = IORESOURCE_MEM;
307 lmdev->irq = IRQ_AP_EXPINT0 + i;
308 lmdev->id = i;
309
310 lm_device_register(lmdev);
311 }
312}
313
314/* 256/*
315 * Where is the timer (VA)? 257 * Where is the timer (VA)?
316 */ 258 */
@@ -325,9 +267,9 @@ static u32 notrace integrator_read_sched_clock(void)
325 return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE); 267 return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
326} 268}
327 269
328static void integrator_clocksource_init(unsigned long inrate) 270static void integrator_clocksource_init(unsigned long inrate,
271 void __iomem *base)
329{ 272{
330 void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
331 u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC; 273 u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
332 unsigned long rate = inrate; 274 unsigned long rate = inrate;
333 275
@@ -344,7 +286,7 @@ static void integrator_clocksource_init(unsigned long inrate)
344 setup_sched_clock(integrator_read_sched_clock, 16, rate); 286 setup_sched_clock(integrator_read_sched_clock, 16, rate);
345} 287}
346 288
347static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE; 289static void __iomem * clkevt_base;
348 290
349/* 291/*
350 * IRQ handler for the timer 292 * IRQ handler for the timer
@@ -416,11 +358,13 @@ static struct irqaction integrator_timer_irq = {
416 .dev_id = &integrator_clockevent, 358 .dev_id = &integrator_clockevent,
417}; 359};
418 360
419static void integrator_clockevent_init(unsigned long inrate) 361static void integrator_clockevent_init(unsigned long inrate,
362 void __iomem *base, int irq)
420{ 363{
421 unsigned long rate = inrate; 364 unsigned long rate = inrate;
422 unsigned int ctrl = 0; 365 unsigned int ctrl = 0;
423 366
367 clkevt_base = base;
424 /* Calculate and program a divisor */ 368 /* Calculate and program a divisor */
425 if (rate > 0x100000 * HZ) { 369 if (rate > 0x100000 * HZ) {
426 rate /= 256; 370 rate /= 256;
@@ -432,7 +376,7 @@ static void integrator_clockevent_init(unsigned long inrate)
432 timer_reload = rate / HZ; 376 timer_reload = rate / HZ;
433 writel(ctrl, clkevt_base + TIMER_CTRL); 377 writel(ctrl, clkevt_base + TIMER_CTRL);
434 378
435 setup_irq(IRQ_TIMERINT1, &integrator_timer_irq); 379 setup_irq(irq, &integrator_timer_irq);
436 clockevents_config_and_register(&integrator_clockevent, 380 clockevents_config_and_register(&integrator_clockevent,
437 rate, 381 rate,
438 1, 382 1,
@@ -443,9 +387,153 @@ void __init ap_init_early(void)
443{ 387{
444} 388}
445 389
390#ifdef CONFIG_OF
391
392static void __init ap_init_timer_of(void)
393{
394 struct device_node *node;
395 const char *path;
396 void __iomem *base;
397 int err;
398 int irq;
399 struct clk *clk;
400 unsigned long rate;
401
402 clk = clk_get_sys("ap_timer", NULL);
403 BUG_ON(IS_ERR(clk));
404 clk_prepare_enable(clk);
405 rate = clk_get_rate(clk);
406
407 err = of_property_read_string(of_aliases,
408 "arm,timer-primary", &path);
409 if (WARN_ON(err))
410 return;
411 node = of_find_node_by_path(path);
412 base = of_iomap(node, 0);
413 if (WARN_ON(!base))
414 return;
415 writel(0, base + TIMER_CTRL);
416 integrator_clocksource_init(rate, base);
417
418 err = of_property_read_string(of_aliases,
419 "arm,timer-secondary", &path);
420 if (WARN_ON(err))
421 return;
422 node = of_find_node_by_path(path);
423 base = of_iomap(node, 0);
424 if (WARN_ON(!base))
425 return;
426 irq = irq_of_parse_and_map(node, 0);
427 writel(0, base + TIMER_CTRL);
428 integrator_clockevent_init(rate, base, irq);
429}
430
431static struct sys_timer ap_of_timer = {
432 .init = ap_init_timer_of,
433};
434
435static const struct of_device_id fpga_irq_of_match[] __initconst = {
436 { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
437 { /* Sentinel */ }
438};
439
440static void __init ap_init_irq_of(void)
441{
442 /* disable core module IRQs */
443 writel(0xffffffffU, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
444 of_irq_init(fpga_irq_of_match);
445 integrator_clk_init(false);
446}
447
448/* For the Device Tree, add in the UART callbacks as AUXDATA */
449static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
450 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
451 "rtc", NULL),
452 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
453 "uart0", &integrator_uart_data),
454 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
455 "uart1", &integrator_uart_data),
456 OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
457 "kmi0", NULL),
458 OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
459 "kmi1", NULL),
460 OF_DEV_AUXDATA("cfi-flash", INTEGRATOR_FLASH_BASE,
461 "physmap-flash", &ap_flash_data),
462 { /* sentinel */ },
463};
464
465static void __init ap_init_of(void)
466{
467 unsigned long sc_dec;
468 int i;
469
470 of_platform_populate(NULL, of_default_bus_match_table,
471 ap_auxdata_lookup, NULL);
472
473 sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
474 for (i = 0; i < 4; i++) {
475 struct lm_device *lmdev;
476
477 if ((sc_dec & (16 << i)) == 0)
478 continue;
479
480 lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
481 if (!lmdev)
482 continue;
483
484 lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
485 lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
486 lmdev->resource.flags = IORESOURCE_MEM;
487 lmdev->irq = IRQ_AP_EXPINT0 + i;
488 lmdev->id = i;
489
490 lm_device_register(lmdev);
491 }
492}
493
494static const char * ap_dt_board_compat[] = {
495 "arm,integrator-ap",
496 NULL,
497};
498
499DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
500 .reserve = integrator_reserve,
501 .map_io = ap_map_io,
502 .nr_irqs = NR_IRQS_INTEGRATOR_AP,
503 .init_early = ap_init_early,
504 .init_irq = ap_init_irq_of,
505 .handle_irq = fpga_handle_irq,
506 .timer = &ap_of_timer,
507 .init_machine = ap_init_of,
508 .restart = integrator_restart,
509 .dt_compat = ap_dt_board_compat,
510MACHINE_END
511
512#endif
513
514#ifdef CONFIG_ATAGS
515
446/* 516/*
447 * Set up timer(s). 517 * This is where non-devicetree initialization code is collected and stashed
518 * for eventual deletion.
448 */ 519 */
520
521static struct resource cfi_flash_resource = {
522 .start = INTEGRATOR_FLASH_BASE,
523 .end = INTEGRATOR_FLASH_BASE + INTEGRATOR_FLASH_SIZE - 1,
524 .flags = IORESOURCE_MEM,
525};
526
527static struct platform_device cfi_flash_device = {
528 .name = "physmap-flash",
529 .id = 0,
530 .dev = {
531 .platform_data = &ap_flash_data,
532 },
533 .num_resources = 1,
534 .resource = &cfi_flash_resource,
535};
536
449static void __init ap_init_timer(void) 537static void __init ap_init_timer(void)
450{ 538{
451 struct clk *clk; 539 struct clk *clk;
@@ -460,14 +548,62 @@ static void __init ap_init_timer(void)
460 writel(0, TIMER1_VA_BASE + TIMER_CTRL); 548 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
461 writel(0, TIMER2_VA_BASE + TIMER_CTRL); 549 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
462 550
463 integrator_clocksource_init(rate); 551 integrator_clocksource_init(rate, (void __iomem *)TIMER2_VA_BASE);
464 integrator_clockevent_init(rate); 552 integrator_clockevent_init(rate, (void __iomem *)TIMER1_VA_BASE,
553 IRQ_TIMERINT1);
465} 554}
466 555
467static struct sys_timer ap_timer = { 556static struct sys_timer ap_timer = {
468 .init = ap_init_timer, 557 .init = ap_init_timer,
469}; 558};
470 559
560#define INTEGRATOR_SC_VALID_INT 0x003fffff
561
562static void __init ap_init_irq(void)
563{
564 /* Disable all interrupts initially. */
565 /* Do the core module ones */
566 writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
567
568 /* do the header card stuff next */
569 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
570 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
571
572 fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
573 -1, INTEGRATOR_SC_VALID_INT, NULL);
574 integrator_clk_init(false);
575}
576
577static void __init ap_init(void)
578{
579 unsigned long sc_dec;
580 int i;
581
582 platform_device_register(&cfi_flash_device);
583
584 sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
585 for (i = 0; i < 4; i++) {
586 struct lm_device *lmdev;
587
588 if ((sc_dec & (16 << i)) == 0)
589 continue;
590
591 lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
592 if (!lmdev)
593 continue;
594
595 lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
596 lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
597 lmdev->resource.flags = IORESOURCE_MEM;
598 lmdev->irq = IRQ_AP_EXPINT0 + i;
599 lmdev->id = i;
600
601 lm_device_register(lmdev);
602 }
603
604 integrator_init(false);
605}
606
471MACHINE_START(INTEGRATOR, "ARM-Integrator") 607MACHINE_START(INTEGRATOR, "ARM-Integrator")
472 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 608 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
473 .atag_offset = 0x100, 609 .atag_offset = 0x100,
@@ -481,3 +617,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
481 .init_machine = ap_init, 617 .init_machine = ap_init,
482 .restart = integrator_restart, 618 .restart = integrator_restart,
483MACHINE_END 619MACHINE_END
620
621#endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 3df5fc369361..6870a1fbcd78 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -23,6 +23,9 @@
23#include <linux/gfp.h> 23#include <linux/gfp.h>
24#include <linux/mtd/physmap.h> 24#include <linux/mtd/physmap.h>
25#include <linux/platform_data/clk-integrator.h> 25#include <linux/platform_data/clk-integrator.h>
26#include <linux/of_irq.h>
27#include <linux/of_address.h>
28#include <linux/of_platform.h>
26 29
27#include <mach/hardware.h> 30#include <mach/hardware.h>
28#include <mach/platform.h> 31#include <mach/platform.h>
@@ -49,16 +52,9 @@
49#include "common.h" 52#include "common.h"
50 53
51#define INTCP_PA_FLASH_BASE 0x24000000 54#define INTCP_PA_FLASH_BASE 0x24000000
52#define INTCP_FLASH_SIZE SZ_32M
53 55
54#define INTCP_PA_CLCD_BASE 0xc0000000 56#define INTCP_PA_CLCD_BASE 0xc0000000
55 57
56#define INTCP_VA_CIC_BASE __io_address(INTEGRATOR_HDR_BASE + 0x40)
57#define INTCP_VA_PIC_BASE __io_address(INTEGRATOR_IC_BASE)
58#define INTCP_VA_SIC_BASE __io_address(INTEGRATOR_CP_SIC_BASE)
59
60#define INTCP_ETH_SIZE 0x10
61
62#define INTCP_VA_CTRL_BASE __io_address(INTEGRATOR_CP_CTL_BASE) 58#define INTCP_VA_CTRL_BASE __io_address(INTEGRATOR_CP_CTL_BASE)
63#define INTCP_FLASHPROG 0x04 59#define INTCP_FLASHPROG 0x04
64#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) 60#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0)
@@ -143,37 +139,6 @@ static void __init intcp_map_io(void)
143 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc)); 139 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
144} 140}
145 141
146static void __init intcp_init_irq(void)
147{
148 u32 pic_mask, cic_mask, sic_mask;
149
150 /* These masks are for the HW IRQ registers */
151 pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
152 pic_mask |= (~((~0u) << (29 - 22))) << 22;
153 cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
154 sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
155
156 /*
157 * Disable all interrupt sources
158 */
159 writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
160 writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
161 writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
162 writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
163 writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
164 writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
165
166 fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
167 -1, pic_mask, NULL);
168
169 fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
170 -1, cic_mask, NULL);
171
172 fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
173 IRQ_CP_CPPLDINT, sic_mask, NULL);
174 integrator_clk_init(true);
175}
176
177/* 142/*
178 * Flash handling. 143 * Flash handling.
179 */ 144 */
@@ -216,47 +181,6 @@ static struct physmap_flash_data intcp_flash_data = {
216 .set_vpp = intcp_flash_set_vpp, 181 .set_vpp = intcp_flash_set_vpp,
217}; 182};
218 183
219static struct resource intcp_flash_resource = {
220 .start = INTCP_PA_FLASH_BASE,
221 .end = INTCP_PA_FLASH_BASE + INTCP_FLASH_SIZE - 1,
222 .flags = IORESOURCE_MEM,
223};
224
225static struct platform_device intcp_flash_device = {
226 .name = "physmap-flash",
227 .id = 0,
228 .dev = {
229 .platform_data = &intcp_flash_data,
230 },
231 .num_resources = 1,
232 .resource = &intcp_flash_resource,
233};
234
235static struct resource smc91x_resources[] = {
236 [0] = {
237 .start = INTEGRATOR_CP_ETH_BASE,
238 .end = INTEGRATOR_CP_ETH_BASE + INTCP_ETH_SIZE - 1,
239 .flags = IORESOURCE_MEM,
240 },
241 [1] = {
242 .start = IRQ_CP_ETHINT,
243 .end = IRQ_CP_ETHINT,
244 .flags = IORESOURCE_IRQ,
245 },
246};
247
248static struct platform_device smc91x_device = {
249 .name = "smc91x",
250 .id = 0,
251 .num_resources = ARRAY_SIZE(smc91x_resources),
252 .resource = smc91x_resources,
253};
254
255static struct platform_device *intcp_devs[] __initdata = {
256 &intcp_flash_device,
257 &smc91x_device,
258};
259
260/* 184/*
261 * It seems that the card insertion interrupt remains active after 185 * It seems that the card insertion interrupt remains active after
262 * we've acknowledged it. We therefore ignore the interrupt, and 186 * we've acknowledged it. We therefore ignore the interrupt, and
@@ -278,16 +202,6 @@ static struct mmci_platform_data mmc_data = {
278 .gpio_cd = -1, 202 .gpio_cd = -1,
279}; 203};
280 204
281#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
282#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
283
284static AMBA_APB_DEVICE(mmc, "mmci", 0, INTEGRATOR_CP_MMC_BASE,
285 INTEGRATOR_CP_MMC_IRQS, &mmc_data);
286
287static AMBA_APB_DEVICE(aaci, "aaci", 0, INTEGRATOR_CP_AACI_BASE,
288 INTEGRATOR_CP_AACI_IRQS, NULL);
289
290
291/* 205/*
292 * CLCD support 206 * CLCD support
293 */ 207 */
@@ -338,15 +252,6 @@ static struct clcd_board clcd_data = {
338 .remove = versatile_clcd_remove_dma, 252 .remove = versatile_clcd_remove_dma,
339}; 253};
340 254
341static AMBA_AHB_DEVICE(clcd, "clcd", 0, INTCP_PA_CLCD_BASE,
342 { IRQ_CP_CLCDCINT }, &clcd_data);
343
344static struct amba_device *amba_devs[] __initdata = {
345 &mmc_device,
346 &aaci_device,
347 &clcd_device,
348};
349
350#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28) 255#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
351 256
352static void __init intcp_init_early(void) 257static void __init intcp_init_early(void)
@@ -356,16 +261,193 @@ static void __init intcp_init_early(void)
356#endif 261#endif
357} 262}
358 263
359static void __init intcp_init(void) 264static void __init intcp_timer_init_of(void)
360{ 265{
361 int i; 266 struct device_node *node;
267 const char *path;
268 void __iomem *base;
269 int err;
270 int irq;
271
272 err = of_property_read_string(of_aliases,
273 "arm,timer-primary", &path);
274 if (WARN_ON(err))
275 return;
276 node = of_find_node_by_path(path);
277 base = of_iomap(node, 0);
278 if (WARN_ON(!base))
279 return;
280 writel(0, base + TIMER_CTRL);
281 sp804_clocksource_init(base, node->name);
282
283 err = of_property_read_string(of_aliases,
284 "arm,timer-secondary", &path);
285 if (WARN_ON(err))
286 return;
287 node = of_find_node_by_path(path);
288 base = of_iomap(node, 0);
289 if (WARN_ON(!base))
290 return;
291 irq = irq_of_parse_and_map(node, 0);
292 writel(0, base + TIMER_CTRL);
293 sp804_clockevents_init(base, irq, node->name);
294}
362 295
363 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs)); 296static struct sys_timer cp_of_timer = {
297 .init = intcp_timer_init_of,
298};
364 299
365 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 300#ifdef CONFIG_OF
366 struct amba_device *d = amba_devs[i]; 301
367 amba_device_register(d, &iomem_resource); 302static const struct of_device_id fpga_irq_of_match[] __initconst = {
368 } 303 { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
304 { /* Sentinel */ }
305};
306
307static void __init intcp_init_irq_of(void)
308{
309 of_irq_init(fpga_irq_of_match);
310 integrator_clk_init(true);
311}
312
313/*
314 * For the Device Tree, add in the UART, MMC and CLCD specifics as AUXDATA
315 * and enforce the bus names since these are used for clock lookups.
316 */
317static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
318 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
319 "rtc", NULL),
320 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
321 "uart0", &integrator_uart_data),
322 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
323 "uart1", &integrator_uart_data),
324 OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
325 "kmi0", NULL),
326 OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
327 "kmi1", NULL),
328 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE,
329 "mmci", &mmc_data),
330 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE,
331 "aaci", &mmc_data),
332 OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,
333 "clcd", &clcd_data),
334 OF_DEV_AUXDATA("cfi-flash", INTCP_PA_FLASH_BASE,
335 "physmap-flash", &intcp_flash_data),
336 { /* sentinel */ },
337};
338
339static void __init intcp_init_of(void)
340{
341 of_platform_populate(NULL, of_default_bus_match_table,
342 intcp_auxdata_lookup, NULL);
343}
344
345static const char * intcp_dt_board_compat[] = {
346 "arm,integrator-cp",
347 NULL,
348};
349
350DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
351 .reserve = integrator_reserve,
352 .map_io = intcp_map_io,
353 .nr_irqs = NR_IRQS_INTEGRATOR_CP,
354 .init_early = intcp_init_early,
355 .init_irq = intcp_init_irq_of,
356 .handle_irq = fpga_handle_irq,
357 .timer = &cp_of_timer,
358 .init_machine = intcp_init_of,
359 .restart = integrator_restart,
360 .dt_compat = intcp_dt_board_compat,
361MACHINE_END
362
363#endif
364
365#ifdef CONFIG_ATAGS
366
367/*
368 * This is where non-devicetree initialization code is collected and stashed
369 * for eventual deletion.
370 */
371
372#define INTCP_FLASH_SIZE SZ_32M
373
374static struct resource intcp_flash_resource = {
375 .start = INTCP_PA_FLASH_BASE,
376 .end = INTCP_PA_FLASH_BASE + INTCP_FLASH_SIZE - 1,
377 .flags = IORESOURCE_MEM,
378};
379
380static struct platform_device intcp_flash_device = {
381 .name = "physmap-flash",
382 .id = 0,
383 .dev = {
384 .platform_data = &intcp_flash_data,
385 },
386 .num_resources = 1,
387 .resource = &intcp_flash_resource,
388};
389
390#define INTCP_ETH_SIZE 0x10
391
392static struct resource smc91x_resources[] = {
393 [0] = {
394 .start = INTEGRATOR_CP_ETH_BASE,
395 .end = INTEGRATOR_CP_ETH_BASE + INTCP_ETH_SIZE - 1,
396 .flags = IORESOURCE_MEM,
397 },
398 [1] = {
399 .start = IRQ_CP_ETHINT,
400 .end = IRQ_CP_ETHINT,
401 .flags = IORESOURCE_IRQ,
402 },
403};
404
405static struct platform_device smc91x_device = {
406 .name = "smc91x",
407 .id = 0,
408 .num_resources = ARRAY_SIZE(smc91x_resources),
409 .resource = smc91x_resources,
410};
411
412static struct platform_device *intcp_devs[] __initdata = {
413 &intcp_flash_device,
414 &smc91x_device,
415};
416
417#define INTCP_VA_CIC_BASE __io_address(INTEGRATOR_HDR_BASE + 0x40)
418#define INTCP_VA_PIC_BASE __io_address(INTEGRATOR_IC_BASE)
419#define INTCP_VA_SIC_BASE __io_address(INTEGRATOR_CP_SIC_BASE)
420
421static void __init intcp_init_irq(void)
422{
423 u32 pic_mask, cic_mask, sic_mask;
424
425 /* These masks are for the HW IRQ registers */
426 pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
427 pic_mask |= (~((~0u) << (29 - 22))) << 22;
428 cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
429 sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
430
431 /*
432 * Disable all interrupt sources
433 */
434 writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
435 writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
436 writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
437 writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
438 writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
439 writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
440
441 fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
442 -1, pic_mask, NULL);
443
444 fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
445 -1, cic_mask, NULL);
446
447 fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
448 IRQ_CP_CPPLDINT, sic_mask, NULL);
449
450 integrator_clk_init(true);
369} 451}
370 452
371#define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE) 453#define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
@@ -386,6 +468,37 @@ static struct sys_timer cp_timer = {
386 .init = intcp_timer_init, 468 .init = intcp_timer_init,
387}; 469};
388 470
471#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
472#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
473
474static AMBA_APB_DEVICE(mmc, "mmci", 0, INTEGRATOR_CP_MMC_BASE,
475 INTEGRATOR_CP_MMC_IRQS, &mmc_data);
476
477static AMBA_APB_DEVICE(aaci, "aaci", 0, INTEGRATOR_CP_AACI_BASE,
478 INTEGRATOR_CP_AACI_IRQS, NULL);
479
480static AMBA_AHB_DEVICE(clcd, "clcd", 0, INTCP_PA_CLCD_BASE,
481 { IRQ_CP_CLCDCINT }, &clcd_data);
482
483static struct amba_device *amba_devs[] __initdata = {
484 &mmc_device,
485 &aaci_device,
486 &clcd_device,
487};
488
489static void __init intcp_init(void)
490{
491 int i;
492
493 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
494
495 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
496 struct amba_device *d = amba_devs[i];
497 amba_device_register(d, &iomem_resource);
498 }
499 integrator_init(true);
500}
501
389MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") 502MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
390 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 503 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
391 .atag_offset = 0x100, 504 .atag_offset = 0x100,
@@ -399,3 +512,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
399 .init_machine = intcp_init, 512 .init_machine = intcp_init,
400 .restart = integrator_restart, 513 .restart = integrator_restart,
401MACHINE_END 514MACHINE_END
515
516#endif
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1111.h b/arch/arm/mach-sa1100/include/mach/SA-1111.h
deleted file mode 100644
index c38f60915cb6..000000000000
--- a/arch/arm/mach-sa1100/include/mach/SA-1111.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * Moved to new location
3 */
4#warning using old SA-1111.h - update to <asm/hardware/sa1111.h>
5#include <asm/hardware/sa1111.h>
diff --git a/arch/arm/mach-sa1100/include/mach/lart.h b/arch/arm/mach-sa1100/include/mach/lart.h
deleted file mode 100644
index 8a5482d908db..000000000000
--- a/arch/arm/mach-sa1100/include/mach/lart.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef _INCLUDE_LART_H
2#define _INCLUDE_LART_H
3
4#define LART_GPIO_ETH0 GPIO_GPIO0
5#define LART_IRQ_ETH0 IRQ_GPIO0
6
7#define LART_GPIO_IDE GPIO_GPIO1
8#define LART_IRQ_IDE IRQ_GPIO1
9
10#define LART_GPIO_UCB1200 GPIO_GPIO18
11#define LART_IRQ_UCB1200 IRQ_GPIO18
12
13#endif
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index f978c5d0e1ae..f67456286280 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -100,7 +100,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
100 /* Tell ROM loader about our vector (in headsmp.S) */ 100 /* Tell ROM loader about our vector (in headsmp.S) */
101 emev2_set_boot_vector(__pa(shmobile_secondary_vector)); 101 emev2_set_boot_vector(__pa(shmobile_secondary_vector));
102 102
103 gic_raise_softirq(cpumask_of(cpu), 1); 103 gic_raise_softirq(cpumask_of(cpu), 0);
104 return 0; 104 return 0;
105} 105}
106 106
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 9107231aacc5..b9f60ebe3bc4 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -699,7 +699,6 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
699 unsigned long instr = *pinstr; 699 unsigned long instr = *pinstr;
700 u16 tinst1 = (instr >> 16) & 0xffff; 700 u16 tinst1 = (instr >> 16) & 0xffff;
701 u16 tinst2 = instr & 0xffff; 701 u16 tinst2 = instr & 0xffff;
702 poffset->un = 0;
703 702
704 switch (tinst1 & 0xffe0) { 703 switch (tinst1 & 0xffe0) {
705 /* A6.3.5 Load/Store multiple */ 704 /* A6.3.5 Load/Store multiple */
@@ -854,9 +853,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
854 break; 853 break;
855 854
856 case 0x08000000: /* ldm or stm, or thumb-2 32bit instruction */ 855 case 0x08000000: /* ldm or stm, or thumb-2 32bit instruction */
857 if (thumb2_32b) 856 if (thumb2_32b) {
857 offset.un = 0;
858 handler = do_alignment_t32_to_handler(&instr, regs, &offset); 858 handler = do_alignment_t32_to_handler(&instr, regs, &offset);
859 else 859 } else
860 handler = do_alignment_ldmstm; 860 handler = do_alignment_ldmstm;
861 break; 861 break;
862 862
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 577baf7d0a8d..8a97e6443c62 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -368,14 +368,18 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
368 /* l2x0 controller is disabled */ 368 /* l2x0 controller is disabled */
369 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); 369 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
370 370
371 l2x0_saved_regs.aux_ctrl = aux;
372
373 l2x0_inv_all(); 371 l2x0_inv_all();
374 372
375 /* enable L2X0 */ 373 /* enable L2X0 */
376 writel_relaxed(1, l2x0_base + L2X0_CTRL); 374 writel_relaxed(1, l2x0_base + L2X0_CTRL);
377 } 375 }
378 376
377 /* Re-read it in case some bits are reserved. */
378 aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
379
380 /* Save the value for resuming. */
381 l2x0_saved_regs.aux_ctrl = aux;
382
379 outer_cache.inv_range = l2x0_inv_range; 383 outer_cache.inv_range = l2x0_inv_range;
380 outer_cache.clean_range = l2x0_clean_range; 384 outer_cache.clean_range = l2x0_clean_range;
381 outer_cache.flush_range = l2x0_flush_range; 385 outer_cache.flush_range = l2x0_flush_range;
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 39e3fb3db801..3b172275262e 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -211,6 +211,9 @@ ENTRY(v7_coherent_user_range)
211 * isn't mapped, fail with -EFAULT. 211 * isn't mapped, fail with -EFAULT.
212 */ 212 */
2139001: 2139001:
214#ifdef CONFIG_ARM_ERRATA_775420
215 dsb
216#endif
214 mov r0, #-EFAULT 217 mov r0, #-EFAULT
215 mov pc, lr 218 mov pc, lr
216 UNWIND(.fnend ) 219 UNWIND(.fnend )
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 9aec41fa80ae..ad722f1208a5 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -324,7 +324,7 @@ phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
324 324
325 BUG_ON(!arm_memblock_steal_permitted); 325 BUG_ON(!arm_memblock_steal_permitted);
326 326
327 phys = memblock_alloc(size, align); 327 phys = memblock_alloc_base(size, align, MEMBLOCK_ALLOC_ANYWHERE);
328 memblock_free(phys, size); 328 memblock_free(phys, size);
329 memblock_remove(phys, size); 329 memblock_remove(phys, size);
330 330
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 9d869f93a3da..5dcc2fd46c46 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -248,6 +248,7 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
248 if (!area) 248 if (!area)
249 return NULL; 249 return NULL;
250 addr = (unsigned long)area->addr; 250 addr = (unsigned long)area->addr;
251 area->phys_addr = __pfn_to_phys(pfn);
251 252
252#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE) 253#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
253 if (DOMAIN_IO == 0 && 254 if (DOMAIN_IO == 0 &&
diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c
index 6e70d03824a1..091ae1030045 100644
--- a/arch/arm/plat-versatile/fpga-irq.c
+++ b/arch/arm/plat-versatile/fpga-irq.c
@@ -5,6 +5,8 @@
5#include <linux/io.h> 5#include <linux/io.h>
6#include <linux/irqdomain.h> 6#include <linux/irqdomain.h>
7#include <linux/module.h> 7#include <linux/module.h>
8#include <linux/of.h>
9#include <linux/of_address.h>
8 10
9#include <asm/exception.h> 11#include <asm/exception.h>
10#include <asm/mach/irq.h> 12#include <asm/mach/irq.h>
@@ -14,11 +16,17 @@
14#define IRQ_RAW_STATUS 0x04 16#define IRQ_RAW_STATUS 0x04
15#define IRQ_ENABLE_SET 0x08 17#define IRQ_ENABLE_SET 0x08
16#define IRQ_ENABLE_CLEAR 0x0c 18#define IRQ_ENABLE_CLEAR 0x0c
19#define INT_SOFT_SET 0x10
20#define INT_SOFT_CLEAR 0x14
21#define FIQ_STATUS 0x20
22#define FIQ_RAW_STATUS 0x24
23#define FIQ_ENABLE 0x28
24#define FIQ_ENABLE_SET 0x28
25#define FIQ_ENABLE_CLEAR 0x2C
17 26
18/** 27/**
19 * struct fpga_irq_data - irq data container for the FPGA IRQ controller 28 * struct fpga_irq_data - irq data container for the FPGA IRQ controller
20 * @base: memory offset in virtual memory 29 * @base: memory offset in virtual memory
21 * @irq_start: first IRQ number handled by this instance
22 * @chip: chip container for this instance 30 * @chip: chip container for this instance
23 * @domain: IRQ domain for this instance 31 * @domain: IRQ domain for this instance
24 * @valid: mask for valid IRQs on this controller 32 * @valid: mask for valid IRQs on this controller
@@ -26,7 +34,6 @@
26 */ 34 */
27struct fpga_irq_data { 35struct fpga_irq_data {
28 void __iomem *base; 36 void __iomem *base;
29 unsigned int irq_start;
30 struct irq_chip chip; 37 struct irq_chip chip;
31 u32 valid; 38 u32 valid;
32 struct irq_domain *domain; 39 struct irq_domain *domain;
@@ -125,34 +132,79 @@ static struct irq_domain_ops fpga_irqdomain_ops = {
125 .xlate = irq_domain_xlate_onetwocell, 132 .xlate = irq_domain_xlate_onetwocell,
126}; 133};
127 134
128void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start, 135static __init struct fpga_irq_data *
129 int parent_irq, u32 valid, struct device_node *node) 136fpga_irq_prep_struct(void __iomem *base, const char *name, u32 valid) {
130{
131 struct fpga_irq_data *f; 137 struct fpga_irq_data *f;
132 138
133 if (fpga_irq_id >= ARRAY_SIZE(fpga_irq_devices)) { 139 if (fpga_irq_id >= ARRAY_SIZE(fpga_irq_devices)) {
134 printk(KERN_ERR "%s: too few FPGA IRQ controllers, increase CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR\n", __func__); 140 printk(KERN_ERR "%s: too few FPGA IRQ controllers, increase CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR\n", __func__);
135 return; 141 return NULL;
136 } 142 }
137
138 f = &fpga_irq_devices[fpga_irq_id]; 143 f = &fpga_irq_devices[fpga_irq_id];
139 f->base = base; 144 f->base = base;
140 f->irq_start = irq_start;
141 f->chip.name = name; 145 f->chip.name = name;
142 f->chip.irq_ack = fpga_irq_mask; 146 f->chip.irq_ack = fpga_irq_mask;
143 f->chip.irq_mask = fpga_irq_mask; 147 f->chip.irq_mask = fpga_irq_mask;
144 f->chip.irq_unmask = fpga_irq_unmask; 148 f->chip.irq_unmask = fpga_irq_unmask;
145 f->valid = valid; 149 f->valid = valid;
150 fpga_irq_id++;
151
152 return f;
153}
154
155void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
156 int parent_irq, u32 valid, struct device_node *node)
157{
158 struct fpga_irq_data *f;
159
160 f = fpga_irq_prep_struct(base, name, valid);
161 if (!f)
162 return;
146 163
147 if (parent_irq != -1) { 164 if (parent_irq != -1) {
148 irq_set_handler_data(parent_irq, f); 165 irq_set_handler_data(parent_irq, f);
149 irq_set_chained_handler(parent_irq, fpga_irq_handle); 166 irq_set_chained_handler(parent_irq, fpga_irq_handle);
150 } 167 }
151 168
152 f->domain = irq_domain_add_legacy(node, fls(valid), f->irq_start, 0, 169 f->domain = irq_domain_add_legacy(node, fls(valid), irq_start, 0,
153 &fpga_irqdomain_ops, f); 170 &fpga_irqdomain_ops, f);
154 pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n", 171 pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n",
155 fpga_irq_id, name, base, f->used_irqs); 172 fpga_irq_id, name, base, f->used_irqs);
173}
156 174
157 fpga_irq_id++; 175#ifdef CONFIG_OF
176int __init fpga_irq_of_init(struct device_node *node,
177 struct device_node *parent)
178{
179 struct fpga_irq_data *f;
180 void __iomem *base;
181 u32 clear_mask;
182 u32 valid_mask;
183
184 if (WARN_ON(!node))
185 return -ENODEV;
186
187 base = of_iomap(node, 0);
188 WARN(!base, "unable to map fpga irq registers\n");
189
190 if (of_property_read_u32(node, "clear-mask", &clear_mask))
191 clear_mask = 0;
192
193 if (of_property_read_u32(node, "valid-mask", &valid_mask))
194 valid_mask = 0;
195
196 f = fpga_irq_prep_struct(base, node->name, valid_mask);
197 if (!f)
198 return -ENOMEM;
199
200 writel(clear_mask, base + IRQ_ENABLE_CLEAR);
201 writel(clear_mask, base + FIQ_ENABLE_CLEAR);
202
203 f->domain = irq_domain_add_linear(node, fls(valid_mask), &fpga_irqdomain_ops, f);
204 f->used_irqs = hweight32(valid_mask);
205
206 pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n",
207 fpga_irq_id, node->name, base, f->used_irqs);
208 return 0;
158} 209}
210#endif
diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/arch/arm/plat-versatile/include/plat/fpga-irq.h
index 91bcfb67551d..1fac9651d3ca 100644
--- a/arch/arm/plat-versatile/include/plat/fpga-irq.h
+++ b/arch/arm/plat-versatile/include/plat/fpga-irq.h
@@ -7,5 +7,7 @@ struct pt_regs;
7void fpga_handle_irq(struct pt_regs *regs); 7void fpga_handle_irq(struct pt_regs *regs);
8void fpga_irq_init(void __iomem *, const char *, int, int, u32, 8void fpga_irq_init(void __iomem *, const char *, int, int, u32,
9 struct device_node *node); 9 struct device_node *node);
10int fpga_irq_of_init(struct device_node *node,
11 struct device_node *parent);
10 12
11#endif 13#endif