diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-18 18:00:42 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-18 18:00:42 -0400 |
commit | 07f1c295de593ec0b0dca3092299c048c03374da (patch) | |
tree | ad8f291e550b3315f84c07e9f543e25adcf95dc3 /arch | |
parent | 4aa96ccf9ee35cdbd0d423e87a4d551019570218 (diff) | |
parent | fb89fcfb151698776be6c900aec8161b01990e92 (diff) |
Merge branch 'dma' of http://git.linaro.org/git/people/nico/linux into devel-stable
Diffstat (limited to 'arch')
55 files changed, 304 insertions, 288 deletions
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 841df7d21c2f..595ecd290ebf 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
@@ -79,6 +79,8 @@ struct dmabounce_device_info { | |||
79 | struct dmabounce_pool large; | 79 | struct dmabounce_pool large; |
80 | 80 | ||
81 | rwlock_t lock; | 81 | rwlock_t lock; |
82 | |||
83 | int (*needs_bounce)(struct device *, dma_addr_t, size_t); | ||
82 | }; | 84 | }; |
83 | 85 | ||
84 | #ifdef STATS | 86 | #ifdef STATS |
@@ -210,114 +212,91 @@ static struct safe_buffer *find_safe_buffer_dev(struct device *dev, | |||
210 | if (!dev || !dev->archdata.dmabounce) | 212 | if (!dev || !dev->archdata.dmabounce) |
211 | return NULL; | 213 | return NULL; |
212 | if (dma_mapping_error(dev, dma_addr)) { | 214 | if (dma_mapping_error(dev, dma_addr)) { |
213 | if (dev) | 215 | dev_err(dev, "Trying to %s invalid mapping\n", where); |
214 | dev_err(dev, "Trying to %s invalid mapping\n", where); | ||
215 | else | ||
216 | pr_err("unknown device: Trying to %s invalid mapping\n", where); | ||
217 | return NULL; | 216 | return NULL; |
218 | } | 217 | } |
219 | return find_safe_buffer(dev->archdata.dmabounce, dma_addr); | 218 | return find_safe_buffer(dev->archdata.dmabounce, dma_addr); |
220 | } | 219 | } |
221 | 220 | ||
222 | static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size, | 221 | static int needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) |
223 | enum dma_data_direction dir) | ||
224 | { | 222 | { |
225 | struct dmabounce_device_info *device_info = dev->archdata.dmabounce; | 223 | if (!dev || !dev->archdata.dmabounce) |
226 | dma_addr_t dma_addr; | 224 | return 0; |
227 | int needs_bounce = 0; | ||
228 | |||
229 | if (device_info) | ||
230 | DO_STATS ( device_info->map_op_count++ ); | ||
231 | |||
232 | dma_addr = virt_to_dma(dev, ptr); | ||
233 | 225 | ||
234 | if (dev->dma_mask) { | 226 | if (dev->dma_mask) { |
235 | unsigned long mask = *dev->dma_mask; | 227 | unsigned long limit, mask = *dev->dma_mask; |
236 | unsigned long limit; | ||
237 | 228 | ||
238 | limit = (mask + 1) & ~mask; | 229 | limit = (mask + 1) & ~mask; |
239 | if (limit && size > limit) { | 230 | if (limit && size > limit) { |
240 | dev_err(dev, "DMA mapping too big (requested %#x " | 231 | dev_err(dev, "DMA mapping too big (requested %#x " |
241 | "mask %#Lx)\n", size, *dev->dma_mask); | 232 | "mask %#Lx)\n", size, *dev->dma_mask); |
242 | return ~0; | 233 | return -E2BIG; |
243 | } | 234 | } |
244 | 235 | ||
245 | /* | 236 | /* Figure out if we need to bounce from the DMA mask. */ |
246 | * Figure out if we need to bounce from the DMA mask. | 237 | if ((dma_addr | (dma_addr + size - 1)) & ~mask) |
247 | */ | 238 | return 1; |
248 | needs_bounce = (dma_addr | (dma_addr + size - 1)) & ~mask; | ||
249 | } | 239 | } |
250 | 240 | ||
251 | if (device_info && (needs_bounce || dma_needs_bounce(dev, dma_addr, size))) { | 241 | return !!dev->archdata.dmabounce->needs_bounce(dev, dma_addr, size); |
252 | struct safe_buffer *buf; | 242 | } |
253 | 243 | ||
254 | buf = alloc_safe_buffer(device_info, ptr, size, dir); | 244 | static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size, |
255 | if (buf == 0) { | 245 | enum dma_data_direction dir) |
256 | dev_err(dev, "%s: unable to map unsafe buffer %p!\n", | 246 | { |
257 | __func__, ptr); | 247 | struct dmabounce_device_info *device_info = dev->archdata.dmabounce; |
258 | return ~0; | 248 | struct safe_buffer *buf; |
259 | } | ||
260 | 249 | ||
261 | dev_dbg(dev, | 250 | if (device_info) |
262 | "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", | 251 | DO_STATS ( device_info->map_op_count++ ); |
263 | __func__, buf->ptr, virt_to_dma(dev, buf->ptr), | ||
264 | buf->safe, buf->safe_dma_addr); | ||
265 | 252 | ||
266 | if ((dir == DMA_TO_DEVICE) || | 253 | buf = alloc_safe_buffer(device_info, ptr, size, dir); |
267 | (dir == DMA_BIDIRECTIONAL)) { | 254 | if (buf == NULL) { |
268 | dev_dbg(dev, "%s: copy unsafe %p to safe %p, size %d\n", | 255 | dev_err(dev, "%s: unable to map unsafe buffer %p!\n", |
269 | __func__, ptr, buf->safe, size); | 256 | __func__, ptr); |
270 | memcpy(buf->safe, ptr, size); | 257 | return ~0; |
271 | } | 258 | } |
272 | ptr = buf->safe; | ||
273 | 259 | ||
274 | dma_addr = buf->safe_dma_addr; | 260 | dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", |
275 | } else { | 261 | __func__, buf->ptr, virt_to_dma(dev, buf->ptr), |
276 | /* | 262 | buf->safe, buf->safe_dma_addr); |
277 | * We don't need to sync the DMA buffer since | 263 | |
278 | * it was allocated via the coherent allocators. | 264 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) { |
279 | */ | 265 | dev_dbg(dev, "%s: copy unsafe %p to safe %p, size %d\n", |
280 | __dma_single_cpu_to_dev(ptr, size, dir); | 266 | __func__, ptr, buf->safe, size); |
267 | memcpy(buf->safe, ptr, size); | ||
281 | } | 268 | } |
282 | 269 | ||
283 | return dma_addr; | 270 | return buf->safe_dma_addr; |
284 | } | 271 | } |
285 | 272 | ||
286 | static inline void unmap_single(struct device *dev, dma_addr_t dma_addr, | 273 | static inline void unmap_single(struct device *dev, struct safe_buffer *buf, |
287 | size_t size, enum dma_data_direction dir) | 274 | size_t size, enum dma_data_direction dir) |
288 | { | 275 | { |
289 | struct safe_buffer *buf = find_safe_buffer_dev(dev, dma_addr, "unmap"); | 276 | BUG_ON(buf->size != size); |
290 | 277 | BUG_ON(buf->direction != dir); | |
291 | if (buf) { | ||
292 | BUG_ON(buf->size != size); | ||
293 | BUG_ON(buf->direction != dir); | ||
294 | 278 | ||
295 | dev_dbg(dev, | 279 | dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", |
296 | "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", | 280 | __func__, buf->ptr, virt_to_dma(dev, buf->ptr), |
297 | __func__, buf->ptr, virt_to_dma(dev, buf->ptr), | 281 | buf->safe, buf->safe_dma_addr); |
298 | buf->safe, buf->safe_dma_addr); | ||
299 | 282 | ||
300 | DO_STATS(dev->archdata.dmabounce->bounce_count++); | 283 | DO_STATS(dev->archdata.dmabounce->bounce_count++); |
301 | 284 | ||
302 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) { | 285 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) { |
303 | void *ptr = buf->ptr; | 286 | void *ptr = buf->ptr; |
304 | 287 | ||
305 | dev_dbg(dev, | 288 | dev_dbg(dev, "%s: copy back safe %p to unsafe %p size %d\n", |
306 | "%s: copy back safe %p to unsafe %p size %d\n", | 289 | __func__, buf->safe, ptr, size); |
307 | __func__, buf->safe, ptr, size); | 290 | memcpy(ptr, buf->safe, size); |
308 | memcpy(ptr, buf->safe, size); | ||
309 | 291 | ||
310 | /* | 292 | /* |
311 | * Since we may have written to a page cache page, | 293 | * Since we may have written to a page cache page, |
312 | * we need to ensure that the data will be coherent | 294 | * we need to ensure that the data will be coherent |
313 | * with user mappings. | 295 | * with user mappings. |
314 | */ | 296 | */ |
315 | __cpuc_flush_dcache_area(ptr, size); | 297 | __cpuc_flush_dcache_area(ptr, size); |
316 | } | ||
317 | free_safe_buffer(dev->archdata.dmabounce, buf); | ||
318 | } else { | ||
319 | __dma_single_dev_to_cpu(dma_to_virt(dev, dma_addr), size, dir); | ||
320 | } | 298 | } |
299 | free_safe_buffer(dev->archdata.dmabounce, buf); | ||
321 | } | 300 | } |
322 | 301 | ||
323 | /* ************************************************** */ | 302 | /* ************************************************** */ |
@@ -328,45 +307,28 @@ static inline void unmap_single(struct device *dev, dma_addr_t dma_addr, | |||
328 | * substitute the safe buffer for the unsafe one. | 307 | * substitute the safe buffer for the unsafe one. |
329 | * (basically move the buffer from an unsafe area to a safe one) | 308 | * (basically move the buffer from an unsafe area to a safe one) |
330 | */ | 309 | */ |
331 | dma_addr_t __dma_map_single(struct device *dev, void *ptr, size_t size, | ||
332 | enum dma_data_direction dir) | ||
333 | { | ||
334 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | ||
335 | __func__, ptr, size, dir); | ||
336 | |||
337 | BUG_ON(!valid_dma_direction(dir)); | ||
338 | |||
339 | return map_single(dev, ptr, size, dir); | ||
340 | } | ||
341 | EXPORT_SYMBOL(__dma_map_single); | ||
342 | |||
343 | /* | ||
344 | * see if a mapped address was really a "safe" buffer and if so, copy | ||
345 | * the data from the safe buffer back to the unsafe buffer and free up | ||
346 | * the safe buffer. (basically return things back to the way they | ||
347 | * should be) | ||
348 | */ | ||
349 | void __dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | ||
350 | enum dma_data_direction dir) | ||
351 | { | ||
352 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | ||
353 | __func__, (void *) dma_addr, size, dir); | ||
354 | |||
355 | unmap_single(dev, dma_addr, size, dir); | ||
356 | } | ||
357 | EXPORT_SYMBOL(__dma_unmap_single); | ||
358 | |||
359 | dma_addr_t __dma_map_page(struct device *dev, struct page *page, | 310 | dma_addr_t __dma_map_page(struct device *dev, struct page *page, |
360 | unsigned long offset, size_t size, enum dma_data_direction dir) | 311 | unsigned long offset, size_t size, enum dma_data_direction dir) |
361 | { | 312 | { |
313 | dma_addr_t dma_addr; | ||
314 | int ret; | ||
315 | |||
362 | dev_dbg(dev, "%s(page=%p,off=%#lx,size=%zx,dir=%x)\n", | 316 | dev_dbg(dev, "%s(page=%p,off=%#lx,size=%zx,dir=%x)\n", |
363 | __func__, page, offset, size, dir); | 317 | __func__, page, offset, size, dir); |
364 | 318 | ||
365 | BUG_ON(!valid_dma_direction(dir)); | 319 | dma_addr = pfn_to_dma(dev, page_to_pfn(page)) + offset; |
320 | |||
321 | ret = needs_bounce(dev, dma_addr, size); | ||
322 | if (ret < 0) | ||
323 | return ~0; | ||
324 | |||
325 | if (ret == 0) { | ||
326 | __dma_page_cpu_to_dev(page, offset, size, dir); | ||
327 | return dma_addr; | ||
328 | } | ||
366 | 329 | ||
367 | if (PageHighMem(page)) { | 330 | if (PageHighMem(page)) { |
368 | dev_err(dev, "DMA buffer bouncing of HIGHMEM pages " | 331 | dev_err(dev, "DMA buffer bouncing of HIGHMEM pages is not supported\n"); |
369 | "is not supported\n"); | ||
370 | return ~0; | 332 | return ~0; |
371 | } | 333 | } |
372 | 334 | ||
@@ -383,10 +345,19 @@ EXPORT_SYMBOL(__dma_map_page); | |||
383 | void __dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, | 345 | void __dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, |
384 | enum dma_data_direction dir) | 346 | enum dma_data_direction dir) |
385 | { | 347 | { |
386 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | 348 | struct safe_buffer *buf; |
387 | __func__, (void *) dma_addr, size, dir); | 349 | |
350 | dev_dbg(dev, "%s(dma=%#x,size=%d,dir=%x)\n", | ||
351 | __func__, dma_addr, size, dir); | ||
352 | |||
353 | buf = find_safe_buffer_dev(dev, dma_addr, __func__); | ||
354 | if (!buf) { | ||
355 | __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, dma_addr)), | ||
356 | dma_addr & ~PAGE_MASK, size, dir); | ||
357 | return; | ||
358 | } | ||
388 | 359 | ||
389 | unmap_single(dev, dma_addr, size, dir); | 360 | unmap_single(dev, buf, size, dir); |
390 | } | 361 | } |
391 | EXPORT_SYMBOL(__dma_unmap_page); | 362 | EXPORT_SYMBOL(__dma_unmap_page); |
392 | 363 | ||
@@ -461,7 +432,8 @@ static int dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev, | |||
461 | } | 432 | } |
462 | 433 | ||
463 | int dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, | 434 | int dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, |
464 | unsigned long large_buffer_size) | 435 | unsigned long large_buffer_size, |
436 | int (*needs_bounce_fn)(struct device *, dma_addr_t, size_t)) | ||
465 | { | 437 | { |
466 | struct dmabounce_device_info *device_info; | 438 | struct dmabounce_device_info *device_info; |
467 | int ret; | 439 | int ret; |
@@ -497,6 +469,7 @@ int dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, | |||
497 | device_info->dev = dev; | 469 | device_info->dev = dev; |
498 | INIT_LIST_HEAD(&device_info->safe_buffers); | 470 | INIT_LIST_HEAD(&device_info->safe_buffers); |
499 | rwlock_init(&device_info->lock); | 471 | rwlock_init(&device_info->lock); |
472 | device_info->needs_bounce = needs_bounce_fn; | ||
500 | 473 | ||
501 | #ifdef STATS | 474 | #ifdef STATS |
502 | device_info->total_allocs = 0; | 475 | device_info->total_allocs = 0; |
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 7a21927c52e1..14ad62e16dd1 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c | |||
@@ -243,6 +243,12 @@ static struct resource it8152_mem = { | |||
243 | * ITE8152 chip can address up to 64MByte, so all the devices | 243 | * ITE8152 chip can address up to 64MByte, so all the devices |
244 | * connected to ITE8152 (PCI and USB) should have limited DMA window | 244 | * connected to ITE8152 (PCI and USB) should have limited DMA window |
245 | */ | 245 | */ |
246 | static int it8152_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) | ||
247 | { | ||
248 | dev_dbg(dev, "%s: dma_addr %08x, size %08x\n", | ||
249 | __func__, dma_addr, size); | ||
250 | return (dma_addr + size - PHYS_OFFSET) >= SZ_64M; | ||
251 | } | ||
246 | 252 | ||
247 | /* | 253 | /* |
248 | * Setup DMA mask to 64MB on devices connected to ITE8152. Ignore all | 254 | * Setup DMA mask to 64MB on devices connected to ITE8152. Ignore all |
@@ -254,7 +260,7 @@ static int it8152_pci_platform_notify(struct device *dev) | |||
254 | if (dev->dma_mask) | 260 | if (dev->dma_mask) |
255 | *dev->dma_mask = (SZ_64M - 1) | PHYS_OFFSET; | 261 | *dev->dma_mask = (SZ_64M - 1) | PHYS_OFFSET; |
256 | dev->coherent_dma_mask = (SZ_64M - 1) | PHYS_OFFSET; | 262 | dev->coherent_dma_mask = (SZ_64M - 1) | PHYS_OFFSET; |
257 | dmabounce_register_dev(dev, 2048, 4096); | 263 | dmabounce_register_dev(dev, 2048, 4096, it8152_needs_bounce); |
258 | } | 264 | } |
259 | return 0; | 265 | return 0; |
260 | } | 266 | } |
@@ -267,14 +273,6 @@ static int it8152_pci_platform_notify_remove(struct device *dev) | |||
267 | return 0; | 273 | return 0; |
268 | } | 274 | } |
269 | 275 | ||
270 | int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) | ||
271 | { | ||
272 | dev_dbg(dev, "%s: dma_addr %08x, size %08x\n", | ||
273 | __func__, dma_addr, size); | ||
274 | return (dev->bus == &pci_bus_type) && | ||
275 | ((dma_addr + size - PHYS_OFFSET) >= SZ_64M); | ||
276 | } | ||
277 | |||
278 | int dma_set_coherent_mask(struct device *dev, u64 mask) | 276 | int dma_set_coherent_mask(struct device *dev, u64 mask) |
279 | { | 277 | { |
280 | if (mask >= PHYS_OFFSET + SZ_64M - 1) | 278 | if (mask >= PHYS_OFFSET + SZ_64M - 1) |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 9c49a46a2b7a..0569de6acfba 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -579,7 +579,36 @@ sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, | |||
579 | 579 | ||
580 | sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; | 580 | sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; |
581 | } | 581 | } |
582 | #endif | ||
582 | 583 | ||
584 | #ifdef CONFIG_DMABOUNCE | ||
585 | /* | ||
586 | * According to the "Intel StrongARM SA-1111 Microprocessor Companion | ||
587 | * Chip Specification Update" (June 2000), erratum #7, there is a | ||
588 | * significant bug in the SA1111 SDRAM shared memory controller. If | ||
589 | * an access to a region of memory above 1MB relative to the bank base, | ||
590 | * it is important that address bit 10 _NOT_ be asserted. Depending | ||
591 | * on the configuration of the RAM, bit 10 may correspond to one | ||
592 | * of several different (processor-relative) address bits. | ||
593 | * | ||
594 | * This routine only identifies whether or not a given DMA address | ||
595 | * is susceptible to the bug. | ||
596 | * | ||
597 | * This should only get called for sa1111_device types due to the | ||
598 | * way we configure our device dma_masks. | ||
599 | */ | ||
600 | static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) | ||
601 | { | ||
602 | /* | ||
603 | * Section 4.6 of the "Intel StrongARM SA-1111 Development Module | ||
604 | * User's Guide" mentions that jumpers R51 and R52 control the | ||
605 | * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or | ||
606 | * SDRAM bank 1 on Neponset). The default configuration selects | ||
607 | * Assabet, so any address in bank 1 is necessarily invalid. | ||
608 | */ | ||
609 | return (machine_is_assabet() || machine_is_pfs168()) && | ||
610 | (addr >= 0xc8000000 || (addr + size) >= 0xc8000000); | ||
611 | } | ||
583 | #endif | 612 | #endif |
584 | 613 | ||
585 | static void sa1111_dev_release(struct device *_dev) | 614 | static void sa1111_dev_release(struct device *_dev) |
@@ -644,7 +673,8 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, | |||
644 | dev->dev.dma_mask = &dev->dma_mask; | 673 | dev->dev.dma_mask = &dev->dma_mask; |
645 | 674 | ||
646 | if (dev->dma_mask != 0xffffffffUL) { | 675 | if (dev->dma_mask != 0xffffffffUL) { |
647 | ret = dmabounce_register_dev(&dev->dev, 1024, 4096); | 676 | ret = dmabounce_register_dev(&dev->dev, 1024, 4096, |
677 | sa1111_needs_bounce); | ||
648 | if (ret) { | 678 | if (ret) { |
649 | dev_err(&dev->dev, "SA1111: Failed to register" | 679 | dev_err(&dev->dev, "SA1111: Failed to register" |
650 | " with dmabounce\n"); | 680 | " with dmabounce\n"); |
@@ -818,34 +848,6 @@ static void __sa1111_remove(struct sa1111 *sachip) | |||
818 | kfree(sachip); | 848 | kfree(sachip); |
819 | } | 849 | } |
820 | 850 | ||
821 | /* | ||
822 | * According to the "Intel StrongARM SA-1111 Microprocessor Companion | ||
823 | * Chip Specification Update" (June 2000), erratum #7, there is a | ||
824 | * significant bug in the SA1111 SDRAM shared memory controller. If | ||
825 | * an access to a region of memory above 1MB relative to the bank base, | ||
826 | * it is important that address bit 10 _NOT_ be asserted. Depending | ||
827 | * on the configuration of the RAM, bit 10 may correspond to one | ||
828 | * of several different (processor-relative) address bits. | ||
829 | * | ||
830 | * This routine only identifies whether or not a given DMA address | ||
831 | * is susceptible to the bug. | ||
832 | * | ||
833 | * This should only get called for sa1111_device types due to the | ||
834 | * way we configure our device dma_masks. | ||
835 | */ | ||
836 | int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) | ||
837 | { | ||
838 | /* | ||
839 | * Section 4.6 of the "Intel StrongARM SA-1111 Development Module | ||
840 | * User's Guide" mentions that jumpers R51 and R52 control the | ||
841 | * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or | ||
842 | * SDRAM bank 1 on Neponset). The default configuration selects | ||
843 | * Assabet, so any address in bank 1 is necessarily invalid. | ||
844 | */ | ||
845 | return ((machine_is_assabet() || machine_is_pfs168()) && | ||
846 | (addr >= 0xc8000000 || (addr + size) >= 0xc8000000)); | ||
847 | } | ||
848 | |||
849 | struct sa1111_save_data { | 851 | struct sa1111_save_data { |
850 | unsigned int skcr; | 852 | unsigned int skcr; |
851 | unsigned int skpcr; | 853 | unsigned int skpcr; |
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 4fff837363ed..7a21d0bf7134 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h | |||
@@ -115,39 +115,8 @@ static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off, | |||
115 | ___dma_page_dev_to_cpu(page, off, size, dir); | 115 | ___dma_page_dev_to_cpu(page, off, size, dir); |
116 | } | 116 | } |
117 | 117 | ||
118 | /* | 118 | extern int dma_supported(struct device *, u64); |
119 | * Return whether the given device DMA address mask can be supported | 119 | extern int dma_set_mask(struct device *, u64); |
120 | * properly. For example, if your device can only drive the low 24-bits | ||
121 | * during bus mastering, then you would pass 0x00ffffff as the mask | ||
122 | * to this function. | ||
123 | * | ||
124 | * FIXME: This should really be a platform specific issue - we should | ||
125 | * return false if GFP_DMA allocations may not satisfy the supplied 'mask'. | ||
126 | */ | ||
127 | static inline int dma_supported(struct device *dev, u64 mask) | ||
128 | { | ||
129 | if (mask < ISA_DMA_THRESHOLD) | ||
130 | return 0; | ||
131 | return 1; | ||
132 | } | ||
133 | |||
134 | static inline int dma_set_mask(struct device *dev, u64 dma_mask) | ||
135 | { | ||
136 | #ifdef CONFIG_DMABOUNCE | ||
137 | if (dev->archdata.dmabounce) { | ||
138 | if (dma_mask >= ISA_DMA_THRESHOLD) | ||
139 | return 0; | ||
140 | else | ||
141 | return -EIO; | ||
142 | } | ||
143 | #endif | ||
144 | if (!dev->dma_mask || !dma_supported(dev, dma_mask)) | ||
145 | return -EIO; | ||
146 | |||
147 | *dev->dma_mask = dma_mask; | ||
148 | |||
149 | return 0; | ||
150 | } | ||
151 | 120 | ||
152 | /* | 121 | /* |
153 | * DMA errors are defined by all-bits-set in the DMA address. | 122 | * DMA errors are defined by all-bits-set in the DMA address. |
@@ -256,14 +225,14 @@ int dma_mmap_writecombine(struct device *, struct vm_area_struct *, | |||
256 | * @dev: valid struct device pointer | 225 | * @dev: valid struct device pointer |
257 | * @small_buf_size: size of buffers to use with small buffer pool | 226 | * @small_buf_size: size of buffers to use with small buffer pool |
258 | * @large_buf_size: size of buffers to use with large buffer pool (can be 0) | 227 | * @large_buf_size: size of buffers to use with large buffer pool (can be 0) |
228 | * @needs_bounce_fn: called to determine whether buffer needs bouncing | ||
259 | * | 229 | * |
260 | * This function should be called by low-level platform code to register | 230 | * This function should be called by low-level platform code to register |
261 | * a device as requireing DMA buffer bouncing. The function will allocate | 231 | * a device as requireing DMA buffer bouncing. The function will allocate |
262 | * appropriate DMA pools for the device. | 232 | * appropriate DMA pools for the device. |
263 | * | ||
264 | */ | 233 | */ |
265 | extern int dmabounce_register_dev(struct device *, unsigned long, | 234 | extern int dmabounce_register_dev(struct device *, unsigned long, |
266 | unsigned long); | 235 | unsigned long, int (*)(struct device *, dma_addr_t, size_t)); |
267 | 236 | ||
268 | /** | 237 | /** |
269 | * dmabounce_unregister_dev | 238 | * dmabounce_unregister_dev |
@@ -277,31 +246,9 @@ extern int dmabounce_register_dev(struct device *, unsigned long, | |||
277 | */ | 246 | */ |
278 | extern void dmabounce_unregister_dev(struct device *); | 247 | extern void dmabounce_unregister_dev(struct device *); |
279 | 248 | ||
280 | /** | ||
281 | * dma_needs_bounce | ||
282 | * | ||
283 | * @dev: valid struct device pointer | ||
284 | * @dma_handle: dma_handle of unbounced buffer | ||
285 | * @size: size of region being mapped | ||
286 | * | ||
287 | * Platforms that utilize the dmabounce mechanism must implement | ||
288 | * this function. | ||
289 | * | ||
290 | * The dmabounce routines call this function whenever a dma-mapping | ||
291 | * is requested to determine whether a given buffer needs to be bounced | ||
292 | * or not. The function must return 0 if the buffer is OK for | ||
293 | * DMA access and 1 if the buffer needs to be bounced. | ||
294 | * | ||
295 | */ | ||
296 | extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); | ||
297 | |||
298 | /* | 249 | /* |
299 | * The DMA API, implemented by dmabounce.c. See below for descriptions. | 250 | * The DMA API, implemented by dmabounce.c. See below for descriptions. |
300 | */ | 251 | */ |
301 | extern dma_addr_t __dma_map_single(struct device *, void *, size_t, | ||
302 | enum dma_data_direction); | ||
303 | extern void __dma_unmap_single(struct device *, dma_addr_t, size_t, | ||
304 | enum dma_data_direction); | ||
305 | extern dma_addr_t __dma_map_page(struct device *, struct page *, | 252 | extern dma_addr_t __dma_map_page(struct device *, struct page *, |
306 | unsigned long, size_t, enum dma_data_direction); | 253 | unsigned long, size_t, enum dma_data_direction); |
307 | extern void __dma_unmap_page(struct device *, dma_addr_t, size_t, | 254 | extern void __dma_unmap_page(struct device *, dma_addr_t, size_t, |
@@ -328,13 +275,6 @@ static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr, | |||
328 | } | 275 | } |
329 | 276 | ||
330 | 277 | ||
331 | static inline dma_addr_t __dma_map_single(struct device *dev, void *cpu_addr, | ||
332 | size_t size, enum dma_data_direction dir) | ||
333 | { | ||
334 | __dma_single_cpu_to_dev(cpu_addr, size, dir); | ||
335 | return virt_to_dma(dev, cpu_addr); | ||
336 | } | ||
337 | |||
338 | static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page, | 278 | static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page, |
339 | unsigned long offset, size_t size, enum dma_data_direction dir) | 279 | unsigned long offset, size_t size, enum dma_data_direction dir) |
340 | { | 280 | { |
@@ -342,12 +282,6 @@ static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page, | |||
342 | return pfn_to_dma(dev, page_to_pfn(page)) + offset; | 282 | return pfn_to_dma(dev, page_to_pfn(page)) + offset; |
343 | } | 283 | } |
344 | 284 | ||
345 | static inline void __dma_unmap_single(struct device *dev, dma_addr_t handle, | ||
346 | size_t size, enum dma_data_direction dir) | ||
347 | { | ||
348 | __dma_single_dev_to_cpu(dma_to_virt(dev, handle), size, dir); | ||
349 | } | ||
350 | |||
351 | static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle, | 285 | static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle, |
352 | size_t size, enum dma_data_direction dir) | 286 | size_t size, enum dma_data_direction dir) |
353 | { | 287 | { |
@@ -373,14 +307,18 @@ static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle, | |||
373 | static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, | 307 | static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, |
374 | size_t size, enum dma_data_direction dir) | 308 | size_t size, enum dma_data_direction dir) |
375 | { | 309 | { |
310 | unsigned long offset; | ||
311 | struct page *page; | ||
376 | dma_addr_t addr; | 312 | dma_addr_t addr; |
377 | 313 | ||
314 | BUG_ON(!virt_addr_valid(cpu_addr)); | ||
315 | BUG_ON(!virt_addr_valid(cpu_addr + size - 1)); | ||
378 | BUG_ON(!valid_dma_direction(dir)); | 316 | BUG_ON(!valid_dma_direction(dir)); |
379 | 317 | ||
380 | addr = __dma_map_single(dev, cpu_addr, size, dir); | 318 | page = virt_to_page(cpu_addr); |
381 | debug_dma_map_page(dev, virt_to_page(cpu_addr), | 319 | offset = (unsigned long)cpu_addr & ~PAGE_MASK; |
382 | (unsigned long)cpu_addr & ~PAGE_MASK, size, | 320 | addr = __dma_map_page(dev, page, offset, size, dir); |
383 | dir, addr, true); | 321 | debug_dma_map_page(dev, page, offset, size, dir, addr, true); |
384 | 322 | ||
385 | return addr; | 323 | return addr; |
386 | } | 324 | } |
@@ -430,7 +368,7 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle, | |||
430 | size_t size, enum dma_data_direction dir) | 368 | size_t size, enum dma_data_direction dir) |
431 | { | 369 | { |
432 | debug_dma_unmap_page(dev, handle, size, dir, true); | 370 | debug_dma_unmap_page(dev, handle, size, dir, true); |
433 | __dma_unmap_single(dev, handle, size, dir); | 371 | __dma_unmap_page(dev, handle, size, dir); |
434 | } | 372 | } |
435 | 373 | ||
436 | /** | 374 | /** |
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h index 42005542932b..628670e9d7c9 100644 --- a/arch/arm/include/asm/dma.h +++ b/arch/arm/include/asm/dma.h | |||
@@ -1,15 +1,16 @@ | |||
1 | #ifndef __ASM_ARM_DMA_H | 1 | #ifndef __ASM_ARM_DMA_H |
2 | #define __ASM_ARM_DMA_H | 2 | #define __ASM_ARM_DMA_H |
3 | 3 | ||
4 | #include <asm/memory.h> | ||
5 | |||
6 | /* | 4 | /* |
7 | * This is the maximum virtual address which can be DMA'd from. | 5 | * This is the maximum virtual address which can be DMA'd from. |
8 | */ | 6 | */ |
9 | #ifndef ARM_DMA_ZONE_SIZE | 7 | #ifndef CONFIG_ZONE_DMA |
10 | #define MAX_DMA_ADDRESS 0xffffffff | 8 | #define MAX_DMA_ADDRESS 0xffffffffUL |
11 | #else | 9 | #else |
12 | #define MAX_DMA_ADDRESS (PAGE_OFFSET + ARM_DMA_ZONE_SIZE) | 10 | #define MAX_DMA_ADDRESS ({ \ |
11 | extern unsigned long arm_dma_zone_size; \ | ||
12 | arm_dma_zone_size ? \ | ||
13 | (PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; }) | ||
13 | #endif | 14 | #endif |
14 | 15 | ||
15 | #ifdef CONFIG_ISA_DMA_API | 16 | #ifdef CONFIG_ISA_DMA_API |
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index 946f4d778f71..3281fb4b12e3 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h | |||
@@ -23,6 +23,10 @@ struct machine_desc { | |||
23 | 23 | ||
24 | unsigned int nr_irqs; /* number of IRQs */ | 24 | unsigned int nr_irqs; /* number of IRQs */ |
25 | 25 | ||
26 | #ifdef CONFIG_ZONE_DMA | ||
27 | unsigned long dma_zone_size; /* size of DMA-able area */ | ||
28 | #endif | ||
29 | |||
26 | unsigned int video_start; /* start of video RAM */ | 30 | unsigned int video_start; /* start of video RAM */ |
27 | unsigned int video_end; /* end of video RAM */ | 31 | unsigned int video_end; /* end of video RAM */ |
28 | 32 | ||
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index af44a8fb3480..b8de516e600e 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h | |||
@@ -204,18 +204,6 @@ static inline unsigned long __phys_to_virt(unsigned long x) | |||
204 | #endif | 204 | #endif |
205 | 205 | ||
206 | /* | 206 | /* |
207 | * The DMA mask corresponding to the maximum bus address allocatable | ||
208 | * using GFP_DMA. The default here places no restriction on DMA | ||
209 | * allocations. This must be the smallest DMA mask in the system, | ||
210 | * so a successful GFP_DMA allocation will always satisfy this. | ||
211 | */ | ||
212 | #ifndef ARM_DMA_ZONE_SIZE | ||
213 | #define ISA_DMA_THRESHOLD (0xffffffffULL) | ||
214 | #else | ||
215 | #define ISA_DMA_THRESHOLD (PHYS_OFFSET + ARM_DMA_ZONE_SIZE - 1) | ||
216 | #endif | ||
217 | |||
218 | /* | ||
219 | * PFNs are used to describe any physical page; this means | 207 | * PFNs are used to describe any physical page; this means |
220 | * PFN 0 == physical address 0. | 208 | * PFN 0 == physical address 0. |
221 | * | 209 | * |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 7cc11c07adda..f59653d67652 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -918,6 +918,12 @@ void __init setup_arch(char **cmdline_p) | |||
918 | cpu_init(); | 918 | cpu_init(); |
919 | tcm_init(); | 919 | tcm_init(); |
920 | 920 | ||
921 | #ifdef CONFIG_ZONE_DMA | ||
922 | if (mdesc->dma_zone_size) { | ||
923 | extern unsigned long arm_dma_zone_size; | ||
924 | arm_dma_zone_size = mdesc->dma_zone_size; | ||
925 | } | ||
926 | #endif | ||
921 | #ifdef CONFIG_MULTI_IRQ_HANDLER | 927 | #ifdef CONFIG_MULTI_IRQ_HANDLER |
922 | handle_arch_irq = mdesc->handle_irq; | 928 | handle_arch_irq = mdesc->handle_irq; |
923 | #endif | 929 | #endif |
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 8bc3701aa05c..84fd78684868 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c | |||
@@ -681,4 +681,5 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") | |||
681 | .init_irq = cp_intc_init, | 681 | .init_irq = cp_intc_init, |
682 | .timer = &davinci_timer, | 682 | .timer = &davinci_timer, |
683 | .init_machine = da830_evm_init, | 683 | .init_machine = da830_evm_init, |
684 | .dma_zone_size = SZ_128M, | ||
684 | MACHINE_END | 685 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index a7b41bf505f1..29671ef07152 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
@@ -1261,4 +1261,5 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") | |||
1261 | .init_irq = cp_intc_init, | 1261 | .init_irq = cp_intc_init, |
1262 | .timer = &davinci_timer, | 1262 | .timer = &davinci_timer, |
1263 | .init_machine = da850_evm_init, | 1263 | .init_machine = da850_evm_init, |
1264 | .dma_zone_size = SZ_128M, | ||
1264 | MACHINE_END | 1265 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index 6e7cad13352c..241a6bd67408 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
@@ -356,4 +356,5 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") | |||
356 | .init_irq = davinci_irq_init, | 356 | .init_irq = davinci_irq_init, |
357 | .timer = &davinci_timer, | 357 | .timer = &davinci_timer, |
358 | .init_machine = dm355_evm_init, | 358 | .init_machine = dm355_evm_init, |
359 | .dma_zone_size = SZ_128M, | ||
359 | MACHINE_END | 360 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index 543f9911b281..bee284ca7fd6 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c | |||
@@ -275,4 +275,5 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard") | |||
275 | .init_irq = davinci_irq_init, | 275 | .init_irq = davinci_irq_init, |
276 | .timer = &davinci_timer, | 276 | .timer = &davinci_timer, |
277 | .init_machine = dm355_leopard_init, | 277 | .init_machine = dm355_leopard_init, |
278 | .dma_zone_size = SZ_128M, | ||
278 | MACHINE_END | 279 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index c67f684ee3e5..9844fa4cadc9 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -617,5 +617,6 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") | |||
617 | .init_irq = davinci_irq_init, | 617 | .init_irq = davinci_irq_init, |
618 | .timer = &davinci_timer, | 618 | .timer = &davinci_timer, |
619 | .init_machine = dm365_evm_init, | 619 | .init_machine = dm365_evm_init, |
620 | .dma_zone_size = SZ_128M, | ||
620 | MACHINE_END | 621 | MACHINE_END |
621 | 622 | ||
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 556bbd468db3..95607a191e03 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -717,4 +717,5 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") | |||
717 | .init_irq = davinci_irq_init, | 717 | .init_irq = davinci_irq_init, |
718 | .timer = &davinci_timer, | 718 | .timer = &davinci_timer, |
719 | .init_machine = davinci_evm_init, | 719 | .init_machine = davinci_evm_init, |
720 | .dma_zone_size = SZ_128M, | ||
720 | MACHINE_END | 721 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index f6ac9ba74878..6d03643b9bd1 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -802,6 +802,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") | |||
802 | .init_irq = davinci_irq_init, | 802 | .init_irq = davinci_irq_init, |
803 | .timer = &davinci_timer, | 803 | .timer = &davinci_timer, |
804 | .init_machine = evm_init, | 804 | .init_machine = evm_init, |
805 | .dma_zone_size = SZ_128M, | ||
805 | MACHINE_END | 806 | MACHINE_END |
806 | 807 | ||
807 | MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") | 808 | MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") |
@@ -810,5 +811,6 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") | |||
810 | .init_irq = davinci_irq_init, | 811 | .init_irq = davinci_irq_init, |
811 | .timer = &davinci_timer, | 812 | .timer = &davinci_timer, |
812 | .init_machine = evm_init, | 813 | .init_machine = evm_init, |
814 | .dma_zone_size = SZ_128M, | ||
813 | MACHINE_END | 815 | MACHINE_END |
814 | 816 | ||
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 606a6f27ed6c..b8d59ca49027 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c | |||
@@ -570,4 +570,5 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808") | |||
570 | .init_irq = cp_intc_init, | 570 | .init_irq = cp_intc_init, |
571 | .timer = &davinci_timer, | 571 | .timer = &davinci_timer, |
572 | .init_machine = mityomapl138_init, | 572 | .init_machine = mityomapl138_init, |
573 | .dma_zone_size = SZ_128M, | ||
573 | MACHINE_END | 574 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 3e7be2de96de..d60a80028ba3 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c | |||
@@ -277,4 +277,5 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2") | |||
277 | .init_irq = davinci_irq_init, | 277 | .init_irq = davinci_irq_init, |
278 | .timer = &davinci_timer, | 278 | .timer = &davinci_timer, |
279 | .init_machine = davinci_ntosd2_init, | 279 | .init_machine = davinci_ntosd2_init, |
280 | .dma_zone_size = SZ_128M, | ||
280 | MACHINE_END | 281 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index 67c38d0ecd10..237332a11421 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c | |||
@@ -343,4 +343,5 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard") | |||
343 | .init_irq = cp_intc_init, | 343 | .init_irq = cp_intc_init, |
344 | .timer = &davinci_timer, | 344 | .timer = &davinci_timer, |
345 | .init_machine = omapl138_hawk_init, | 345 | .init_machine = omapl138_hawk_init, |
346 | .dma_zone_size = SZ_128M, | ||
346 | MACHINE_END | 347 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index 61ac96d8f00d..5f4385c0a089 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c | |||
@@ -156,4 +156,5 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR") | |||
156 | .init_irq = davinci_irq_init, | 156 | .init_irq = davinci_irq_init, |
157 | .timer = &davinci_timer, | 157 | .timer = &davinci_timer, |
158 | .init_machine = davinci_sffsdr_init, | 158 | .init_machine = davinci_sffsdr_init, |
159 | .dma_zone_size = SZ_128M, | ||
159 | MACHINE_END | 160 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c index 1a656e882262..782892065682 100644 --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c | |||
@@ -282,4 +282,5 @@ MACHINE_START(TNETV107X, "TNETV107X EVM") | |||
282 | .init_irq = cp_intc_init, | 282 | .init_irq = cp_intc_init, |
283 | .timer = &davinci_timer, | 283 | .timer = &davinci_timer, |
284 | .init_machine = tnetv107x_evm_board_init, | 284 | .init_machine = tnetv107x_evm_board_init, |
285 | .dma_zone_size = SZ_128M, | ||
285 | MACHINE_END | 286 | MACHINE_END |
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h index 491249ef209c..78731944a70c 100644 --- a/arch/arm/mach-davinci/include/mach/memory.h +++ b/arch/arm/mach-davinci/include/mach/memory.h | |||
@@ -41,11 +41,4 @@ | |||
41 | */ | 41 | */ |
42 | #define CONSISTENT_DMA_SIZE (14<<20) | 42 | #define CONSISTENT_DMA_SIZE (14<<20) |
43 | 43 | ||
44 | /* | ||
45 | * Restrict DMA-able region to workaround silicon bug. The bug | ||
46 | * restricts buffers available for DMA to video hardware to be | ||
47 | * below 128M | ||
48 | */ | ||
49 | #define ARM_DMA_ZONE_SIZE SZ_128M | ||
50 | |||
51 | #endif /* __ASM_ARCH_MEMORY_H */ | 44 | #endif /* __ASM_ARCH_MEMORY_H */ |
diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c index 629454d71c8d..65f1bea958e5 100644 --- a/arch/arm/mach-h720x/h7201-eval.c +++ b/arch/arm/mach-h720x/h7201-eval.c | |||
@@ -33,4 +33,5 @@ MACHINE_START(H7201, "Hynix GMS30C7201") | |||
33 | .map_io = h720x_map_io, | 33 | .map_io = h720x_map_io, |
34 | .init_irq = h720x_init_irq, | 34 | .init_irq = h720x_init_irq, |
35 | .timer = &h7201_timer, | 35 | .timer = &h7201_timer, |
36 | .dma_zone_size = SZ_256M, | ||
36 | MACHINE_END | 37 | MACHINE_END |
diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c index e9f46b696354..884584a09752 100644 --- a/arch/arm/mach-h720x/h7202-eval.c +++ b/arch/arm/mach-h720x/h7202-eval.c | |||
@@ -76,4 +76,5 @@ MACHINE_START(H7202, "Hynix HMS30C7202") | |||
76 | .init_irq = h7202_init_irq, | 76 | .init_irq = h7202_init_irq, |
77 | .timer = &h7202_timer, | 77 | .timer = &h7202_timer, |
78 | .init_machine = init_eval_h7202, | 78 | .init_machine = init_eval_h7202, |
79 | .dma_zone_size = SZ_256M, | ||
79 | MACHINE_END | 80 | MACHINE_END |
diff --git a/arch/arm/mach-h720x/include/mach/memory.h b/arch/arm/mach-h720x/include/mach/memory.h index b0b3baec9acf..96dcf50c51d3 100644 --- a/arch/arm/mach-h720x/include/mach/memory.h +++ b/arch/arm/mach-h720x/include/mach/memory.h | |||
@@ -8,11 +8,4 @@ | |||
8 | #define __ASM_ARCH_MEMORY_H | 8 | #define __ASM_ARCH_MEMORY_H |
9 | 9 | ||
10 | #define PLAT_PHYS_OFFSET UL(0x40000000) | 10 | #define PLAT_PHYS_OFFSET UL(0x40000000) |
11 | /* | ||
12 | * This is the maximum DMA address that can be DMAd to. | ||
13 | * There should not be more than (0xd0000000 - 0xc0000000) | ||
14 | * bytes of RAM. | ||
15 | */ | ||
16 | #define ARM_DMA_ZONE_SIZE SZ_256M | ||
17 | |||
18 | #endif | 11 | #endif |
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c index 73745ff102d5..ee19c1d383aa 100644 --- a/arch/arm/mach-ixp4xx/avila-setup.c +++ b/arch/arm/mach-ixp4xx/avila-setup.c | |||
@@ -169,6 +169,9 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform") | |||
169 | .timer = &ixp4xx_timer, | 169 | .timer = &ixp4xx_timer, |
170 | .boot_params = 0x0100, | 170 | .boot_params = 0x0100, |
171 | .init_machine = avila_init, | 171 | .init_machine = avila_init, |
172 | #if defined(CONFIG_PCI) | ||
173 | .dma_zone_size = SZ_64M, | ||
174 | #endif | ||
172 | MACHINE_END | 175 | MACHINE_END |
173 | 176 | ||
174 | /* | 177 | /* |
@@ -184,6 +187,9 @@ MACHINE_START(LOFT, "Giant Shoulder Inc Loft board") | |||
184 | .timer = &ixp4xx_timer, | 187 | .timer = &ixp4xx_timer, |
185 | .boot_params = 0x0100, | 188 | .boot_params = 0x0100, |
186 | .init_machine = avila_init, | 189 | .init_machine = avila_init, |
190 | #if defined(CONFIG_PCI) | ||
191 | .dma_zone_size = SZ_64M, | ||
192 | #endif | ||
187 | MACHINE_END | 193 | MACHINE_END |
188 | #endif | 194 | #endif |
189 | 195 | ||
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index e9a589395723..e2e98bbb6413 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c | |||
@@ -316,6 +316,11 @@ static int abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *r | |||
316 | } | 316 | } |
317 | 317 | ||
318 | 318 | ||
319 | static int ixp4xx_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) | ||
320 | { | ||
321 | return (dma_addr + size) >= SZ_64M; | ||
322 | } | ||
323 | |||
319 | /* | 324 | /* |
320 | * Setup DMA mask to 64MB on PCI devices. Ignore all other devices. | 325 | * Setup DMA mask to 64MB on PCI devices. Ignore all other devices. |
321 | */ | 326 | */ |
@@ -324,7 +329,7 @@ static int ixp4xx_pci_platform_notify(struct device *dev) | |||
324 | if(dev->bus == &pci_bus_type) { | 329 | if(dev->bus == &pci_bus_type) { |
325 | *dev->dma_mask = SZ_64M - 1; | 330 | *dev->dma_mask = SZ_64M - 1; |
326 | dev->coherent_dma_mask = SZ_64M - 1; | 331 | dev->coherent_dma_mask = SZ_64M - 1; |
327 | dmabounce_register_dev(dev, 2048, 4096); | 332 | dmabounce_register_dev(dev, 2048, 4096, ixp4xx_needs_bounce); |
328 | } | 333 | } |
329 | return 0; | 334 | return 0; |
330 | } | 335 | } |
@@ -337,11 +342,6 @@ static int ixp4xx_pci_platform_notify_remove(struct device *dev) | |||
337 | return 0; | 342 | return 0; |
338 | } | 343 | } |
339 | 344 | ||
340 | int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) | ||
341 | { | ||
342 | return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M); | ||
343 | } | ||
344 | |||
345 | void __init ixp4xx_pci_preinit(void) | 345 | void __init ixp4xx_pci_preinit(void) |
346 | { | 346 | { |
347 | unsigned long cpuid = read_cpuid_id(); | 347 | unsigned long cpuid = read_cpuid_id(); |
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c index 355e3de38733..e24564b5d935 100644 --- a/arch/arm/mach-ixp4xx/coyote-setup.c +++ b/arch/arm/mach-ixp4xx/coyote-setup.c | |||
@@ -114,6 +114,9 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote") | |||
114 | .timer = &ixp4xx_timer, | 114 | .timer = &ixp4xx_timer, |
115 | .boot_params = 0x0100, | 115 | .boot_params = 0x0100, |
116 | .init_machine = coyote_init, | 116 | .init_machine = coyote_init, |
117 | #if defined(CONFIG_PCI) | ||
118 | .dma_zone_size = SZ_64M, | ||
119 | #endif | ||
117 | MACHINE_END | 120 | MACHINE_END |
118 | #endif | 121 | #endif |
119 | 122 | ||
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c index d398229cfaa5..03e54515e8b3 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-setup.c +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c | |||
@@ -284,4 +284,7 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") | |||
284 | .init_irq = ixp4xx_init_irq, | 284 | .init_irq = ixp4xx_init_irq, |
285 | .timer = &dsmg600_timer, | 285 | .timer = &dsmg600_timer, |
286 | .init_machine = dsmg600_init, | 286 | .init_machine = dsmg600_init, |
287 | #if defined(CONFIG_PCI) | ||
288 | .dma_zone_size = SZ_64M, | ||
289 | #endif | ||
287 | MACHINE_END | 290 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c index 727ee39ce11c..23a8b3614568 100644 --- a/arch/arm/mach-ixp4xx/fsg-setup.c +++ b/arch/arm/mach-ixp4xx/fsg-setup.c | |||
@@ -275,5 +275,8 @@ MACHINE_START(FSG, "Freecom FSG-3") | |||
275 | .timer = &ixp4xx_timer, | 275 | .timer = &ixp4xx_timer, |
276 | .boot_params = 0x0100, | 276 | .boot_params = 0x0100, |
277 | .init_machine = fsg_init, | 277 | .init_machine = fsg_init, |
278 | #if defined(CONFIG_PCI) | ||
279 | .dma_zone_size = SZ_64M, | ||
280 | #endif | ||
278 | MACHINE_END | 281 | MACHINE_END |
279 | 282 | ||
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c index 9dc0b4eaa65a..d4f851bdd9a4 100644 --- a/arch/arm/mach-ixp4xx/gateway7001-setup.c +++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c | |||
@@ -101,5 +101,8 @@ MACHINE_START(GATEWAY7001, "Gateway 7001 AP") | |||
101 | .timer = &ixp4xx_timer, | 101 | .timer = &ixp4xx_timer, |
102 | .boot_params = 0x0100, | 102 | .boot_params = 0x0100, |
103 | .init_machine = gateway7001_init, | 103 | .init_machine = gateway7001_init, |
104 | #if defined(CONFIG_PCI) | ||
105 | .dma_zone_size = SZ_64M, | ||
106 | #endif | ||
104 | MACHINE_END | 107 | MACHINE_END |
105 | #endif | 108 | #endif |
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index 3e8c0e33b59c..5f00ad224fe0 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c | |||
@@ -501,4 +501,7 @@ MACHINE_START(GORAMO_MLR, "MultiLink") | |||
501 | .timer = &ixp4xx_timer, | 501 | .timer = &ixp4xx_timer, |
502 | .boot_params = 0x0100, | 502 | .boot_params = 0x0100, |
503 | .init_machine = gmlr_init, | 503 | .init_machine = gmlr_init, |
504 | #if defined(CONFIG_PCI) | ||
505 | .dma_zone_size = SZ_64M, | ||
506 | #endif | ||
504 | MACHINE_END | 507 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index 77abead36227..3790dffd3c30 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c | |||
@@ -169,6 +169,9 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") | |||
169 | .timer = &ixp4xx_timer, | 169 | .timer = &ixp4xx_timer, |
170 | .boot_params = 0x0100, | 170 | .boot_params = 0x0100, |
171 | .init_machine = gtwx5715_init, | 171 | .init_machine = gtwx5715_init, |
172 | #if defined(CONFIG_PCI) | ||
173 | .dma_zone_size = SZ_64M, | ||
174 | #endif | ||
172 | MACHINE_END | 175 | MACHINE_END |
173 | 176 | ||
174 | 177 | ||
diff --git a/arch/arm/mach-ixp4xx/include/mach/memory.h b/arch/arm/mach-ixp4xx/include/mach/memory.h index 34e79404671a..4caf1761f1e2 100644 --- a/arch/arm/mach-ixp4xx/include/mach/memory.h +++ b/arch/arm/mach-ixp4xx/include/mach/memory.h | |||
@@ -14,8 +14,4 @@ | |||
14 | */ | 14 | */ |
15 | #define PLAT_PHYS_OFFSET UL(0x00000000) | 15 | #define PLAT_PHYS_OFFSET UL(0x00000000) |
16 | 16 | ||
17 | #ifdef CONFIG_PCI | ||
18 | #define ARM_DMA_ZONE_SIZE SZ_64M | ||
19 | #endif | ||
20 | |||
21 | #endif | 17 | #endif |
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index dca4f7f9f4f7..6a2927956bf6 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c | |||
@@ -258,6 +258,9 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") | |||
258 | .timer = &ixp4xx_timer, | 258 | .timer = &ixp4xx_timer, |
259 | .boot_params = 0x0100, | 259 | .boot_params = 0x0100, |
260 | .init_machine = ixdp425_init, | 260 | .init_machine = ixdp425_init, |
261 | #if defined(CONFIG_PCI) | ||
262 | .dma_zone_size = SZ_64M, | ||
263 | #endif | ||
261 | MACHINE_END | 264 | MACHINE_END |
262 | #endif | 265 | #endif |
263 | 266 | ||
@@ -269,6 +272,9 @@ MACHINE_START(IXDP465, "Intel IXDP465 Development Platform") | |||
269 | .timer = &ixp4xx_timer, | 272 | .timer = &ixp4xx_timer, |
270 | .boot_params = 0x0100, | 273 | .boot_params = 0x0100, |
271 | .init_machine = ixdp425_init, | 274 | .init_machine = ixdp425_init, |
275 | #if defined(CONFIG_PCI) | ||
276 | .dma_zone_size = SZ_64M, | ||
277 | #endif | ||
272 | MACHINE_END | 278 | MACHINE_END |
273 | #endif | 279 | #endif |
274 | 280 | ||
@@ -280,6 +286,9 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform") | |||
280 | .timer = &ixp4xx_timer, | 286 | .timer = &ixp4xx_timer, |
281 | .boot_params = 0x0100, | 287 | .boot_params = 0x0100, |
282 | .init_machine = ixdp425_init, | 288 | .init_machine = ixdp425_init, |
289 | #if defined(CONFIG_PCI) | ||
290 | .dma_zone_size = SZ_64M, | ||
291 | #endif | ||
283 | MACHINE_END | 292 | MACHINE_END |
284 | #endif | 293 | #endif |
285 | 294 | ||
@@ -291,5 +300,8 @@ MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform") | |||
291 | .timer = &ixp4xx_timer, | 300 | .timer = &ixp4xx_timer, |
292 | .boot_params = 0x0100, | 301 | .boot_params = 0x0100, |
293 | .init_machine = ixdp425_init, | 302 | .init_machine = ixdp425_init, |
303 | #if defined(CONFIG_PCI) | ||
304 | .dma_zone_size = SZ_64M, | ||
305 | #endif | ||
294 | MACHINE_END | 306 | MACHINE_END |
295 | #endif | 307 | #endif |
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index f18fee748878..afb51879d9a4 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c | |||
@@ -319,4 +319,7 @@ MACHINE_START(NAS100D, "Iomega NAS 100d") | |||
319 | .init_irq = ixp4xx_init_irq, | 319 | .init_irq = ixp4xx_init_irq, |
320 | .timer = &ixp4xx_timer, | 320 | .timer = &ixp4xx_timer, |
321 | .init_machine = nas100d_init, | 321 | .init_machine = nas100d_init, |
322 | #if defined(CONFIG_PCI) | ||
323 | .dma_zone_size = SZ_64M, | ||
324 | #endif | ||
322 | MACHINE_END | 325 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index f79b62eb7614..69e40f2cf092 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c | |||
@@ -305,4 +305,7 @@ MACHINE_START(NSLU2, "Linksys NSLU2") | |||
305 | .init_irq = ixp4xx_init_irq, | 305 | .init_irq = ixp4xx_init_irq, |
306 | .timer = &nslu2_timer, | 306 | .timer = &nslu2_timer, |
307 | .init_machine = nslu2_init, | 307 | .init_machine = nslu2_init, |
308 | #if defined(CONFIG_PCI) | ||
309 | .dma_zone_size = SZ_64M, | ||
310 | #endif | ||
308 | MACHINE_END | 311 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c index 4e72cfdd3c46..045336c833af 100644 --- a/arch/arm/mach-ixp4xx/vulcan-setup.c +++ b/arch/arm/mach-ixp4xx/vulcan-setup.c | |||
@@ -241,4 +241,7 @@ MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") | |||
241 | .timer = &ixp4xx_timer, | 241 | .timer = &ixp4xx_timer, |
242 | .boot_params = 0x0100, | 242 | .boot_params = 0x0100, |
243 | .init_machine = vulcan_init, | 243 | .init_machine = vulcan_init, |
244 | #if defined(CONFIG_PCI) | ||
245 | .dma_zone_size = SZ_64M, | ||
246 | #endif | ||
244 | MACHINE_END | 247 | MACHINE_END |
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c index 5d148c7bc4fb..40b9fad800b8 100644 --- a/arch/arm/mach-ixp4xx/wg302v2-setup.c +++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c | |||
@@ -102,5 +102,8 @@ MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2") | |||
102 | .timer = &ixp4xx_timer, | 102 | .timer = &ixp4xx_timer, |
103 | .boot_params = 0x0100, | 103 | .boot_params = 0x0100, |
104 | .init_machine = wg302v2_init, | 104 | .init_machine = wg302v2_init, |
105 | #if defined(CONFIG_PCI) | ||
106 | .dma_zone_size = SZ_64M, | ||
107 | #endif | ||
105 | MACHINE_END | 108 | MACHINE_END |
106 | #endif | 109 | #endif |
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index a10996782476..bc55d07566ca 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c | |||
@@ -518,4 +518,7 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX") | |||
518 | .init_irq = cmx2xx_init_irq, | 518 | .init_irq = cmx2xx_init_irq, |
519 | .timer = &pxa_timer, | 519 | .timer = &pxa_timer, |
520 | .init_machine = cmx2xx_init, | 520 | .init_machine = cmx2xx_init, |
521 | #ifdef CONFIG_PCI | ||
522 | .dma_zone_size = SZ_64M, | ||
523 | #endif | ||
521 | MACHINE_END | 524 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h index 07734f37f8fd..d05a59727d66 100644 --- a/arch/arm/mach-pxa/include/mach/memory.h +++ b/arch/arm/mach-pxa/include/mach/memory.h | |||
@@ -17,8 +17,4 @@ | |||
17 | */ | 17 | */ |
18 | #define PLAT_PHYS_OFFSET UL(0xa0000000) | 18 | #define PLAT_PHYS_OFFSET UL(0xa0000000) |
19 | 19 | ||
20 | #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) | ||
21 | #define ARM_DMA_ZONE_SIZE SZ_64M | ||
22 | #endif | ||
23 | |||
24 | #endif | 20 | #endif |
diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h index 1759fa673eea..2022e092f0ca 100644 --- a/arch/arm/mach-realview/include/mach/memory.h +++ b/arch/arm/mach-realview/include/mach/memory.h | |||
@@ -29,10 +29,6 @@ | |||
29 | #define PLAT_PHYS_OFFSET UL(0x00000000) | 29 | #define PLAT_PHYS_OFFSET UL(0x00000000) |
30 | #endif | 30 | #endif |
31 | 31 | ||
32 | #ifdef CONFIG_ZONE_DMA | ||
33 | #define ARM_DMA_ZONE_SIZE SZ_256M | ||
34 | #endif | ||
35 | |||
36 | #ifdef CONFIG_SPARSEMEM | 32 | #ifdef CONFIG_SPARSEMEM |
37 | 33 | ||
38 | /* | 34 | /* |
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 10e75faba4c9..7a4e3b18cb3e 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -470,4 +470,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB") | |||
470 | .init_irq = gic_init_irq, | 470 | .init_irq = gic_init_irq, |
471 | .timer = &realview_eb_timer, | 471 | .timer = &realview_eb_timer, |
472 | .init_machine = realview_eb_init, | 472 | .init_machine = realview_eb_init, |
473 | #ifdef CONFIG_ZONE_DMA | ||
474 | .dma_zone_size = SZ_256M, | ||
475 | #endif | ||
473 | MACHINE_END | 476 | MACHINE_END |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index eab6070f66d0..ad5671acb66a 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -365,4 +365,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") | |||
365 | .init_irq = gic_init_irq, | 365 | .init_irq = gic_init_irq, |
366 | .timer = &realview_pb1176_timer, | 366 | .timer = &realview_pb1176_timer, |
367 | .init_machine = realview_pb1176_init, | 367 | .init_machine = realview_pb1176_init, |
368 | #ifdef CONFIG_ZONE_DMA | ||
369 | .dma_zone_size = SZ_256M, | ||
370 | #endif | ||
368 | MACHINE_END | 371 | MACHINE_END |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index b2985fc7cd4e..b43644b3685e 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -367,4 +367,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") | |||
367 | .init_irq = gic_init_irq, | 367 | .init_irq = gic_init_irq, |
368 | .timer = &realview_pb11mp_timer, | 368 | .timer = &realview_pb11mp_timer, |
369 | .init_machine = realview_pb11mp_init, | 369 | .init_machine = realview_pb11mp_init, |
370 | #ifdef CONFIG_ZONE_DMA | ||
371 | .dma_zone_size = SZ_256M, | ||
372 | #endif | ||
370 | MACHINE_END | 373 | MACHINE_END |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index fb6866558760..763e8f38c15d 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -317,4 +317,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") | |||
317 | .init_irq = gic_init_irq, | 317 | .init_irq = gic_init_irq, |
318 | .timer = &realview_pba8_timer, | 318 | .timer = &realview_pba8_timer, |
319 | .init_machine = realview_pba8_init, | 319 | .init_machine = realview_pba8_init, |
320 | #ifdef CONFIG_ZONE_DMA | ||
321 | .dma_zone_size = SZ_256M, | ||
322 | #endif | ||
320 | MACHINE_END | 323 | MACHINE_END |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index 92ace2cf2b2c..363b0ab56150 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -400,4 +400,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") | |||
400 | .init_irq = gic_init_irq, | 400 | .init_irq = gic_init_irq, |
401 | .timer = &realview_pbx_timer, | 401 | .timer = &realview_pbx_timer, |
402 | .init_machine = realview_pbx_init, | 402 | .init_machine = realview_pbx_init, |
403 | #ifdef CONFIG_ZONE_DMA | ||
404 | .dma_zone_size = SZ_256M, | ||
405 | #endif | ||
403 | MACHINE_END | 406 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 5778274a8260..26257df19b63 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c | |||
@@ -453,4 +453,7 @@ MACHINE_START(ASSABET, "Intel-Assabet") | |||
453 | .init_irq = sa1100_init_irq, | 453 | .init_irq = sa1100_init_irq, |
454 | .timer = &sa1100_timer, | 454 | .timer = &sa1100_timer, |
455 | .init_machine = assabet_init, | 455 | .init_machine = assabet_init, |
456 | #ifdef CONFIG_SA1111 | ||
457 | .dma_zone_size = SZ_1M, | ||
458 | #endif | ||
456 | MACHINE_END | 459 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c index 4f19ff868b00..b4311b0a4395 100644 --- a/arch/arm/mach-sa1100/badge4.c +++ b/arch/arm/mach-sa1100/badge4.c | |||
@@ -306,4 +306,7 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4") | |||
306 | .map_io = badge4_map_io, | 306 | .map_io = badge4_map_io, |
307 | .init_irq = sa1100_init_irq, | 307 | .init_irq = sa1100_init_irq, |
308 | .timer = &sa1100_timer, | 308 | .timer = &sa1100_timer, |
309 | #ifdef CONFIG_SA1111 | ||
310 | .dma_zone_size = SZ_1M, | ||
311 | #endif | ||
309 | MACHINE_END | 312 | MACHINE_END |
diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h index cff31ee246b7..12d376795abc 100644 --- a/arch/arm/mach-sa1100/include/mach/memory.h +++ b/arch/arm/mach-sa1100/include/mach/memory.h | |||
@@ -14,10 +14,6 @@ | |||
14 | */ | 14 | */ |
15 | #define PLAT_PHYS_OFFSET UL(0xc0000000) | 15 | #define PLAT_PHYS_OFFSET UL(0xc0000000) |
16 | 16 | ||
17 | #ifdef CONFIG_SA1111 | ||
18 | #define ARM_DMA_ZONE_SIZE SZ_1M | ||
19 | #endif | ||
20 | |||
21 | /* | 17 | /* |
22 | * Because of the wide memory address space between physical RAM banks on the | 18 | * Because of the wide memory address space between physical RAM banks on the |
23 | * SA1100, it's much convenient to use Linux's SparseMEM support to implement | 19 | * SA1100, it's much convenient to use Linux's SparseMEM support to implement |
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 491ac9f20fb4..176c066aec7e 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c | |||
@@ -369,4 +369,7 @@ MACHINE_START(JORNADA720, "HP Jornada 720") | |||
369 | .init_irq = sa1100_init_irq, | 369 | .init_irq = sa1100_init_irq, |
370 | .timer = &sa1100_timer, | 370 | .timer = &sa1100_timer, |
371 | .init_machine = jornada720_mach_init, | 371 | .init_machine = jornada720_mach_init, |
372 | #ifdef CONFIG_SA1111 | ||
373 | .dma_zone_size = SZ_1M, | ||
374 | #endif | ||
372 | MACHINE_END | 375 | MACHINE_END |
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index 5cf7f94c1f31..ac2873c8014b 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c | |||
@@ -156,4 +156,5 @@ MACHINE_START(SHARK, "Shark") | |||
156 | .map_io = shark_map_io, | 156 | .map_io = shark_map_io, |
157 | .init_irq = shark_init_irq, | 157 | .init_irq = shark_init_irq, |
158 | .timer = &shark_timer, | 158 | .timer = &shark_timer, |
159 | .dma_zone_size = SZ_4M, | ||
159 | MACHINE_END | 160 | MACHINE_END |
diff --git a/arch/arm/mach-shark/include/mach/memory.h b/arch/arm/mach-shark/include/mach/memory.h index 4c0831f83b0c..1cf8d6962617 100644 --- a/arch/arm/mach-shark/include/mach/memory.h +++ b/arch/arm/mach-shark/include/mach/memory.h | |||
@@ -17,8 +17,6 @@ | |||
17 | */ | 17 | */ |
18 | #define PLAT_PHYS_OFFSET UL(0x08000000) | 18 | #define PLAT_PHYS_OFFSET UL(0x08000000) |
19 | 19 | ||
20 | #define ARM_DMA_ZONE_SIZE SZ_4M | ||
21 | |||
22 | /* | 20 | /* |
23 | * Cache flushing area | 21 | * Cache flushing area |
24 | */ | 22 | */ |
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 82a093cee09a..0a0a1e7c20d2 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c | |||
@@ -25,9 +25,11 @@ | |||
25 | #include <asm/tlbflush.h> | 25 | #include <asm/tlbflush.h> |
26 | #include <asm/sizes.h> | 26 | #include <asm/sizes.h> |
27 | 27 | ||
28 | #include "mm.h" | ||
29 | |||
28 | static u64 get_coherent_dma_mask(struct device *dev) | 30 | static u64 get_coherent_dma_mask(struct device *dev) |
29 | { | 31 | { |
30 | u64 mask = ISA_DMA_THRESHOLD; | 32 | u64 mask = (u64)arm_dma_limit; |
31 | 33 | ||
32 | if (dev) { | 34 | if (dev) { |
33 | mask = dev->coherent_dma_mask; | 35 | mask = dev->coherent_dma_mask; |
@@ -41,10 +43,10 @@ static u64 get_coherent_dma_mask(struct device *dev) | |||
41 | return 0; | 43 | return 0; |
42 | } | 44 | } |
43 | 45 | ||
44 | if ((~mask) & ISA_DMA_THRESHOLD) { | 46 | if ((~mask) & (u64)arm_dma_limit) { |
45 | dev_warn(dev, "coherent DMA mask %#llx is smaller " | 47 | dev_warn(dev, "coherent DMA mask %#llx is smaller " |
46 | "than system GFP_DMA mask %#llx\n", | 48 | "than system GFP_DMA mask %#llx\n", |
47 | mask, (unsigned long long)ISA_DMA_THRESHOLD); | 49 | mask, (u64)arm_dma_limit); |
48 | return 0; | 50 | return 0; |
49 | } | 51 | } |
50 | } | 52 | } |
@@ -657,6 +659,33 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, | |||
657 | } | 659 | } |
658 | EXPORT_SYMBOL(dma_sync_sg_for_device); | 660 | EXPORT_SYMBOL(dma_sync_sg_for_device); |
659 | 661 | ||
662 | /* | ||
663 | * Return whether the given device DMA address mask can be supported | ||
664 | * properly. For example, if your device can only drive the low 24-bits | ||
665 | * during bus mastering, then you would pass 0x00ffffff as the mask | ||
666 | * to this function. | ||
667 | */ | ||
668 | int dma_supported(struct device *dev, u64 mask) | ||
669 | { | ||
670 | if (mask < (u64)arm_dma_limit) | ||
671 | return 0; | ||
672 | return 1; | ||
673 | } | ||
674 | EXPORT_SYMBOL(dma_supported); | ||
675 | |||
676 | int dma_set_mask(struct device *dev, u64 dma_mask) | ||
677 | { | ||
678 | if (!dev->dma_mask || !dma_supported(dev, dma_mask)) | ||
679 | return -EIO; | ||
680 | |||
681 | #ifndef CONFIG_DMABOUNCE | ||
682 | *dev->dma_mask = dma_mask; | ||
683 | #endif | ||
684 | |||
685 | return 0; | ||
686 | } | ||
687 | EXPORT_SYMBOL(dma_set_mask); | ||
688 | |||
660 | #define PREALLOC_DMA_DEBUG_ENTRIES 4096 | 689 | #define PREALLOC_DMA_DEBUG_ENTRIES 4096 |
661 | 690 | ||
662 | static int __init dma_debug_do_init(void) | 691 | static int __init dma_debug_do_init(void) |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index c19571c40a21..90a38c6baca4 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -212,6 +212,18 @@ static void __init arm_bootmem_init(unsigned long start_pfn, | |||
212 | } | 212 | } |
213 | 213 | ||
214 | #ifdef CONFIG_ZONE_DMA | 214 | #ifdef CONFIG_ZONE_DMA |
215 | |||
216 | unsigned long arm_dma_zone_size __read_mostly; | ||
217 | EXPORT_SYMBOL(arm_dma_zone_size); | ||
218 | |||
219 | /* | ||
220 | * The DMA mask corresponding to the maximum bus address allocatable | ||
221 | * using GFP_DMA. The default here places no restriction on DMA | ||
222 | * allocations. This must be the smallest DMA mask in the system, | ||
223 | * so a successful GFP_DMA allocation will always satisfy this. | ||
224 | */ | ||
225 | u32 arm_dma_limit; | ||
226 | |||
215 | static void __init arm_adjust_dma_zone(unsigned long *size, unsigned long *hole, | 227 | static void __init arm_adjust_dma_zone(unsigned long *size, unsigned long *hole, |
216 | unsigned long dma_size) | 228 | unsigned long dma_size) |
217 | { | 229 | { |
@@ -267,17 +279,17 @@ static void __init arm_bootmem_free(unsigned long min, unsigned long max_low, | |||
267 | #endif | 279 | #endif |
268 | } | 280 | } |
269 | 281 | ||
270 | #ifdef ARM_DMA_ZONE_SIZE | 282 | #ifdef CONFIG_ZONE_DMA |
271 | #ifndef CONFIG_ZONE_DMA | ||
272 | #error ARM_DMA_ZONE_SIZE set but no DMA zone to limit allocations | ||
273 | #endif | ||
274 | |||
275 | /* | 283 | /* |
276 | * Adjust the sizes according to any special requirements for | 284 | * Adjust the sizes according to any special requirements for |
277 | * this machine type. | 285 | * this machine type. |
278 | */ | 286 | */ |
279 | arm_adjust_dma_zone(zone_size, zhole_size, | 287 | if (arm_dma_zone_size) { |
280 | ARM_DMA_ZONE_SIZE >> PAGE_SHIFT); | 288 | arm_adjust_dma_zone(zone_size, zhole_size, |
289 | arm_dma_zone_size >> PAGE_SHIFT); | ||
290 | arm_dma_limit = PHYS_OFFSET + arm_dma_zone_size - 1; | ||
291 | } else | ||
292 | arm_dma_limit = 0xffffffff; | ||
281 | #endif | 293 | #endif |
282 | 294 | ||
283 | free_area_init_node(0, zone_size, min, zhole_size); | 295 | free_area_init_node(0, zone_size, min, zhole_size); |
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index 5b3d7d543659..010566799c80 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h | |||
@@ -23,5 +23,11 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page | |||
23 | 23 | ||
24 | #endif | 24 | #endif |
25 | 25 | ||
26 | #ifdef CONFIG_ZONE_DMA | ||
27 | extern u32 arm_dma_limit; | ||
28 | #else | ||
29 | #define arm_dma_limit ((u32)~0) | ||
30 | #endif | ||
31 | |||
26 | void __init bootmem_init(void); | 32 | void __init bootmem_init(void); |
27 | void arm_mm_memblock_reserve(void); | 33 | void arm_mm_memblock_reserve(void); |