MIPS: uasm: Add lh uam instruction

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6733/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4 files changed, 10 insertions, 6 deletions

diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index d754ddc496d0..a096581168df 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -125,6 +125,7 @@ Ip_u2u1(_jalr);
 Ip_u1(_jr);
 Ip_u2s3u1(_ld);
 Ip_u3u1u2(_ldx);
+Ip_u2s3u1(_lh);
 Ip_u2s3u1(_ll);
 Ip_u2s3u1(_lld);
 Ip_u1s2(_lui);
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index 071a4c1c2024..99d63d9825ed 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -82,6 +82,7 @@ static struct insn insn_table_MM[] = {
         { insn_jalr, M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RT | RS },
         { insn_jr, M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS },
         { insn_ld, 0, 0 },
+        { insn_lh, M(mm_lh32_op, 0, 0, 0, 0, 0), RS | RS | SIMM },
         { insn_ll, M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM },
         { insn_lld, 0, 0 },
         { insn_lui, M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM },
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index c50d3b4b55a7..cb75d452ec0e 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -88,6 +88,7 @@ static struct insn insn_table[] = {
         { insn_jr,  M(spec_op, 0, 0, 0, 0, jr_op),  RS },
         { insn_ld,  M(ld_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
         { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
+        { insn_lh,  M(lw_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
         { insn_lld,  M(lld_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
         { insn_ll,  M(ll_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
         { insn_lui,  M(lui_op, 0, 0, 0, 0, 0),  RT | SIMM },
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 678e41a57892..6ffb60136f91 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -50,12 +50,12 @@ enum opcode {
         insn_divu, insn_dmfc0, insn_dmtc0, insn_drotr, insn_drotr32, insn_dsll,
         insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret,
         insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld,
-        insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0,
-        insn_mfhi, insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe,
-        insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv, insn_sltiu,
-        insn_sltu, insn_sra, insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync,
-        insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait,
-        insn_wsbh, insn_xor, insn_xori, insn_yield,
+        insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx,
+        insn_mfc0, insn_mfhi, insn_mtc0, insn_or, insn_ori, insn_pref,
+        insn_rfe, insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv,
+        insn_sltiu, insn_sltu, insn_sra, insn_srl, insn_srlv, insn_subu,
+        insn_sw, insn_sync, insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi,
+        insn_tlbwr, insn_wait, insn_wsbh, insn_xor, insn_xori, insn_yield,
 };
 
 struct insn {
@@ -269,6 +269,7 @@ I_u1(_jal)
 I_u2u1(_jalr)
 I_u1(_jr)
 I_u2s3u1(_ld)
+I_u2s3u1(_lh)
 I_u2s3u1(_ll)
 I_u2s3u1(_lld)
 I_u1s2(_lui)