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authorAfzal Mohammed <afzal@ti.com>2012-09-29 02:56:13 -0400
committerAfzal Mohammed <afzal@ti.com>2012-10-15 05:12:05 -0400
commitbc3668ea046be9e841eecfab04bddfa759e765d6 (patch)
tree48dd86e24b260351feed63499d277dc61e7f5a98 /arch
parentb6ab13e7d6d2778702baea7433d0bd9f234d5083 (diff)
ARM: OMAP2+: nand: header cleanup
For common arm zImage existing nand header file in platform specific location was moved to generic platform data location, but it contained more than platform data, remove it. New local header has been created for exposing functions. Also move gpmc-nand platform data to platform header meant for nand from gpmc header file Signed-off-by: Afzal Mohammed <afzal@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c3
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c3
-rw-r--r--arch/arm/mach-omap2/board-flash.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c3
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c1
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c58
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.h27
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/plat-omap/include/plat/gpmc.h28
9 files changed, 69 insertions, 60 deletions
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 376d26eb601c..fef68de716b5 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -53,6 +53,7 @@
53#include "sdram-micron-mt46h32m32lf-6.h" 53#include "sdram-micron-mt46h32m32lf-6.h"
54#include "hsmmc.h" 54#include "hsmmc.h"
55#include "common-board-devices.h" 55#include "common-board-devices.h"
56#include "gpmc-nand.h"
56 57
57#define CM_T35_GPIO_PENDOWN 57 58#define CM_T35_GPIO_PENDOWN 57
58#define SB_T35_USB_HUB_RESET_GPIO 167 59#define SB_T35_USB_HUB_RESET_GPIO 167
@@ -181,7 +182,7 @@ static struct omap_nand_platform_data cm_t35_nand_data = {
181 182
182static void __init cm_t35_init_nand(void) 183static void __init cm_t35_init_nand(void)
183{ 184{
184 if (gpmc_nand_init(&cm_t35_nand_data) < 0) 185 if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0)
185 pr_err("CM-T35: Unable to register NAND device\n"); 186 pr_err("CM-T35: Unable to register NAND device\n");
186} 187}
187#else 188#else
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 59c0a45f75b0..3a19e80e0005 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -49,6 +49,7 @@
49#include "control.h" 49#include "control.h"
50#include "common-board-devices.h" 50#include "common-board-devices.h"
51#include "am35xx-emac.h" 51#include "am35xx-emac.h"
52#include "gpmc-nand.h"
52 53
53#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 54#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
54static struct gpio_led cm_t3517_leds[] = { 55static struct gpio_led cm_t3517_leds[] = {
@@ -240,7 +241,7 @@ static struct omap_nand_platform_data cm_t3517_nand_data = {
240 241
241static void __init cm_t3517_init_nand(void) 242static void __init cm_t3517_init_nand(void)
242{ 243{
243 if (gpmc_nand_init(&cm_t3517_nand_data) < 0) 244 if (gpmc_nand_init(&cm_t3517_nand_data, NULL) < 0)
244 pr_err("CM-T3517: NAND initialization failed\n"); 245 pr_err("CM-T3517: NAND initialization failed\n");
245} 246}
246#else 247#else
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index f438d511ba11..ba9fa86a10aa 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -26,6 +26,7 @@
26#include "common.h" 26#include "common.h"
27#include "board-flash.h" 27#include "board-flash.h"
28#include "gpmc-onenand.h" 28#include "gpmc-onenand.h"
29#include "gpmc-nand.h"
29 30
30#define REG_FPGA_REV 0x10 31#define REG_FPGA_REV 0x10
31#define REG_FPGA_DIP_SWITCH_INPUT2 0x60 32#define REG_FPGA_DIP_SWITCH_INPUT2 0x60
@@ -139,10 +140,9 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
139 board_nand_data.parts = nand_parts; 140 board_nand_data.parts = nand_parts;
140 board_nand_data.nr_parts = nr_parts; 141 board_nand_data.nr_parts = nr_parts;
141 board_nand_data.devsize = nand_type; 142 board_nand_data.devsize = nand_type;
142 board_nand_data.gpmc_t = gpmc_t;
143 143
144 board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT; 144 board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
145 gpmc_nand_init(&board_nand_data); 145 gpmc_nand_init(&board_nand_data, gpmc_t);
146} 146}
147#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ 147#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
148 148
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 00a1f4ae6e44..f286b4b4bd5b 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -50,6 +50,7 @@
50#include "sdram-micron-mt46h32m32lf-6.h" 50#include "sdram-micron-mt46h32m32lf-6.h"
51#include "hsmmc.h" 51#include "hsmmc.h"
52#include "common-board-devices.h" 52#include "common-board-devices.h"
53#include "gpmc-nand.h"
53 54
54#define PANDORA_WIFI_IRQ_GPIO 21 55#define PANDORA_WIFI_IRQ_GPIO 21
55#define PANDORA_WIFI_NRESET_GPIO 23 56#define PANDORA_WIFI_NRESET_GPIO 23
@@ -602,7 +603,7 @@ static void __init omap3pandora_init(void)
602 omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL); 603 omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
603 usbhs_init(&usbhs_bdata); 604 usbhs_init(&usbhs_bdata);
604 usb_musb_init(NULL); 605 usb_musb_init(NULL);
605 gpmc_nand_init(&pandora_nand_data); 606 gpmc_nand_init(&pandora_nand_data, NULL);
606 607
607 /* Ensure SDRC pins are mux'd for self-refresh */ 608 /* Ensure SDRC pins are mux'd for self-refresh */
608 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 609 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 90e0597667b9..ad856092c06a 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -25,7 +25,6 @@
25#include <linux/spi/ads7846.h> 25#include <linux/spi/ads7846.h>
26 26
27#include <linux/platform_data/spi-omap2-mcspi.h> 27#include <linux/platform_data/spi-omap2-mcspi.h>
28#include <linux/platform_data/mtd-nand-omap2.h>
29 28
30#include "common.h" 29#include "common.h"
31#include "common-board-devices.h" 30#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 4acf497faeb3..abdb78a95a94 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -20,6 +20,10 @@
20#include <plat/gpmc.h> 20#include <plat/gpmc.h>
21 21
22#include "soc.h" 22#include "soc.h"
23#include "gpmc-nand.h"
24
25/* minimum size for IO mapping */
26#define NAND_IO_SIZE 4
23 27
24static struct resource gpmc_nand_resource[] = { 28static struct resource gpmc_nand_resource[] = {
25 { 29 {
@@ -40,41 +44,36 @@ static struct platform_device gpmc_nand_device = {
40 .resource = gpmc_nand_resource, 44 .resource = gpmc_nand_resource,
41}; 45};
42 46
43static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data) 47static int omap2_nand_gpmc_retime(
48 struct omap_nand_platform_data *gpmc_nand_data,
49 struct gpmc_timings *gpmc_t)
44{ 50{
45 struct gpmc_timings t; 51 struct gpmc_timings t;
46 int err; 52 int err;
47 53
48 if (!gpmc_nand_data->gpmc_t)
49 return 0;
50
51 memset(&t, 0, sizeof(t)); 54 memset(&t, 0, sizeof(t));
52 t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk; 55 t.sync_clk = gpmc_t->sync_clk;
53 t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on); 56 t.cs_on = gpmc_round_ns_to_ticks(gpmc_t->cs_on);
54 t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on); 57 t.adv_on = gpmc_round_ns_to_ticks(gpmc_t->adv_on);
55 58
56 /* Read */ 59 /* Read */
57 t.adv_rd_off = gpmc_round_ns_to_ticks( 60 t.adv_rd_off = gpmc_round_ns_to_ticks(gpmc_t->adv_rd_off);
58 gpmc_nand_data->gpmc_t->adv_rd_off);
59 t.oe_on = t.adv_on; 61 t.oe_on = t.adv_on;
60 t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access); 62 t.access = gpmc_round_ns_to_ticks(gpmc_t->access);
61 t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off); 63 t.oe_off = gpmc_round_ns_to_ticks(gpmc_t->oe_off);
62 t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off); 64 t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_t->cs_rd_off);
63 t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle); 65 t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_t->rd_cycle);
64 66
65 /* Write */ 67 /* Write */
66 t.adv_wr_off = gpmc_round_ns_to_ticks( 68 t.adv_wr_off = gpmc_round_ns_to_ticks(gpmc_t->adv_wr_off);
67 gpmc_nand_data->gpmc_t->adv_wr_off);
68 t.we_on = t.oe_on; 69 t.we_on = t.oe_on;
69 if (cpu_is_omap34xx()) { 70 if (cpu_is_omap34xx()) {
70 t.wr_data_mux_bus = gpmc_round_ns_to_ticks( 71 t.wr_data_mux_bus = gpmc_round_ns_to_ticks(gpmc_t->wr_data_mux_bus);
71 gpmc_nand_data->gpmc_t->wr_data_mux_bus); 72 t.wr_access = gpmc_round_ns_to_ticks(gpmc_t->wr_access);
72 t.wr_access = gpmc_round_ns_to_ticks(
73 gpmc_nand_data->gpmc_t->wr_access);
74 } 73 }
75 t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off); 74 t.we_off = gpmc_round_ns_to_ticks(gpmc_t->we_off);
76 t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off); 75 t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_t->cs_wr_off);
77 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle); 76 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_t->wr_cycle);
78 77
79 /* Configure GPMC */ 78 /* Configure GPMC */
80 if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16) 79 if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
@@ -91,7 +90,8 @@ static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data
91 return 0; 90 return 0;
92} 91}
93 92
94int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) 93int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
94 struct gpmc_timings *gpmc_t)
95{ 95{
96 int err = 0; 96 int err = 0;
97 struct device *dev = &gpmc_nand_device.dev; 97 struct device *dev = &gpmc_nand_device.dev;
@@ -112,11 +112,13 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
112 gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); 112 gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
113 gpmc_nand_resource[2].start = 113 gpmc_nand_resource[2].start =
114 gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); 114 gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
115 /* Set timings in GPMC */ 115
116 err = omap2_nand_gpmc_retime(gpmc_nand_data); 116 if (gpmc_t) {
117 if (err < 0) { 117 err = omap2_nand_gpmc_retime(gpmc_nand_data, gpmc_t);
118 dev_err(dev, "Unable to set gpmc timings: %d\n", err); 118 if (err < 0) {
119 return err; 119 dev_err(dev, "Unable to set gpmc timings: %d\n", err);
120 return err;
121 }
120 } 122 }
121 123
122 /* Enable RD PIN Monitoring Reg */ 124 /* Enable RD PIN Monitoring Reg */
diff --git a/arch/arm/mach-omap2/gpmc-nand.h b/arch/arm/mach-omap2/gpmc-nand.h
new file mode 100644
index 000000000000..11a377f0e6f0
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc-nand.h
@@ -0,0 +1,27 @@
1/*
2 * arch/arm/mach-omap2/gpmc-nand.h
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __OMAP2_GPMC_NAND_H
11#define __OMAP2_GPMC_NAND_H
12
13#include <plat/gpmc.h>
14#include <linux/platform_data/mtd-nand-omap2.h>
15
16#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2)
17extern int gpmc_nand_init(struct omap_nand_platform_data *d,
18 struct gpmc_timings *gpmc_t);
19#else
20static inline int gpmc_nand_init(struct omap_nand_platform_data *d,
21 struct gpmc_timings *gpmc_t)
22{
23 return 0;
24}
25#endif
26
27#endif
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 91af5aefeaae..34823b3092f3 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -26,6 +26,8 @@
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28 28
29#include <linux/platform_data/mtd-nand-omap2.h>
30
29#include <asm/mach-types.h> 31#include <asm/mach-types.h>
30#include <plat/gpmc.h> 32#include <plat/gpmc.h>
31 33
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index f7e0990eaf37..4b06bb4531a2 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -11,6 +11,8 @@
11#ifndef __OMAP2_GPMC_H 11#ifndef __OMAP2_GPMC_H
12#define __OMAP2_GPMC_H 12#define __OMAP2_GPMC_H
13 13
14#include <linux/platform_data/mtd-nand-omap2.h>
15
14/* Maximum Number of Chip Selects */ 16/* Maximum Number of Chip Selects */
15#define GPMC_CS_NUM 8 17#define GPMC_CS_NUM 8
16 18
@@ -86,16 +88,6 @@
86#define PREFETCH_FIFOTHRESHOLD_MAX 0x40 88#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
87#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8) 89#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
88 90
89enum omap_ecc {
90 /* 1-bit ecc: stored at end of spare area */
91 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
93 /* 1-bit ecc: stored at beginning of spare area as romcode */
94 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
95 OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
96 OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
97};
98
99/* 91/*
100 * Note that all values in this struct are in nanoseconds except sync_clk 92 * Note that all values in this struct are in nanoseconds except sync_clk
101 * (which is in picoseconds), while the register values are in gpmc_fck cycles. 93 * (which is in picoseconds), while the register values are in gpmc_fck cycles.
@@ -133,22 +125,6 @@ struct gpmc_timings {
133 u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */ 125 u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */
134}; 126};
135 127
136struct gpmc_nand_regs {
137 void __iomem *gpmc_status;
138 void __iomem *gpmc_nand_command;
139 void __iomem *gpmc_nand_address;
140 void __iomem *gpmc_nand_data;
141 void __iomem *gpmc_prefetch_config1;
142 void __iomem *gpmc_prefetch_config2;
143 void __iomem *gpmc_prefetch_control;
144 void __iomem *gpmc_prefetch_status;
145 void __iomem *gpmc_ecc_config;
146 void __iomem *gpmc_ecc_control;
147 void __iomem *gpmc_ecc_size_config;
148 void __iomem *gpmc_ecc1_result;
149 void __iomem *gpmc_bch_result0;
150};
151
152extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs); 128extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
153extern int gpmc_get_client_irq(unsigned irq_config); 129extern int gpmc_get_client_irq(unsigned irq_config);
154 130