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authorKevin Hilman <khilman@ti.com>2011-03-16 16:35:22 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 14:39:09 -0400
commita7460daf15239563b3e7bb862580f90da78541bd (patch)
tree42faec056fe7dde136dadc6d7ed96861f5431325 /arch
parentfa17f20f686a90004a8af403e24cc8443e8144f3 (diff)
OMAP2+: voltage: move PRCM mod offets into VC/VP structures
Eliminate need for global variables for the various PRM module offsets by making them part of the VP/VC common structures Eventually, these will likely be moved again, or more likely removed when VP/VC code is isolated, but for now just getting rid of them as global variabes so that the voltage domain initialization can be cleaned up. Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/vc.h2
-rw-r--r--arch/arm/mach-omap2/vc3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/vc44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/voltage.c109
-rw-r--r--arch/arm/mach-omap2/voltage.h6
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c8
-rw-r--r--arch/arm/mach-omap2/voltagedomains44xx_data.c9
-rw-r--r--arch/arm/mach-omap2/vp.h2
-rw-r--r--arch/arm/mach-omap2/vp3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/vp44xx_data.c1
10 files changed, 70 insertions, 70 deletions
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index e7767771de49..f7338af13d0b 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -23,6 +23,7 @@
23 * struct omap_vc_common_data - per-VC register/bitfield data 23 * struct omap_vc_common_data - per-VC register/bitfield data
24 * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register 24 * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
25 * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register 25 * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
26 * @prm_mod: PRM module id used for PRM register access
26 * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start 27 * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
27 * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start 28 * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
28 * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start 29 * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
@@ -40,6 +41,7 @@
40struct omap_vc_common_data { 41struct omap_vc_common_data {
41 u32 cmd_on_mask; 42 u32 cmd_on_mask;
42 u32 valid; 43 u32 valid;
44 s16 prm_mod;
43 u8 smps_sa_reg; 45 u8 smps_sa_reg;
44 u8 smps_volra_reg; 46 u8 smps_volra_reg;
45 u8 bypass_val_reg; 47 u8 bypass_val_reg;
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index f37dc4bc379a..55caccb2908d 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -30,6 +30,7 @@
30 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. 30 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
31 */ 31 */
32static struct omap_vc_common_data omap3_vc_common = { 32static struct omap_vc_common_data omap3_vc_common = {
33 .prm_mod = OMAP3430_GR_MOD,
33 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, 34 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
34 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, 35 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
35 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, 36 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index a98da8ddec52..b62678e12a3c 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -31,6 +31,7 @@
31 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. 31 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
32 */ 32 */
33static const struct omap_vc_common_data omap4_vc_common = { 33static const struct omap_vc_common_data omap4_vc_common = {
34 .prm_mod = OMAP4430_PRM_DEVICE_INST,
34 .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, 35 .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
35 .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, 36 .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
36 .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, 37 .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 9ef3789ded4b..3151d7525f89 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -50,10 +50,6 @@ static struct omap_vdd_info **vdd_info;
50 */ 50 */
51static int nr_scalable_vdd; 51static int nr_scalable_vdd;
52 52
53/* XXX document */
54static s16 prm_mod_offs;
55static s16 prm_irqst_ocp_mod_offs;
56
57static struct dentry *voltage_dir; 53static struct dentry *voltage_dir;
58 54
59/* Init function pointers */ 55/* Init function pointers */
@@ -147,7 +143,7 @@ static int vp_volt_debug_get(void *data, u64 *val)
147 return -EINVAL; 143 return -EINVAL;
148 } 144 }
149 145
150 vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); 146 vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage);
151 147
152 if (!vdd->pmic_info->vsel_to_uv) { 148 if (!vdd->pmic_info->vsel_to_uv) {
153 pr_warning("PMIC function to convert vsel to voltage" 149 pr_warning("PMIC function to convert vsel to voltage"
@@ -197,19 +193,19 @@ static void vp_latch_vsel(struct omap_vdd_info *vdd)
197 193
198 vsel = vdd->pmic_info->uv_to_vsel(uvdc); 194 vsel = vdd->pmic_info->uv_to_vsel(uvdc);
199 195
200 vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); 196 vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
201 vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvoltage_mask | 197 vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvoltage_mask |
202 vdd->vp_data->vp_common->vpconfig_initvdd); 198 vdd->vp_data->vp_common->vpconfig_initvdd);
203 vpconfig |= vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift; 199 vpconfig |= vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift;
204 200
205 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 201 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
206 202
207 /* Trigger initVDD value copy to voltage processor */ 203 /* Trigger initVDD value copy to voltage processor */
208 vdd->write_reg((vpconfig | vdd->vp_data->vp_common->vpconfig_initvdd), 204 vdd->write_reg((vpconfig | vdd->vp_data->vp_common->vpconfig_initvdd),
209 prm_mod_offs, vdd->vp_data->vpconfig); 205 vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
210 206
211 /* Clear initVDD copy trigger bit */ 207 /* Clear initVDD copy trigger bit */
212 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 208 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
213} 209}
214 210
215/* Generic voltage init functions */ 211/* Generic voltage init functions */
@@ -227,19 +223,19 @@ static void __init vp_init(struct omap_vdd_info *vdd)
227 (vdd->vp_rt_data.vpconfig_errorgain << 223 (vdd->vp_rt_data.vpconfig_errorgain <<
228 vdd->vp_data->vp_common->vpconfig_errorgain_shift) | 224 vdd->vp_data->vp_common->vpconfig_errorgain_shift) |
229 vdd->vp_data->vp_common->vpconfig_timeouten; 225 vdd->vp_data->vp_common->vpconfig_timeouten;
230 vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vpconfig); 226 vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
231 227
232 vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << 228 vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin <<
233 vdd->vp_data->vp_common->vstepmin_smpswaittimemin_shift) | 229 vdd->vp_data->vp_common->vstepmin_smpswaittimemin_shift) |
234 (vdd->vp_rt_data.vstepmin_stepmin << 230 (vdd->vp_rt_data.vstepmin_stepmin <<
235 vdd->vp_data->vp_common->vstepmin_stepmin_shift)); 231 vdd->vp_data->vp_common->vstepmin_stepmin_shift));
236 vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmin); 232 vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmin);
237 233
238 vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << 234 vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax <<
239 vdd->vp_data->vp_common->vstepmax_smpswaittimemax_shift) | 235 vdd->vp_data->vp_common->vstepmax_smpswaittimemax_shift) |
240 (vdd->vp_rt_data.vstepmax_stepmax << 236 (vdd->vp_rt_data.vstepmax_stepmax <<
241 vdd->vp_data->vp_common->vstepmax_stepmax_shift)); 237 vdd->vp_data->vp_common->vstepmax_stepmax_shift));
242 vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmax); 238 vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmax);
243 239
244 vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << 240 vp_val = ((vdd->vp_rt_data.vlimitto_vddmax <<
245 vdd->vp_data->vp_common->vlimitto_vddmax_shift) | 241 vdd->vp_data->vp_common->vlimitto_vddmax_shift) |
@@ -247,7 +243,7 @@ static void __init vp_init(struct omap_vdd_info *vdd)
247 vdd->vp_data->vp_common->vlimitto_vddmin_shift) | 243 vdd->vp_data->vp_common->vlimitto_vddmin_shift) |
248 (vdd->vp_rt_data.vlimitto_timeout << 244 (vdd->vp_rt_data.vlimitto_timeout <<
249 vdd->vp_data->vp_common->vlimitto_timeout_shift)); 245 vdd->vp_data->vp_common->vlimitto_timeout_shift));
250 vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vlimitto); 246 vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto);
251} 247}
252 248
253static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) 249static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
@@ -336,23 +332,23 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd,
336 volt_data = NULL; 332 volt_data = NULL;
337 333
338 *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); 334 *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt);
339 *current_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); 335 *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage);
340 336
341 /* Setting the ON voltage to the new target voltage */ 337 /* Setting the ON voltage to the new target voltage */
342 vc_cmdval = vdd->read_reg(prm_mod_offs, vdd->vc_data->cmdval_reg); 338 vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg);
343 vc_cmdval &= ~vc_common->cmd_on_mask; 339 vc_cmdval &= ~vc_common->cmd_on_mask;
344 vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); 340 vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift);
345 vdd->write_reg(vc_cmdval, prm_mod_offs, vdd->vc_data->cmdval_reg); 341 vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg);
346 342
347 /* Setting vp errorgain based on the voltage */ 343 /* Setting vp errorgain based on the voltage */
348 if (volt_data) { 344 if (volt_data) {
349 vp_errgain_val = vdd->read_reg(prm_mod_offs, 345 vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod,
350 vdd->vp_data->vpconfig); 346 vdd->vp_data->vpconfig);
351 vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; 347 vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain;
352 vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; 348 vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask;
353 vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << 349 vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain <<
354 vp_common->vpconfig_errorgain_shift; 350 vp_common->vpconfig_errorgain_shift;
355 vdd->write_reg(vp_errgain_val, prm_mod_offs, 351 vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod,
356 vdd->vp_data->vpconfig); 352 vdd->vp_data->vpconfig);
357 } 353 }
358 354
@@ -394,11 +390,11 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
394 (vdd->pmic_info->i2c_slave_addr << 390 (vdd->pmic_info->i2c_slave_addr <<
395 vdd->vc_data->vc_common->slaveaddr_shift); 391 vdd->vc_data->vc_common->slaveaddr_shift);
396 392
397 vdd->write_reg(vc_bypass_value, prm_mod_offs, vc_bypass_val_reg); 393 vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg);
398 vdd->write_reg(vc_bypass_value | vc_valid, prm_mod_offs, 394 vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data->vc_common->prm_mod,
399 vc_bypass_val_reg); 395 vc_bypass_val_reg);
400 396
401 vc_bypass_value = vdd->read_reg(prm_mod_offs, vc_bypass_val_reg); 397 vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg);
402 /* 398 /*
403 * Loop till the bypass command is acknowledged from the SMPS. 399 * Loop till the bypass command is acknowledged from the SMPS.
404 * NOTE: This is legacy code. The loop count and retry count needs 400 * NOTE: This is legacy code. The loop count and retry count needs
@@ -417,7 +413,7 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
417 loop_cnt = 0; 413 loop_cnt = 0;
418 udelay(10); 414 udelay(10);
419 } 415 }
420 vc_bypass_value = vdd->read_reg(prm_mod_offs, 416 vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod,
421 vc_bypass_val_reg); 417 vc_bypass_val_reg);
422 } 418 }
423 419
@@ -445,8 +441,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
445 */ 441 */
446 while (timeout++ < VP_TRANXDONE_TIMEOUT) { 442 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
447 vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, 443 vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status,
448 prm_irqst_ocp_mod_offs, prm_irqst_reg); 444 vdd->prm_irqst_mod, prm_irqst_reg);
449 if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & 445 if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) &
450 vdd->vp_data->prm_irqst_data->tranxdone_status)) 446 vdd->vp_data->prm_irqst_data->tranxdone_status))
451 break; 447 break;
452 udelay(1); 448 udelay(1);
@@ -458,28 +454,28 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
458 } 454 }
459 455
460 /* Configure for VP-Force Update */ 456 /* Configure for VP-Force Update */
461 vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); 457 vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
462 vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | 458 vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd |
463 vdd->vp_data->vp_common->vpconfig_forceupdate | 459 vdd->vp_data->vp_common->vpconfig_forceupdate |
464 vdd->vp_data->vp_common->vpconfig_initvoltage_mask); 460 vdd->vp_data->vp_common->vpconfig_initvoltage_mask);
465 vpconfig |= ((target_vsel << 461 vpconfig |= ((target_vsel <<
466 vdd->vp_data->vp_common->vpconfig_initvoltage_shift)); 462 vdd->vp_data->vp_common->vpconfig_initvoltage_shift));
467 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 463 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
468 464
469 /* Trigger initVDD value copy to voltage processor */ 465 /* Trigger initVDD value copy to voltage processor */
470 vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; 466 vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd;
471 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 467 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
472 468
473 /* Force update of voltage */ 469 /* Force update of voltage */
474 vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; 470 vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate;
475 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 471 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
476 472
477 /* 473 /*
478 * Wait for TransactionDone. Typical latency is <200us. 474 * Wait for TransactionDone. Typical latency is <200us.
479 * Depends on SMPSWAITTIMEMIN/MAX and voltage change 475 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
480 */ 476 */
481 timeout = 0; 477 timeout = 0;
482 omap_test_timeout((vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & 478 omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) &
483 vdd->vp_data->prm_irqst_data->tranxdone_status), 479 vdd->vp_data->prm_irqst_data->tranxdone_status),
484 VP_TRANXDONE_TIMEOUT, timeout); 480 VP_TRANXDONE_TIMEOUT, timeout);
485 if (timeout >= VP_TRANXDONE_TIMEOUT) 481 if (timeout >= VP_TRANXDONE_TIMEOUT)
@@ -496,8 +492,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
496 timeout = 0; 492 timeout = 0;
497 while (timeout++ < VP_TRANXDONE_TIMEOUT) { 493 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
498 vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, 494 vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status,
499 prm_irqst_ocp_mod_offs, prm_irqst_reg); 495 vdd->prm_irqst_mod, prm_irqst_reg);
500 if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & 496 if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) &
501 vdd->vp_data->prm_irqst_data->tranxdone_status)) 497 vdd->vp_data->prm_irqst_data->tranxdone_status))
502 break; 498 break;
503 udelay(1); 499 udelay(1);
@@ -508,13 +504,13 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
508 "to clear the TRANXDONE status\n", 504 "to clear the TRANXDONE status\n",
509 __func__, vdd->voltdm.name); 505 __func__, vdd->voltdm.name);
510 506
511 vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); 507 vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
512 /* Clear initVDD copy trigger bit */ 508 /* Clear initVDD copy trigger bit */
513 vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; 509 vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd;
514 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 510 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
515 /* Clear force bit */ 511 /* Clear force bit */
516 vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; 512 vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate;
517 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 513 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
518 514
519 return 0; 515 return 0;
520} 516}
@@ -525,10 +521,10 @@ static void __init omap3_vfsm_init(struct omap_vdd_info *vdd)
525 * Voltage Manager FSM parameters init 521 * Voltage Manager FSM parameters init
526 * XXX This data should be passed in from the board file 522 * XXX This data should be passed in from the board file
527 */ 523 */
528 vdd->write_reg(OMAP3_CLKSETUP, prm_mod_offs, OMAP3_PRM_CLKSETUP_OFFSET); 524 vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET);
529 vdd->write_reg(OMAP3_VOLTOFFSET, prm_mod_offs, 525 vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common->prm_mod,
530 OMAP3_PRM_VOLTOFFSET_OFFSET); 526 OMAP3_PRM_VOLTOFFSET_OFFSET);
531 vdd->write_reg(OMAP3_VOLTSETUP2, prm_mod_offs, 527 vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common->prm_mod,
532 OMAP3_PRM_VOLTSETUP2_OFFSET); 528 OMAP3_PRM_VOLTSETUP2_OFFSET);
533} 529}
534 530
@@ -550,15 +546,15 @@ static void __init omap3_vc_init(struct omap_vdd_info *vdd)
550 (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | 546 (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) |
551 (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | 547 (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) |
552 (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); 548 (off_vsel << vdd->vc_data->vc_common->cmd_off_shift));
553 vdd->write_reg(vc_val, prm_mod_offs, vdd->vc_data->cmdval_reg); 549 vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg);
554 550
555 /* 551 /*
556 * Generic VC parameters init 552 * Generic VC parameters init
557 * XXX This data should be abstracted out 553 * XXX This data should be abstracted out
558 */ 554 */
559 vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, prm_mod_offs, 555 vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod,
560 OMAP3_PRM_VC_CH_CONF_OFFSET); 556 OMAP3_PRM_VC_CH_CONF_OFFSET);
561 vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, prm_mod_offs, 557 vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod,
562 OMAP3_PRM_VC_I2C_CFG_OFFSET); 558 OMAP3_PRM_VC_I2C_CFG_OFFSET);
563 559
564 omap3_vfsm_init(vdd); 560 omap3_vfsm_init(vdd);
@@ -585,11 +581,11 @@ static void __init omap4_vc_init(struct omap_vdd_info *vdd)
585 vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | 581 vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK |
586 OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | 582 OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK |
587 OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); 583 OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK);
588 vdd->write_reg(vc_val, prm_mod_offs, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); 584 vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
589 585
590 /* XXX These are magic numbers and do not belong! */ 586 /* XXX These are magic numbers and do not belong! */
591 vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); 587 vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
592 vdd->write_reg(vc_val, prm_mod_offs, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); 588 vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
593 589
594 is_initialized = true; 590 is_initialized = true;
595} 591}
@@ -612,27 +608,27 @@ static void __init omap_vc_init(struct omap_vdd_info *vdd)
612 } 608 }
613 609
614 /* Set up the SMPS_SA(i2c slave address in VC */ 610 /* Set up the SMPS_SA(i2c slave address in VC */
615 vc_val = vdd->read_reg(prm_mod_offs, 611 vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod,
616 vdd->vc_data->vc_common->smps_sa_reg); 612 vdd->vc_data->vc_common->smps_sa_reg);
617 vc_val &= ~vdd->vc_data->smps_sa_mask; 613 vc_val &= ~vdd->vc_data->smps_sa_mask;
618 vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data->smps_sa_shift; 614 vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data->smps_sa_shift;
619 vdd->write_reg(vc_val, prm_mod_offs, 615 vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod,
620 vdd->vc_data->vc_common->smps_sa_reg); 616 vdd->vc_data->vc_common->smps_sa_reg);
621 617
622 /* Setup the VOLRA(pmic reg addr) in VC */ 618 /* Setup the VOLRA(pmic reg addr) in VC */
623 vc_val = vdd->read_reg(prm_mod_offs, 619 vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod,
624 vdd->vc_data->vc_common->smps_volra_reg); 620 vdd->vc_data->vc_common->smps_volra_reg);
625 vc_val &= ~vdd->vc_data->smps_volra_mask; 621 vc_val &= ~vdd->vc_data->smps_volra_mask;
626 vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data->smps_volra_shift; 622 vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data->smps_volra_shift;
627 vdd->write_reg(vc_val, prm_mod_offs, 623 vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod,
628 vdd->vc_data->vc_common->smps_volra_reg); 624 vdd->vc_data->vc_common->smps_volra_reg);
629 625
630 /* Configure the setup times */ 626 /* Configure the setup times */
631 vc_val = vdd->read_reg(prm_mod_offs, vdd->vfsm->voltsetup_reg); 627 vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg);
632 vc_val &= ~vdd->vfsm->voltsetup_mask; 628 vc_val &= ~vdd->vfsm->voltsetup_mask;
633 vc_val |= vdd->pmic_info->volt_setup_time << 629 vc_val |= vdd->pmic_info->volt_setup_time <<
634 vdd->vfsm->voltsetup_shift; 630 vdd->vfsm->voltsetup_shift;
635 vdd->write_reg(vc_val, prm_mod_offs, vdd->vfsm->voltsetup_reg); 631 vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg);
636 632
637 if (cpu_is_omap34xx()) 633 if (cpu_is_omap34xx())
638 omap3_vc_init(vdd); 634 omap3_vc_init(vdd);
@@ -713,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
713 return 0; 709 return 0;
714 } 710 }
715 711
716 curr_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); 712 curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage);
717 713
718 if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { 714 if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) {
719 pr_warning("%s: PMIC function to convert vsel to voltage" 715 pr_warning("%s: PMIC function to convert vsel to voltage"
@@ -755,9 +751,9 @@ void omap_vp_enable(struct voltagedomain *voltdm)
755 vp_latch_vsel(vdd); 751 vp_latch_vsel(vdd);
756 752
757 /* Enable VP */ 753 /* Enable VP */
758 vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); 754 vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
759 vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; 755 vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable;
760 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 756 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
761 vdd->vp_enabled = true; 757 vdd->vp_enabled = true;
762} 758}
763 759
@@ -794,14 +790,14 @@ void omap_vp_disable(struct voltagedomain *voltdm)
794 } 790 }
795 791
796 /* Disable VP */ 792 /* Disable VP */
797 vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); 793 vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
798 vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; 794 vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable;
799 vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); 795 vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig);
800 796
801 /* 797 /*
802 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us 798 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
803 */ 799 */
804 omap_test_timeout((vdd->read_reg(prm_mod_offs, vdd->vp_data->vstatus)), 800 omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstatus)),
805 VP_IDLE_TIMEOUT, timeout); 801 VP_IDLE_TIMEOUT, timeout);
806 802
807 if (timeout >= VP_IDLE_TIMEOUT) 803 if (timeout >= VP_IDLE_TIMEOUT)
@@ -1094,12 +1090,9 @@ int __init omap_voltage_late_init(void)
1094} 1090}
1095 1091
1096/* XXX document */ 1092/* XXX document */
1097int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_ocp_mod, 1093int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[],
1098 struct omap_vdd_info *omap_vdd_array[],
1099 u8 omap_vdd_count) 1094 u8 omap_vdd_count)
1100{ 1095{
1101 prm_mod_offs = prm_mod;
1102 prm_irqst_ocp_mod_offs = prm_irqst_ocp_mod;
1103 vdd_info = omap_vdd_array; 1096 vdd_info = omap_vdd_array;
1104 nr_scalable_vdd = omap_vdd_count; 1097 nr_scalable_vdd = omap_vdd_count;
1105 return 0; 1098 return 0;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index e9f5408244e0..ffdc55ee1644 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -119,6 +119,7 @@ struct omap_volt_pmic_info {
119 * @voltdm : pointer to the voltage domain structure 119 * @voltdm : pointer to the voltage domain structure
120 * @debug_dir : debug directory for this voltage domain. 120 * @debug_dir : debug directory for this voltage domain.
121 * @curr_volt : current voltage for this vdd. 121 * @curr_volt : current voltage for this vdd.
122 * @prm_irqst_mod : PRM module id used for PRM IRQ status register access
122 * @vp_enabled : flag to keep track of whether vp is enabled or not 123 * @vp_enabled : flag to keep track of whether vp is enabled or not
123 * @volt_scale : API to scale the voltage of the vdd. 124 * @volt_scale : API to scale the voltage of the vdd.
124 */ 125 */
@@ -133,6 +134,8 @@ struct omap_vdd_info {
133 struct dentry *debug_dir; 134 struct dentry *debug_dir;
134 u32 curr_volt; 135 u32 curr_volt;
135 bool vp_enabled; 136 bool vp_enabled;
137
138 s16 prm_irqst_mod;
136 u32 (*read_reg) (u16 mod, u8 offset); 139 u32 (*read_reg) (u16 mod, u8 offset);
137 void (*write_reg) (u32 val, u16 mod, u8 offset); 140 void (*write_reg) (u32 val, u16 mod, u8 offset);
138 int (*volt_scale) (struct omap_vdd_info *vdd, 141 int (*volt_scale) (struct omap_vdd_info *vdd,
@@ -151,8 +154,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
151 unsigned long volt); 154 unsigned long volt);
152unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); 155unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm);
153struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); 156struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm);
154int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_mod, 157int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[],
155 struct omap_vdd_info *omap_vdd_array[],
156 u8 omap_vdd_count); 158 u8 omap_vdd_count);
157#ifdef CONFIG_PM 159#ifdef CONFIG_PM
158int omap_voltage_register_pmic(struct voltagedomain *voltdm, 160int omap_voltage_register_pmic(struct voltagedomain *voltdm,
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index def230fd2fde..0d30b7fe269b 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = {
38}; 38};
39 39
40static struct omap_vdd_info omap3_vdd1_info = { 40static struct omap_vdd_info omap3_vdd1_info = {
41 .prm_irqst_mod = OCP_MOD,
41 .vp_data = &omap3_vp1_data, 42 .vp_data = &omap3_vp1_data,
42 .vc_data = &omap3_vc1_data, 43 .vc_data = &omap3_vc1_data,
43 .vfsm = &omap3_vdd1_vfsm_data, 44 .vfsm = &omap3_vdd1_vfsm_data,
@@ -53,6 +54,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = {
53}; 54};
54 55
55static struct omap_vdd_info omap3_vdd2_info = { 56static struct omap_vdd_info omap3_vdd2_info = {
57 .prm_irqst_mod = OCP_MOD,
56 .vp_data = &omap3_vp2_data, 58 .vp_data = &omap3_vp2_data,
57 .vc_data = &omap3_vc2_data, 59 .vc_data = &omap3_vc2_data,
58 .vfsm = &omap3_vdd2_vfsm_data, 60 .vfsm = &omap3_vdd2_vfsm_data,
@@ -70,9 +72,6 @@ static struct omap_vdd_info *omap3_vdd_info[] = {
70/* OMAP3 specific voltage init functions */ 72/* OMAP3 specific voltage init functions */
71static int __init omap3xxx_voltage_early_init(void) 73static int __init omap3xxx_voltage_early_init(void)
72{ 74{
73 s16 prm_mod = OMAP3430_GR_MOD;
74 s16 prm_irqst_ocp_mod = OCP_MOD;
75
76 if (!cpu_is_omap34xx()) 75 if (!cpu_is_omap34xx())
77 return 0; 76 return 0;
78 77
@@ -88,8 +87,7 @@ static int __init omap3xxx_voltage_early_init(void)
88 omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; 87 omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data;
89 } 88 }
90 89
91 return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, 90 return omap_voltage_early_init(omap3_vdd_info,
92 omap3_vdd_info,
93 ARRAY_SIZE(omap3_vdd_info)); 91 ARRAY_SIZE(omap3_vdd_info));
94}; 92};
95core_initcall(omap3xxx_voltage_early_init); 93core_initcall(omap3xxx_voltage_early_init);
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index cb64996de0e1..1c2d7d78de13 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -37,6 +37,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = {
37}; 37};
38 38
39static struct omap_vdd_info omap4_vdd_mpu_info = { 39static struct omap_vdd_info omap4_vdd_mpu_info = {
40 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
40 .vp_data = &omap4_vp_mpu_data, 41 .vp_data = &omap4_vp_mpu_data,
41 .vc_data = &omap4_vc_mpu_data, 42 .vc_data = &omap4_vc_mpu_data,
42 .vfsm = &omap4_vdd_mpu_vfsm_data, 43 .vfsm = &omap4_vdd_mpu_vfsm_data,
@@ -50,6 +51,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = {
50}; 51};
51 52
52static struct omap_vdd_info omap4_vdd_iva_info = { 53static struct omap_vdd_info omap4_vdd_iva_info = {
54 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
53 .vp_data = &omap4_vp_iva_data, 55 .vp_data = &omap4_vp_iva_data,
54 .vc_data = &omap4_vc_iva_data, 56 .vc_data = &omap4_vc_iva_data,
55 .vfsm = &omap4_vdd_iva_vfsm_data, 57 .vfsm = &omap4_vdd_iva_vfsm_data,
@@ -63,6 +65,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = {
63}; 65};
64 66
65static struct omap_vdd_info omap4_vdd_core_info = { 67static struct omap_vdd_info omap4_vdd_core_info = {
68 .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
66 .vp_data = &omap4_vp_core_data, 69 .vp_data = &omap4_vp_core_data,
67 .vc_data = &omap4_vc_core_data, 70 .vc_data = &omap4_vc_core_data,
68 .vfsm = &omap4_vdd_core_vfsm_data, 71 .vfsm = &omap4_vdd_core_vfsm_data,
@@ -81,9 +84,6 @@ static struct omap_vdd_info *omap4_vdd_info[] = {
81/* OMAP4 specific voltage init functions */ 84/* OMAP4 specific voltage init functions */
82static int __init omap44xx_voltage_early_init(void) 85static int __init omap44xx_voltage_early_init(void)
83{ 86{
84 s16 prm_mod = OMAP4430_PRM_DEVICE_INST;
85 s16 prm_irqst_ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST;
86
87 if (!cpu_is_omap44xx()) 87 if (!cpu_is_omap44xx())
88 return 0; 88 return 0;
89 89
@@ -95,8 +95,7 @@ static int __init omap44xx_voltage_early_init(void)
95 omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; 95 omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data;
96 omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; 96 omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data;
97 97
98 return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, 98 return omap_voltage_early_init(omap4_vdd_info,
99 omap4_vdd_info,
100 ARRAY_SIZE(omap4_vdd_info)); 99 ARRAY_SIZE(omap4_vdd_info));
101}; 100};
102core_initcall(omap44xx_voltage_early_init); 101core_initcall(omap44xx_voltage_early_init);
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index 7ce134f7de79..d277da6c0378 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -42,6 +42,7 @@
42 * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg 42 * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
43 * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg 43 * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
44 * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg 44 * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
45 * @prm_mod: PRM module id used for PRM register access
45 * 46 *
46 * XXX It it not necessary to have both a mask and a shift for the same 47 * XXX It it not necessary to have both a mask and a shift for the same
47 * bitfield - remove one 48 * bitfield - remove one
@@ -54,6 +55,7 @@ struct omap_vp_common_data {
54 u32 vpconfig_initvdd; 55 u32 vpconfig_initvdd;
55 u32 vpconfig_forceupdate; 56 u32 vpconfig_forceupdate;
56 u32 vpconfig_vpenable; 57 u32 vpconfig_vpenable;
58 s16 prm_mod;
57 u8 vpconfig_erroroffset_shift; 59 u8 vpconfig_erroroffset_shift;
58 u8 vpconfig_errorgain_shift; 60 u8 vpconfig_errorgain_shift;
59 u8 vpconfig_initvoltage_shift; 61 u8 vpconfig_initvoltage_shift;
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index 645217094e51..c9b3e64d4e4e 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -31,6 +31,7 @@
31 * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. 31 * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file.
32 */ 32 */
33static const struct omap_vp_common_data omap3_vp_common = { 33static const struct omap_vp_common_data omap3_vp_common = {
34 .prm_mod = OMAP3430_GR_MOD,
34 .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, 35 .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT,
35 .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, 36 .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK,
36 .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, 37 .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT,
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index 65d1ad63800a..1a0842e59e83 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -32,6 +32,7 @@
32 * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. 32 * XXX This stuff presumably belongs in the vp44xx.c or vp.c file.
33 */ 33 */
34static const struct omap_vp_common_data omap4_vp_common = { 34static const struct omap_vp_common_data omap4_vp_common = {
35 .prm_mod = OMAP4430_PRM_DEVICE_INST,
35 .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, 36 .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT,
36 .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, 37 .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK,
37 .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, 38 .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT,