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authorHeiko Stuebner <heiko@sntech.de>2013-05-20 12:01:41 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-05-20 12:01:41 -0400
commita496bda66201e855f6b5d5d701d8bd65b9178700 (patch)
tree04f7d2a215a35a577dc2cfa984aa25921dfe685a /arch
parente8de5a1fa9101a6aa22b2cbdde058979664b2474 (diff)
ARM: S3C24XX: remove obsolete s3c2412 specific dma settings
The s3c2412 dma init contained code to handle dma-direction specific settings. As now all s3c2412-dma-channels are direction-independent this is not needed anymore. As the s3c2412 also was the only user of this, it can go away completely. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c24xx/dma-s3c2412.c42
-rw-r--r--arch/arm/mach-s3c24xx/dma.c3
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-s3c24xx.h5
3 files changed, 3 insertions, 47 deletions
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2412.c b/arch/arm/mach-s3c24xx/dma-s3c2412.c
index 22298ea5e111..b7e094671522 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2412.c
@@ -35,131 +35,95 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
35 [DMACH_XD0] = { 35 [DMACH_XD0] = {
36 .name = "xdreq0", 36 .name = "xdreq0",
37 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0), 37 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
38 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
39 }, 38 },
40 [DMACH_XD1] = { 39 [DMACH_XD1] = {
41 .name = "xdreq1", 40 .name = "xdreq1",
42 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1), 41 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
43 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
44 }, 42 },
45 [DMACH_SDI] = { 43 [DMACH_SDI] = {
46 .name = "sdi", 44 .name = "sdi",
47 .channels = MAP(S3C2412_DMAREQSEL_SDI), 45 .channels = MAP(S3C2412_DMAREQSEL_SDI),
48 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
49 }, 46 },
50 [DMACH_SPI0_RX] = { 47 [DMACH_SPI0_RX] = {
51 .name = "spi0-rx", 48 .name = "spi0-rx",
52 .channels = MAP(S3C2412_DMAREQSEL_SPI0RX), 49 .channels = MAP(S3C2412_DMAREQSEL_SPI0RX),
53 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
54 }, 50 },
55 [DMACH_SPI0_TX] = { 51 [DMACH_SPI0_TX] = {
56 .name = "spi0-tx", 52 .name = "spi0-tx",
57 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), 53 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
58 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0TX),
59 }, 54 },
60 [DMACH_SPI1_RX] = { 55 [DMACH_SPI1_RX] = {
61 .name = "spi1-rx", 56 .name = "spi1-rx",
62 .channels = MAP(S3C2412_DMAREQSEL_SPI1RX), 57 .channels = MAP(S3C2412_DMAREQSEL_SPI1RX),
63 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
64 }, 58 },
65 [DMACH_SPI1_TX] = { 59 [DMACH_SPI1_TX] = {
66 .name = "spi1-tx", 60 .name = "spi1-tx",
67 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), 61 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
68 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1TX),
69 }, 62 },
70 [DMACH_UART0] = { 63 [DMACH_UART0] = {
71 .name = "uart0", 64 .name = "uart0",
72 .channels = MAP(S3C2412_DMAREQSEL_UART0_0), 65 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
73 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
74 }, 66 },
75 [DMACH_UART1] = { 67 [DMACH_UART1] = {
76 .name = "uart1", 68 .name = "uart1",
77 .channels = MAP(S3C2412_DMAREQSEL_UART1_0), 69 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
78 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
79 }, 70 },
80 [DMACH_UART2] = { 71 [DMACH_UART2] = {
81 .name = "uart2", 72 .name = "uart2",
82 .channels = MAP(S3C2412_DMAREQSEL_UART2_0), 73 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
83 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
84 }, 74 },
85 [DMACH_UART0_SRC2] = { 75 [DMACH_UART0_SRC2] = {
86 .name = "uart0", 76 .name = "uart0",
87 .channels = MAP(S3C2412_DMAREQSEL_UART0_1), 77 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
88 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
89 }, 78 },
90 [DMACH_UART1_SRC2] = { 79 [DMACH_UART1_SRC2] = {
91 .name = "uart1", 80 .name = "uart1",
92 .channels = MAP(S3C2412_DMAREQSEL_UART1_1), 81 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
93 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
94 }, 82 },
95 [DMACH_UART2_SRC2] = { 83 [DMACH_UART2_SRC2] = {
96 .name = "uart2", 84 .name = "uart2",
97 .channels = MAP(S3C2412_DMAREQSEL_UART2_1), 85 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
98 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
99 }, 86 },
100 [DMACH_TIMER] = { 87 [DMACH_TIMER] = {
101 .name = "timer", 88 .name = "timer",
102 .channels = MAP(S3C2412_DMAREQSEL_TIMER), 89 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
103 .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
104 }, 90 },
105 [DMACH_I2S_IN] = { 91 [DMACH_I2S_IN] = {
106 .name = "i2s-sdi", 92 .name = "i2s-sdi",
107 .channels = MAP(S3C2412_DMAREQSEL_I2SRX), 93 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
108 .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
109 }, 94 },
110 [DMACH_I2S_OUT] = { 95 [DMACH_I2S_OUT] = {
111 .name = "i2s-sdo", 96 .name = "i2s-sdo",
112 .channels = MAP(S3C2412_DMAREQSEL_I2STX), 97 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
113 .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
114 }, 98 },
115 [DMACH_USB_EP1] = { 99 [DMACH_USB_EP1] = {
116 .name = "usb-ep1", 100 .name = "usb-ep1",
117 .channels = MAP(S3C2412_DMAREQSEL_USBEP1), 101 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
118 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
119 }, 102 },
120 [DMACH_USB_EP2] = { 103 [DMACH_USB_EP2] = {
121 .name = "usb-ep2", 104 .name = "usb-ep2",
122 .channels = MAP(S3C2412_DMAREQSEL_USBEP2), 105 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
123 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
124 }, 106 },
125 [DMACH_USB_EP3] = { 107 [DMACH_USB_EP3] = {
126 .name = "usb-ep3", 108 .name = "usb-ep3",
127 .channels = MAP(S3C2412_DMAREQSEL_USBEP3), 109 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
128 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
129 }, 110 },
130 [DMACH_USB_EP4] = { 111 [DMACH_USB_EP4] = {
131 .name = "usb-ep4", 112 .name = "usb-ep4",
132 .channels = MAP(S3C2412_DMAREQSEL_USBEP4), 113 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
133 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
134 }, 114 },
135}; 115};
136 116
137static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
138 struct s3c24xx_dma_map *map,
139 enum dma_data_direction dir)
140{
141 unsigned long chsel;
142
143 if (dir == DMA_FROM_DEVICE)
144 chsel = map->channels_rx[0];
145 else
146 chsel = map->channels[0];
147
148 chsel &= ~DMA_CH_VALID;
149 chsel |= S3C2412_DMAREQSEL_HW;
150
151 writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
152}
153
154static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, 117static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
155 struct s3c24xx_dma_map *map) 118 struct s3c24xx_dma_map *map)
156{ 119{
157 s3c2412_dma_direction(chan, map, chan->source); 120 unsigned long chsel = map->channels[0] & (~DMA_CH_VALID);
121 writel(chsel | S3C2412_DMAREQSEL_HW,
122 chan->regs + S3C2412_DMA_DMAREQSEL);
158} 123}
159 124
160static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { 125static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
161 .select = s3c2412_dma_select, 126 .select = s3c2412_dma_select,
162 .direction = s3c2412_dma_direction,
163 .dcon_mask = 0, 127 .dcon_mask = 0,
164 .map = s3c2412_dma_mappings, 128 .map = s3c2412_dma_mappings,
165 .map_size = ARRAY_SIZE(s3c2412_dma_mappings), 129 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
diff --git a/arch/arm/mach-s3c24xx/dma.c b/arch/arm/mach-s3c24xx/dma.c
index aab64909e9a3..4a65cba3295d 100644
--- a/arch/arm/mach-s3c24xx/dma.c
+++ b/arch/arm/mach-s3c24xx/dma.c
@@ -1159,9 +1159,6 @@ int s3c2410_dma_devconfig(enum dma_ch channel,
1159 return -EINVAL; 1159 return -EINVAL;
1160 } 1160 }
1161 1161
1162 if (dma_sel.direction != NULL)
1163 (dma_sel.direction)(chan, chan->map, source);
1164
1165 return 0; 1162 return 0;
1166} 1163}
1167 1164
diff --git a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
index d01576318b2c..bd3a6db14cbb 100644
--- a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
+++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
@@ -28,7 +28,6 @@ struct s3c24xx_dma_map {
28 const char *name; 28 const char *name;
29 29
30 unsigned long channels[S3C_DMA_CHANNELS]; 30 unsigned long channels[S3C_DMA_CHANNELS];
31 unsigned long channels_rx[S3C_DMA_CHANNELS];
32}; 31};
33 32
34struct s3c24xx_dma_selection { 33struct s3c24xx_dma_selection {
@@ -38,10 +37,6 @@ struct s3c24xx_dma_selection {
38 37
39 void (*select)(struct s3c2410_dma_chan *chan, 38 void (*select)(struct s3c2410_dma_chan *chan,
40 struct s3c24xx_dma_map *map); 39 struct s3c24xx_dma_map *map);
41
42 void (*direction)(struct s3c2410_dma_chan *chan,
43 struct s3c24xx_dma_map *map,
44 enum dma_data_direction dir);
45}; 40};
46 41
47extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); 42extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);