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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-09-11 08:27:26 -0400
committerJason Cooper <jason@lakedaemon.net>2012-09-21 14:04:47 -0400
commit9b7b7d8b024d3e44412abbbb0206ab8f60c459ad (patch)
tree187f532e984b1a0c30153a8d110e0e97d7f0f452 /arch
parente96a0309f8545d539c1bf4acd5b58727a8f39818 (diff)
arm: plat-orion: use void __iomem pointers for addr-map functions
The functions for address mapping management now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-dove/addr-map.c2
-rw-r--r--arch/arm/mach-kirkwood/addr-map.c5
-rw-r--r--arch/arm/mach-mv78xx0/addr-map.c4
-rw-r--r--arch/arm/mach-orion5x/addr-map.c5
-rw-r--r--arch/arm/plat-orion/addr-map.c11
-rw-r--r--arch/arm/plat-orion/include/plat/addr-map.h4
6 files changed, 15 insertions, 16 deletions
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index b92c9c7d1d6e..2a06c0163418 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -47,7 +47,7 @@ static inline void __iomem *ddr_map_sc(int i)
47static struct __initdata orion_addr_map_cfg addr_map_cfg = { 47static struct __initdata orion_addr_map_cfg addr_map_cfg = {
48 .num_wins = 8, 48 .num_wins = 8,
49 .remappable_wins = 4, 49 .remappable_wins = 4,
50 .bridge_virt_base = (unsigned long) BRIDGE_VIRT_BASE, 50 .bridge_virt_base = BRIDGE_VIRT_BASE,
51}; 51};
52 52
53static const struct __initdata orion_addr_map_info addr_map_info[] = { 53static const struct __initdata orion_addr_map_info addr_map_info[] = {
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 1b8c75c529dc..8f0d162a1e1d 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -41,7 +41,7 @@
41static struct __initdata orion_addr_map_cfg addr_map_cfg = { 41static struct __initdata orion_addr_map_cfg addr_map_cfg = {
42 .num_wins = 8, 42 .num_wins = 8,
43 .remappable_wins = 4, 43 .remappable_wins = 4,
44 .bridge_virt_base = (unsigned long) BRIDGE_VIRT_BASE, 44 .bridge_virt_base = BRIDGE_VIRT_BASE,
45}; 45};
46 46
47static const struct __initdata orion_addr_map_info addr_map_info[] = { 47static const struct __initdata orion_addr_map_info addr_map_info[] = {
@@ -86,5 +86,6 @@ void __init kirkwood_setup_cpu_mbus(void)
86 /* 86 /*
87 * Setup MBUS dram target info. 87 * Setup MBUS dram target info.
88 */ 88 */
89 orion_setup_cpu_mbus_target(&addr_map_cfg, DDR_WINDOW_CPU_BASE); 89 orion_setup_cpu_mbus_target(&addr_map_cfg,
90 (void __iomem *) DDR_WINDOW_CPU_BASE);
90} 91}
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 3358f079bcd1..a51fc247e73b 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -71,10 +71,10 @@ void __init mv78xx0_setup_cpu_mbus(void)
71 */ 71 */
72 if (mv78xx0_core_index() == 0) 72 if (mv78xx0_core_index() == 0)
73 orion_setup_cpu_mbus_target(&addr_map_cfg, 73 orion_setup_cpu_mbus_target(&addr_map_cfg,
74 DDR_WINDOW_CPU0_BASE); 74 (void __iomem *) DDR_WINDOW_CPU0_BASE);
75 else 75 else
76 orion_setup_cpu_mbus_target(&addr_map_cfg, 76 orion_setup_cpu_mbus_target(&addr_map_cfg,
77 DDR_WINDOW_CPU1_BASE); 77 (void __iomem *) DDR_WINDOW_CPU1_BASE);
78} 78}
79 79
80void __init mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size, 80void __init mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index d309f53b7a0c..b5efc0fd31cb 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -79,7 +79,7 @@ static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
79static struct orion_addr_map_cfg addr_map_cfg __initdata = { 79static struct orion_addr_map_cfg addr_map_cfg __initdata = {
80 .num_wins = 8, 80 .num_wins = 8,
81 .cpu_win_can_remap = cpu_win_can_remap, 81 .cpu_win_can_remap = cpu_win_can_remap,
82 .bridge_virt_base = (unsigned long) ORION5X_BRIDGE_VIRT_BASE, 82 .bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,
83}; 83};
84 84
85static const struct __initdata orion_addr_map_info addr_map_info[] = { 85static const struct __initdata orion_addr_map_info addr_map_info[] = {
@@ -113,7 +113,8 @@ void __init orion5x_setup_cpu_mbus_bridge(void)
113 /* 113 /*
114 * Setup MBUS dram target info. 114 * Setup MBUS dram target info.
115 */ 115 */
116 orion_setup_cpu_mbus_target(&addr_map_cfg, ORION5X_DDR_WINDOW_CPU_BASE); 116 orion_setup_cpu_mbus_target(&addr_map_cfg,
117 (void __iomem *) ORION5X_DDR_WINDOW_CPU_BASE);
117} 118}
118 119
119void __init orion5x_setup_dev_boot_win(u32 base, u32 size) 120void __init orion5x_setup_dev_boot_win(u32 base, u32 size)
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
index 367ca89ac403..a7b8060c293a 100644
--- a/arch/arm/plat-orion/addr-map.c
+++ b/arch/arm/plat-orion/addr-map.c
@@ -48,7 +48,7 @@ EXPORT_SYMBOL_GPL(mv_mbus_dram_info);
48static void __init __iomem * 48static void __init __iomem *
49orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win) 49orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
50{ 50{
51 return (void __iomem *)(cfg->bridge_virt_base + (win << 4)); 51 return cfg->bridge_virt_base + (win << 4);
52} 52}
53 53
54/* 54/*
@@ -143,19 +143,16 @@ void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
143 * Setup MBUS dram target info. 143 * Setup MBUS dram target info.
144 */ 144 */
145void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, 145void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
146 const u32 ddr_window_cpu_base) 146 const void __iomem *ddr_window_cpu_base)
147{ 147{
148 void __iomem *addr;
149 int i; 148 int i;
150 int cs; 149 int cs;
151 150
152 orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; 151 orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
153 152
154 addr = (void __iomem *)ddr_window_cpu_base;
155
156 for (i = 0, cs = 0; i < 4; i++) { 153 for (i = 0, cs = 0; i < 4; i++) {
157 u32 base = readl(addr + DDR_BASE_CS_OFF(i)); 154 u32 base = readl(ddr_window_cpu_base + DDR_BASE_CS_OFF(i));
158 u32 size = readl(addr + DDR_SIZE_CS_OFF(i)); 155 u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
159 156
160 /* 157 /*
161 * Chip select enabled? 158 * Chip select enabled?
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h
index fd556f77562c..0a746fdfaf74 100644
--- a/arch/arm/plat-orion/include/plat/addr-map.h
+++ b/arch/arm/plat-orion/include/plat/addr-map.h
@@ -16,7 +16,7 @@ extern struct mbus_dram_target_info orion_mbus_dram_info;
16struct orion_addr_map_cfg { 16struct orion_addr_map_cfg {
17 const int num_wins; /* Total number of windows */ 17 const int num_wins; /* Total number of windows */
18 const int remappable_wins; 18 const int remappable_wins;
19 const u32 bridge_virt_base; 19 void __iomem * const bridge_virt_base;
20 20
21 /* If NULL, the default cpu_win_can_remap will be used, using 21 /* If NULL, the default cpu_win_can_remap will be used, using
22 the value in remappable_wins */ 22 the value in remappable_wins */
@@ -49,5 +49,5 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
49 const u8 attr, const int remap); 49 const u8 attr, const int remap);
50 50
51void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, 51void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
52 const u32 ddr_window_cpu_base); 52 const void __iomem *ddr_window_cpu_base);
53#endif 53#endif