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authorDavid Daney <david.daney@cavium.com>2013-05-22 18:35:56 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-05-23 04:19:04 -0400
commit8f657933a3c2086d4731350c98f91a990783c0d3 (patch)
tree298c60e432e33537cc0c7c4eef6aa545b1449612 /arch
parentbe8a6d452bda4b1b842e81a99bb86f77a1cb8279 (diff)
MIPS: Quit exposing Kconfig symbols in uapi headers.
The kernel's struct pt_regs has many fields conditional on various Kconfig variables, we cannot be exporting this garbage to user-space. Move the kernel's definition to asm/ptrace.h, and put a uapi only version in uapi/asm/ptrace.h gated by #ifndef __KERNEL__ Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5305/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/include/asm/ptrace.h32
-rw-r--r--arch/mips/include/uapi/asm/ptrace.h17
2 files changed, 34 insertions, 15 deletions
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index a3186f2bb8a0..5e6cd0947393 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -16,6 +16,38 @@
16#include <asm/isadep.h> 16#include <asm/isadep.h>
17#include <uapi/asm/ptrace.h> 17#include <uapi/asm/ptrace.h>
18 18
19/*
20 * This struct defines the way the registers are stored on the stack during a
21 * system call/exception. As usual the registers k0/k1 aren't being saved.
22 */
23struct pt_regs {
24#ifdef CONFIG_32BIT
25 /* Pad bytes for argument save space on the stack. */
26 unsigned long pad0[6];
27#endif
28
29 /* Saved main processor registers. */
30 unsigned long regs[32];
31
32 /* Saved special registers. */
33 unsigned long cp0_status;
34 unsigned long hi;
35 unsigned long lo;
36#ifdef CONFIG_CPU_HAS_SMARTMIPS
37 unsigned long acx;
38#endif
39 unsigned long cp0_badvaddr;
40 unsigned long cp0_cause;
41 unsigned long cp0_epc;
42#ifdef CONFIG_MIPS_MT_SMTC
43 unsigned long cp0_tcstatus;
44#endif /* CONFIG_MIPS_MT_SMTC */
45#ifdef CONFIG_CPU_CAVIUM_OCTEON
46 unsigned long long mpl[3]; /* MTM{0,1,2} */
47 unsigned long long mtp[3]; /* MTP{0,1,2} */
48#endif
49} __aligned(8);
50
19struct task_struct; 51struct task_struct;
20 52
21extern int ptrace_getregs(struct task_struct *child, __s64 __user *data); 53extern int ptrace_getregs(struct task_struct *child, __s64 __user *data);
diff --git a/arch/mips/include/uapi/asm/ptrace.h b/arch/mips/include/uapi/asm/ptrace.h
index 4d58d8468705..b26f7e317279 100644
--- a/arch/mips/include/uapi/asm/ptrace.h
+++ b/arch/mips/include/uapi/asm/ptrace.h
@@ -22,16 +22,12 @@
22#define DSP_CONTROL 77 22#define DSP_CONTROL 77
23#define ACX 78 23#define ACX 78
24 24
25#ifndef __KERNEL__
25/* 26/*
26 * This struct defines the way the registers are stored on the stack during a 27 * This struct defines the way the registers are stored on the stack during a
27 * system call/exception. As usual the registers k0/k1 aren't being saved. 28 * system call/exception. As usual the registers k0/k1 aren't being saved.
28 */ 29 */
29struct pt_regs { 30struct pt_regs {
30#ifdef CONFIG_32BIT
31 /* Pad bytes for argument save space on the stack. */
32 unsigned long pad0[6];
33#endif
34
35 /* Saved main processor registers. */ 31 /* Saved main processor registers. */
36 unsigned long regs[32]; 32 unsigned long regs[32];
37 33
@@ -39,20 +35,11 @@ struct pt_regs {
39 unsigned long cp0_status; 35 unsigned long cp0_status;
40 unsigned long hi; 36 unsigned long hi;
41 unsigned long lo; 37 unsigned long lo;
42#ifdef CONFIG_CPU_HAS_SMARTMIPS
43 unsigned long acx;
44#endif
45 unsigned long cp0_badvaddr; 38 unsigned long cp0_badvaddr;
46 unsigned long cp0_cause; 39 unsigned long cp0_cause;
47 unsigned long cp0_epc; 40 unsigned long cp0_epc;
48#ifdef CONFIG_MIPS_MT_SMTC
49 unsigned long cp0_tcstatus;
50#endif /* CONFIG_MIPS_MT_SMTC */
51#ifdef CONFIG_CPU_CAVIUM_OCTEON
52 unsigned long long mpl[3]; /* MTM{0,1,2} */
53 unsigned long long mtp[3]; /* MTP{0,1,2} */
54#endif
55} __attribute__ ((aligned (8))); 41} __attribute__ ((aligned (8)));
42#endif /* __KERNEL__ */
56 43
57/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ 44/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
58#define PTRACE_GETREGS 12 45#define PTRACE_GETREGS 12