ARM: at91: add Shutdown Controller (SHDWC) DT support

Use a string to specific the wakeup mode to make it more readable.

Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

5 files changed, 95 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 0a1df8d9bfb6..9a0647bb387f 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -74,6 +74,11 @@
                                 reg = <0xfffffd00 0x10>;
                         };
 
+                        shdwc@fffffd10 {
+                                compatible = "atmel,at91sam9260-shdwc";
+                                reg = <0xfffffd10 0x10>;
+                        };
+
                         pit: timer@fffffd30 {
                                 compatible = "atmel,at91sam9260-pit";
                                 reg = <0xfffffd30 0xf>;
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 587a1913c062..8908f078c307 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -83,6 +83,11 @@
                         };
 
 
+                        shdwc@fffffd10 {
+                                compatible = "atmel,at91sam9rl-shdwc";
+                                reg = <0xfffffd10 0x10>;
+                        };
+
                         tcb0: timer@fff7c000 {
                                 compatible = "atmel,at91rm9200-tcb";
                                 reg = <0xfff7c000 0x100>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 73c46e3dffab..20155ccbbe14 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -73,6 +73,11 @@
                                 reg = <0xfffffe00 0x10>;
                         };
 
+                        shdwc@fffffe10 {
+                                compatible = "atmel,at91sam9x5-shdwc";
+                                reg = <0xfffffe10 0x10>;
+                        };
+
                         pit: timer@fffffe30 {
                                 compatible = "atmel,at91sam9260-pit";
                                 reg = <0xfffffe30 0xf>;
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h
index 1d4fe822c77a..60478ea8bd46 100644
--- a/arch/arm/mach-at91/include/mach/at91_shdwc.h
+++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h
@@ -36,9 +36,11 @@ extern void __iomem *at91_shdwc_base;
 #define                 AT91_SHDW_WKMODE0_HIGH          1
 #define                 AT91_SHDW_WKMODE0_LOW           2
 #define                 AT91_SHDW_WKMODE0_ANYLEVEL      3
-#define         AT91_SHDW_CPTWK0        (0xf << 4)              /* Counter On Wake Up 0 */
+#define         AT91_SHDW_CPTWK0_MAX    0xf                     /* Maximum Counter On Wake Up 0 */
+#define         AT91_SHDW_CPTWK0        (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */
 #define                 AT91_SHDW_CPTWK0_(x)    ((x) << 4)
 #define         AT91_SHDW_RTTWKEN       (1   << 16)             /* Real Time Timer Wake-up Enable */
+#define         AT91_SHDW_RTCWKEN       (1   << 17)             /* Real Time Clock Wake-up Enable */
 
 #define AT91_SHDW_SR            0x08                    /* Shut Down Status Register */
 #define         AT91_SHDW_WAKEUP0       (1 <<  0)               /* Wake-up 0 Status */
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 46d0a56ba825..1083739e3065 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -351,10 +351,87 @@ static void at91_dt_ramc(void)
         of_node_put(np);
 }
 
+static struct of_device_id shdwc_ids[] = {
+        { .compatible = "atmel,at91sam9260-shdwc", },
+        { .compatible = "atmel,at91sam9rl-shdwc", },
+        { .compatible = "atmel,at91sam9x5-shdwc", },
+        { /*sentinel*/ }
+};
+
+static const char *shdwc_wakeup_modes[] = {
+        [AT91_SHDW_WKMODE0_NONE]        = "none",
+        [AT91_SHDW_WKMODE0_HIGH]        = "high",
+        [AT91_SHDW_WKMODE0_LOW]         = "low",
+        [AT91_SHDW_WKMODE0_ANYLEVEL]    = "any",
+};
+
+const int at91_dtget_shdwc_wakeup_mode(struct device_node *np)
+{
+        const char *pm;
+        int err, i;
+
+        err = of_property_read_string(np, "atmel,wakeup-mode", &pm);
+        if (err < 0)
+                return AT91_SHDW_WKMODE0_ANYLEVEL;
+
+        for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++)
+                if (!strcasecmp(pm, shdwc_wakeup_modes[i]))
+                        return i;
+
+        return -ENODEV;
+}
+
+static void at91_dt_shdwc(void)
+{
+        struct device_node *np;
+        int wakeup_mode;
+        u32 reg;
+        u32 mode = 0;
+
+        np = of_find_matching_node(NULL, shdwc_ids);
+        if (!np) {
+                pr_debug("AT91: unable to find compatible shutdown (shdwc) conroller node in dtb\n");
+                return;
+        }
+
+        at91_shdwc_base = of_iomap(np, 0);
+        if (!at91_shdwc_base)
+                panic("AT91: unable to map shdwc cpu registers\n");
+
+        wakeup_mode = at91_dtget_shdwc_wakeup_mode(np);
+        if (wakeup_mode < 0) {
+                pr_warn("AT91: shdwc unknown wakeup mode\n");
+                goto end;
+        }
+
+        if (!of_property_read_u32(np, "atmel,wakeup-counter", &reg)) {
+                if (reg > AT91_SHDW_CPTWK0_MAX) {
+                        pr_warn("AT91: shdwc wakeup conter 0x%x > 0x%x reduce it to 0x%x\n",
+                                reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX);
+                        reg = AT91_SHDW_CPTWK0_MAX;
+                }
+                mode |= AT91_SHDW_CPTWK0_(reg);
+        }
+
+        if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
+                        mode |= AT91_SHDW_RTCWKEN;
+
+        if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
+                        mode |= AT91_SHDW_RTTWKEN;
+
+        at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
+
+end:
+        pm_power_off = at91sam9_poweroff;
+
+        of_node_put(np);
+}
+
 void __init at91_dt_initialize(void)
 {
         at91_dt_rstc();
         at91_dt_ramc();
+        at91_dt_shdwc();
 
         /* Init clock subsystem */
         at91_dt_clock_init();