aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorCyrill Gorcunov <gorcunov@openvz.org>2011-05-19 19:45:50 -0400
committerIngo Molnar <mingo@elte.hu>2011-05-20 07:41:11 -0400
commit79deb8e511bd6fc8e40add4da75b19df085d9453 (patch)
tree6deaa403173d0501ee497237bea2e6e3f6e7cfe5 /arch
parent9d0fa6c5f43f2d9c6966dcab7af96a717682fdec (diff)
x86, x2apic: Move the common bits to x2apic.h
To eliminate code duplication. Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: steiner@sgi.com Cc: yinghai@kernel.org Link: http://lkml.kernel.org/r/20110519234637.591426753@sbsiddha-MOBL3.sc.intel.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/x2apic.h62
-rw-r--r--arch/x86/kernel/apic/x2apic_cluster.c71
-rw-r--r--arch/x86/kernel/apic/x2apic_phys.c60
3 files changed, 69 insertions, 124 deletions
diff --git a/arch/x86/include/asm/x2apic.h b/arch/x86/include/asm/x2apic.h
new file mode 100644
index 000000000000..6bf5b8e478c0
--- /dev/null
+++ b/arch/x86/include/asm/x2apic.h
@@ -0,0 +1,62 @@
1/*
2 * Common bits for X2APIC cluster/physical modes.
3 */
4
5#ifndef _ASM_X86_X2APIC_H
6#define _ASM_X86_X2APIC_H
7
8#include <asm/apic.h>
9#include <asm/ipi.h>
10#include <linux/cpumask.h>
11
12/*
13 * Need to use more than cpu 0, because we need more vectors
14 * when MSI-X are used.
15 */
16static const struct cpumask *x2apic_target_cpus(void)
17{
18 return cpu_online_mask;
19}
20
21static int x2apic_apic_id_registered(void)
22{
23 return 1;
24}
25
26/*
27 * For now each logical cpu is in its own vector allocation domain.
28 */
29static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
30{
31 cpumask_clear(retmask);
32 cpumask_set_cpu(cpu, retmask);
33}
34
35static void
36__x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
37{
38 unsigned long cfg = __prepare_ICR(0, vector, dest);
39 native_x2apic_icr_write(cfg, apicid);
40}
41
42static unsigned int x2apic_get_apic_id(unsigned long id)
43{
44 return id;
45}
46
47static unsigned long x2apic_set_apic_id(unsigned int id)
48{
49 return id;
50}
51
52static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
53{
54 return initial_apicid >> index_msb;
55}
56
57static void x2apic_send_IPI_self(int vector)
58{
59 apic_write(APIC_SELF_IPI, vector);
60}
61
62#endif /* _ASM_X86_X2APIC_H */
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index 4dfe9363ff4e..f7875d9a18c2 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -8,8 +8,7 @@
8#include <linux/cpu.h> 8#include <linux/cpu.h>
9 9
10#include <asm/smp.h> 10#include <asm/smp.h>
11#include <asm/apic.h> 11#include <asm/x2apic.h>
12#include <asm/ipi.h>
13 12
14static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); 13static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
15static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster); 14static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster);
@@ -20,37 +19,6 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
20 return x2apic_enabled(); 19 return x2apic_enabled();
21} 20}
22 21
23/*
24 * need to use more than cpu 0, because we need more vectors when
25 * MSI-X are used.
26 */
27static const struct cpumask *x2apic_target_cpus(void)
28{
29 return cpu_online_mask;
30}
31
32/*
33 * for now each logical cpu is in its own vector allocation domain.
34 */
35static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
36{
37 cpumask_clear(retmask);
38 cpumask_set_cpu(cpu, retmask);
39}
40
41static void
42 __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
43{
44 unsigned long cfg;
45
46 cfg = __prepare_ICR(0, vector, dest);
47
48 /*
49 * send the IPI.
50 */
51 native_x2apic_icr_write(cfg, apicid);
52}
53
54static inline u32 x2apic_cluster(int cpu) 22static inline u32 x2apic_cluster(int cpu)
55{ 23{
56 return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16; 24 return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16;
@@ -128,11 +96,6 @@ static void x2apic_send_IPI_all(int vector)
128 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC); 96 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
129} 97}
130 98
131static int x2apic_apic_id_registered(void)
132{
133 return 1;
134}
135
136static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) 99static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
137{ 100{
138 /* 101 /*
@@ -165,32 +128,6 @@ x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
165 return per_cpu(x86_cpu_to_logical_apicid, cpu); 128 return per_cpu(x86_cpu_to_logical_apicid, cpu);
166} 129}
167 130
168static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x)
169{
170 unsigned int id;
171
172 id = x;
173 return id;
174}
175
176static unsigned long set_apic_id(unsigned int id)
177{
178 unsigned long x;
179
180 x = id;
181 return x;
182}
183
184static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb)
185{
186 return initial_apicid >> index_msb;
187}
188
189static void x2apic_send_IPI_self(int vector)
190{
191 apic_write(APIC_SELF_IPI, vector);
192}
193
194static void init_x2apic_ldr(void) 131static void init_x2apic_ldr(void)
195{ 132{
196 unsigned int this_cpu = smp_processor_id(); 133 unsigned int this_cpu = smp_processor_id();
@@ -298,11 +235,11 @@ struct apic apic_x2apic_cluster = {
298 .setup_portio_remap = NULL, 235 .setup_portio_remap = NULL,
299 .check_phys_apicid_present = default_check_phys_apicid_present, 236 .check_phys_apicid_present = default_check_phys_apicid_present,
300 .enable_apic_mode = NULL, 237 .enable_apic_mode = NULL,
301 .phys_pkg_id = x2apic_cluster_phys_pkg_id, 238 .phys_pkg_id = x2apic_phys_pkg_id,
302 .mps_oem_check = NULL, 239 .mps_oem_check = NULL,
303 240
304 .get_apic_id = x2apic_cluster_phys_get_apic_id, 241 .get_apic_id = x2apic_get_apic_id,
305 .set_apic_id = set_apic_id, 242 .set_apic_id = x2apic_set_apic_id,
306 .apic_id_mask = 0xFFFFFFFFu, 243 .apic_id_mask = 0xFFFFFFFFu,
307 244
308 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, 245 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 6ef49e338a73..78c8f33a09fa 100644
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -7,8 +7,7 @@
7#include <linux/dmar.h> 7#include <linux/dmar.h>
8 8
9#include <asm/smp.h> 9#include <asm/smp.h>
10#include <asm/apic.h> 10#include <asm/x2apic.h>
11#include <asm/ipi.h>
12 11
13int x2apic_phys; 12int x2apic_phys;
14 13
@@ -27,34 +26,6 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
27 return 0; 26 return 0;
28} 27}
29 28
30/*
31 * need to use more than cpu 0, because we need more vectors when
32 * MSI-X are used.
33 */
34static const struct cpumask *x2apic_target_cpus(void)
35{
36 return cpu_online_mask;
37}
38
39static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
40{
41 cpumask_clear(retmask);
42 cpumask_set_cpu(cpu, retmask);
43}
44
45static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
46 unsigned int dest)
47{
48 unsigned long cfg;
49
50 cfg = __prepare_ICR(0, vector, dest);
51
52 /*
53 * send the IPI.
54 */
55 native_x2apic_icr_write(cfg, apicid);
56}
57
58static void 29static void
59__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest) 30__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
60{ 31{
@@ -97,11 +68,6 @@ static void x2apic_send_IPI_all(int vector)
97 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC); 68 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
98} 69}
99 70
100static int x2apic_apic_id_registered(void)
101{
102 return 1;
103}
104
105static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) 71static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
106{ 72{
107 /* 73 /*
@@ -134,26 +100,6 @@ x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
134 return per_cpu(x86_cpu_to_apicid, cpu); 100 return per_cpu(x86_cpu_to_apicid, cpu);
135} 101}
136 102
137static unsigned int x2apic_phys_get_apic_id(unsigned long x)
138{
139 return x;
140}
141
142static unsigned long set_apic_id(unsigned int id)
143{
144 return id;
145}
146
147static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
148{
149 return initial_apicid >> index_msb;
150}
151
152static void x2apic_send_IPI_self(int vector)
153{
154 apic_write(APIC_SELF_IPI, vector);
155}
156
157static void init_x2apic_ldr(void) 103static void init_x2apic_ldr(void)
158{ 104{
159} 105}
@@ -196,8 +142,8 @@ struct apic apic_x2apic_phys = {
196 .phys_pkg_id = x2apic_phys_pkg_id, 142 .phys_pkg_id = x2apic_phys_pkg_id,
197 .mps_oem_check = NULL, 143 .mps_oem_check = NULL,
198 144
199 .get_apic_id = x2apic_phys_get_apic_id, 145 .get_apic_id = x2apic_get_apic_id,
200 .set_apic_id = set_apic_id, 146 .set_apic_id = x2apic_set_apic_id,
201 .apic_id_mask = 0xFFFFFFFFu, 147 .apic_id_mask = 0xFFFFFFFFu,
202 148
203 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, 149 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,