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authorThomas Gleixner <tglx@linutronix.de>2011-06-06 05:51:43 -0400
committerSekhar Nori <nsekhar@ti.com>2011-06-08 05:03:52 -0400
commit7416401661fad5c7ee9edb17cb54e7bff7a74dfe (patch)
tree598260d3ccbdeb7bb8b93c0ee6ec79fda48bbf28 /arch
parent59c5f46fbe01a00eedf54a23789634438bb80603 (diff)
arm: davinci: Fix fallout from generic irq chip conversion
The code which does the chained handler setup was overwriting chip_data. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Holger Hans Peter Freyther <holger@freyther.de> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-davinci/gpio.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index a0b838894ac9..e7221398e5af 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -252,9 +252,11 @@ static struct irq_chip gpio_irqchip = {
252static void 252static void
253gpio_irq_handler(unsigned irq, struct irq_desc *desc) 253gpio_irq_handler(unsigned irq, struct irq_desc *desc)
254{ 254{
255 struct davinci_gpio_regs __iomem *g = irq2regs(irq); 255 struct davinci_gpio_regs __iomem *g;
256 u32 mask = 0xffff; 256 u32 mask = 0xffff;
257 257
258 g = (__force struct davinci_gpio_regs __iomem *) irq_desc_get_handler_data(desc);
259
258 /* we only care about one bank */ 260 /* we only care about one bank */
259 if (irq & 1) 261 if (irq & 1)
260 mask <<= 16; 262 mask <<= 16;
@@ -422,8 +424,7 @@ static int __init davinci_gpio_irq_setup(void)
422 424
423 /* set up all irqs in this bank */ 425 /* set up all irqs in this bank */
424 irq_set_chained_handler(bank_irq, gpio_irq_handler); 426 irq_set_chained_handler(bank_irq, gpio_irq_handler);
425 irq_set_chip_data(bank_irq, (__force void *)g); 427 irq_set_handler_data(bank_irq, (__force void *)g);
426 irq_set_handler_data(bank_irq, (void *)irq);
427 428
428 for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { 429 for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
429 irq_set_chip(irq, &gpio_irqchip); 430 irq_set_chip(irq, &gpio_irqchip);