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authorIngo Molnar <mingo@elte.hu>2009-01-28 13:32:55 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-29 08:16:52 -0500
commit6bda2c8b32febeb38ee128047253751e080bad52 (patch)
tree7f6f78cf18cd69a44e987d985c57402d493d0dee /arch
parent1164dd0099c0d79146a55319670f57ab7ad1d352 (diff)
x86: remove subarchitecture support
Remove the 32-bit subarchitecture support code. All subarchitectures but Voyager have been converted. Voyager will be done later or will be removed. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/Makefile21
-rw-r--r--arch/x86/include/asm/apic.h2
-rw-r--r--arch/x86/kernel/Makefile2
-rw-r--r--arch/x86/kernel/io_apic.c17
-rw-r--r--arch/x86/kernel/probe_32.c163
-rw-r--r--arch/x86/mach-default/setup.c162
-rw-r--r--arch/x86/mach-generic/default.c93
7 files changed, 166 insertions, 294 deletions
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 799a0d931c81..99550c407990 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -102,24 +102,6 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
102# prevent gcc from generating any FP code by mistake 102# prevent gcc from generating any FP code by mistake
103KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,) 103KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)
104 104
105###
106# Sub architecture support
107# fcore-y is linked before mcore-y files.
108
109# Default subarch .c files
110mcore-y := arch/x86/mach-default/
111
112# Voyager subarch support
113mflags-$(CONFIG_X86_VOYAGER) := -Iarch/x86/include/asm/mach-voyager
114mcore-$(CONFIG_X86_VOYAGER) := arch/x86/mach-voyager/
115
116# default subarch .h files
117mflags-y += -Iarch/x86/include/asm/mach-default
118
119# 64 bit does not support subarch support - clear sub arch variables
120fcore-$(CONFIG_X86_64) :=
121mcore-$(CONFIG_X86_64) :=
122
123KBUILD_CFLAGS += $(mflags-y) 105KBUILD_CFLAGS += $(mflags-y)
124KBUILD_AFLAGS += $(mflags-y) 106KBUILD_AFLAGS += $(mflags-y)
125 107
@@ -145,9 +127,6 @@ core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/
145core-y += arch/x86/kernel/ 127core-y += arch/x86/kernel/
146core-y += arch/x86/mm/ 128core-y += arch/x86/mm/
147 129
148# Remaining sub architecture files
149core-y += $(mcore-y)
150
151core-y += arch/x86/crypto/ 130core-y += arch/x86/crypto/
152core-y += arch/x86/vdso/ 131core-y += arch/x86/vdso/
153core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/ 132core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 6a77068e261a..b03711d7990b 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -215,6 +215,7 @@ static inline void disable_local_APIC(void) { }
215#define SET_APIC_ID(x) (apic->set_apic_id(x)) 215#define SET_APIC_ID(x) (apic->set_apic_id(x))
216#else 216#else
217 217
218#ifdef CONFIG_X86_LOCAL_APIC
218static inline unsigned default_get_apic_id(unsigned long x) 219static inline unsigned default_get_apic_id(unsigned long x)
219{ 220{
220 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 221 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
@@ -224,6 +225,7 @@ static inline unsigned default_get_apic_id(unsigned long x)
224 else 225 else
225 return (x >> 24) & 0x0F; 226 return (x >> 24) & 0x0F;
226} 227}
228#endif
227 229
228#endif 230#endif
229 231
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index d3f8f49aed65..1bc4cdc797db 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -63,7 +63,7 @@ obj-$(CONFIG_SMP) += setup_percpu.o
63obj-$(CONFIG_X86_64_SMP) += tsc_sync.o 63obj-$(CONFIG_X86_64_SMP) += tsc_sync.o
64obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o 64obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o
65obj-$(CONFIG_X86_MPPARSE) += mpparse.o 65obj-$(CONFIG_X86_MPPARSE) += mpparse.o
66obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o 66obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o ipi.o
67obj-$(CONFIG_X86_IO_APIC) += io_apic.o 67obj-$(CONFIG_X86_IO_APIC) += io_apic.o
68obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o 68obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o
69obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 69obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index 241a01d6fd4b..3378ffb21407 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -797,23 +797,6 @@ static void clear_IO_APIC (void)
797 clear_IO_APIC_pin(apic, pin); 797 clear_IO_APIC_pin(apic, pin);
798} 798}
799 799
800#if !defined(CONFIG_SMP) && defined(CONFIG_X86_32)
801void default_send_IPI_self(int vector)
802{
803 unsigned int cfg;
804
805 /*
806 * Wait for idle.
807 */
808 apic_wait_icr_idle();
809 cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | apic->dest_logical;
810 /*
811 * Send the IPI. The write to APIC_ICR fires this off.
812 */
813 apic_write(APIC_ICR, cfg);
814}
815#endif /* !CONFIG_SMP && CONFIG_X86_32*/
816
817#ifdef CONFIG_X86_32 800#ifdef CONFIG_X86_32
818/* 801/*
819 * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to 802 * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to
diff --git a/arch/x86/kernel/probe_32.c b/arch/x86/kernel/probe_32.c
index a6fba6914167..61339a0d55cf 100644
--- a/arch/x86/kernel/probe_32.c
+++ b/arch/x86/kernel/probe_32.c
@@ -32,6 +32,26 @@
32#include <asm/genapic.h> 32#include <asm/genapic.h>
33#include <asm/ipi.h> 33#include <asm/ipi.h>
34 34
35#include <linux/smp.h>
36#include <linux/init.h>
37#include <linux/interrupt.h>
38#include <asm/acpi.h>
39#include <asm/arch_hooks.h>
40#include <asm/e820.h>
41#include <asm/setup.h>
42
43#include <asm/genapic.h>
44
45#ifdef CONFIG_HOTPLUG_CPU
46#define DEFAULT_SEND_IPI (1)
47#else
48#define DEFAULT_SEND_IPI (0)
49#endif
50
51int no_broadcast = DEFAULT_SEND_IPI;
52
53#ifdef CONFIG_X86_LOCAL_APIC
54
35static void default_vector_allocation_domain(int cpu, struct cpumask *retmask) 55static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
36{ 56{
37 /* 57 /*
@@ -246,3 +266,146 @@ int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
246 } 266 }
247 return 0; 267 return 0;
248} 268}
269
270#endif /* CONFIG_X86_LOCAL_APIC */
271
272/**
273 * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
274 *
275 * Description:
276 * Perform any necessary interrupt initialisation prior to setting up
277 * the "ordinary" interrupt call gates. For legacy reasons, the ISA
278 * interrupts should be initialised here if the machine emulates a PC
279 * in any way.
280 **/
281void __init pre_intr_init_hook(void)
282{
283 if (x86_quirks->arch_pre_intr_init) {
284 if (x86_quirks->arch_pre_intr_init())
285 return;
286 }
287 init_ISA_irqs();
288}
289
290/**
291 * intr_init_hook - post gate setup interrupt initialisation
292 *
293 * Description:
294 * Fill in any interrupts that may have been left out by the general
295 * init_IRQ() routine. interrupts having to do with the machine rather
296 * than the devices on the I/O bus (like APIC interrupts in intel MP
297 * systems) are started here.
298 **/
299void __init intr_init_hook(void)
300{
301 if (x86_quirks->arch_intr_init) {
302 if (x86_quirks->arch_intr_init())
303 return;
304 }
305}
306
307/**
308 * pre_setup_arch_hook - hook called prior to any setup_arch() execution
309 *
310 * Description:
311 * generally used to activate any machine specific identification
312 * routines that may be needed before setup_arch() runs. On Voyager
313 * this is used to get the board revision and type.
314 **/
315void __init pre_setup_arch_hook(void)
316{
317}
318
319/**
320 * trap_init_hook - initialise system specific traps
321 *
322 * Description:
323 * Called as the final act of trap_init(). Used in VISWS to initialise
324 * the various board specific APIC traps.
325 **/
326void __init trap_init_hook(void)
327{
328 if (x86_quirks->arch_trap_init) {
329 if (x86_quirks->arch_trap_init())
330 return;
331 }
332}
333
334static struct irqaction irq0 = {
335 .handler = timer_interrupt,
336 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
337 .mask = CPU_MASK_NONE,
338 .name = "timer"
339};
340
341/**
342 * pre_time_init_hook - do any specific initialisations before.
343 *
344 **/
345void __init pre_time_init_hook(void)
346{
347 if (x86_quirks->arch_pre_time_init)
348 x86_quirks->arch_pre_time_init();
349}
350
351/**
352 * time_init_hook - do any specific initialisations for the system timer.
353 *
354 * Description:
355 * Must plug the system timer interrupt source at HZ into the IRQ listed
356 * in irq_vectors.h:TIMER_IRQ
357 **/
358void __init time_init_hook(void)
359{
360 if (x86_quirks->arch_time_init) {
361 /*
362 * A nonzero return code does not mean failure, it means
363 * that the architecture quirk does not want any
364 * generic (timer) setup to be performed after this:
365 */
366 if (x86_quirks->arch_time_init())
367 return;
368 }
369
370 irq0.mask = cpumask_of_cpu(0);
371 setup_irq(0, &irq0);
372}
373
374#ifdef CONFIG_MCA
375/**
376 * mca_nmi_hook - hook into MCA specific NMI chain
377 *
378 * Description:
379 * The MCA (Microchannel Architecture) has an NMI chain for NMI sources
380 * along the MCA bus. Use this to hook into that chain if you will need
381 * it.
382 **/
383void mca_nmi_hook(void)
384{
385 /*
386 * If I recall correctly, there's a whole bunch of other things that
387 * we can do to check for NMI problems, but that's all I know about
388 * at the moment.
389 */
390 pr_warning("NMI generated from unknown source!\n");
391}
392#endif
393
394static __init int no_ipi_broadcast(char *str)
395{
396 get_option(&str, &no_broadcast);
397 pr_info("Using %s mode\n",
398 no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
399 return 1;
400}
401__setup("no_ipi_broadcast=", no_ipi_broadcast);
402
403static int __init print_ipi_mode(void)
404{
405 pr_info("Using IPI %s mode\n",
406 no_broadcast ? "No-Shortcut" : "Shortcut");
407 return 0;
408}
409
410late_initcall(print_ipi_mode);
411
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
deleted file mode 100644
index b65ff0bf730e..000000000000
--- a/arch/x86/mach-default/setup.c
+++ /dev/null
@@ -1,162 +0,0 @@
1/*
2 * Machine specific setup for generic
3 */
4
5#include <linux/smp.h>
6#include <linux/init.h>
7#include <linux/interrupt.h>
8#include <asm/acpi.h>
9#include <asm/arch_hooks.h>
10#include <asm/e820.h>
11#include <asm/setup.h>
12
13#include <asm/genapic.h>
14
15#ifdef CONFIG_HOTPLUG_CPU
16#define DEFAULT_SEND_IPI (1)
17#else
18#define DEFAULT_SEND_IPI (0)
19#endif
20
21int no_broadcast = DEFAULT_SEND_IPI;
22
23/**
24 * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
25 *
26 * Description:
27 * Perform any necessary interrupt initialisation prior to setting up
28 * the "ordinary" interrupt call gates. For legacy reasons, the ISA
29 * interrupts should be initialised here if the machine emulates a PC
30 * in any way.
31 **/
32void __init pre_intr_init_hook(void)
33{
34 if (x86_quirks->arch_pre_intr_init) {
35 if (x86_quirks->arch_pre_intr_init())
36 return;
37 }
38 init_ISA_irqs();
39}
40
41/**
42 * intr_init_hook - post gate setup interrupt initialisation
43 *
44 * Description:
45 * Fill in any interrupts that may have been left out by the general
46 * init_IRQ() routine. interrupts having to do with the machine rather
47 * than the devices on the I/O bus (like APIC interrupts in intel MP
48 * systems) are started here.
49 **/
50void __init intr_init_hook(void)
51{
52 if (x86_quirks->arch_intr_init) {
53 if (x86_quirks->arch_intr_init())
54 return;
55 }
56}
57
58/**
59 * pre_setup_arch_hook - hook called prior to any setup_arch() execution
60 *
61 * Description:
62 * generally used to activate any machine specific identification
63 * routines that may be needed before setup_arch() runs. On Voyager
64 * this is used to get the board revision and type.
65 **/
66void __init pre_setup_arch_hook(void)
67{
68}
69
70/**
71 * trap_init_hook - initialise system specific traps
72 *
73 * Description:
74 * Called as the final act of trap_init(). Used in VISWS to initialise
75 * the various board specific APIC traps.
76 **/
77void __init trap_init_hook(void)
78{
79 if (x86_quirks->arch_trap_init) {
80 if (x86_quirks->arch_trap_init())
81 return;
82 }
83}
84
85static struct irqaction irq0 = {
86 .handler = timer_interrupt,
87 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
88 .mask = CPU_MASK_NONE,
89 .name = "timer"
90};
91
92/**
93 * pre_time_init_hook - do any specific initialisations before.
94 *
95 **/
96void __init pre_time_init_hook(void)
97{
98 if (x86_quirks->arch_pre_time_init)
99 x86_quirks->arch_pre_time_init();
100}
101
102/**
103 * time_init_hook - do any specific initialisations for the system timer.
104 *
105 * Description:
106 * Must plug the system timer interrupt source at HZ into the IRQ listed
107 * in irq_vectors.h:TIMER_IRQ
108 **/
109void __init time_init_hook(void)
110{
111 if (x86_quirks->arch_time_init) {
112 /*
113 * A nonzero return code does not mean failure, it means
114 * that the architecture quirk does not want any
115 * generic (timer) setup to be performed after this:
116 */
117 if (x86_quirks->arch_time_init())
118 return;
119 }
120
121 irq0.mask = cpumask_of_cpu(0);
122 setup_irq(0, &irq0);
123}
124
125#ifdef CONFIG_MCA
126/**
127 * mca_nmi_hook - hook into MCA specific NMI chain
128 *
129 * Description:
130 * The MCA (Microchannel Architecture) has an NMI chain for NMI sources
131 * along the MCA bus. Use this to hook into that chain if you will need
132 * it.
133 **/
134void mca_nmi_hook(void)
135{
136 /*
137 * If I recall correctly, there's a whole bunch of other things that
138 * we can do to check for NMI problems, but that's all I know about
139 * at the moment.
140 */
141 pr_warning("NMI generated from unknown source!\n");
142}
143#endif
144
145static __init int no_ipi_broadcast(char *str)
146{
147 get_option(&str, &no_broadcast);
148 pr_info("Using %s mode\n",
149 no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
150 return 1;
151}
152__setup("no_ipi_broadcast=", no_ipi_broadcast);
153
154static int __init print_ipi_mode(void)
155{
156 pr_info("Using IPI %s mode\n",
157 no_broadcast ? "No-Shortcut" : "Shortcut");
158 return 0;
159}
160
161late_initcall(print_ipi_mode);
162
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
deleted file mode 100644
index d9d44c8c3db8..000000000000
--- a/arch/x86/mach-generic/default.c
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * Default generic APIC driver. This handles up to 8 CPUs.
3 */
4#define APIC_DEFINITION 1
5#include <linux/threads.h>
6#include <linux/cpumask.h>
7#include <asm/mpspec.h>
8#include <asm/genapic.h>
9#include <asm/fixmap.h>
10#include <asm/apicdef.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/smp.h>
14#include <linux/init.h>
15#include <asm/genapic.h>
16#include <asm/ipi.h>
17
18static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
19{
20 /*
21 * Careful. Some cpus do not strictly honor the set of cpus
22 * specified in the interrupt destination when using lowest
23 * priority interrupt delivery mode.
24 *
25 * In particular there was a hyperthreading cpu observed to
26 * deliver interrupts to the wrong hyperthread when only one
27 * hyperthread was specified in the interrupt desitination.
28 */
29 *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
30}
31
32/* should be called last. */
33static int probe_default(void)
34{
35 return 1;
36}
37
38struct genapic apic_default = {
39
40 .name = "default",
41 .probe = probe_default,
42 .acpi_madt_oem_check = NULL,
43 .apic_id_registered = default_apic_id_registered,
44
45 .irq_delivery_mode = dest_LowestPrio,
46 /* logical delivery broadcast to all CPUs: */
47 .irq_dest_mode = 1,
48
49 .target_cpus = default_target_cpus,
50 .disable_esr = 0,
51 .dest_logical = APIC_DEST_LOGICAL,
52 .check_apicid_used = default_check_apicid_used,
53 .check_apicid_present = default_check_apicid_present,
54
55 .vector_allocation_domain = default_vector_allocation_domain,
56 .init_apic_ldr = default_init_apic_ldr,
57
58 .ioapic_phys_id_map = default_ioapic_phys_id_map,
59 .setup_apic_routing = default_setup_apic_routing,
60 .multi_timer_check = NULL,
61 .apicid_to_node = default_apicid_to_node,
62 .cpu_to_logical_apicid = default_cpu_to_logical_apicid,
63 .cpu_present_to_apicid = default_cpu_present_to_apicid,
64 .apicid_to_cpu_present = default_apicid_to_cpu_present,
65 .setup_portio_remap = NULL,
66 .check_phys_apicid_present = default_check_phys_apicid_present,
67 .enable_apic_mode = NULL,
68 .phys_pkg_id = default_phys_pkg_id,
69 .mps_oem_check = NULL,
70
71 .get_apic_id = default_get_apic_id,
72 .set_apic_id = NULL,
73 .apic_id_mask = 0x0F << 24,
74
75 .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
76 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
77
78 .send_IPI_mask = default_send_IPI_mask,
79 .send_IPI_mask_allbutself = NULL,
80 .send_IPI_allbutself = default_send_IPI_allbutself,
81 .send_IPI_all = default_send_IPI_all,
82 .send_IPI_self = NULL,
83
84 .wakeup_cpu = NULL,
85 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
86 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
87
88 .wait_for_init_deassert = default_wait_for_init_deassert,
89
90 .smp_callin_clear_local_apic = NULL,
91 .store_NMI_vector = NULL,
92 .inquire_remote_apic = default_inquire_remote_apic,
93};