diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-03-08 16:24:12 -0500 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-05-02 06:08:32 -0400 |
commit | 6bbaec5676e4f475b0d78743cbd4c70a8804ce14 (patch) | |
tree | 63f0acdcd7bce4854a76463ea48fdf382665ca60 /arch | |
parent | 32af7a830fe1625fa93900606f82c541f3b3de94 (diff) |
ARM i.MX25: implement clocks using common clock framework
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-imx/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-imx/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/clk-imx25.c | 248 |
3 files changed, 250 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 7561eca131b0..0b832b17d4fc 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -48,6 +48,7 @@ config SOC_IMX21 | |||
48 | config SOC_IMX25 | 48 | config SOC_IMX25 |
49 | bool | 49 | bool |
50 | select ARCH_MX25 | 50 | select ARCH_MX25 |
51 | select COMMON_CLK | ||
51 | select CPU_ARM926T | 52 | select CPU_ARM926T |
52 | select ARCH_MXC_IOMUX_V3 | 53 | select ARCH_MXC_IOMUX_V3 |
53 | select MXC_AVIC | 54 | select MXC_AVIC |
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index ae0a77960c22..173e869f0590 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile | |||
@@ -1,7 +1,7 @@ | |||
1 | obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o | 1 | obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o |
2 | obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o | 2 | obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o |
3 | 3 | ||
4 | obj-$(CONFIG_SOC_IMX25) += clock-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o | 4 | obj-$(CONFIG_SOC_IMX25) += clk-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o |
5 | 5 | ||
6 | obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o | 6 | obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o |
7 | obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o | 7 | obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o |
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c new file mode 100644 index 000000000000..d9833bb5fd61 --- /dev/null +++ b/arch/arm/mach-imx/clk-imx25.c | |||
@@ -0,0 +1,248 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 by Sascha Hauer, Pengutronix | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version 2 | ||
7 | * of the License, or (at your option) any later version. | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
16 | * MA 02110-1301, USA. | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/list.h> | ||
22 | #include <linux/clk.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <linux/clkdev.h> | ||
25 | #include <linux/err.h> | ||
26 | |||
27 | #include <mach/hardware.h> | ||
28 | #include <mach/common.h> | ||
29 | #include <mach/mx25.h> | ||
30 | #include "clk.h" | ||
31 | |||
32 | #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) | ||
33 | |||
34 | #define CCM_MPCTL 0x00 | ||
35 | #define CCM_UPCTL 0x04 | ||
36 | #define CCM_CCTL 0x08 | ||
37 | #define CCM_CGCR0 0x0C | ||
38 | #define CCM_CGCR1 0x10 | ||
39 | #define CCM_CGCR2 0x14 | ||
40 | #define CCM_PCDR0 0x18 | ||
41 | #define CCM_PCDR1 0x1C | ||
42 | #define CCM_PCDR2 0x20 | ||
43 | #define CCM_PCDR3 0x24 | ||
44 | #define CCM_RCSR 0x28 | ||
45 | #define CCM_CRDR 0x2C | ||
46 | #define CCM_DCVR0 0x30 | ||
47 | #define CCM_DCVR1 0x34 | ||
48 | #define CCM_DCVR2 0x38 | ||
49 | #define CCM_DCVR3 0x3c | ||
50 | #define CCM_LTR0 0x40 | ||
51 | #define CCM_LTR1 0x44 | ||
52 | #define CCM_LTR2 0x48 | ||
53 | #define CCM_LTR3 0x4c | ||
54 | #define CCM_MCR 0x64 | ||
55 | |||
56 | #define ccm(x) (CRM_BASE + (x)) | ||
57 | |||
58 | static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", }; | ||
59 | static const char *per_sel_clks[] = { "ahb", "upll", }; | ||
60 | |||
61 | enum mx25_clks { | ||
62 | dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg, | ||
63 | per0_sel, per1_sel, per2_sel, per3_sel, per4_sel, per5_sel, per6_sel, | ||
64 | per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel, | ||
65 | per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5, | ||
66 | per6, per7, per8, per9, per10, per11, per12, per13, per14, per15, | ||
67 | csi_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, gpt_ipg_per, i2c_ipg_per, | ||
68 | lcdc_ipg_per, nfc_ipg_per, ssi1_ipg_per, ssi2_ipg_per, uart_ipg_per, | ||
69 | csi_ahb, esdhc1_ahb, esdhc2_ahb, fec_ahb, lcdc_ahb, sdma_ahb, | ||
70 | usbotg_ahb, can1_ipg, can2_ipg, csi_ipg, cspi1_ipg, cspi2_ipg, | ||
71 | cspi3_ipg, dryice_ipg, esdhc1_ipg, esdhc2_ipg, fec_ipg, iim_ipg, | ||
72 | kpp_ipg, lcdc_ipg, pwm1_ipg, pwm2_ipg, pwm3_ipg, pwm4_ipg, sdma_ipg, | ||
73 | ssi1_ipg, ssi2_ipg, tsc_ipg, uart1_ipg, uart2_ipg, uart3_ipg, | ||
74 | uart4_ipg, uart5_ipg, wdt_ipg, clk_max | ||
75 | }; | ||
76 | |||
77 | static struct clk *clk[clk_max]; | ||
78 | |||
79 | int __init mx25_clocks_init(void) | ||
80 | { | ||
81 | int i; | ||
82 | |||
83 | clk[dummy] = imx_clk_fixed("dummy", 0); | ||
84 | clk[osc] = imx_clk_fixed("osc", 24000000); | ||
85 | clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL)); | ||
86 | clk[upll] = imx_clk_pllv1("upll", "osc", ccm(CCM_UPCTL)); | ||
87 | clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4); | ||
88 | clk[cpu_sel] = imx_clk_mux("cpu_sel", ccm(CCM_CCTL), 14, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)); | ||
89 | clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2); | ||
90 | clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); | ||
91 | clk[usb_div] = imx_clk_divider("usb_div", "upll", ccm(CCM_CCTL), 16, 6); | ||
92 | clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2); | ||
93 | clk[per0_sel] = imx_clk_mux("per0_sel", ccm(CCM_MCR), 0, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
94 | clk[per1_sel] = imx_clk_mux("per1_sel", ccm(CCM_MCR), 1, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
95 | clk[per2_sel] = imx_clk_mux("per2_sel", ccm(CCM_MCR), 2, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
96 | clk[per3_sel] = imx_clk_mux("per3_sel", ccm(CCM_MCR), 3, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
97 | clk[per4_sel] = imx_clk_mux("per4_sel", ccm(CCM_MCR), 4, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
98 | clk[per5_sel] = imx_clk_mux("per5_sel", ccm(CCM_MCR), 5, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
99 | clk[per6_sel] = imx_clk_mux("per6_sel", ccm(CCM_MCR), 6, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
100 | clk[per7_sel] = imx_clk_mux("per7_sel", ccm(CCM_MCR), 7, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
101 | clk[per8_sel] = imx_clk_mux("per8_sel", ccm(CCM_MCR), 8, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
102 | clk[per9_sel] = imx_clk_mux("per9_sel", ccm(CCM_MCR), 9, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
103 | clk[per10_sel] = imx_clk_mux("per10_sel", ccm(CCM_MCR), 10, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
104 | clk[per11_sel] = imx_clk_mux("per11_sel", ccm(CCM_MCR), 11, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
105 | clk[per12_sel] = imx_clk_mux("per12_sel", ccm(CCM_MCR), 12, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
106 | clk[per13_sel] = imx_clk_mux("per13_sel", ccm(CCM_MCR), 13, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
107 | clk[per14_sel] = imx_clk_mux("per14_sel", ccm(CCM_MCR), 14, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
108 | clk[per15_sel] = imx_clk_mux("per15_sel", ccm(CCM_MCR), 15, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); | ||
109 | clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6); | ||
110 | clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6); | ||
111 | clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6); | ||
112 | clk[per3] = imx_clk_divider("per3", "per3_sel", ccm(CCM_PCDR0), 24, 6); | ||
113 | clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6); | ||
114 | clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6); | ||
115 | clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6); | ||
116 | clk[per7] = imx_clk_divider("per7", "per7_sel", ccm(CCM_PCDR1), 24, 6); | ||
117 | clk[per8] = imx_clk_divider("per8", "per8_sel", ccm(CCM_PCDR2), 0, 6); | ||
118 | clk[per9] = imx_clk_divider("per9", "per9_sel", ccm(CCM_PCDR2), 8, 6); | ||
119 | clk[per10] = imx_clk_divider("per10", "per10_sel", ccm(CCM_PCDR2), 16, 6); | ||
120 | clk[per11] = imx_clk_divider("per11", "per11_sel", ccm(CCM_PCDR2), 24, 6); | ||
121 | clk[per12] = imx_clk_divider("per12", "per12_sel", ccm(CCM_PCDR3), 0, 6); | ||
122 | clk[per13] = imx_clk_divider("per13", "per13_sel", ccm(CCM_PCDR3), 8, 6); | ||
123 | clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6); | ||
124 | clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6); | ||
125 | clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0); | ||
126 | clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0), 3); | ||
127 | clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); | ||
128 | clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); | ||
129 | clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); | ||
130 | clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per8", ccm(CCM_CGCR0), 7); | ||
131 | clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "ipg_per", ccm(CCM_CGCR0), 8); | ||
132 | clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); | ||
133 | clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); | ||
134 | clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); | ||
135 | clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18); | ||
136 | clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21); | ||
137 | clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22); | ||
138 | clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23); | ||
139 | clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24); | ||
140 | clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26); | ||
141 | clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28); | ||
142 | clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2); | ||
143 | clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3); | ||
144 | clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4); | ||
145 | clk[cspi1_ipg] = imx_clk_gate("cspi1_ipg", "ipg", ccm(CCM_CGCR1), 5); | ||
146 | clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6); | ||
147 | clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7); | ||
148 | clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8); | ||
149 | clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13); | ||
150 | clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14); | ||
151 | clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15); | ||
152 | clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26); | ||
153 | clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28); | ||
154 | clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29); | ||
155 | clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31); | ||
156 | clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2), 0); | ||
157 | clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2), 1); | ||
158 | clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2), 2); | ||
159 | clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2), 6); | ||
160 | clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11); | ||
161 | clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12); | ||
162 | clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13); | ||
163 | clk[uart1_ipg] = imx_clk_gate("uart1_ipg", "ipg", ccm(CCM_CGCR2), 14); | ||
164 | clk[uart2_ipg] = imx_clk_gate("uart2_ipg", "ipg", ccm(CCM_CGCR2), 15); | ||
165 | clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16); | ||
166 | clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17); | ||
167 | clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18); | ||
168 | clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19); | ||
169 | |||
170 | for (i = 0; i < ARRAY_SIZE(clk); i++) | ||
171 | if (IS_ERR(clk[i])) | ||
172 | pr_err("i.MX25 clk %d: register failed with %ld\n", | ||
173 | i, PTR_ERR(clk[i])); | ||
174 | |||
175 | /* i.mx25 has the i.mx21 type uart */ | ||
176 | clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0"); | ||
177 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0"); | ||
178 | clk_register_clkdev(clk[uart2_ipg], "ipg", "imx21-uart.1"); | ||
179 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.1"); | ||
180 | clk_register_clkdev(clk[uart3_ipg], "ipg", "imx21-uart.2"); | ||
181 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.2"); | ||
182 | clk_register_clkdev(clk[uart4_ipg], "ipg", "imx21-uart.3"); | ||
183 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3"); | ||
184 | clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4"); | ||
185 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4"); | ||
186 | clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); | ||
187 | clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); | ||
188 | clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0"); | ||
189 | clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0"); | ||
190 | clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0"); | ||
191 | clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1"); | ||
192 | clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.1"); | ||
193 | clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.1"); | ||
194 | clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2"); | ||
195 | clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.2"); | ||
196 | clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2"); | ||
197 | clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); | ||
198 | clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc"); | ||
199 | clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); | ||
200 | clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0"); | ||
201 | /* i.mx25 has the i.mx35 type cspi */ | ||
202 | clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0"); | ||
203 | clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1"); | ||
204 | clk_register_clkdev(clk[cspi3_ipg], NULL, "imx35-cspi.2"); | ||
205 | clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.0"); | ||
206 | clk_register_clkdev(clk[per10], "per", "mxc_pwm.0"); | ||
207 | clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.1"); | ||
208 | clk_register_clkdev(clk[per10], "per", "mxc_pwm.1"); | ||
209 | clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.2"); | ||
210 | clk_register_clkdev(clk[per10], "per", "mxc_pwm.2"); | ||
211 | clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.3"); | ||
212 | clk_register_clkdev(clk[per10], "per", "mxc_pwm.3"); | ||
213 | clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad"); | ||
214 | clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc"); | ||
215 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0"); | ||
216 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1"); | ||
217 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2"); | ||
218 | clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0"); | ||
219 | clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0"); | ||
220 | clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0"); | ||
221 | clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0"); | ||
222 | clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); | ||
223 | clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); | ||
224 | clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); | ||
225 | clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0"); | ||
226 | clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0"); | ||
227 | clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1"); | ||
228 | clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1"); | ||
229 | clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); | ||
230 | clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); | ||
231 | clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); | ||
232 | clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1"); | ||
233 | clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1"); | ||
234 | clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1"); | ||
235 | clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0"); | ||
236 | clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0"); | ||
237 | clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0"); | ||
238 | clk_register_clkdev(clk[dummy], "audmux", NULL); | ||
239 | clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0"); | ||
240 | clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1"); | ||
241 | /* i.mx25 has the i.mx35 type sdma */ | ||
242 | clk_register_clkdev(clk[sdma_ipg], "ipg", "imx35-sdma"); | ||
243 | clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); | ||
244 | clk_register_clkdev(clk[iim_ipg], "iim", NULL); | ||
245 | |||
246 | mxc_timer_init(NULL, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); | ||
247 | return 0; | ||
248 | } | ||