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authorAnton Blanchard <anton@samba.org>2012-06-25 21:00:13 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-07-10 05:18:38 -0400
commit68b30bb9f0fed8281fe8a1ac818d6d07c803fa7b (patch)
tree5fb705625ea7fe10eb642e773cf2e0ecf2ab27e3 /arch
parent962cffbd8a21ad380ec71a6f5ea55a8e08f32dd1 (diff)
powerpc/perf: Create mmcra_sihv/mmcra_sipv helpers
We want to access the MMCRA_SIHV and MMCRA_SIPR bits elsewhere so create mmcra_sihv and mmcra_sipr which hide the differences between the old and new layout of the bits. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/perf/core-book3s.c31
1 files changed, 22 insertions, 9 deletions
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 8f84bcba18da..1818f636b9ae 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -116,6 +116,26 @@ static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp)
116 *addrp = mfspr(SPRN_SDAR); 116 *addrp = mfspr(SPRN_SDAR);
117} 117}
118 118
119static bool mmcra_sihv(unsigned long mmcra)
120{
121 unsigned long sihv = MMCRA_SIHV;
122
123 if (ppmu->flags & PPMU_ALT_SIPR)
124 sihv = POWER6_MMCRA_SIHV;
125
126 return !!(mmcra & sihv);
127}
128
129static bool mmcra_sipr(unsigned long mmcra)
130{
131 unsigned long sipr = MMCRA_SIPR;
132
133 if (ppmu->flags & PPMU_ALT_SIPR)
134 sipr = POWER6_MMCRA_SIPR;
135
136 return !!(mmcra & sipr);
137}
138
119static inline u32 perf_flags_from_msr(struct pt_regs *regs) 139static inline u32 perf_flags_from_msr(struct pt_regs *regs)
120{ 140{
121 if (regs->msr & MSR_PR) 141 if (regs->msr & MSR_PR)
@@ -128,8 +148,6 @@ static inline u32 perf_flags_from_msr(struct pt_regs *regs)
128static inline u32 perf_get_misc_flags(struct pt_regs *regs) 148static inline u32 perf_get_misc_flags(struct pt_regs *regs)
129{ 149{
130 unsigned long mmcra = regs->dsisr; 150 unsigned long mmcra = regs->dsisr;
131 unsigned long sihv = MMCRA_SIHV;
132 unsigned long sipr = MMCRA_SIPR;
133 151
134 /* Not a PMU interrupt: Make up flags from regs->msr */ 152 /* Not a PMU interrupt: Make up flags from regs->msr */
135 if (TRAP(regs) != 0xf00) 153 if (TRAP(regs) != 0xf00)
@@ -156,15 +174,10 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
156 return PERF_RECORD_MISC_USER; 174 return PERF_RECORD_MISC_USER;
157 } 175 }
158 176
159 if (ppmu->flags & PPMU_ALT_SIPR) {
160 sihv = POWER6_MMCRA_SIHV;
161 sipr = POWER6_MMCRA_SIPR;
162 }
163
164 /* PR has priority over HV, so order below is important */ 177 /* PR has priority over HV, so order below is important */
165 if (mmcra & sipr) 178 if (mmcra_sipr(mmcra))
166 return PERF_RECORD_MISC_USER; 179 return PERF_RECORD_MISC_USER;
167 if ((mmcra & sihv) && (freeze_events_kernel != MMCR0_FCHV)) 180 if (mmcra_sihv(mmcra) && (freeze_events_kernel != MMCR0_FCHV))
168 return PERF_RECORD_MISC_HYPERVISOR; 181 return PERF_RECORD_MISC_HYPERVISOR;
169 return PERF_RECORD_MISC_KERNEL; 182 return PERF_RECORD_MISC_KERNEL;
170} 183}