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authorOlof Johansson <olof@lixom.net>2014-07-05 00:45:38 -0400
committerOlof Johansson <olof@lixom.net>2014-07-05 00:45:38 -0400
commit5acd78c59ab16a40e8e2002d133df0349e0863c1 (patch)
treeeffc9412dce836396d475f9a76dc9b75a90a75a1 /arch
parentbfda90cbb8933aa280b22e8ae087e2a850a01288 (diff)
parentedc56f871eefbc56baf1fd981eeff35ef447925c (diff)
Merge tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge OMAP fixes from Tony Lindgren: Fixes for omaps for issues discovered during the merge window and enabling of a few features that had to wait for the driver dependencies to clear. The fixes included are: - Fix am43xx hard reset flags - Fix SoC detection for DRA722 - Fix CPU OPP table for omap5 - Fix legacy mux parser bug if requested muxname is a prefix of multiple mux entries - Fix qspi interrupt binding that relies on the irq crossbar that has not yet been enabled - Add missing phy_sel for am43x-epos-evm - Drop unused gic_init_irq() that is no longer needed And the enabling of features that had driver dependencies are: - Change dra7 to use Audio Tracking Logic clock instead of a fixed clock now that the clock driver for it has been merged - Enable off idle configuration for selected omaps as all the kernel dependencies for device tree based booting are finally merged as this is needed to get the automated PM tests working finally with device tree based booting - Add hwmod entry for ocp2scp3 for omap5 to get sata working as all the driver dependencies are now in the kernel and this patch fell through the cracks during the merge window * tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: dra7-evm: remove interrupt binding ARM: OMAP2+: Fix parser-bug in platform muxing code ARM: DTS: dra7/dra7xx-clocks: ATL related changes ARM: OMAP2+: drop unused function ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm ARM: dts: omap5: Update CPU OPP table as per final production Manual ARM: DRA722: add detection of SoC information ARM: dts: Enable twl4030 off-idle configuration for selected omaps ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts4
-rw-r--r--arch/arm/boot/dts/dra7.dtsi12
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi16
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts6
-rw-r--r--arch/arm/boot/dts/omap3-evm-common.dtsi7
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts5
-rw-r--r--arch/arm/boot/dts/omap5.dtsi1
-rw-r--r--arch/arm/mach-omap2/Makefile6
-rw-r--r--arch/arm/mach-omap2/cm33xx.h2
-rw-r--r--arch/arm/mach-omap2/common.h1
-rw-r--r--arch/arm/mach-omap2/id.c12
-rw-r--r--arch/arm/mach-omap2/mux.c6
-rw-r--r--arch/arm/mach-omap2/omap4-common.c20
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_54xx_data.c73
-rw-r--r--arch/arm/mach-omap2/soc.h1
16 files changed, 139 insertions, 39 deletions
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 19f1f7e87597..90098f98a5c8 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -319,6 +319,10 @@
319 phy-mode = "rmii"; 319 phy-mode = "rmii";
320}; 320};
321 321
322&phy_sel {
323 rmii-clock-ext;
324};
325
322&i2c0 { 326&i2c0 {
323 status = "okay"; 327 status = "okay";
324 pinctrl-names = "default"; 328 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c29945e07c5a..80127638b379 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -773,7 +773,6 @@
773 clocks = <&qspi_gfclk_div>; 773 clocks = <&qspi_gfclk_div>;
774 clock-names = "fck"; 774 clock-names = "fck";
775 num-cs = <4>; 775 num-cs = <4>;
776 interrupts = <0 343 0x4>;
777 status = "disabled"; 776 status = "disabled";
778 }; 777 };
779 778
@@ -984,6 +983,17 @@
984 #size-cells = <1>; 983 #size-cells = <1>;
985 status = "disabled"; 984 status = "disabled";
986 }; 985 };
986
987 atl: atl@4843c000 {
988 compatible = "ti,dra7-atl";
989 reg = <0x4843c000 0x3ff>;
990 ti,hwmods = "atl";
991 ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
992 <&atl_clkin2_ck>, <&atl_clkin3_ck>;
993 clocks = <&atl_gfclk_mux>;
994 clock-names = "fck";
995 status = "disabled";
996 };
987 }; 997 };
988}; 998};
989 999
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index b03cfe49d22b..c90c76de84d6 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -10,26 +10,26 @@
10&cm_core_aon_clocks { 10&cm_core_aon_clocks {
11 atl_clkin0_ck: atl_clkin0_ck { 11 atl_clkin0_ck: atl_clkin0_ck {
12 #clock-cells = <0>; 12 #clock-cells = <0>;
13 compatible = "fixed-clock"; 13 compatible = "ti,dra7-atl-clock";
14 clock-frequency = <0>; 14 clocks = <&atl_gfclk_mux>;
15 }; 15 };
16 16
17 atl_clkin1_ck: atl_clkin1_ck { 17 atl_clkin1_ck: atl_clkin1_ck {
18 #clock-cells = <0>; 18 #clock-cells = <0>;
19 compatible = "fixed-clock"; 19 compatible = "ti,dra7-atl-clock";
20 clock-frequency = <0>; 20 clocks = <&atl_gfclk_mux>;
21 }; 21 };
22 22
23 atl_clkin2_ck: atl_clkin2_ck { 23 atl_clkin2_ck: atl_clkin2_ck {
24 #clock-cells = <0>; 24 #clock-cells = <0>;
25 compatible = "fixed-clock"; 25 compatible = "ti,dra7-atl-clock";
26 clock-frequency = <0>; 26 clocks = <&atl_gfclk_mux>;
27 }; 27 };
28 28
29 atl_clkin3_ck: atl_clkin3_ck { 29 atl_clkin3_ck: atl_clkin3_ck {
30 #clock-cells = <0>; 30 #clock-cells = <0>;
31 compatible = "fixed-clock"; 31 compatible = "ti,dra7-atl-clock";
32 clock-frequency = <0>; 32 clocks = <&atl_gfclk_mux>;
33 }; 33 };
34 34
35 hdmi_clkin_ck: hdmi_clkin_ck { 35 hdmi_clkin_ck: hdmi_clkin_ck {
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index cf0be662297e..1becefce821b 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -251,6 +251,11 @@
251 codec { 251 codec {
252 }; 252 };
253 }; 253 };
254
255 twl_power: power {
256 compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
257 ti,use_poweroff;
258 };
254 }; 259 };
255}; 260};
256 261
@@ -301,6 +306,7 @@
301}; 306};
302 307
303&uart3 { 308&uart3 {
309 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
304 pinctrl-names = "default"; 310 pinctrl-names = "default";
305 pinctrl-0 = <&uart3_pins>; 311 pinctrl-0 = <&uart3_pins>;
306}; 312};
diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi
index 8ae8f007c8ad..c8747c7f1cc8 100644
--- a/arch/arm/boot/dts/omap3-evm-common.dtsi
+++ b/arch/arm/boot/dts/omap3-evm-common.dtsi
@@ -50,6 +50,13 @@
50 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; 50 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
51}; 51};
52 52
53&twl {
54 twl_power: power {
55 compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
56 ti,use_poweroff;
57 };
58};
59
53&i2c2 { 60&i2c2 {
54 clock-frequency = <400000>; 61 clock-frequency = <400000>;
55}; 62};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index ae8ae3f4f9bf..1fe45d1f75ec 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -351,6 +351,11 @@
351 compatible = "ti,twl4030-audio"; 351 compatible = "ti,twl4030-audio";
352 ti,enable-vibra = <1>; 352 ti,enable-vibra = <1>;
353 }; 353 };
354
355 twl_power: power {
356 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
357 ti,use_poweroff;
358 };
354}; 359};
355 360
356&twl_keypad { 361&twl_keypad {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3bfda16c8b52..a4ed54988866 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -45,7 +45,6 @@
45 45
46 operating-points = < 46 operating-points = <
47 /* kHz uV */ 47 /* kHz uV */
48 500000 880000
49 1000000 1060000 48 1000000 1060000
50 1500000 1250000 49 1500000 1250000
51 >; 50 >;
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 8421f38cf445..8ca99e9321e3 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -110,14 +110,16 @@ obj-y += prm_common.o cm_common.o
110obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o 110obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
111obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o 111obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
112obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o 112obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
113obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o
114omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \ 113omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
115 prcm_mpu44xx.o prminst44xx.o \ 114 prcm_mpu44xx.o prminst44xx.o \
116 vc44xx_data.o vp44xx_data.o 115 vc44xx_data.o vp44xx_data.o
117obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) 116obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
118obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common) 117obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
119obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common) 118obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common)
120obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) 119am33xx-43xx-prcm-common += prm33xx.o cm33xx.o
120obj-$(CONFIG_SOC_AM33XX) += $(am33xx-43xx-prcm-common)
121obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) \
122 $(am33xx-43xx-prcm-common)
121 123
122# OMAP voltage domains 124# OMAP voltage domains
123voltagedomain-common := voltage.o vc.o vp.o 125voltagedomain-common := voltage.o vc.o vp.o
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 15a778ce7707..bd2441790779 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -380,7 +380,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
380void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs); 380void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
381void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs); 381void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
382 382
383#ifdef CONFIG_SOC_AM33XX 383#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
384extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, 384extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
385 u16 clkctrl_offs); 385 u16 clkctrl_offs);
386extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, 386extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index a373d508799a..b2d252bf4a53 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -248,7 +248,6 @@ static inline void __iomem *omap4_get_scu_base(void)
248} 248}
249#endif 249#endif
250 250
251extern void __init gic_init_irq(void);
252extern void gic_dist_disable(void); 251extern void gic_dist_disable(void);
253extern void gic_dist_enable(void); 252extern void gic_dist_enable(void);
254extern bool gic_dist_disabled(void); 253extern bool gic_dist_disabled(void);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 43969da5d50b..d42022f2a71e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -649,6 +649,18 @@ void __init dra7xxx_check_revision(void)
649 } 649 }
650 break; 650 break;
651 651
652 case 0xb9bc:
653 switch (rev) {
654 case 0:
655 omap_revision = DRA722_REV_ES1_0;
656 break;
657 default:
658 /* If we have no new revisions */
659 omap_revision = DRA722_REV_ES1_0;
660 break;
661 }
662 break;
663
652 default: 664 default:
653 /* Unknown default to latest silicon rev as default*/ 665 /* Unknown default to latest silicon rev as default*/
654 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n", 666 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fd88edeb027f..f62f7537d899 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -183,8 +183,10 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
183 m0_entry = mux->muxnames[0]; 183 m0_entry = mux->muxnames[0];
184 184
185 /* First check for full name in mode0.muxmode format */ 185 /* First check for full name in mode0.muxmode format */
186 if (mode0_len && strncmp(muxname, m0_entry, mode0_len)) 186 if (mode0_len)
187 continue; 187 if (strncmp(muxname, m0_entry, mode0_len) ||
188 (strlen(m0_entry) != mode0_len))
189 continue;
188 190
189 /* Then check for muxmode only */ 191 /* Then check for muxmode only */
190 for (i = 0; i < OMAP_MUX_NR_MODES; i++) { 192 for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 326cd982a3cb..539e8106eb96 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -102,26 +102,6 @@ void __init omap_barriers_init(void)
102{} 102{}
103#endif 103#endif
104 104
105void __init gic_init_irq(void)
106{
107 void __iomem *omap_irq_base;
108
109 /* Static mapping, never released */
110 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
111 BUG_ON(!gic_dist_base_addr);
112
113 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_4K);
114 BUG_ON(!twd_base);
115
116 /* Static mapping, never released */
117 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
118 BUG_ON(!omap_irq_base);
119
120 omap_wakeupgen_init();
121
122 gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
123}
124
125void gic_dist_disable(void) 105void gic_dist_disable(void)
126{ 106{
127 if (gic_dist_base_addr) 107 if (gic_dist_base_addr)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f7bb435bb543..6c074f37cdd2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -4251,9 +4251,9 @@ void __init omap_hwmod_init(void)
4251 soc_ops.enable_module = _omap4_enable_module; 4251 soc_ops.enable_module = _omap4_enable_module;
4252 soc_ops.disable_module = _omap4_disable_module; 4252 soc_ops.disable_module = _omap4_disable_module;
4253 soc_ops.wait_target_ready = _omap4_wait_target_ready; 4253 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4254 soc_ops.assert_hardreset = _omap4_assert_hardreset; 4254 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4255 soc_ops.deassert_hardreset = _omap4_deassert_hardreset; 4255 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4256 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 4256 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4257 soc_ops.init_clkdm = _init_clkdm; 4257 soc_ops.init_clkdm = _init_clkdm;
4258 } else if (soc_is_am33xx()) { 4258 } else if (soc_is_am33xx()) {
4259 soc_ops.enable_module = _am33xx_enable_module; 4259 soc_ops.enable_module = _am33xx_enable_module;
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 290213f2cbe3..1103aa0e0d29 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -2020,6 +2020,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
2020 }, 2020 },
2021}; 2021};
2022 2022
2023/*
2024 * 'ocp2scp' class
2025 * bridge to transform ocp interface protocol to scp (serial control port)
2026 * protocol
2027 */
2028/* ocp2scp3 */
2029static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
2030/* l4_cfg -> ocp2scp3 */
2031static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
2032 .master = &omap54xx_l4_cfg_hwmod,
2033 .slave = &omap54xx_ocp2scp3_hwmod,
2034 .clk = "l4_root_clk_div",
2035 .user = OCP_USER_MPU | OCP_USER_SDMA,
2036};
2037
2038static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
2039 .name = "ocp2scp3",
2040 .class = &omap54xx_ocp2scp_hwmod_class,
2041 .clkdm_name = "l3init_clkdm",
2042 .prcm = {
2043 .omap4 = {
2044 .clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
2045 .context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
2046 .modulemode = MODULEMODE_HWCTRL,
2047 },
2048 },
2049};
2050
2051/*
2052 * 'sata' class
2053 * sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
2054 */
2055
2056static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
2057 .sysc_offs = 0x0000,
2058 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
2059 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
2060 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
2061 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
2062 .sysc_fields = &omap_hwmod_sysc_type2,
2063};
2064
2065static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
2066 .name = "sata",
2067 .sysc = &omap54xx_sata_sysc,
2068};
2069
2070/* sata */
2071static struct omap_hwmod omap54xx_sata_hwmod = {
2072 .name = "sata",
2073 .class = &omap54xx_sata_hwmod_class,
2074 .clkdm_name = "l3init_clkdm",
2075 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
2076 .main_clk = "func_48m_fclk",
2077 .mpu_rt_idx = 1,
2078 .prcm = {
2079 .omap4 = {
2080 .clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
2081 .context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
2082 .modulemode = MODULEMODE_SWCTRL,
2083 },
2084 },
2085};
2086
2087/* l4_cfg -> sata */
2088static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
2089 .master = &omap54xx_l4_cfg_hwmod,
2090 .slave = &omap54xx_sata_hwmod,
2091 .clk = "l3_iclk_div",
2092 .user = OCP_USER_MPU | OCP_USER_SDMA,
2093};
2023 2094
2024/* 2095/*
2025 * Interfaces 2096 * Interfaces
@@ -2765,6 +2836,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
2765 &omap54xx_l4_cfg__usb_tll_hs, 2836 &omap54xx_l4_cfg__usb_tll_hs,
2766 &omap54xx_l4_cfg__usb_otg_ss, 2837 &omap54xx_l4_cfg__usb_otg_ss,
2767 &omap54xx_l4_wkup__wd_timer2, 2838 &omap54xx_l4_wkup__wd_timer2,
2839 &omap54xx_l4_cfg__ocp2scp3,
2840 &omap54xx_l4_cfg__sata,
2768 NULL, 2841 NULL,
2769}; 2842};
2770 2843
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index de2a34c423a7..01ca8086fb6c 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -462,6 +462,7 @@ IS_OMAP_TYPE(3430, 0x3430)
462#define DRA7XX_CLASS 0x07000000 462#define DRA7XX_CLASS 0x07000000
463#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) 463#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
464#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) 464#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
465#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
465 466
466void omap2xxx_check_revision(void); 467void omap2xxx_check_revision(void);
467void omap3xxx_check_revision(void); 468void omap3xxx_check_revision(void);