diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-12-05 00:45:21 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-12-05 00:45:21 -0500 |
commit | 53c6de50262a8edd6932bb59a32db7b9d92f8d67 (patch) | |
tree | 3200068f880aa9647e9184f15619345727f447a5 /arch | |
parent | 8ecffd7914484b728799dd31968f1339fae91593 (diff) | |
parent | 2885432aaf15c1b7e65c787bfe7c5fec428296f0 (diff) |
Merge branch 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 and EFI fixes from Peter Anvin:
"Half of these are EFI-related:
The by far biggest change is the change to hold off the deletion of a
sysfs entry while a backend scan is in progress. This is to avoid
calling kmemdup() while under a spinlock.
The other major change is for each entry in the EFI pstore backend to
get a unique identifier, as required by the pstore filesystem proper.
The other changes are:
A fix to the recent consolidation and optimization of using "asm goto"
with read-modify-write operation, which broke the bitops; specifically
in such a way that we could end up generating invalid code.
A build hack to make sure we compile with -mno-sse. icc, and most
likely future versions of gcc, can generate SSE instructions unless we
tell it not to.
A comment-only patch to a change the was due in part to an unpublished
erratum; now when the erratum is published we want to add a comment
explaining why"
* 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/apic, doc: Justification for disabling IO APIC before Local APIC
x86, bitops: Correct the assembly constraints to testing bitops
x86-64, build: Always pass in -mno-sse
efi-pstore: Make efi-pstore return a unique id
x86/efi: Fix earlyprintk off-by-one bug
efivars, efi-pstore: Hold off deletion of sysfs entry until the scan is completed
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/Makefile | 8 | ||||
-rw-r--r-- | arch/x86/include/asm/atomic.h | 4 | ||||
-rw-r--r-- | arch/x86/include/asm/atomic64_64.h | 4 | ||||
-rw-r--r-- | arch/x86/include/asm/bitops.h | 6 | ||||
-rw-r--r-- | arch/x86/include/asm/local.h | 4 | ||||
-rw-r--r-- | arch/x86/include/asm/rmwcc.h | 8 | ||||
-rw-r--r-- | arch/x86/kernel/reboot.c | 11 | ||||
-rw-r--r-- | arch/x86/platform/efi/early_printk.c | 2 |
8 files changed, 32 insertions, 15 deletions
diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 41250fb33985..eda00f9be0cf 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile | |||
@@ -31,6 +31,9 @@ ifeq ($(CONFIG_X86_32),y) | |||
31 | 31 | ||
32 | KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return | 32 | KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return |
33 | 33 | ||
34 | # Don't autogenerate SSE instructions | ||
35 | KBUILD_CFLAGS += -mno-sse | ||
36 | |||
34 | # Never want PIC in a 32-bit kernel, prevent breakage with GCC built | 37 | # Never want PIC in a 32-bit kernel, prevent breakage with GCC built |
35 | # with nonstandard options | 38 | # with nonstandard options |
36 | KBUILD_CFLAGS += -fno-pic | 39 | KBUILD_CFLAGS += -fno-pic |
@@ -57,8 +60,11 @@ else | |||
57 | KBUILD_AFLAGS += -m64 | 60 | KBUILD_AFLAGS += -m64 |
58 | KBUILD_CFLAGS += -m64 | 61 | KBUILD_CFLAGS += -m64 |
59 | 62 | ||
63 | # Don't autogenerate SSE instructions | ||
64 | KBUILD_CFLAGS += -mno-sse | ||
65 | |||
60 | # Use -mpreferred-stack-boundary=3 if supported. | 66 | # Use -mpreferred-stack-boundary=3 if supported. |
61 | KBUILD_CFLAGS += $(call cc-option,-mno-sse -mpreferred-stack-boundary=3) | 67 | KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3) |
62 | 68 | ||
63 | # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu) | 69 | # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu) |
64 | cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8) | 70 | cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8) |
diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h index da31c8b8a92d..b17f4f48ecd7 100644 --- a/arch/x86/include/asm/atomic.h +++ b/arch/x86/include/asm/atomic.h | |||
@@ -77,7 +77,7 @@ static inline void atomic_sub(int i, atomic_t *v) | |||
77 | */ | 77 | */ |
78 | static inline int atomic_sub_and_test(int i, atomic_t *v) | 78 | static inline int atomic_sub_and_test(int i, atomic_t *v) |
79 | { | 79 | { |
80 | GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, i, "%0", "e"); | 80 | GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, "er", i, "%0", "e"); |
81 | } | 81 | } |
82 | 82 | ||
83 | /** | 83 | /** |
@@ -141,7 +141,7 @@ static inline int atomic_inc_and_test(atomic_t *v) | |||
141 | */ | 141 | */ |
142 | static inline int atomic_add_negative(int i, atomic_t *v) | 142 | static inline int atomic_add_negative(int i, atomic_t *v) |
143 | { | 143 | { |
144 | GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, i, "%0", "s"); | 144 | GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, "er", i, "%0", "s"); |
145 | } | 145 | } |
146 | 146 | ||
147 | /** | 147 | /** |
diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h index 3f065c985aee..46e9052bbd28 100644 --- a/arch/x86/include/asm/atomic64_64.h +++ b/arch/x86/include/asm/atomic64_64.h | |||
@@ -72,7 +72,7 @@ static inline void atomic64_sub(long i, atomic64_t *v) | |||
72 | */ | 72 | */ |
73 | static inline int atomic64_sub_and_test(long i, atomic64_t *v) | 73 | static inline int atomic64_sub_and_test(long i, atomic64_t *v) |
74 | { | 74 | { |
75 | GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, i, "%0", "e"); | 75 | GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, "er", i, "%0", "e"); |
76 | } | 76 | } |
77 | 77 | ||
78 | /** | 78 | /** |
@@ -138,7 +138,7 @@ static inline int atomic64_inc_and_test(atomic64_t *v) | |||
138 | */ | 138 | */ |
139 | static inline int atomic64_add_negative(long i, atomic64_t *v) | 139 | static inline int atomic64_add_negative(long i, atomic64_t *v) |
140 | { | 140 | { |
141 | GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, i, "%0", "s"); | 141 | GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, "er", i, "%0", "s"); |
142 | } | 142 | } |
143 | 143 | ||
144 | /** | 144 | /** |
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index 6d76d0935989..9fc1af74dc83 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h | |||
@@ -205,7 +205,7 @@ static inline void change_bit(long nr, volatile unsigned long *addr) | |||
205 | */ | 205 | */ |
206 | static inline int test_and_set_bit(long nr, volatile unsigned long *addr) | 206 | static inline int test_and_set_bit(long nr, volatile unsigned long *addr) |
207 | { | 207 | { |
208 | GEN_BINARY_RMWcc(LOCK_PREFIX "bts", *addr, nr, "%0", "c"); | 208 | GEN_BINARY_RMWcc(LOCK_PREFIX "bts", *addr, "Ir", nr, "%0", "c"); |
209 | } | 209 | } |
210 | 210 | ||
211 | /** | 211 | /** |
@@ -251,7 +251,7 @@ static inline int __test_and_set_bit(long nr, volatile unsigned long *addr) | |||
251 | */ | 251 | */ |
252 | static inline int test_and_clear_bit(long nr, volatile unsigned long *addr) | 252 | static inline int test_and_clear_bit(long nr, volatile unsigned long *addr) |
253 | { | 253 | { |
254 | GEN_BINARY_RMWcc(LOCK_PREFIX "btr", *addr, nr, "%0", "c"); | 254 | GEN_BINARY_RMWcc(LOCK_PREFIX "btr", *addr, "Ir", nr, "%0", "c"); |
255 | } | 255 | } |
256 | 256 | ||
257 | /** | 257 | /** |
@@ -304,7 +304,7 @@ static inline int __test_and_change_bit(long nr, volatile unsigned long *addr) | |||
304 | */ | 304 | */ |
305 | static inline int test_and_change_bit(long nr, volatile unsigned long *addr) | 305 | static inline int test_and_change_bit(long nr, volatile unsigned long *addr) |
306 | { | 306 | { |
307 | GEN_BINARY_RMWcc(LOCK_PREFIX "btc", *addr, nr, "%0", "c"); | 307 | GEN_BINARY_RMWcc(LOCK_PREFIX "btc", *addr, "Ir", nr, "%0", "c"); |
308 | } | 308 | } |
309 | 309 | ||
310 | static __always_inline int constant_test_bit(long nr, const volatile unsigned long *addr) | 310 | static __always_inline int constant_test_bit(long nr, const volatile unsigned long *addr) |
diff --git a/arch/x86/include/asm/local.h b/arch/x86/include/asm/local.h index 5b23e605e707..4ad6560847b1 100644 --- a/arch/x86/include/asm/local.h +++ b/arch/x86/include/asm/local.h | |||
@@ -52,7 +52,7 @@ static inline void local_sub(long i, local_t *l) | |||
52 | */ | 52 | */ |
53 | static inline int local_sub_and_test(long i, local_t *l) | 53 | static inline int local_sub_and_test(long i, local_t *l) |
54 | { | 54 | { |
55 | GEN_BINARY_RMWcc(_ASM_SUB, l->a.counter, i, "%0", "e"); | 55 | GEN_BINARY_RMWcc(_ASM_SUB, l->a.counter, "er", i, "%0", "e"); |
56 | } | 56 | } |
57 | 57 | ||
58 | /** | 58 | /** |
@@ -92,7 +92,7 @@ static inline int local_inc_and_test(local_t *l) | |||
92 | */ | 92 | */ |
93 | static inline int local_add_negative(long i, local_t *l) | 93 | static inline int local_add_negative(long i, local_t *l) |
94 | { | 94 | { |
95 | GEN_BINARY_RMWcc(_ASM_ADD, l->a.counter, i, "%0", "s"); | 95 | GEN_BINARY_RMWcc(_ASM_ADD, l->a.counter, "er", i, "%0", "s"); |
96 | } | 96 | } |
97 | 97 | ||
98 | /** | 98 | /** |
diff --git a/arch/x86/include/asm/rmwcc.h b/arch/x86/include/asm/rmwcc.h index 1ff990f1de8e..8f7866a5b9a4 100644 --- a/arch/x86/include/asm/rmwcc.h +++ b/arch/x86/include/asm/rmwcc.h | |||
@@ -16,8 +16,8 @@ cc_label: \ | |||
16 | #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ | 16 | #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ |
17 | __GEN_RMWcc(op " " arg0, var, cc) | 17 | __GEN_RMWcc(op " " arg0, var, cc) |
18 | 18 | ||
19 | #define GEN_BINARY_RMWcc(op, var, val, arg0, cc) \ | 19 | #define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \ |
20 | __GEN_RMWcc(op " %1, " arg0, var, cc, "er" (val)) | 20 | __GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val)) |
21 | 21 | ||
22 | #else /* !CC_HAVE_ASM_GOTO */ | 22 | #else /* !CC_HAVE_ASM_GOTO */ |
23 | 23 | ||
@@ -33,8 +33,8 @@ do { \ | |||
33 | #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ | 33 | #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ |
34 | __GEN_RMWcc(op " " arg0, var, cc) | 34 | __GEN_RMWcc(op " " arg0, var, cc) |
35 | 35 | ||
36 | #define GEN_BINARY_RMWcc(op, var, val, arg0, cc) \ | 36 | #define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \ |
37 | __GEN_RMWcc(op " %2, " arg0, var, cc, "er" (val)) | 37 | __GEN_RMWcc(op " %2, " arg0, var, cc, vcon (val)) |
38 | 38 | ||
39 | #endif /* CC_HAVE_ASM_GOTO */ | 39 | #endif /* CC_HAVE_ASM_GOTO */ |
40 | 40 | ||
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index da3c599584a3..c752cb43e52f 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -558,6 +558,17 @@ void native_machine_shutdown(void) | |||
558 | { | 558 | { |
559 | /* Stop the cpus and apics */ | 559 | /* Stop the cpus and apics */ |
560 | #ifdef CONFIG_X86_IO_APIC | 560 | #ifdef CONFIG_X86_IO_APIC |
561 | /* | ||
562 | * Disabling IO APIC before local APIC is a workaround for | ||
563 | * erratum AVR31 in "Intel Atom Processor C2000 Product Family | ||
564 | * Specification Update". In this situation, interrupts that target | ||
565 | * a Logical Processor whose Local APIC is either in the process of | ||
566 | * being hardware disabled or software disabled are neither delivered | ||
567 | * nor discarded. When this erratum occurs, the processor may hang. | ||
568 | * | ||
569 | * Even without the erratum, it still makes sense to quiet IO APIC | ||
570 | * before disabling Local APIC. | ||
571 | */ | ||
561 | disable_IO_APIC(); | 572 | disable_IO_APIC(); |
562 | #endif | 573 | #endif |
563 | 574 | ||
diff --git a/arch/x86/platform/efi/early_printk.c b/arch/x86/platform/efi/early_printk.c index 6599a0027b76..81b506d5befd 100644 --- a/arch/x86/platform/efi/early_printk.c +++ b/arch/x86/platform/efi/early_printk.c | |||
@@ -142,7 +142,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num) | |||
142 | efi_y += font->height; | 142 | efi_y += font->height; |
143 | } | 143 | } |
144 | 144 | ||
145 | if (efi_y + font->height >= si->lfb_height) { | 145 | if (efi_y + font->height > si->lfb_height) { |
146 | u32 i; | 146 | u32 i; |
147 | 147 | ||
148 | efi_y -= font->height; | 148 | efi_y -= font->height; |