diff options
author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:53:57 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:53:57 -0400 |
commit | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (patch) | |
tree | dfee34eb1f317b35f33a02291e65ce6ec46e3a5a /arch | |
parent | a6417dd58d6832f123f36c6f22c63ec1ab62ce1c (diff) | |
parent | f6dbf651615900646fe0ba1ef5ce1027e5b4748d (diff) |
Merge branch 'iop-raid6' into async-tx-next
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/include/asm/hardware/iop3xx-adma.h | 76 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/iop_adma.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/include/mach/adma.h | 107 |
3 files changed, 184 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h index 26eefea02314..1a8c7279a28b 100644 --- a/arch/arm/include/asm/hardware/iop3xx-adma.h +++ b/arch/arm/include/asm/hardware/iop3xx-adma.h | |||
@@ -187,11 +187,74 @@ union iop3xx_desc { | |||
187 | void *ptr; | 187 | void *ptr; |
188 | }; | 188 | }; |
189 | 189 | ||
190 | /* No support for p+q operations */ | ||
191 | static inline int | ||
192 | iop_chan_pq_slot_count(size_t len, int src_cnt, int *slots_per_op) | ||
193 | { | ||
194 | BUG(); | ||
195 | return 0; | ||
196 | } | ||
197 | |||
198 | static inline void | ||
199 | iop_desc_init_pq(struct iop_adma_desc_slot *desc, int src_cnt, | ||
200 | unsigned long flags) | ||
201 | { | ||
202 | BUG(); | ||
203 | } | ||
204 | |||
205 | static inline void | ||
206 | iop_desc_set_pq_addr(struct iop_adma_desc_slot *desc, dma_addr_t *addr) | ||
207 | { | ||
208 | BUG(); | ||
209 | } | ||
210 | |||
211 | static inline void | ||
212 | iop_desc_set_pq_src_addr(struct iop_adma_desc_slot *desc, int src_idx, | ||
213 | dma_addr_t addr, unsigned char coef) | ||
214 | { | ||
215 | BUG(); | ||
216 | } | ||
217 | |||
218 | static inline int | ||
219 | iop_chan_pq_zero_sum_slot_count(size_t len, int src_cnt, int *slots_per_op) | ||
220 | { | ||
221 | BUG(); | ||
222 | return 0; | ||
223 | } | ||
224 | |||
225 | static inline void | ||
226 | iop_desc_init_pq_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, | ||
227 | unsigned long flags) | ||
228 | { | ||
229 | BUG(); | ||
230 | } | ||
231 | |||
232 | static inline void | ||
233 | iop_desc_set_pq_zero_sum_byte_count(struct iop_adma_desc_slot *desc, u32 len) | ||
234 | { | ||
235 | BUG(); | ||
236 | } | ||
237 | |||
238 | #define iop_desc_set_pq_zero_sum_src_addr iop_desc_set_pq_src_addr | ||
239 | |||
240 | static inline void | ||
241 | iop_desc_set_pq_zero_sum_addr(struct iop_adma_desc_slot *desc, int pq_idx, | ||
242 | dma_addr_t *src) | ||
243 | { | ||
244 | BUG(); | ||
245 | } | ||
246 | |||
190 | static inline int iop_adma_get_max_xor(void) | 247 | static inline int iop_adma_get_max_xor(void) |
191 | { | 248 | { |
192 | return 32; | 249 | return 32; |
193 | } | 250 | } |
194 | 251 | ||
252 | static inline int iop_adma_get_max_pq(void) | ||
253 | { | ||
254 | BUG(); | ||
255 | return 0; | ||
256 | } | ||
257 | |||
195 | static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan) | 258 | static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan) |
196 | { | 259 | { |
197 | int id = chan->device->id; | 260 | int id = chan->device->id; |
@@ -332,6 +395,11 @@ static inline int iop_chan_zero_sum_slot_count(size_t len, int src_cnt, | |||
332 | return slot_cnt; | 395 | return slot_cnt; |
333 | } | 396 | } |
334 | 397 | ||
398 | static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc) | ||
399 | { | ||
400 | return 0; | ||
401 | } | ||
402 | |||
335 | static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, | 403 | static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, |
336 | struct iop_adma_chan *chan) | 404 | struct iop_adma_chan *chan) |
337 | { | 405 | { |
@@ -349,6 +417,14 @@ static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, | |||
349 | return 0; | 417 | return 0; |
350 | } | 418 | } |
351 | 419 | ||
420 | |||
421 | static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc, | ||
422 | struct iop_adma_chan *chan) | ||
423 | { | ||
424 | BUG(); | ||
425 | return 0; | ||
426 | } | ||
427 | |||
352 | static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, | 428 | static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, |
353 | struct iop_adma_chan *chan) | 429 | struct iop_adma_chan *chan) |
354 | { | 430 | { |
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h index 385c6e8cbbd2..bbe8a0475cad 100644 --- a/arch/arm/include/asm/hardware/iop_adma.h +++ b/arch/arm/include/asm/hardware/iop_adma.h | |||
@@ -106,6 +106,7 @@ struct iop_adma_desc_slot { | |||
106 | union { | 106 | union { |
107 | u32 *xor_check_result; | 107 | u32 *xor_check_result; |
108 | u32 *crc32_result; | 108 | u32 *crc32_result; |
109 | u32 *pq_check_result; | ||
109 | }; | 110 | }; |
110 | }; | 111 | }; |
111 | 112 | ||
diff --git a/arch/arm/mach-iop13xx/include/mach/adma.h b/arch/arm/mach-iop13xx/include/mach/adma.h index 1cd31df8924d..6d3782d85a9f 100644 --- a/arch/arm/mach-iop13xx/include/mach/adma.h +++ b/arch/arm/mach-iop13xx/include/mach/adma.h | |||
@@ -150,6 +150,8 @@ static inline int iop_adma_get_max_xor(void) | |||
150 | return 16; | 150 | return 16; |
151 | } | 151 | } |
152 | 152 | ||
153 | #define iop_adma_get_max_pq iop_adma_get_max_xor | ||
154 | |||
153 | static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan) | 155 | static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan) |
154 | { | 156 | { |
155 | return __raw_readl(ADMA_ADAR(chan)); | 157 | return __raw_readl(ADMA_ADAR(chan)); |
@@ -211,7 +213,10 @@ iop_chan_xor_slot_count(size_t len, int src_cnt, int *slots_per_op) | |||
211 | #define IOP_ADMA_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT | 213 | #define IOP_ADMA_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT |
212 | #define IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT | 214 | #define IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT |
213 | #define IOP_ADMA_XOR_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT | 215 | #define IOP_ADMA_XOR_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT |
216 | #define IOP_ADMA_PQ_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT | ||
214 | #define iop_chan_zero_sum_slot_count(l, s, o) iop_chan_xor_slot_count(l, s, o) | 217 | #define iop_chan_zero_sum_slot_count(l, s, o) iop_chan_xor_slot_count(l, s, o) |
218 | #define iop_chan_pq_slot_count iop_chan_xor_slot_count | ||
219 | #define iop_chan_pq_zero_sum_slot_count iop_chan_xor_slot_count | ||
215 | 220 | ||
216 | static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, | 221 | static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, |
217 | struct iop_adma_chan *chan) | 222 | struct iop_adma_chan *chan) |
@@ -220,6 +225,13 @@ static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, | |||
220 | return hw_desc->dest_addr; | 225 | return hw_desc->dest_addr; |
221 | } | 226 | } |
222 | 227 | ||
228 | static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc, | ||
229 | struct iop_adma_chan *chan) | ||
230 | { | ||
231 | struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; | ||
232 | return hw_desc->q_dest_addr; | ||
233 | } | ||
234 | |||
223 | static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, | 235 | static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, |
224 | struct iop_adma_chan *chan) | 236 | struct iop_adma_chan *chan) |
225 | { | 237 | { |
@@ -319,6 +331,58 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, | |||
319 | return 1; | 331 | return 1; |
320 | } | 332 | } |
321 | 333 | ||
334 | static inline void | ||
335 | iop_desc_init_pq(struct iop_adma_desc_slot *desc, int src_cnt, | ||
336 | unsigned long flags) | ||
337 | { | ||
338 | struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; | ||
339 | union { | ||
340 | u32 value; | ||
341 | struct iop13xx_adma_desc_ctrl field; | ||
342 | } u_desc_ctrl; | ||
343 | |||
344 | u_desc_ctrl.value = 0; | ||
345 | u_desc_ctrl.field.src_select = src_cnt - 1; | ||
346 | u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ | ||
347 | u_desc_ctrl.field.pq_xfer_en = 1; | ||
348 | u_desc_ctrl.field.p_xfer_dis = !!(flags & DMA_PREP_PQ_DISABLE_P); | ||
349 | u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; | ||
350 | hw_desc->desc_ctrl = u_desc_ctrl.value; | ||
351 | } | ||
352 | |||
353 | static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc) | ||
354 | { | ||
355 | struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; | ||
356 | union { | ||
357 | u32 value; | ||
358 | struct iop13xx_adma_desc_ctrl field; | ||
359 | } u_desc_ctrl; | ||
360 | |||
361 | u_desc_ctrl.value = hw_desc->desc_ctrl; | ||
362 | return u_desc_ctrl.field.pq_xfer_en; | ||
363 | } | ||
364 | |||
365 | static inline void | ||
366 | iop_desc_init_pq_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, | ||
367 | unsigned long flags) | ||
368 | { | ||
369 | struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; | ||
370 | union { | ||
371 | u32 value; | ||
372 | struct iop13xx_adma_desc_ctrl field; | ||
373 | } u_desc_ctrl; | ||
374 | |||
375 | u_desc_ctrl.value = 0; | ||
376 | u_desc_ctrl.field.src_select = src_cnt - 1; | ||
377 | u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ | ||
378 | u_desc_ctrl.field.zero_result = 1; | ||
379 | u_desc_ctrl.field.status_write_back_en = 1; | ||
380 | u_desc_ctrl.field.pq_xfer_en = 1; | ||
381 | u_desc_ctrl.field.p_xfer_dis = !!(flags & DMA_PREP_PQ_DISABLE_P); | ||
382 | u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; | ||
383 | hw_desc->desc_ctrl = u_desc_ctrl.value; | ||
384 | } | ||
385 | |||
322 | static inline void iop_desc_set_byte_count(struct iop_adma_desc_slot *desc, | 386 | static inline void iop_desc_set_byte_count(struct iop_adma_desc_slot *desc, |
323 | struct iop_adma_chan *chan, | 387 | struct iop_adma_chan *chan, |
324 | u32 byte_count) | 388 | u32 byte_count) |
@@ -351,6 +415,7 @@ iop_desc_set_zero_sum_byte_count(struct iop_adma_desc_slot *desc, u32 len) | |||
351 | } | 415 | } |
352 | } | 416 | } |
353 | 417 | ||
418 | #define iop_desc_set_pq_zero_sum_byte_count iop_desc_set_zero_sum_byte_count | ||
354 | 419 | ||
355 | static inline void iop_desc_set_dest_addr(struct iop_adma_desc_slot *desc, | 420 | static inline void iop_desc_set_dest_addr(struct iop_adma_desc_slot *desc, |
356 | struct iop_adma_chan *chan, | 421 | struct iop_adma_chan *chan, |
@@ -361,6 +426,16 @@ static inline void iop_desc_set_dest_addr(struct iop_adma_desc_slot *desc, | |||
361 | hw_desc->upper_dest_addr = 0; | 426 | hw_desc->upper_dest_addr = 0; |
362 | } | 427 | } |
363 | 428 | ||
429 | static inline void | ||
430 | iop_desc_set_pq_addr(struct iop_adma_desc_slot *desc, dma_addr_t *addr) | ||
431 | { | ||
432 | struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; | ||
433 | |||
434 | hw_desc->dest_addr = addr[0]; | ||
435 | hw_desc->q_dest_addr = addr[1]; | ||
436 | hw_desc->upper_dest_addr = 0; | ||
437 | } | ||
438 | |||
364 | static inline void iop_desc_set_memcpy_src_addr(struct iop_adma_desc_slot *desc, | 439 | static inline void iop_desc_set_memcpy_src_addr(struct iop_adma_desc_slot *desc, |
365 | dma_addr_t addr) | 440 | dma_addr_t addr) |
366 | { | 441 | { |
@@ -389,6 +464,29 @@ static inline void iop_desc_set_xor_src_addr(struct iop_adma_desc_slot *desc, | |||
389 | } | 464 | } |
390 | 465 | ||
391 | static inline void | 466 | static inline void |
467 | iop_desc_set_pq_src_addr(struct iop_adma_desc_slot *desc, int src_idx, | ||
468 | dma_addr_t addr, unsigned char coef) | ||
469 | { | ||
470 | int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op; | ||
471 | struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc, *iter; | ||
472 | struct iop13xx_adma_src *src; | ||
473 | int i = 0; | ||
474 | |||
475 | do { | ||
476 | iter = iop_hw_desc_slot_idx(hw_desc, i); | ||
477 | src = &iter->src[src_idx]; | ||
478 | src->src_addr = addr; | ||
479 | src->pq_upper_src_addr = 0; | ||
480 | src->pq_dmlt = coef; | ||
481 | slot_cnt -= slots_per_op; | ||
482 | if (slot_cnt) { | ||
483 | i += slots_per_op; | ||
484 | addr += IOP_ADMA_PQ_MAX_BYTE_COUNT; | ||
485 | } | ||
486 | } while (slot_cnt); | ||
487 | } | ||
488 | |||
489 | static inline void | ||
392 | iop_desc_init_interrupt(struct iop_adma_desc_slot *desc, | 490 | iop_desc_init_interrupt(struct iop_adma_desc_slot *desc, |
393 | struct iop_adma_chan *chan) | 491 | struct iop_adma_chan *chan) |
394 | { | 492 | { |
@@ -399,6 +497,15 @@ iop_desc_init_interrupt(struct iop_adma_desc_slot *desc, | |||
399 | } | 497 | } |
400 | 498 | ||
401 | #define iop_desc_set_zero_sum_src_addr iop_desc_set_xor_src_addr | 499 | #define iop_desc_set_zero_sum_src_addr iop_desc_set_xor_src_addr |
500 | #define iop_desc_set_pq_zero_sum_src_addr iop_desc_set_pq_src_addr | ||
501 | |||
502 | static inline void | ||
503 | iop_desc_set_pq_zero_sum_addr(struct iop_adma_desc_slot *desc, int pq_idx, | ||
504 | dma_addr_t *src) | ||
505 | { | ||
506 | iop_desc_set_xor_src_addr(desc, pq_idx, src[pq_idx]); | ||
507 | iop_desc_set_xor_src_addr(desc, pq_idx+1, src[pq_idx+1]); | ||
508 | } | ||
402 | 509 | ||
403 | static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc, | 510 | static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc, |
404 | u32 next_desc_addr) | 511 | u32 next_desc_addr) |