diff options
| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2014-05-19 06:04:39 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-31 20:15:04 -0400 |
| commit | 1c8c3cf0b5239388e712508a85821f4718f4d889 (patch) | |
| tree | 8454ad999882d20118d1af924c0cf6d2d42c97bd /arch | |
| parent | 437b680a222098f67ecb1690f8eb91f550bfaac8 (diff) | |
ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
Due to a design incompatibility between the PCIe Marvell controller
and the Cortex-A9, stressing PCIe devices with a lot of traffic
quickly causes a deadlock.
One part of the workaround for this is to have all PCIe regions mapped
as strongly-ordered (MT_UNCACHED) instead of the default
MT_DEVICE. While the arch_ioremap_caller() mechanism allows
sub-architecture code to override ioremap(), used to map PCIe memory
regions, there isn't such a mechanism to override the behavior of
pci_ioremap_io().
This commit adds the arch_pci_ioremap_mem_type variable, initialized
to MT_DEVICE by default, and that sub-architecture code can
override. We have chosen to expose a single variable rather than
offering the possibility of overriding the entire pci_ioremap_io(),
because implementing pci_ioremap_io() requires calling functions
(get_mem_type()) that are private to the arch/arm/mm/ code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/io.h | 6 | ||||
| -rw-r--r-- | arch/arm/mm/ioremap.c | 9 |
2 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 8aa4cca74501..3d23418cbddd 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h | |||
| @@ -179,6 +179,12 @@ static inline void __iomem *__typesafe_io(unsigned long addr) | |||
| 179 | /* PCI fixed i/o mapping */ | 179 | /* PCI fixed i/o mapping */ |
| 180 | #define PCI_IO_VIRT_BASE 0xfee00000 | 180 | #define PCI_IO_VIRT_BASE 0xfee00000 |
| 181 | 181 | ||
| 182 | #if defined(CONFIG_PCI) | ||
| 183 | void pci_ioremap_set_mem_type(int mem_type); | ||
| 184 | #else | ||
| 185 | static inline void pci_ioremap_set_mem_type(int mem_type) {} | ||
| 186 | #endif | ||
| 187 | |||
| 182 | extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr); | 188 | extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr); |
| 183 | 189 | ||
| 184 | /* | 190 | /* |
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index f9c32ba73544..d1e5ad7ab3bc 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
| @@ -438,6 +438,13 @@ void __arm_iounmap(volatile void __iomem *io_addr) | |||
| 438 | EXPORT_SYMBOL(__arm_iounmap); | 438 | EXPORT_SYMBOL(__arm_iounmap); |
| 439 | 439 | ||
| 440 | #ifdef CONFIG_PCI | 440 | #ifdef CONFIG_PCI |
| 441 | static int pci_ioremap_mem_type = MT_DEVICE; | ||
| 442 | |||
| 443 | void pci_ioremap_set_mem_type(int mem_type) | ||
| 444 | { | ||
| 445 | pci_ioremap_mem_type = mem_type; | ||
| 446 | } | ||
| 447 | |||
| 441 | int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr) | 448 | int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr) |
| 442 | { | 449 | { |
| 443 | BUG_ON(offset + SZ_64K > IO_SPACE_LIMIT); | 450 | BUG_ON(offset + SZ_64K > IO_SPACE_LIMIT); |
| @@ -445,7 +452,7 @@ int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr) | |||
| 445 | return ioremap_page_range(PCI_IO_VIRT_BASE + offset, | 452 | return ioremap_page_range(PCI_IO_VIRT_BASE + offset, |
| 446 | PCI_IO_VIRT_BASE + offset + SZ_64K, | 453 | PCI_IO_VIRT_BASE + offset + SZ_64K, |
| 447 | phys_addr, | 454 | phys_addr, |
| 448 | __pgprot(get_mem_type(MT_DEVICE)->prot_pte)); | 455 | __pgprot(get_mem_type(pci_ioremap_mem_type)->prot_pte)); |
| 449 | } | 456 | } |
| 450 | EXPORT_SYMBOL_GPL(pci_ioremap_io); | 457 | EXPORT_SYMBOL_GPL(pci_ioremap_io); |
| 451 | #endif | 458 | #endif |
