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authorTejun Heo <tj@kernel.org>2013-12-10 08:40:48 -0500
committerTejun Heo <tj@kernel.org>2013-12-10 08:44:37 -0500
commit13ccb93f4127baf53961a9497780a0f52e3c24e7 (patch)
treefcfcca99d9d9c49a03d825ddaecabe0163c924eb /arch
parentbbc780f8bab52fef1784151d3c4982cb1143edd2 (diff)
parenta8b14744429f90763f258ad0f69601cdcad610aa (diff)
Merge branch 'driver-core-linus' into driver-core-next
a8b14744429f ("sysfs: give different locking key to regular and bin files") in driver-core-linus modifies sysfs_open_file() so that it gives out different locking classes to sysfs_open_files depending on whether the file is bin or not. Due to the massive kernfs reorganization in driver-core-next, this naturally causes merge conflict in fs/sysfs/file.c. Due to the way things are split between kernfs and sysfs in driver-core-next, the same fix can't easily be applied to driver-core-next. This merge simply ignores the offending commit. A following patch will implement a separate fix for the issue. Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/am335x-base0033.dts79
-rw-r--r--arch/arm/boot/dts/am335x-igep0033.dtsi29
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts28
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78230.dtsi24
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78260.dtsi109
-rw-r--r--arch/arm/boot/dts/at91sam9x5_usart3.dtsi4
-rw-r--r--arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts7
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts21
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi85
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts50
-rw-r--r--arch/arm/boot/dts/omap3-igep0030.dts4
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts23
-rw-r--r--arch/arm/boot/dts/omap3.dtsi42
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi20
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts12
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi7
-rw-r--r--arch/arm/configs/multi_v7_defconfig3
-rw-r--r--arch/arm/configs/omap2plus_defconfig1
-rw-r--r--arch/arm/configs/sunxi_defconfig7
-rw-r--r--arch/arm/configs/u8500_defconfig3
-rw-r--r--arch/arm/include/asm/pgtable.h2
-rw-r--r--arch/arm/kernel/machine_kexec.c17
-rw-r--r--arch/arm/kernel/relocate_kernel.S8
-rw-r--r--arch/arm/kernel/sigreturn_codes.S40
-rw-r--r--arch/arm/lib/delay-loop.S1
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c7
-rw-r--r--arch/arm/mach-at91/pm.h4
-rw-r--r--arch/arm/mach-at91/sama5d3.c6
-rw-r--r--arch/arm/mach-footbridge/common.c3
-rw-r--r--arch/arm/mach-footbridge/dc21285.c2
-rw-r--r--arch/arm/mach-footbridge/ebsa285.c22
-rw-r--r--arch/arm/mach-omap2/dss-common.c2
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c1
-rw-r--r--arch/arm/mach-omap2/powerdomain.c3
-rw-r--r--arch/arm/mach-socfpga/Kconfig1
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c4
-rw-r--r--arch/arm/mm/dma-mapping.c9
-rw-r--r--arch/arm/mm/mmap.c2
-rw-r--r--arch/arm/mm/pgd.c3
-rw-r--r--arch/arm/plat-omap/include/plat/dmtimer.h5
-rw-r--r--arch/arm/xen/p2m.c5
-rw-r--r--arch/parisc/configs/c3000_defconfig2
-rw-r--r--arch/parisc/configs/c8000_defconfig36
-rw-r--r--arch/parisc/configs/generic-64bit_defconfig39
-rw-r--r--arch/parisc/include/asm/serial.h2
-rw-r--r--arch/parisc/kernel/hardware.c7
-rw-r--r--arch/parisc/kernel/head.S6
-rw-r--r--arch/parisc/kernel/sys_parisc.c25
-rw-r--r--arch/parisc/kernel/unwind.c9
-rw-r--r--arch/parisc/kernel/vmlinux.lds.S138
-rw-r--r--arch/parisc/mm/init.c19
-rw-r--r--arch/s390/crypto/aes_s390.c31
-rw-r--r--arch/um/Makefile9
-rw-r--r--arch/um/kernel/sysrq.c4
-rw-r--r--arch/x86/Makefile8
-rw-r--r--arch/x86/include/asm/atomic.h4
-rw-r--r--arch/x86/include/asm/atomic64_64.h4
-rw-r--r--arch/x86/include/asm/bitops.h6
-rw-r--r--arch/x86/include/asm/local.h4
-rw-r--r--arch/x86/include/asm/rmwcc.h8
-rw-r--r--arch/x86/include/asm/trace/irq_vectors.h11
-rw-r--r--arch/x86/kernel/reboot.c11
-rw-r--r--arch/x86/platform/efi/early_printk.c2
65 files changed, 755 insertions, 341 deletions
diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts
index b4f95c2bbf74..72a9b3fc4251 100644
--- a/arch/arm/boot/dts/am335x-base0033.dts
+++ b/arch/arm/boot/dts/am335x-base0033.dts
@@ -13,4 +13,83 @@
13/ { 13/ {
14 model = "IGEP COM AM335x on AQUILA Expansion"; 14 model = "IGEP COM AM335x on AQUILA Expansion";
15 compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx"; 15 compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
16
17 hdmi {
18 compatible = "ti,tilcdc,slave";
19 i2c = <&i2c0>;
20 pinctrl-names = "default", "off";
21 pinctrl-0 = <&nxp_hdmi_pins>;
22 pinctrl-1 = <&nxp_hdmi_off_pins>;
23 status = "okay";
24 };
25
26 leds_base {
27 pinctrl-names = "default";
28 pinctrl-0 = <&leds_base_pins>;
29
30 compatible = "gpio-leds";
31
32 led@0 {
33 label = "base:red:user";
34 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */
35 default-state = "off";
36 };
37
38 led@1 {
39 label = "base:green:user";
40 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */
41 default-state = "off";
42 };
43 };
44};
45
46&am33xx_pinmux {
47 nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
48 pinctrl-single,pins = <
49 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
50 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0 */
51 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1 */
52 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2 */
53 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3 */
54 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4 */
55 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5 */
56 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6 */
57 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7 */
58 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8 */
59 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9 */
60 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10 */
61 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11 */
62 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12 */
63 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13 */
64 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14 */
65 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15 */
66 0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync */
67 0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync */
68 0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk */
69 0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en */
70 >;
71 };
72 nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
73 pinctrl-single,pins = <
74 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
75 >;
76 };
77
78 leds_base_pins: pinmux_leds_base_pins {
79 pinctrl-single,pins = <
80 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
81 0x88 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */
82 >;
83 };
84};
85
86&lcdc {
87 status = "okay";
88};
89
90&i2c0 {
91 eeprom: eeprom@50 {
92 compatible = "at,24c256";
93 reg = <0x50>;
94 };
16}; 95};
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 619624479311..7063311a58d9 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -199,6 +199,35 @@
199 pinctrl-0 = <&uart0_pins>; 199 pinctrl-0 = <&uart0_pins>;
200}; 200};
201 201
202&usb {
203 status = "okay";
204
205 control@44e10000 {
206 status = "okay";
207 };
208
209 usb-phy@47401300 {
210 status = "okay";
211 };
212
213 usb-phy@47401b00 {
214 status = "okay";
215 };
216
217 usb@47401000 {
218 status = "okay";
219 };
220
221 usb@47401800 {
222 status = "okay";
223 dr_mode = "host";
224 };
225
226 dma-controller@07402000 {
227 status = "okay";
228 };
229};
230
202#include "tps65910.dtsi" 231#include "tps65910.dtsi"
203 232
204&tps { 233&tps {
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 90ce29dbe119..08a56bcfc724 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -99,22 +99,22 @@
99 spi-max-frequency = <50000000>; 99 spi-max-frequency = <50000000>;
100 }; 100 };
101 }; 101 };
102 };
102 103
103 pcie-controller { 104 pcie-controller {
105 status = "okay";
106 /*
107 * The two PCIe units are accessible through
108 * both standard PCIe slots and mini-PCIe
109 * slots on the board.
110 */
111 pcie@1,0 {
112 /* Port 0, Lane 0 */
113 status = "okay";
114 };
115 pcie@2,0 {
116 /* Port 1, Lane 0 */
104 status = "okay"; 117 status = "okay";
105 /*
106 * The two PCIe units are accessible through
107 * both standard PCIe slots and mini-PCIe
108 * slots on the board.
109 */
110 pcie@1,0 {
111 /* Port 0, Lane 0 */
112 status = "okay";
113 };
114 pcie@2,0 {
115 /* Port 1, Lane 0 */
116 status = "okay";
117 };
118 }; 118 };
119 }; 119 };
120 }; 120 };
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 00d6a798c705..7f10f627ae5b 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -118,7 +118,7 @@
118 118
119 coherency-fabric@20200 { 119 coherency-fabric@20200 {
120 compatible = "marvell,coherency-fabric"; 120 compatible = "marvell,coherency-fabric";
121 reg = <0x20200 0xb0>, <0x21810 0x1c>; 121 reg = <0x20200 0xb0>, <0x21010 0x1c>;
122 }; 122 };
123 123
124 serial@12000 { 124 serial@12000 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 3f5e6121c730..98335fb34b7a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -47,7 +47,7 @@
47 /* 47 /*
48 * MV78230 has 2 PCIe units Gen2.0: One unit can be 48 * MV78230 has 2 PCIe units Gen2.0: One unit can be
49 * configured as x4 or quad x1 lanes. One unit is 49 * configured as x4 or quad x1 lanes. One unit is
50 * x4/x1. 50 * x1 only.
51 */ 51 */
52 pcie-controller { 52 pcie-controller {
53 compatible = "marvell,armada-xp-pcie"; 53 compatible = "marvell,armada-xp-pcie";
@@ -62,10 +62,10 @@
62 62
63 ranges = 63 ranges =
64 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ 64 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
65 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
66 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */ 65 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
67 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ 66 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
68 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */ 67 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
68 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
69 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 69 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
70 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ 70 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
71 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 71 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -74,8 +74,8 @@
74 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */ 74 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */
75 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 75 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
76 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */ 76 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */
77 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ 77 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
78 0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>; 78 0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
79 79
80 pcie@1,0 { 80 pcie@1,0 {
81 device_type = "pci"; 81 device_type = "pci";
@@ -145,20 +145,20 @@
145 status = "disabled"; 145 status = "disabled";
146 }; 146 };
147 147
148 pcie@9,0 { 148 pcie@5,0 {
149 device_type = "pci"; 149 device_type = "pci";
150 assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; 150 assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
151 reg = <0x4800 0 0 0 0>; 151 reg = <0x2800 0 0 0 0>;
152 #address-cells = <3>; 152 #address-cells = <3>;
153 #size-cells = <2>; 153 #size-cells = <2>;
154 #interrupt-cells = <1>; 154 #interrupt-cells = <1>;
155 ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 155 ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
156 0x81000000 0 0 0x81000000 0x9 0 1 0>; 156 0x81000000 0 0 0x81000000 0x5 0 1 0>;
157 interrupt-map-mask = <0 0 0 0>; 157 interrupt-map-mask = <0 0 0 0>;
158 interrupt-map = <0 0 0 0 &mpic 99>; 158 interrupt-map = <0 0 0 0 &mpic 62>;
159 marvell,pcie-port = <2>; 159 marvell,pcie-port = <1>;
160 marvell,pcie-lane = <0>; 160 marvell,pcie-lane = <0>;
161 clocks = <&gateclk 26>; 161 clocks = <&gateclk 9>;
162 status = "disabled"; 162 status = "disabled";
163 }; 163 };
164 }; 164 };
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 3e9fd1353f89..66609684d41b 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -48,7 +48,7 @@
48 /* 48 /*
49 * MV78260 has 3 PCIe units Gen2.0: Two units can be 49 * MV78260 has 3 PCIe units Gen2.0: Two units can be
50 * configured as x4 or quad x1 lanes. One unit is 50 * configured as x4 or quad x1 lanes. One unit is
51 * x4/x1. 51 * x4 only.
52 */ 52 */
53 pcie-controller { 53 pcie-controller {
54 compatible = "marvell,armada-xp-pcie"; 54 compatible = "marvell,armada-xp-pcie";
@@ -68,7 +68,9 @@
68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ 68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
69 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */ 69 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
70 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */ 70 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
71 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */ 71 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
72 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
73 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
72 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 74 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
73 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ 75 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
74 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 76 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -77,10 +79,18 @@
77 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */ 79 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */
78 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 80 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
79 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */ 81 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */
80 0x82000000 0x9 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ 82
81 0x81000000 0x9 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */ 83 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
82 0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */ 84 0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */
83 0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>; 85 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */
86 0x81000000 0x6 0 MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO */
87 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */
88 0x81000000 0x7 0 MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO */
89 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */
90 0x81000000 0x8 0 MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO */
91
92 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
93 0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>;
84 94
85 pcie@1,0 { 95 pcie@1,0 {
86 device_type = "pci"; 96 device_type = "pci";
@@ -106,8 +116,8 @@
106 #address-cells = <3>; 116 #address-cells = <3>;
107 #size-cells = <2>; 117 #size-cells = <2>;
108 #interrupt-cells = <1>; 118 #interrupt-cells = <1>;
109 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 119 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
110 0x81000000 0 0 0x81000000 0x2 0 1 0>; 120 0x81000000 0 0 0x81000000 0x2 0 1 0>;
111 interrupt-map-mask = <0 0 0 0>; 121 interrupt-map-mask = <0 0 0 0>;
112 interrupt-map = <0 0 0 0 &mpic 59>; 122 interrupt-map = <0 0 0 0 &mpic 59>;
113 marvell,pcie-port = <0>; 123 marvell,pcie-port = <0>;
@@ -150,37 +160,88 @@
150 status = "disabled"; 160 status = "disabled";
151 }; 161 };
152 162
153 pcie@9,0 { 163 pcie@5,0 {
154 device_type = "pci"; 164 device_type = "pci";
155 assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; 165 assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
156 reg = <0x4800 0 0 0 0>; 166 reg = <0x2800 0 0 0 0>;
157 #address-cells = <3>; 167 #address-cells = <3>;
158 #size-cells = <2>; 168 #size-cells = <2>;
159 #interrupt-cells = <1>; 169 #interrupt-cells = <1>;
160 ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 170 ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
161 0x81000000 0 0 0x81000000 0x9 0 1 0>; 171 0x81000000 0 0 0x81000000 0x5 0 1 0>;
162 interrupt-map-mask = <0 0 0 0>; 172 interrupt-map-mask = <0 0 0 0>;
163 interrupt-map = <0 0 0 0 &mpic 99>; 173 interrupt-map = <0 0 0 0 &mpic 62>;
164 marvell,pcie-port = <2>; 174 marvell,pcie-port = <1>;
165 marvell,pcie-lane = <0>; 175 marvell,pcie-lane = <0>;
166 clocks = <&gateclk 26>; 176 clocks = <&gateclk 9>;
167 status = "disabled"; 177 status = "disabled";
168 }; 178 };
169 179
170 pcie@10,0 { 180 pcie@6,0 {
171 device_type = "pci"; 181 device_type = "pci";
172 assigned-addresses = <0x82000800 0 0x82000 0 0x2000>; 182 assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
173 reg = <0x5000 0 0 0 0>; 183 reg = <0x3000 0 0 0 0>;
174 #address-cells = <3>; 184 #address-cells = <3>;
175 #size-cells = <2>; 185 #size-cells = <2>;
176 #interrupt-cells = <1>; 186 #interrupt-cells = <1>;
177 ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 187 ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
178 0x81000000 0 0 0x81000000 0xa 0 1 0>; 188 0x81000000 0 0 0x81000000 0x6 0 1 0>;
179 interrupt-map-mask = <0 0 0 0>; 189 interrupt-map-mask = <0 0 0 0>;
180 interrupt-map = <0 0 0 0 &mpic 103>; 190 interrupt-map = <0 0 0 0 &mpic 63>;
181 marvell,pcie-port = <3>; 191 marvell,pcie-port = <1>;
192 marvell,pcie-lane = <1>;
193 clocks = <&gateclk 10>;
194 status = "disabled";
195 };
196
197 pcie@7,0 {
198 device_type = "pci";
199 assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
200 reg = <0x3800 0 0 0 0>;
201 #address-cells = <3>;
202 #size-cells = <2>;
203 #interrupt-cells = <1>;
204 ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
205 0x81000000 0 0 0x81000000 0x7 0 1 0>;
206 interrupt-map-mask = <0 0 0 0>;
207 interrupt-map = <0 0 0 0 &mpic 64>;
208 marvell,pcie-port = <1>;
209 marvell,pcie-lane = <2>;
210 clocks = <&gateclk 11>;
211 status = "disabled";
212 };
213
214 pcie@8,0 {
215 device_type = "pci";
216 assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
217 reg = <0x4000 0 0 0 0>;
218 #address-cells = <3>;
219 #size-cells = <2>;
220 #interrupt-cells = <1>;
221 ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
222 0x81000000 0 0 0x81000000 0x8 0 1 0>;
223 interrupt-map-mask = <0 0 0 0>;
224 interrupt-map = <0 0 0 0 &mpic 65>;
225 marvell,pcie-port = <1>;
226 marvell,pcie-lane = <3>;
227 clocks = <&gateclk 12>;
228 status = "disabled";
229 };
230
231 pcie@9,0 {
232 device_type = "pci";
233 assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
234 reg = <0x4800 0 0 0 0>;
235 #address-cells = <3>;
236 #size-cells = <2>;
237 #interrupt-cells = <1>;
238 ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
239 0x81000000 0 0 0x81000000 0x9 0 1 0>;
240 interrupt-map-mask = <0 0 0 0>;
241 interrupt-map = <0 0 0 0 &mpic 99>;
242 marvell,pcie-port = <2>;
182 marvell,pcie-lane = <0>; 243 marvell,pcie-lane = <0>;
183 clocks = <&gateclk 27>; 244 clocks = <&gateclk 26>;
184 status = "disabled"; 245 status = "disabled";
185 }; 246 };
186 }; 247 };
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
index 2347e9563cef..6801106fa1f8 100644
--- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -11,6 +11,10 @@
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12 12
13/ { 13/ {
14 aliases {
15 serial4 = &usart3;
16 };
17
14 ahb { 18 ahb {
15 apb { 19 apb {
16 pinctrl@fffff400 { 20 pinctrl@fffff400 {
diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
index 9c18adf788f7..f577b7df9a29 100644
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -44,8 +44,8 @@
44 gpmc,wr-access-ns = <186>; 44 gpmc,wr-access-ns = <186>;
45 gpmc,cycle2cycle-samecsen; 45 gpmc,cycle2cycle-samecsen;
46 gpmc,cycle2cycle-diffcsen; 46 gpmc,cycle2cycle-diffcsen;
47 vmmc-supply = <&vddvario>; 47 vddvario-supply = <&vddvario>;
48 vmmc_aux-supply = <&vdd33a>; 48 vdd33a-supply = <&vdd33a>;
49 reg-io-width = <4>; 49 reg-io-width = <4>;
50 smsc,save-mac-address; 50 smsc,save-mac-address;
51 }; 51 };
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 31a632f7effb..df33a50bc070 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -215,3 +215,10 @@
215&usbhsehci { 215&usbhsehci {
216 phys = <0 &hsusb2_phy>; 216 phys = <0 &hsusb2_phy>;
217}; 217};
218
219&vaux2 {
220 regulator-name = "usb_1v8";
221 regulator-min-microvolt = <1800000>;
222 regulator-max-microvolt = <1800000>;
223 regulator-always-on;
224};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index fa532aaacc68..3ba4a625ea5b 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -61,6 +61,14 @@
61 vcc-supply = <&hsusb2_power>; 61 vcc-supply = <&hsusb2_power>;
62 }; 62 };
63 63
64 sound {
65 compatible = "ti,omap-twl4030";
66 ti,model = "omap3beagle";
67
68 ti,mcbsp = <&mcbsp2>;
69 ti,codec = <&twl_audio>;
70 };
71
64 gpio_keys { 72 gpio_keys {
65 compatible = "gpio-keys"; 73 compatible = "gpio-keys";
66 74
@@ -120,6 +128,12 @@
120 reg = <0x48>; 128 reg = <0x48>;
121 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 129 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
122 interrupt-parent = <&intc>; 130 interrupt-parent = <&intc>;
131
132 twl_audio: audio {
133 compatible = "ti,twl4030-audio";
134 codec {
135 };
136 };
123 }; 137 };
124}; 138};
125 139
@@ -178,3 +192,10 @@
178 mode = <3>; 192 mode = <3>;
179 power = <50>; 193 power = <50>;
180}; 194};
195
196&vaux2 {
197 regulator-name = "vdd_ehci";
198 regulator-min-microvolt = <1800000>;
199 regulator-max-microvolt = <1800000>;
200 regulator-always-on;
201};
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index ba1e58b7b7e3..165aaf7591ba 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -1,5 +1,5 @@
1/* 1/*
2 * Device Tree Source for IGEP Technology devices 2 * Common device tree for IGEP boards based on AM/DM37x
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -10,7 +10,7 @@
10 */ 10 */
11/dts-v1/; 11/dts-v1/;
12 12
13#include "omap34xx.dtsi" 13#include "omap36xx.dtsi"
14 14
15/ { 15/ {
16 memory { 16 memory {
@@ -24,6 +24,25 @@
24 ti,mcbsp = <&mcbsp2>; 24 ti,mcbsp = <&mcbsp2>;
25 ti,codec = <&twl_audio>; 25 ti,codec = <&twl_audio>;
26 }; 26 };
27
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
32 };
33
34 lbee1usjyc_vmmc: lbee1usjyc_vmmc {
35 pinctrl-names = "default";
36 pinctrl-0 = <&lbee1usjyc_pins>;
37 compatible = "regulator-fixed";
38 regulator-name = "regulator-lbee1usjyc";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
41 gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 WIFI_PDN */
42 startup-delay-us = <10000>;
43 enable-active-high;
44 vin-supply = <&vdd33>;
45 };
27}; 46};
28 47
29&omap3_pmx_core { 48&omap3_pmx_core {
@@ -48,6 +67,15 @@
48 >; 67 >;
49 }; 68 };
50 69
70 /* WiFi/BT combo */
71 lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
72 pinctrl-single,pins = <
73 0x136 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 */
74 0x138 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 */
75 0x13a (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 */
76 >;
77 };
78
51 mcbsp2_pins: pinmux_mcbsp2_pins { 79 mcbsp2_pins: pinmux_mcbsp2_pins {
52 pinctrl-single,pins = < 80 pinctrl-single,pins = <
53 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ 81 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
@@ -65,10 +93,17 @@
65 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 93 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
66 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 94 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
67 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 95 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
68 0x120 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */ 96 >;
69 0x122 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */ 97 };
70 0x124 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */ 98
71 0x126 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */ 99 mmc2_pins: pinmux_mmc2_pins {
100 pinctrl-single,pins = <
101 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
102 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
103 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
104 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
105 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
106 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
72 >; 107 >;
73 }; 108 };
74 109
@@ -78,10 +113,33 @@
78 >; 113 >;
79 }; 114 };
80 115
116 i2c1_pins: pinmux_i2c1_pins {
117 pinctrl-single,pins = <
118 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
119 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
120 >;
121 };
122
123 i2c2_pins: pinmux_i2c2_pins {
124 pinctrl-single,pins = <
125 0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
126 0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
127 >;
128 };
129
130 i2c3_pins: pinmux_i2c3_pins {
131 pinctrl-single,pins = <
132 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
133 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
134 >;
135 };
136
81 leds_pins: pinmux_leds_pins { }; 137 leds_pins: pinmux_leds_pins { };
82}; 138};
83 139
84&i2c1 { 140&i2c1 {
141 pinctrl-names = "default";
142 pinctrl-0 = <&i2c1_pins>;
85 clock-frequency = <2600000>; 143 clock-frequency = <2600000>;
86 144
87 twl: twl@48 { 145 twl: twl@48 {
@@ -101,9 +159,16 @@
101#include "twl4030_omap3.dtsi" 159#include "twl4030_omap3.dtsi"
102 160
103&i2c2 { 161&i2c2 {
162 pinctrl-names = "default";
163 pinctrl-0 = <&i2c2_pins>;
104 clock-frequency = <400000>; 164 clock-frequency = <400000>;
105}; 165};
106 166
167&i2c3 {
168 pinctrl-names = "default";
169 pinctrl-0 = <&i2c3_pins>;
170};
171
107&mcbsp2 { 172&mcbsp2 {
108 pinctrl-names = "default"; 173 pinctrl-names = "default";
109 pinctrl-0 = <&mcbsp2_pins>; 174 pinctrl-0 = <&mcbsp2_pins>;
@@ -114,11 +179,15 @@
114 pinctrl-0 = <&mmc1_pins>; 179 pinctrl-0 = <&mmc1_pins>;
115 vmmc-supply = <&vmmc1>; 180 vmmc-supply = <&vmmc1>;
116 vmmc_aux-supply = <&vsim>; 181 vmmc_aux-supply = <&vsim>;
117 bus-width = <8>; 182 bus-width = <4>;
118}; 183};
119 184
120&mmc2 { 185&mmc2 {
121 status = "disabled"; 186 pinctrl-names = "default";
187 pinctrl-0 = <&mmc2_pins>;
188 vmmc-supply = <&lbee1usjyc_vmmc>;
189 bus-width = <4>;
190 non-removable;
122}; 191};
123 192
124&mmc3 { 193&mmc3 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index d5cc79267250..1c7e74d2d2bc 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -1,5 +1,5 @@
1/* 1/*
2 * Device Tree Source for IGEPv2 board 2 * Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -13,7 +13,7 @@
13#include "omap-gpmc-smsc911x.dtsi" 13#include "omap-gpmc-smsc911x.dtsi"
14 14
15/ { 15/ {
16 model = "IGEPv2"; 16 model = "IGEPv2 (TI OMAP AM/DM37x)";
17 compatible = "isee,omap3-igep0020", "ti,omap3"; 17 compatible = "isee,omap3-igep0020", "ti,omap3";
18 18
19 leds { 19 leds {
@@ -67,6 +67,8 @@
67 pinctrl-names = "default"; 67 pinctrl-names = "default";
68 pinctrl-0 = < 68 pinctrl-0 = <
69 &hsusbb1_pins 69 &hsusbb1_pins
70 &tfp410_pins
71 &dss_pins
70 >; 72 >;
71 73
72 hsusbb1_pins: pinmux_hsusbb1_pins { 74 hsusbb1_pins: pinmux_hsusbb1_pins {
@@ -85,6 +87,45 @@
85 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ 87 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
86 >; 88 >;
87 }; 89 };
90
91 tfp410_pins: tfp410_dvi_pins {
92 pinctrl-single,pins = <
93 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
94 >;
95 };
96
97 dss_pins: pinmux_dss_dvi_pins {
98 pinctrl-single,pins = <
99 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
100 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
101 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
102 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
103 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
104 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
105 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
106 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
107 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
108 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
109 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
110 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
111 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
112 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
113 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
114 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
115 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
116 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
117 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
118 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
119 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
120 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
121 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
122 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
123 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
124 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
125 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
126 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
127 >;
128 };
88}; 129};
89 130
90&leds_pins { 131&leds_pins {
@@ -174,3 +215,8 @@
174&usbhsehci { 215&usbhsehci {
175 phys = <&hsusb1_phy>; 216 phys = <&hsusb1_phy>;
176}; 217};
218
219&vpll2 {
220 /* Needed for DSS */
221 regulator-name = "vdds_dsi";
222};
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 525e6d9b0978..02a23f8a3384 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -1,5 +1,5 @@
1/* 1/*
2 * Device Tree Source for IGEP COM Module 2 * Device Tree Source for IGEP COM MODULE (TI OMAP AM/DM37x)
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -12,7 +12,7 @@
12#include "omap3-igep.dtsi" 12#include "omap3-igep.dtsi"
13 13
14/ { 14/ {
15 model = "IGEP COM Module"; 15 model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
16 compatible = "isee,omap3-igep0030", "ti,omap3"; 16 compatible = "isee,omap3-igep0030", "ti,omap3";
17 17
18 leds { 18 leds {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index c4f20bfe4cce..c2c306d13b87 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -125,6 +125,21 @@
125 >; 125 >;
126 }; 126 };
127 127
128 mmc2_pins: pinmux_mmc2_pins {
129 pinctrl-single,pins = <
130 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
131 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
132 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
133 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
134 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
135 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
136 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
137 0x136 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
138 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
139 0x13a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
140 >;
141 };
142
128 display_pins: pinmux_display_pins { 143 display_pins: pinmux_display_pins {
129 pinctrl-single,pins = < 144 pinctrl-single,pins = <
130 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */ 145 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
@@ -358,8 +373,14 @@
358 cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */ 373 cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
359}; 374};
360 375
376/* most boards use vaux3, only some old versions use vmmc2 instead */
361&mmc2 { 377&mmc2 {
362 status = "disabled"; 378 pinctrl-names = "default";
379 pinctrl-0 = <&mmc2_pins>;
380 vmmc-supply = <&vaux3>;
381 vmmc_aux-supply = <&vsim>;
382 bus-width = <8>;
383 non-removable;
363}; 384};
364 385
365&mmc3 { 386&mmc3 {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index f3a0c26ed0c2..daabf99d402a 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -82,6 +82,13 @@
82 ranges; 82 ranges;
83 ti,hwmods = "l3_main"; 83 ti,hwmods = "l3_main";
84 84
85 aes: aes@480c5000 {
86 compatible = "ti,omap3-aes";
87 ti,hwmods = "aes";
88 reg = <0x480c5000 0x50>;
89 interrupts = <0>;
90 };
91
85 counter32k: counter@48320000 { 92 counter32k: counter@48320000 {
86 compatible = "ti,omap-counter32k"; 93 compatible = "ti,omap-counter32k";
87 reg = <0x48320000 0x20>; 94 reg = <0x48320000 0x20>;
@@ -260,6 +267,13 @@
260 ti,hwmods = "i2c3"; 267 ti,hwmods = "i2c3";
261 }; 268 };
262 269
270 mailbox: mailbox@48094000 {
271 compatible = "ti,omap3-mailbox";
272 ti,hwmods = "mailbox";
273 reg = <0x48094000 0x200>;
274 interrupts = <26>;
275 };
276
263 mcspi1: spi@48098000 { 277 mcspi1: spi@48098000 {
264 compatible = "ti,omap2-mcspi"; 278 compatible = "ti,omap2-mcspi";
265 reg = <0x48098000 0x100>; 279 reg = <0x48098000 0x100>;
@@ -357,6 +371,13 @@
357 dma-names = "tx", "rx"; 371 dma-names = "tx", "rx";
358 }; 372 };
359 373
374 mmu_isp: mmu@480bd400 {
375 compatible = "ti,omap3-mmu-isp";
376 ti,hwmods = "mmu_isp";
377 reg = <0x480bd400 0x80>;
378 interrupts = <8>;
379 };
380
360 wdt2: wdt@48314000 { 381 wdt2: wdt@48314000 {
361 compatible = "ti,omap3-wdt"; 382 compatible = "ti,omap3-wdt";
362 reg = <0x48314000 0x80>; 383 reg = <0x48314000 0x80>;
@@ -442,6 +463,27 @@
442 dma-names = "tx", "rx"; 463 dma-names = "tx", "rx";
443 }; 464 };
444 465
466 sham: sham@480c3000 {
467 compatible = "ti,omap3-sham";
468 ti,hwmods = "sham";
469 reg = <0x480c3000 0x64>;
470 interrupts = <49>;
471 };
472
473 smartreflex_core: smartreflex@480cb000 {
474 compatible = "ti,omap3-smartreflex-core";
475 ti,hwmods = "smartreflex_core";
476 reg = <0x480cb000 0x400>;
477 interrupts = <19>;
478 };
479
480 smartreflex_mpu_iva: smartreflex@480c9000 {
481 compatible = "ti,omap3-smartreflex-iva";
482 ti,hwmods = "smartreflex_mpu_iva";
483 reg = <0x480c9000 0x400>;
484 interrupts = <18>;
485 };
486
445 timer1: timer@48318000 { 487 timer1: timer@48318000 {
446 compatible = "ti,omap3430-timer"; 488 compatible = "ti,omap3430-timer";
447 reg = <0x48318000 0x400>; 489 reg = <0x48318000 0x400>;
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 298e85020e1b..88c6a05cab41 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -246,15 +246,6 @@
246 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ 246 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
247 >; 247 >;
248 }; 248 };
249};
250
251&omap4_pmx_wkup {
252 led_wkgpio_pins: pinmux_leds_wkpins {
253 pinctrl-single,pins = <
254 0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
255 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
256 >;
257 };
258 249
259 /* 250 /*
260 * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP 251 * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
@@ -274,7 +265,7 @@
274 pinctrl-single,pins = < 265 pinctrl-single,pins = <
275 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */ 266 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
276 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ 267 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
277 0x108 (PIN_OUTPUT | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */ 268 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
278 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */ 269 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
279 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */ 270 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
280 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */ 271 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
@@ -284,6 +275,15 @@
284 }; 275 };
285}; 276};
286 277
278&omap4_pmx_wkup {
279 led_wkgpio_pins: pinmux_leds_wkpins {
280 pinctrl-single,pins = <
281 0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
282 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
283 >;
284 };
285};
286
287&i2c1 { 287&i2c1 {
288 pinctrl-names = "default"; 288 pinctrl-names = "default";
289 pinctrl-0 = <&i2c1_pins>; 289 pinctrl-0 = <&i2c1_pins>;
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 5fc3f43c5a81..dbc81fb6ef03 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -300,12 +300,12 @@
300 wl12xx_pins: pinmux_wl12xx_pins { 300 wl12xx_pins: pinmux_wl12xx_pins {
301 pinctrl-single,pins = < 301 pinctrl-single,pins = <
302 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ 302 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
303 0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */ 303 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
304 0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */ 304 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
305 0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */ 305 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
306 0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */ 306 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
307 0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */ 307 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
308 0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */ 308 0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
309 >; 309 >;
310 }; 310 };
311}; 311};
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 6d09b8d42fdd..f936476c2753 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -245,14 +245,14 @@
245 245
246 mpu_periph_clk: mpu_periph_clk { 246 mpu_periph_clk: mpu_periph_clk {
247 #clock-cells = <0>; 247 #clock-cells = <0>;
248 compatible = "altr,socfpga-gate-clk"; 248 compatible = "altr,socfpga-perip-clk";
249 clocks = <&mpuclk>; 249 clocks = <&mpuclk>;
250 fixed-divider = <4>; 250 fixed-divider = <4>;
251 }; 251 };
252 252
253 mpu_l2_ram_clk: mpu_l2_ram_clk { 253 mpu_l2_ram_clk: mpu_l2_ram_clk {
254 #clock-cells = <0>; 254 #clock-cells = <0>;
255 compatible = "altr,socfpga-gate-clk"; 255 compatible = "altr,socfpga-perip-clk";
256 clocks = <&mpuclk>; 256 clocks = <&mpuclk>;
257 fixed-divider = <2>; 257 fixed-divider = <2>;
258 }; 258 };
@@ -266,8 +266,9 @@
266 266
267 l3_main_clk: l3_main_clk { 267 l3_main_clk: l3_main_clk {
268 #clock-cells = <0>; 268 #clock-cells = <0>;
269 compatible = "altr,socfpga-gate-clk"; 269 compatible = "altr,socfpga-perip-clk";
270 clocks = <&mainclk>; 270 clocks = <&mainclk>;
271 fixed-divider = <1>;
271 }; 272 };
272 273
273 l3_mp_clk: l3_mp_clk { 274 l3_mp_clk: l3_mp_clk {
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 4a5903e04827..c1df4e9db140 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -69,6 +69,7 @@ CONFIG_KS8851=y
69CONFIG_SMSC911X=y 69CONFIG_SMSC911X=y
70CONFIG_STMMAC_ETH=y 70CONFIG_STMMAC_ETH=y
71CONFIG_MDIO_SUN4I=y 71CONFIG_MDIO_SUN4I=y
72CONFIG_TI_CPSW=y
72CONFIG_KEYBOARD_SPEAR=y 73CONFIG_KEYBOARD_SPEAR=y
73CONFIG_SERIO_AMBAKMI=y 74CONFIG_SERIO_AMBAKMI=y
74CONFIG_SERIAL_8250=y 75CONFIG_SERIAL_8250=y
@@ -133,12 +134,14 @@ CONFIG_USB_GPIO_VBUS=y
133CONFIG_USB_ISP1301=y 134CONFIG_USB_ISP1301=y
134CONFIG_USB_MXS_PHY=y 135CONFIG_USB_MXS_PHY=y
135CONFIG_MMC=y 136CONFIG_MMC=y
137CONFIG_MMC_BLOCK_MINORS=16
136CONFIG_MMC_ARMMMCI=y 138CONFIG_MMC_ARMMMCI=y
137CONFIG_MMC_SDHCI=y 139CONFIG_MMC_SDHCI=y
138CONFIG_MMC_SDHCI_PLTFM=y 140CONFIG_MMC_SDHCI_PLTFM=y
139CONFIG_MMC_SDHCI_ESDHC_IMX=y 141CONFIG_MMC_SDHCI_ESDHC_IMX=y
140CONFIG_MMC_SDHCI_TEGRA=y 142CONFIG_MMC_SDHCI_TEGRA=y
141CONFIG_MMC_SDHCI_SPEAR=y 143CONFIG_MMC_SDHCI_SPEAR=y
144CONFIG_MMC_SDHCI_BCM_KONA=y
142CONFIG_MMC_OMAP=y 145CONFIG_MMC_OMAP=y
143CONFIG_MMC_OMAP_HS=y 146CONFIG_MMC_OMAP_HS=y
144CONFIG_EDAC=y 147CONFIG_EDAC=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 98a50c309b90..bfa80a11e8c7 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -173,6 +173,7 @@ CONFIG_MFD_PALMAS=y
173CONFIG_MFD_TPS65217=y 173CONFIG_MFD_TPS65217=y
174CONFIG_MFD_TPS65910=y 174CONFIG_MFD_TPS65910=y
175CONFIG_TWL6040_CORE=y 175CONFIG_TWL6040_CORE=y
176CONFIG_REGULATOR_FIXED_VOLTAGE=y
176CONFIG_REGULATOR_PALMAS=y 177CONFIG_REGULATOR_PALMAS=y
177CONFIG_REGULATOR_TPS65023=y 178CONFIG_REGULATOR_TPS65023=y
178CONFIG_REGULATOR_TPS6507X=y 179CONFIG_REGULATOR_TPS6507X=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index d57a85badb5e..3e2259b60236 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -12,6 +12,9 @@ CONFIG_NET=y
12CONFIG_PACKET=y 12CONFIG_PACKET=y
13CONFIG_UNIX=y 13CONFIG_UNIX=y
14CONFIG_INET=y 14CONFIG_INET=y
15CONFIG_IP_PNP=y
16CONFIG_IP_PNP_DHCP=y
17CONFIG_IP_PNP_BOOTP=y
15# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 18# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
16# CONFIG_INET_XFRM_MODE_TUNNEL is not set 19# CONFIG_INET_XFRM_MODE_TUNNEL is not set
17# CONFIG_INET_XFRM_MODE_BEET is not set 20# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -58,4 +61,8 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
58CONFIG_LEDS_TRIGGER_DEFAULT_ON=y 61CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
59CONFIG_COMMON_CLK_DEBUG=y 62CONFIG_COMMON_CLK_DEBUG=y
60# CONFIG_IOMMU_SUPPORT is not set 63# CONFIG_IOMMU_SUPPORT is not set
64CONFIG_TMPFS=y
65CONFIG_NFS_FS=y
66CONFIG_ROOT_NFS=y
61CONFIG_NLS=y 67CONFIG_NLS=y
68CONFIG_PRINTK_TIME=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index ac632cc38f24..c6ebc184bf68 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
22CONFIG_CPU_FREQ=y 22CONFIG_CPU_FREQ=y
23CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y 23CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
24CONFIG_CPU_IDLE=y 24CONFIG_CPU_IDLE=y
25CONFIG_ARM_U8500_CPUIDLE=y
25CONFIG_VFP=y 26CONFIG_VFP=y
26CONFIG_NEON=y 27CONFIG_NEON=y
27CONFIG_PM_RUNTIME=y 28CONFIG_PM_RUNTIME=y
@@ -109,6 +110,8 @@ CONFIG_EXT2_FS_SECURITY=y
109CONFIG_EXT3_FS=y 110CONFIG_EXT3_FS=y
110CONFIG_EXT4_FS=y 111CONFIG_EXT4_FS=y
111CONFIG_VFAT_FS=y 112CONFIG_VFAT_FS=y
113CONFIG_DEVTMPFS=y
114CONFIG_DEVTMPFS_MOUNT=y
112CONFIG_TMPFS=y 115CONFIG_TMPFS=y
113CONFIG_TMPFS_POSIX_ACL=y 116CONFIG_TMPFS_POSIX_ACL=y
114# CONFIG_MISC_FILESYSTEMS is not set 117# CONFIG_MISC_FILESYSTEMS is not set
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index be956dbf6bae..1571d126e9dd 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -61,7 +61,7 @@ extern void __pgd_error(const char *file, int line, pgd_t);
61 * mapping to be mapped at. This is particularly important for 61 * mapping to be mapped at. This is particularly important for
62 * non-high vector CPUs. 62 * non-high vector CPUs.
63 */ 63 */
64#define FIRST_USER_ADDRESS PAGE_SIZE 64#define FIRST_USER_ADDRESS (PAGE_SIZE * 2)
65 65
66/* 66/*
67 * Use TASK_SIZE as the ceiling argument for free_pgtables() and 67 * Use TASK_SIZE as the ceiling argument for free_pgtables() and
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 57221e349a7c..f0d180d8b29f 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -14,11 +14,12 @@
14#include <asm/pgalloc.h> 14#include <asm/pgalloc.h>
15#include <asm/mmu_context.h> 15#include <asm/mmu_context.h>
16#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
17#include <asm/fncpy.h>
17#include <asm/mach-types.h> 18#include <asm/mach-types.h>
18#include <asm/smp_plat.h> 19#include <asm/smp_plat.h>
19#include <asm/system_misc.h> 20#include <asm/system_misc.h>
20 21
21extern const unsigned char relocate_new_kernel[]; 22extern void relocate_new_kernel(void);
22extern const unsigned int relocate_new_kernel_size; 23extern const unsigned int relocate_new_kernel_size;
23 24
24extern unsigned long kexec_start_address; 25extern unsigned long kexec_start_address;
@@ -142,6 +143,8 @@ void machine_kexec(struct kimage *image)
142{ 143{
143 unsigned long page_list; 144 unsigned long page_list;
144 unsigned long reboot_code_buffer_phys; 145 unsigned long reboot_code_buffer_phys;
146 unsigned long reboot_entry = (unsigned long)relocate_new_kernel;
147 unsigned long reboot_entry_phys;
145 void *reboot_code_buffer; 148 void *reboot_code_buffer;
146 149
147 /* 150 /*
@@ -168,16 +171,16 @@ void machine_kexec(struct kimage *image)
168 171
169 172
170 /* copy our kernel relocation code to the control code page */ 173 /* copy our kernel relocation code to the control code page */
171 memcpy(reboot_code_buffer, 174 reboot_entry = fncpy(reboot_code_buffer,
172 relocate_new_kernel, relocate_new_kernel_size); 175 reboot_entry,
176 relocate_new_kernel_size);
177 reboot_entry_phys = (unsigned long)reboot_entry +
178 (reboot_code_buffer_phys - (unsigned long)reboot_code_buffer);
173 179
174
175 flush_icache_range((unsigned long) reboot_code_buffer,
176 (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
177 printk(KERN_INFO "Bye!\n"); 180 printk(KERN_INFO "Bye!\n");
178 181
179 if (kexec_reinit) 182 if (kexec_reinit)
180 kexec_reinit(); 183 kexec_reinit();
181 184
182 soft_restart(reboot_code_buffer_phys); 185 soft_restart(reboot_entry_phys);
183} 186}
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index d0cdedf4864d..95858966d84e 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -2,10 +2,12 @@
2 * relocate_kernel.S - put the kernel image in place to boot 2 * relocate_kernel.S - put the kernel image in place to boot
3 */ 3 */
4 4
5#include <linux/linkage.h>
5#include <asm/kexec.h> 6#include <asm/kexec.h>
6 7
7 .globl relocate_new_kernel 8 .align 3 /* not needed for this code, but keeps fncpy() happy */
8relocate_new_kernel: 9
10ENTRY(relocate_new_kernel)
9 11
10 ldr r0,kexec_indirection_page 12 ldr r0,kexec_indirection_page
11 ldr r1,kexec_start_address 13 ldr r1,kexec_start_address
@@ -79,6 +81,8 @@ kexec_mach_type:
79kexec_boot_atags: 81kexec_boot_atags:
80 .long 0x0 82 .long 0x0
81 83
84ENDPROC(relocate_new_kernel)
85
82relocate_new_kernel_end: 86relocate_new_kernel_end:
83 87
84 .globl relocate_new_kernel_size 88 .globl relocate_new_kernel_size
diff --git a/arch/arm/kernel/sigreturn_codes.S b/arch/arm/kernel/sigreturn_codes.S
index 3c5d0f2170fd..b84d0cb13682 100644
--- a/arch/arm/kernel/sigreturn_codes.S
+++ b/arch/arm/kernel/sigreturn_codes.S
@@ -30,6 +30,27 @@
30 * snippets. 30 * snippets.
31 */ 31 */
32 32
33/*
34 * In CPU_THUMBONLY case kernel arm opcodes are not allowed.
35 * Note in this case codes skips those instructions but it uses .org
36 * directive to keep correct layout of sigreturn_codes array.
37 */
38#ifndef CONFIG_CPU_THUMBONLY
39#define ARM_OK(code...) code
40#else
41#define ARM_OK(code...)
42#endif
43
44 .macro arm_slot n
45 .org sigreturn_codes + 12 * (\n)
46ARM_OK( .arm )
47 .endm
48
49 .macro thumb_slot n
50 .org sigreturn_codes + 12 * (\n) + 8
51 .thumb
52 .endm
53
33#if __LINUX_ARM_ARCH__ <= 4 54#if __LINUX_ARM_ARCH__ <= 4
34 /* 55 /*
35 * Note we manually set minimally required arch that supports 56 * Note we manually set minimally required arch that supports
@@ -45,26 +66,27 @@
45 .global sigreturn_codes 66 .global sigreturn_codes
46 .type sigreturn_codes, #object 67 .type sigreturn_codes, #object
47 68
48 .arm 69 .align
49 70
50sigreturn_codes: 71sigreturn_codes:
51 72
52 /* ARM sigreturn syscall code snippet */ 73 /* ARM sigreturn syscall code snippet */
53 mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) 74 arm_slot 0
54 swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) 75ARM_OK( mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) )
76ARM_OK( swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
55 77
56 /* Thumb sigreturn syscall code snippet */ 78 /* Thumb sigreturn syscall code snippet */
57 .thumb 79 thumb_slot 0
58 movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) 80 movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
59 swi #0 81 swi #0
60 82
61 /* ARM sigreturn_rt syscall code snippet */ 83 /* ARM sigreturn_rt syscall code snippet */
62 .arm 84 arm_slot 1
63 mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) 85ARM_OK( mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) )
64 swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) 86ARM_OK( swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
65 87
66 /* Thumb sigreturn_rt syscall code snippet */ 88 /* Thumb sigreturn_rt syscall code snippet */
67 .thumb 89 thumb_slot 1
68 movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) 90 movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
69 swi #0 91 swi #0
70 92
@@ -74,7 +96,7 @@ sigreturn_codes:
74 * it is thumb case or not, so we need additional 96 * it is thumb case or not, so we need additional
75 * word after real last entry. 97 * word after real last entry.
76 */ 98 */
77 .arm 99 arm_slot 2
78 .space 4 100 .space 4
79 101
80 .size sigreturn_codes, . - sigreturn_codes 102 .size sigreturn_codes, . - sigreturn_codes
diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
index 36b668d8e121..bc1033b897b4 100644
--- a/arch/arm/lib/delay-loop.S
+++ b/arch/arm/lib/delay-loop.S
@@ -40,6 +40,7 @@ ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06
40/* 40/*
41 * loops = r0 * HZ * loops_per_jiffy / 1000000 41 * loops = r0 * HZ * loops_per_jiffy / 1000000
42 */ 42 */
43 .align 3
43 44
44@ Delay routine 45@ Delay routine
45ENTRY(__loop_delay) 46ENTRY(__loop_delay)
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index f607deb40f4d..bc7b363a3083 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
174static struct clock_event_device clkevt = { 174static struct clock_event_device clkevt = {
175 .name = "at91_tick", 175 .name = "at91_tick",
176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
177 .shift = 32,
178 .rating = 150, 177 .rating = 150,
179 .set_next_event = clkevt32k_next_event, 178 .set_next_event = clkevt32k_next_event,
180 .set_mode = clkevt32k_mode, 179 .set_mode = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
265 at91_st_write(AT91_ST_RTMR, 1); 264 at91_st_write(AT91_ST_RTMR, 1);
266 265
267 /* Setup timer clockevent, with minimum of two ticks (important!!) */ 266 /* Setup timer clockevent, with minimum of two ticks (important!!) */
268 clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
269 clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
270 clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
271 clkevt.cpumask = cpumask_of(0); 267 clkevt.cpumask = cpumask_of(0);
272 clockevents_register_device(&clkevt); 268 clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
269 2, AT91_ST_ALMV);
273 270
274 /* register clocksource */ 271 /* register clocksource */
275 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); 272 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 3ed190ce062b..c5101dcb4fb0 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -16,7 +16,11 @@
16#include <mach/at91_ramc.h> 16#include <mach/at91_ramc.h>
17#include <mach/at91rm9200_sdramc.h> 17#include <mach/at91rm9200_sdramc.h>
18 18
19#ifdef CONFIG_PM
19extern void at91_pm_set_standby(void (*at91_standby)(void)); 20extern void at91_pm_set_standby(void (*at91_standby)(void));
21#else
22static inline void at91_pm_set_standby(void (*at91_standby)(void)) { }
23#endif
20 24
21/* 25/*
22 * The AT91RM9200 goes into self-refresh mode with this command, and will 26 * The AT91RM9200 goes into self-refresh mode with this command, and will
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 3ea86428ee09..a28873fe3049 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -95,19 +95,19 @@ static struct clk twi0_clk = {
95 .name = "twi0_clk", 95 .name = "twi0_clk",
96 .pid = SAMA5D3_ID_TWI0, 96 .pid = SAMA5D3_ID_TWI0,
97 .type = CLK_TYPE_PERIPHERAL, 97 .type = CLK_TYPE_PERIPHERAL,
98 .div = AT91_PMC_PCR_DIV2, 98 .div = AT91_PMC_PCR_DIV8,
99}; 99};
100static struct clk twi1_clk = { 100static struct clk twi1_clk = {
101 .name = "twi1_clk", 101 .name = "twi1_clk",
102 .pid = SAMA5D3_ID_TWI1, 102 .pid = SAMA5D3_ID_TWI1,
103 .type = CLK_TYPE_PERIPHERAL, 103 .type = CLK_TYPE_PERIPHERAL,
104 .div = AT91_PMC_PCR_DIV2, 104 .div = AT91_PMC_PCR_DIV8,
105}; 105};
106static struct clk twi2_clk = { 106static struct clk twi2_clk = {
107 .name = "twi2_clk", 107 .name = "twi2_clk",
108 .pid = SAMA5D3_ID_TWI2, 108 .pid = SAMA5D3_ID_TWI2,
109 .type = CLK_TYPE_PERIPHERAL, 109 .type = CLK_TYPE_PERIPHERAL,
110 .div = AT91_PMC_PCR_DIV2, 110 .div = AT91_PMC_PCR_DIV8,
111}; 111};
112static struct clk mmc0_clk = { 112static struct clk mmc0_clk = {
113 .name = "mci0_clk", 113 .name = "mci0_clk",
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 2739ca2c1334..e0091685fd48 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <video/vga.h>
18 19
19#include <asm/pgtable.h> 20#include <asm/pgtable.h>
20#include <asm/page.h> 21#include <asm/page.h>
@@ -196,6 +197,8 @@ void __init footbridge_map_io(void)
196 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); 197 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
197 pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO)); 198 pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO));
198 } 199 }
200
201 vga_base = PCIMEM_BASE;
199} 202}
200 203
201void footbridge_restart(enum reboot_mode mode, const char *cmd) 204void footbridge_restart(enum reboot_mode mode, const char *cmd)
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 3490a24f969e..7c2fdae9a38b 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -18,7 +18,6 @@
18#include <linux/irq.h> 18#include <linux/irq.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <video/vga.h>
22 21
23#include <asm/irq.h> 22#include <asm/irq.h>
24#include <asm/mach/pci.h> 23#include <asm/mach/pci.h>
@@ -291,7 +290,6 @@ void __init dc21285_preinit(void)
291 int cfn_mode; 290 int cfn_mode;
292 291
293 pcibios_min_mem = 0x81000000; 292 pcibios_min_mem = 0x81000000;
294 vga_base = PCIMEM_BASE;
295 293
296 mem_size = (unsigned int)high_memory - PAGE_OFFSET; 294 mem_size = (unsigned int)high_memory - PAGE_OFFSET;
297 for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1) 295 for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b08243500e2e..1a7235fb52ac 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -30,21 +30,24 @@ static const struct {
30 const char *name; 30 const char *name;
31 const char *trigger; 31 const char *trigger;
32} ebsa285_leds[] = { 32} ebsa285_leds[] = {
33 { "ebsa285:amber", "heartbeat", }, 33 { "ebsa285:amber", "cpu0", },
34 { "ebsa285:green", "cpu0", }, 34 { "ebsa285:green", "heartbeat", },
35 { "ebsa285:red",}, 35 { "ebsa285:red",},
36}; 36};
37 37
38static unsigned char hw_led_state;
39
38static void ebsa285_led_set(struct led_classdev *cdev, 40static void ebsa285_led_set(struct led_classdev *cdev,
39 enum led_brightness b) 41 enum led_brightness b)
40{ 42{
41 struct ebsa285_led *led = container_of(cdev, 43 struct ebsa285_led *led = container_of(cdev,
42 struct ebsa285_led, cdev); 44 struct ebsa285_led, cdev);
43 45
44 if (b != LED_OFF) 46 if (b == LED_OFF)
45 *XBUS_LEDS |= led->mask; 47 hw_led_state |= led->mask;
46 else 48 else
47 *XBUS_LEDS &= ~led->mask; 49 hw_led_state &= ~led->mask;
50 *XBUS_LEDS = hw_led_state;
48} 51}
49 52
50static enum led_brightness ebsa285_led_get(struct led_classdev *cdev) 53static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
@@ -52,18 +55,19 @@ static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
52 struct ebsa285_led *led = container_of(cdev, 55 struct ebsa285_led *led = container_of(cdev,
53 struct ebsa285_led, cdev); 56 struct ebsa285_led, cdev);
54 57
55 return (*XBUS_LEDS & led->mask) ? LED_FULL : LED_OFF; 58 return hw_led_state & led->mask ? LED_OFF : LED_FULL;
56} 59}
57 60
58static int __init ebsa285_leds_init(void) 61static int __init ebsa285_leds_init(void)
59{ 62{
60 int i; 63 int i;
61 64
62 if (machine_is_ebsa285()) 65 if (!machine_is_ebsa285())
63 return -ENODEV; 66 return -ENODEV;
64 67
65 /* 3 LEDS All ON */ 68 /* 3 LEDS all off */
66 *XBUS_LEDS |= XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED; 69 hw_led_state = XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
70 *XBUS_LEDS = hw_led_state;
67 71
68 for (i = 0; i < ARRAY_SIZE(ebsa285_leds); i++) { 72 for (i = 0; i < ARRAY_SIZE(ebsa285_leds); i++) {
69 struct ebsa285_led *led; 73 struct ebsa285_led *led;
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index 365bfd3d9c68..dadccc91488c 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -223,7 +223,7 @@ void __init omap_4430sdp_display_init_of(void)
223static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = { 223static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = {
224 .name = "dvi", 224 .name = "dvi",
225 .source = "tfp410.0", 225 .source = "tfp410.0",
226 .i2c_bus_num = 3, 226 .i2c_bus_num = 2,
227}; 227};
228 228
229static struct platform_device omap3_igep2_dvi_connector_device = { 229static struct platform_device omap3_igep2_dvi_connector_device = {
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 10c71450cf63..39f020c982e8 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -139,6 +139,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
139 139
140static struct pdata_init pdata_quirks[] __initdata = { 140static struct pdata_init pdata_quirks[] __initdata = {
141#ifdef CONFIG_ARCH_OMAP3 141#ifdef CONFIG_ARCH_OMAP3
142 { "nokia,omap3-n900", hsmmc2_internal_input_clk, },
142 { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, 143 { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
143 { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, 144 { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
144 { "isee,omap3-igep0020", omap3_igep0020_legacy_init, }, 145 { "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index e233dfcbc186..93a2a6e4260f 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -128,7 +128,8 @@ skip_voltdm:
128 for (i = 0; i < pwrdm->banks; i++) 128 for (i = 0; i < pwrdm->banks; i++)
129 pwrdm->ret_mem_off_counter[i] = 0; 129 pwrdm->ret_mem_off_counter[i] = 0;
130 130
131 arch_pwrdm->pwrdm_wait_transition(pwrdm); 131 if (arch_pwrdm && arch_pwrdm->pwrdm_wait_transition)
132 arch_pwrdm->pwrdm_wait_transition(pwrdm);
132 pwrdm->state = pwrdm_read_pwrst(pwrdm); 133 pwrdm->state = pwrdm_read_pwrst(pwrdm);
133 pwrdm->state_counter[pwrdm->state] = 1; 134 pwrdm->state_counter[pwrdm->state] = 1;
134 135
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 037100a1563a..aee77f06f887 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -10,6 +10,7 @@ config ARCH_SOCFPGA
10 select GENERIC_CLOCKEVENTS 10 select GENERIC_CLOCKEVENTS
11 select GPIO_PL061 if GPIOLIB 11 select GPIO_PL061 if GPIOLIB
12 select HAVE_ARM_SCU 12 select HAVE_ARM_SCU
13 select HAVE_ARM_TWD if SMP
13 select HAVE_SMP 14 select HAVE_SMP
14 select MFD_SYSCON 15 select MFD_SYSCON
15 select SPARSE_IRQ 16 select SPARSE_IRQ
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 2e85c1e72535..12c7e5c03ea4 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -140,6 +140,10 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
140 /* Requires call-back bindings. */ 140 /* Requires call-back bindings. */
141 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 141 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
142 /* Requires DMA bindings. */ 142 /* Requires DMA bindings. */
143 OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
144 OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
145 OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data),
146 OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data),
143 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, 147 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
144 "ux500-msp-i2s.0", &msp0_platform_data), 148 "ux500-msp-i2s.0", &msp0_platform_data),
145 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, 149 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 79f8b39801a8..f6b6bfa88ecf 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -9,6 +9,7 @@
9 * 9 *
10 * DMA uncached mapping support. 10 * DMA uncached mapping support.
11 */ 11 */
12#include <linux/bootmem.h>
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/mm.h> 14#include <linux/mm.h>
14#include <linux/gfp.h> 15#include <linux/gfp.h>
@@ -162,6 +163,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
162 u64 mask = (u64)DMA_BIT_MASK(32); 163 u64 mask = (u64)DMA_BIT_MASK(32);
163 164
164 if (dev) { 165 if (dev) {
166 unsigned long max_dma_pfn;
167
165 mask = dev->coherent_dma_mask; 168 mask = dev->coherent_dma_mask;
166 169
167 /* 170 /*
@@ -173,6 +176,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
173 return 0; 176 return 0;
174 } 177 }
175 178
179 max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
180
176 /* 181 /*
177 * If the mask allows for more memory than we can address, 182 * If the mask allows for more memory than we can address,
178 * and we actually have that much memory, then fail the 183 * and we actually have that much memory, then fail the
@@ -180,7 +185,7 @@ static u64 get_coherent_dma_mask(struct device *dev)
180 */ 185 */
181 if (sizeof(mask) != sizeof(dma_addr_t) && 186 if (sizeof(mask) != sizeof(dma_addr_t) &&
182 mask > (dma_addr_t)~0 && 187 mask > (dma_addr_t)~0 &&
183 dma_to_pfn(dev, ~0) > arm_dma_pfn_limit) { 188 dma_to_pfn(dev, ~0) > max_dma_pfn) {
184 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n", 189 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
185 mask); 190 mask);
186 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n"); 191 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
@@ -192,7 +197,7 @@ static u64 get_coherent_dma_mask(struct device *dev)
192 * fits within the allowable addresses which we can 197 * fits within the allowable addresses which we can
193 * allocate. 198 * allocate.
194 */ 199 */
195 if (dma_to_pfn(dev, mask) < arm_dma_pfn_limit) { 200 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
196 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n", 201 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
197 mask, 202 mask,
198 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1, 203 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index d27158c38eb0..5e85ed371364 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -146,7 +146,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
146 146
147 info.flags = VM_UNMAPPED_AREA_TOPDOWN; 147 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
148 info.length = len; 148 info.length = len;
149 info.low_limit = PAGE_SIZE; 149 info.low_limit = FIRST_USER_ADDRESS;
150 info.high_limit = mm->mmap_base; 150 info.high_limit = mm->mmap_base;
151 info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0; 151 info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
152 info.align_offset = pgoff << PAGE_SHIFT; 152 info.align_offset = pgoff << PAGE_SHIFT;
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 0acb089d0f70..1046b373d1ae 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -87,7 +87,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
87 init_pud = pud_offset(init_pgd, 0); 87 init_pud = pud_offset(init_pgd, 0);
88 init_pmd = pmd_offset(init_pud, 0); 88 init_pmd = pmd_offset(init_pud, 0);
89 init_pte = pte_offset_map(init_pmd, 0); 89 init_pte = pte_offset_map(init_pmd, 0);
90 set_pte_ext(new_pte, *init_pte, 0); 90 set_pte_ext(new_pte + 0, init_pte[0], 0);
91 set_pte_ext(new_pte + 1, init_pte[1], 0);
91 pte_unmap(init_pte); 92 pte_unmap(init_pte);
92 pte_unmap(new_pte); 93 pte_unmap(new_pte);
93 } 94 }
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index fb92abb91628..2861b155485a 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -336,8 +336,11 @@ static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
336 if (timer->posted) 336 if (timer->posted)
337 return; 337 return;
338 338
339 if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) 339 if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) {
340 timer->posted = OMAP_TIMER_NONPOSTED;
341 __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0, 0);
340 return; 342 return;
343 }
341 344
342 __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 345 __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
343 OMAP_TIMER_CTRL_POSTED, 0); 346 OMAP_TIMER_CTRL_POSTED, 0);
diff --git a/arch/arm/xen/p2m.c b/arch/arm/xen/p2m.c
index 23732cdff551..b31ee1b275b0 100644
--- a/arch/arm/xen/p2m.c
+++ b/arch/arm/xen/p2m.c
@@ -25,8 +25,9 @@ struct xen_p2m_entry {
25 struct rb_node rbnode_phys; 25 struct rb_node rbnode_phys;
26}; 26};
27 27
28rwlock_t p2m_lock; 28static rwlock_t p2m_lock;
29struct rb_root phys_to_mach = RB_ROOT; 29struct rb_root phys_to_mach = RB_ROOT;
30EXPORT_SYMBOL_GPL(phys_to_mach);
30static struct rb_root mach_to_phys = RB_ROOT; 31static struct rb_root mach_to_phys = RB_ROOT;
31 32
32static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new) 33static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new)
@@ -200,7 +201,7 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
200} 201}
201EXPORT_SYMBOL_GPL(__set_phys_to_machine); 202EXPORT_SYMBOL_GPL(__set_phys_to_machine);
202 203
203int p2m_init(void) 204static int p2m_init(void)
204{ 205{
205 rwlock_init(&p2m_lock); 206 rwlock_init(&p2m_lock);
206 return 0; 207 return 0;
diff --git a/arch/parisc/configs/c3000_defconfig b/arch/parisc/configs/c3000_defconfig
index ec1b014952b6..acacd348df89 100644
--- a/arch/parisc/configs/c3000_defconfig
+++ b/arch/parisc/configs/c3000_defconfig
@@ -50,7 +50,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
50CONFIG_IDE=y 50CONFIG_IDE=y
51CONFIG_BLK_DEV_IDECD=y 51CONFIG_BLK_DEV_IDECD=y
52CONFIG_BLK_DEV_NS87415=y 52CONFIG_BLK_DEV_NS87415=y
53CONFIG_BLK_DEV_SIIMAGE=m 53CONFIG_PATA_SIL680=m
54CONFIG_SCSI=y 54CONFIG_SCSI=y
55CONFIG_BLK_DEV_SD=y 55CONFIG_BLK_DEV_SD=y
56CONFIG_CHR_DEV_ST=y 56CONFIG_CHR_DEV_ST=y
diff --git a/arch/parisc/configs/c8000_defconfig b/arch/parisc/configs/c8000_defconfig
index e1c8d2015c89..8249ac9d9cfc 100644
--- a/arch/parisc/configs/c8000_defconfig
+++ b/arch/parisc/configs/c8000_defconfig
@@ -20,7 +20,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
20CONFIG_MODVERSIONS=y 20CONFIG_MODVERSIONS=y
21CONFIG_BLK_DEV_INTEGRITY=y 21CONFIG_BLK_DEV_INTEGRITY=y
22CONFIG_PA8X00=y 22CONFIG_PA8X00=y
23CONFIG_MLONGCALLS=y
24CONFIG_64BIT=y 23CONFIG_64BIT=y
25CONFIG_SMP=y 24CONFIG_SMP=y
26CONFIG_PREEMPT=y 25CONFIG_PREEMPT=y
@@ -81,8 +80,6 @@ CONFIG_IDE=y
81CONFIG_BLK_DEV_IDECD=y 80CONFIG_BLK_DEV_IDECD=y
82CONFIG_BLK_DEV_PLATFORM=y 81CONFIG_BLK_DEV_PLATFORM=y
83CONFIG_BLK_DEV_GENERIC=y 82CONFIG_BLK_DEV_GENERIC=y
84CONFIG_BLK_DEV_SIIMAGE=y
85CONFIG_SCSI=y
86CONFIG_BLK_DEV_SD=y 83CONFIG_BLK_DEV_SD=y
87CONFIG_CHR_DEV_ST=m 84CONFIG_CHR_DEV_ST=m
88CONFIG_BLK_DEV_SR=m 85CONFIG_BLK_DEV_SR=m
@@ -94,6 +91,8 @@ CONFIG_SCSI_FC_ATTRS=y
94CONFIG_SCSI_SAS_LIBSAS=m 91CONFIG_SCSI_SAS_LIBSAS=m
95CONFIG_ISCSI_TCP=m 92CONFIG_ISCSI_TCP=m
96CONFIG_ISCSI_BOOT_SYSFS=m 93CONFIG_ISCSI_BOOT_SYSFS=m
94CONFIG_ATA=y
95CONFIG_PATA_SIL680=y
97CONFIG_FUSION=y 96CONFIG_FUSION=y
98CONFIG_FUSION_SPI=y 97CONFIG_FUSION_SPI=y
99CONFIG_FUSION_SAS=y 98CONFIG_FUSION_SAS=y
@@ -114,9 +113,8 @@ CONFIG_INPUT_FF_MEMLESS=m
114# CONFIG_KEYBOARD_ATKBD is not set 113# CONFIG_KEYBOARD_ATKBD is not set
115# CONFIG_KEYBOARD_HIL_OLD is not set 114# CONFIG_KEYBOARD_HIL_OLD is not set
116# CONFIG_KEYBOARD_HIL is not set 115# CONFIG_KEYBOARD_HIL is not set
117CONFIG_MOUSE_PS2=m 116# CONFIG_MOUSE_PS2 is not set
118CONFIG_INPUT_MISC=y 117CONFIG_INPUT_MISC=y
119CONFIG_INPUT_CM109=m
120CONFIG_SERIO_SERPORT=m 118CONFIG_SERIO_SERPORT=m
121CONFIG_SERIO_PARKBD=m 119CONFIG_SERIO_PARKBD=m
122CONFIG_SERIO_GSCPS2=m 120CONFIG_SERIO_GSCPS2=m
@@ -167,34 +165,6 @@ CONFIG_SND_VERBOSE_PRINTK=y
167CONFIG_SND_AD1889=m 165CONFIG_SND_AD1889=m
168# CONFIG_SND_USB is not set 166# CONFIG_SND_USB is not set
169# CONFIG_SND_GSC is not set 167# CONFIG_SND_GSC is not set
170CONFIG_HID_A4TECH=m
171CONFIG_HID_APPLE=m
172CONFIG_HID_BELKIN=m
173CONFIG_HID_CHERRY=m
174CONFIG_HID_CHICONY=m
175CONFIG_HID_CYPRESS=m
176CONFIG_HID_DRAGONRISE=m
177CONFIG_HID_EZKEY=m
178CONFIG_HID_KYE=m
179CONFIG_HID_GYRATION=m
180CONFIG_HID_TWINHAN=m
181CONFIG_HID_KENSINGTON=m
182CONFIG_HID_LOGITECH=m
183CONFIG_HID_LOGITECH_DJ=m
184CONFIG_HID_MICROSOFT=m
185CONFIG_HID_MONTEREY=m
186CONFIG_HID_NTRIG=m
187CONFIG_HID_ORTEK=m
188CONFIG_HID_PANTHERLORD=m
189CONFIG_HID_PETALYNX=m
190CONFIG_HID_SAMSUNG=m
191CONFIG_HID_SUNPLUS=m
192CONFIG_HID_GREENASIA=m
193CONFIG_HID_SMARTJOYPLUS=m
194CONFIG_HID_TOPSEED=m
195CONFIG_HID_THRUSTMASTER=m
196CONFIG_HID_ZEROPLUS=m
197CONFIG_USB_HID=m
198CONFIG_USB=y 168CONFIG_USB=y
199CONFIG_USB_OHCI_HCD=y 169CONFIG_USB_OHCI_HCD=y
200CONFIG_USB_STORAGE=y 170CONFIG_USB_STORAGE=y
diff --git a/arch/parisc/configs/generic-64bit_defconfig b/arch/parisc/configs/generic-64bit_defconfig
index 5874cebee077..28c1b5de044e 100644
--- a/arch/parisc/configs/generic-64bit_defconfig
+++ b/arch/parisc/configs/generic-64bit_defconfig
@@ -24,7 +24,6 @@ CONFIG_MODVERSIONS=y
24CONFIG_BLK_DEV_INTEGRITY=y 24CONFIG_BLK_DEV_INTEGRITY=y
25# CONFIG_IOSCHED_DEADLINE is not set 25# CONFIG_IOSCHED_DEADLINE is not set
26CONFIG_PA8X00=y 26CONFIG_PA8X00=y
27CONFIG_MLONGCALLS=y
28CONFIG_64BIT=y 27CONFIG_64BIT=y
29CONFIG_SMP=y 28CONFIG_SMP=y
30# CONFIG_COMPACTION is not set 29# CONFIG_COMPACTION is not set
@@ -68,7 +67,6 @@ CONFIG_IDE_GD=m
68CONFIG_IDE_GD_ATAPI=y 67CONFIG_IDE_GD_ATAPI=y
69CONFIG_BLK_DEV_IDECD=m 68CONFIG_BLK_DEV_IDECD=m
70CONFIG_BLK_DEV_NS87415=y 69CONFIG_BLK_DEV_NS87415=y
71CONFIG_BLK_DEV_SIIMAGE=y
72# CONFIG_SCSI_PROC_FS is not set 70# CONFIG_SCSI_PROC_FS is not set
73CONFIG_BLK_DEV_SD=y 71CONFIG_BLK_DEV_SD=y
74CONFIG_BLK_DEV_SR=y 72CONFIG_BLK_DEV_SR=y
@@ -82,6 +80,7 @@ CONFIG_SCSI_ZALON=y
82CONFIG_SCSI_QLA_ISCSI=m 80CONFIG_SCSI_QLA_ISCSI=m
83CONFIG_SCSI_DH=y 81CONFIG_SCSI_DH=y
84CONFIG_ATA=y 82CONFIG_ATA=y
83CONFIG_PATA_SIL680=y
85CONFIG_ATA_GENERIC=y 84CONFIG_ATA_GENERIC=y
86CONFIG_MD=y 85CONFIG_MD=y
87CONFIG_MD_LINEAR=m 86CONFIG_MD_LINEAR=m
@@ -162,7 +161,7 @@ CONFIG_SLIP_MODE_SLIP6=y
162CONFIG_INPUT_EVDEV=y 161CONFIG_INPUT_EVDEV=y
163# CONFIG_KEYBOARD_HIL_OLD is not set 162# CONFIG_KEYBOARD_HIL_OLD is not set
164# CONFIG_KEYBOARD_HIL is not set 163# CONFIG_KEYBOARD_HIL is not set
165# CONFIG_INPUT_MOUSE is not set 164# CONFIG_MOUSE_PS2 is not set
166CONFIG_INPUT_MISC=y 165CONFIG_INPUT_MISC=y
167CONFIG_SERIO_SERPORT=m 166CONFIG_SERIO_SERPORT=m
168# CONFIG_HP_SDC is not set 167# CONFIG_HP_SDC is not set
@@ -216,32 +215,7 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
216CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y 215CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
217CONFIG_LOGO=y 216CONFIG_LOGO=y
218# CONFIG_LOGO_LINUX_MONO is not set 217# CONFIG_LOGO_LINUX_MONO is not set
219CONFIG_HID=m
220CONFIG_HIDRAW=y 218CONFIG_HIDRAW=y
221CONFIG_HID_DRAGONRISE=m
222CONFIG_DRAGONRISE_FF=y
223CONFIG_HID_KYE=m
224CONFIG_HID_GYRATION=m
225CONFIG_HID_TWINHAN=m
226CONFIG_LOGITECH_FF=y
227CONFIG_LOGIRUMBLEPAD2_FF=y
228CONFIG_HID_NTRIG=m
229CONFIG_HID_PANTHERLORD=m
230CONFIG_PANTHERLORD_FF=y
231CONFIG_HID_PETALYNX=m
232CONFIG_HID_SAMSUNG=m
233CONFIG_HID_SONY=m
234CONFIG_HID_SUNPLUS=m
235CONFIG_HID_GREENASIA=m
236CONFIG_GREENASIA_FF=y
237CONFIG_HID_SMARTJOYPLUS=m
238CONFIG_SMARTJOYPLUS_FF=y
239CONFIG_HID_TOPSEED=m
240CONFIG_HID_THRUSTMASTER=m
241CONFIG_THRUSTMASTER_FF=y
242CONFIG_HID_ZEROPLUS=m
243CONFIG_ZEROPLUS_FF=y
244CONFIG_USB_HID=m
245CONFIG_HID_PID=y 219CONFIG_HID_PID=y
246CONFIG_USB_HIDDEV=y 220CONFIG_USB_HIDDEV=y
247CONFIG_USB=y 221CONFIG_USB=y
@@ -251,13 +225,8 @@ CONFIG_USB_DYNAMIC_MINORS=y
251CONFIG_USB_MON=m 225CONFIG_USB_MON=m
252CONFIG_USB_WUSB_CBAF=m 226CONFIG_USB_WUSB_CBAF=m
253CONFIG_USB_XHCI_HCD=m 227CONFIG_USB_XHCI_HCD=m
254CONFIG_USB_EHCI_HCD=m 228CONFIG_USB_EHCI_HCD=y
255CONFIG_USB_OHCI_HCD=m 229CONFIG_USB_OHCI_HCD=y
256CONFIG_USB_R8A66597_HCD=m
257CONFIG_USB_ACM=m
258CONFIG_USB_PRINTER=m
259CONFIG_USB_WDM=m
260CONFIG_USB_TMC=m
261CONFIG_NEW_LEDS=y 230CONFIG_NEW_LEDS=y
262CONFIG_LEDS_CLASS=y 231CONFIG_LEDS_CLASS=y
263CONFIG_LEDS_TRIGGERS=y 232CONFIG_LEDS_TRIGGERS=y
diff --git a/arch/parisc/include/asm/serial.h b/arch/parisc/include/asm/serial.h
index d7e3cc60dbc3..77e9b67c87ee 100644
--- a/arch/parisc/include/asm/serial.h
+++ b/arch/parisc/include/asm/serial.h
@@ -6,5 +6,3 @@
6 * This is used for 16550-compatible UARTs 6 * This is used for 16550-compatible UARTs
7 */ 7 */
8#define BASE_BAUD ( 1843200 / 16 ) 8#define BASE_BAUD ( 1843200 / 16 )
9
10#define SERIAL_PORT_DFNS
diff --git a/arch/parisc/kernel/hardware.c b/arch/parisc/kernel/hardware.c
index 06cb3992907e..608716f8496b 100644
--- a/arch/parisc/kernel/hardware.c
+++ b/arch/parisc/kernel/hardware.c
@@ -36,6 +36,9 @@
36 * HP PARISC Hardware Database 36 * HP PARISC Hardware Database
37 * Access to this database is only possible during bootup 37 * Access to this database is only possible during bootup
38 * so don't reference this table after starting the init process 38 * so don't reference this table after starting the init process
39 *
40 * NOTE: Product names which are listed here and ends with a '?'
41 * are guessed. If you know the correct name, please let us know.
39 */ 42 */
40 43
41static struct hp_hardware hp_hardware_list[] = { 44static struct hp_hardware hp_hardware_list[] = {
@@ -222,7 +225,7 @@ static struct hp_hardware hp_hardware_list[] = {
222 {HPHW_NPROC,0x5DD,0x4,0x81,"Duet W2"}, 225 {HPHW_NPROC,0x5DD,0x4,0x81,"Duet W2"},
223 {HPHW_NPROC,0x5DE,0x4,0x81,"Piccolo W+"}, 226 {HPHW_NPROC,0x5DE,0x4,0x81,"Piccolo W+"},
224 {HPHW_NPROC,0x5DF,0x4,0x81,"Cantata W2"}, 227 {HPHW_NPROC,0x5DF,0x4,0x81,"Cantata W2"},
225 {HPHW_NPROC,0x5DF,0x0,0x00,"Marcato W+? (rp5470)"}, 228 {HPHW_NPROC,0x5DF,0x0,0x00,"Marcato W+ (rp5470)?"},
226 {HPHW_NPROC,0x5E0,0x4,0x91,"Cantata DC- W2"}, 229 {HPHW_NPROC,0x5E0,0x4,0x91,"Cantata DC- W2"},
227 {HPHW_NPROC,0x5E1,0x4,0x91,"Crescendo DC- W2"}, 230 {HPHW_NPROC,0x5E1,0x4,0x91,"Crescendo DC- W2"},
228 {HPHW_NPROC,0x5E2,0x4,0x91,"Crescendo 650 W2"}, 231 {HPHW_NPROC,0x5E2,0x4,0x91,"Crescendo 650 W2"},
@@ -276,9 +279,11 @@ static struct hp_hardware hp_hardware_list[] = {
276 {HPHW_NPROC,0x888,0x4,0x91,"Storm Peak Fast DC-"}, 279 {HPHW_NPROC,0x888,0x4,0x91,"Storm Peak Fast DC-"},
277 {HPHW_NPROC,0x889,0x4,0x91,"Storm Peak Fast"}, 280 {HPHW_NPROC,0x889,0x4,0x91,"Storm Peak Fast"},
278 {HPHW_NPROC,0x88A,0x4,0x91,"Crestone Peak Slow"}, 281 {HPHW_NPROC,0x88A,0x4,0x91,"Crestone Peak Slow"},
282 {HPHW_NPROC,0x88B,0x4,0x91,"Crestone Peak Fast?"},
279 {HPHW_NPROC,0x88C,0x4,0x91,"Orca Mako+"}, 283 {HPHW_NPROC,0x88C,0x4,0x91,"Orca Mako+"},
280 {HPHW_NPROC,0x88D,0x4,0x91,"Rainier/Medel Mako+ Slow"}, 284 {HPHW_NPROC,0x88D,0x4,0x91,"Rainier/Medel Mako+ Slow"},
281 {HPHW_NPROC,0x88E,0x4,0x91,"Rainier/Medel Mako+ Fast"}, 285 {HPHW_NPROC,0x88E,0x4,0x91,"Rainier/Medel Mako+ Fast"},
286 {HPHW_NPROC,0x892,0x4,0x91,"Mt. Hamilton Slow Mako+?"},
282 {HPHW_NPROC,0x894,0x4,0x91,"Mt. Hamilton Fast Mako+"}, 287 {HPHW_NPROC,0x894,0x4,0x91,"Mt. Hamilton Fast Mako+"},
283 {HPHW_NPROC,0x895,0x4,0x91,"Storm Peak Slow Mako+"}, 288 {HPHW_NPROC,0x895,0x4,0x91,"Storm Peak Slow Mako+"},
284 {HPHW_NPROC,0x896,0x4,0x91,"Storm Peak Fast Mako+"}, 289 {HPHW_NPROC,0x896,0x4,0x91,"Storm Peak Fast Mako+"},
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S
index d2d58258aea6..d4dc588c0dc1 100644
--- a/arch/parisc/kernel/head.S
+++ b/arch/parisc/kernel/head.S
@@ -41,9 +41,7 @@ END(boot_args)
41 .import fault_vector_11,code /* IVA parisc 1.1 32 bit */ 41 .import fault_vector_11,code /* IVA parisc 1.1 32 bit */
42 .import $global$ /* forward declaration */ 42 .import $global$ /* forward declaration */
43#endif /*!CONFIG_64BIT*/ 43#endif /*!CONFIG_64BIT*/
44 .export _stext,data /* Kernel want it this way! */ 44ENTRY(parisc_kernel_start)
45_stext:
46ENTRY(stext)
47 .proc 45 .proc
48 .callinfo 46 .callinfo
49 47
@@ -347,7 +345,7 @@ smp_slave_stext:
347 .procend 345 .procend
348#endif /* CONFIG_SMP */ 346#endif /* CONFIG_SMP */
349 347
350ENDPROC(stext) 348ENDPROC(parisc_kernel_start)
351 349
352#ifndef CONFIG_64BIT 350#ifndef CONFIG_64BIT
353 .section .data..read_mostly 351 .section .data..read_mostly
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 5dfd248e3f1a..0d3a9d4927b5 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -61,8 +61,15 @@ static int get_offset(struct address_space *mapping)
61 return (unsigned long) mapping >> 8; 61 return (unsigned long) mapping >> 8;
62} 62}
63 63
64static unsigned long get_shared_area(struct address_space *mapping, 64static unsigned long shared_align_offset(struct file *filp, unsigned long pgoff)
65 unsigned long addr, unsigned long len, unsigned long pgoff) 65{
66 struct address_space *mapping = filp ? filp->f_mapping : NULL;
67
68 return (get_offset(mapping) + pgoff) << PAGE_SHIFT;
69}
70
71static unsigned long get_shared_area(struct file *filp, unsigned long addr,
72 unsigned long len, unsigned long pgoff)
66{ 73{
67 struct vm_unmapped_area_info info; 74 struct vm_unmapped_area_info info;
68 75
@@ -71,7 +78,7 @@ static unsigned long get_shared_area(struct address_space *mapping,
71 info.low_limit = PAGE_ALIGN(addr); 78 info.low_limit = PAGE_ALIGN(addr);
72 info.high_limit = TASK_SIZE; 79 info.high_limit = TASK_SIZE;
73 info.align_mask = PAGE_MASK & (SHMLBA - 1); 80 info.align_mask = PAGE_MASK & (SHMLBA - 1);
74 info.align_offset = (get_offset(mapping) + pgoff) << PAGE_SHIFT; 81 info.align_offset = shared_align_offset(filp, pgoff);
75 return vm_unmapped_area(&info); 82 return vm_unmapped_area(&info);
76} 83}
77 84
@@ -82,20 +89,18 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
82 return -ENOMEM; 89 return -ENOMEM;
83 if (flags & MAP_FIXED) { 90 if (flags & MAP_FIXED) {
84 if ((flags & MAP_SHARED) && 91 if ((flags & MAP_SHARED) &&
85 (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)) 92 (addr - shared_align_offset(filp, pgoff)) & (SHMLBA - 1))
86 return -EINVAL; 93 return -EINVAL;
87 return addr; 94 return addr;
88 } 95 }
89 if (!addr) 96 if (!addr)
90 addr = TASK_UNMAPPED_BASE; 97 addr = TASK_UNMAPPED_BASE;
91 98
92 if (filp) { 99 if (filp || (flags & MAP_SHARED))
93 addr = get_shared_area(filp->f_mapping, addr, len, pgoff); 100 addr = get_shared_area(filp, addr, len, pgoff);
94 } else if(flags & MAP_SHARED) { 101 else
95 addr = get_shared_area(NULL, addr, len, pgoff);
96 } else {
97 addr = get_unshared_area(addr, len); 102 addr = get_unshared_area(addr, len);
98 } 103
99 return addr; 104 return addr;
100} 105}
101 106
diff --git a/arch/parisc/kernel/unwind.c b/arch/parisc/kernel/unwind.c
index 76ed62ed785b..ddd988b267a9 100644
--- a/arch/parisc/kernel/unwind.c
+++ b/arch/parisc/kernel/unwind.c
@@ -168,7 +168,7 @@ void unwind_table_remove(struct unwind_table *table)
168} 168}
169 169
170/* Called from setup_arch to import the kernel unwind info */ 170/* Called from setup_arch to import the kernel unwind info */
171int unwind_init(void) 171int __init unwind_init(void)
172{ 172{
173 long start, stop; 173 long start, stop;
174 register unsigned long gp __asm__ ("r27"); 174 register unsigned long gp __asm__ ("r27");
@@ -233,7 +233,6 @@ static void unwind_frame_regs(struct unwind_frame_info *info)
233 e = find_unwind_entry(info->ip); 233 e = find_unwind_entry(info->ip);
234 if (e == NULL) { 234 if (e == NULL) {
235 unsigned long sp; 235 unsigned long sp;
236 extern char _stext[], _etext[];
237 236
238 dbg("Cannot find unwind entry for 0x%lx; forced unwinding\n", info->ip); 237 dbg("Cannot find unwind entry for 0x%lx; forced unwinding\n", info->ip);
239 238
@@ -281,8 +280,7 @@ static void unwind_frame_regs(struct unwind_frame_info *info)
281 break; 280 break;
282 info->prev_ip = tmp; 281 info->prev_ip = tmp;
283 sp = info->prev_sp; 282 sp = info->prev_sp;
284 } while (info->prev_ip < (unsigned long)_stext || 283 } while (!kernel_text_address(info->prev_ip));
285 info->prev_ip > (unsigned long)_etext);
286 284
287 info->rp = 0; 285 info->rp = 0;
288 286
@@ -435,9 +433,8 @@ unsigned long return_address(unsigned int level)
435 do { 433 do {
436 if (unwind_once(&info) < 0 || info.ip == 0) 434 if (unwind_once(&info) < 0 || info.ip == 0)
437 return 0; 435 return 0;
438 if (!__kernel_text_address(info.ip)) { 436 if (!kernel_text_address(info.ip))
439 return 0; 437 return 0;
440 }
441 } while (info.ip && level--); 438 } while (info.ip && level--);
442 439
443 return info.ip; 440 return info.ip;
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S
index 4bb095a2f6fc..0dacc5ca555a 100644
--- a/arch/parisc/kernel/vmlinux.lds.S
+++ b/arch/parisc/kernel/vmlinux.lds.S
@@ -6,24 +6,19 @@
6 * Copyright (C) 2000 Michael Ang <mang with subcarrier.org> 6 * Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
7 * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org> 7 * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
8 * Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org> 8 * Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
9 * Copyright (C) 2006 Helge Deller <deller@gmx.de> 9 * Copyright (C) 2006-2013 Helge Deller <deller@gmx.de>
10 * 10 */
11 * 11
12 * This program is free software; you can redistribute it and/or modify 12/*
13 * it under the terms of the GNU General Public License as published by 13 * Put page table entries (swapper_pg_dir) as the first thing in .bss. This
14 * the Free Software Foundation; either version 2 of the License, or 14 * will ensure that it has .bss alignment (PAGE_SIZE).
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */ 15 */
16#define BSS_FIRST_SECTIONS *(.data..vm0.pmd) \
17 *(.data..vm0.pgd) \
18 *(.data..vm0.pte)
19
26#include <asm-generic/vmlinux.lds.h> 20#include <asm-generic/vmlinux.lds.h>
21
27/* needed for the processor specific cache alignment size */ 22/* needed for the processor specific cache alignment size */
28#include <asm/cache.h> 23#include <asm/cache.h>
29#include <asm/page.h> 24#include <asm/page.h>
@@ -39,7 +34,7 @@ OUTPUT_FORMAT("elf64-hppa-linux")
39OUTPUT_ARCH(hppa:hppa2.0w) 34OUTPUT_ARCH(hppa:hppa2.0w)
40#endif 35#endif
41 36
42ENTRY(_stext) 37ENTRY(parisc_kernel_start)
43#ifndef CONFIG_64BIT 38#ifndef CONFIG_64BIT
44jiffies = jiffies_64 + 4; 39jiffies = jiffies_64 + 4;
45#else 40#else
@@ -49,11 +44,29 @@ SECTIONS
49{ 44{
50 . = KERNEL_BINARY_TEXT_START; 45 . = KERNEL_BINARY_TEXT_START;
51 46
47 __init_begin = .;
48 HEAD_TEXT_SECTION
49 INIT_TEXT_SECTION(8)
50
51 . = ALIGN(PAGE_SIZE);
52 INIT_DATA_SECTION(PAGE_SIZE)
53 /* we have to discard exit text and such at runtime, not link time */
54 .exit.text :
55 {
56 EXIT_TEXT
57 }
58 .exit.data :
59 {
60 EXIT_DATA
61 }
62 PERCPU_SECTION(8)
63 . = ALIGN(PAGE_SIZE);
64 __init_end = .;
65 /* freed after init ends here */
66
52 _text = .; /* Text and read-only data */ 67 _text = .; /* Text and read-only data */
53 .head ALIGN(16) : { 68 _stext = .;
54 HEAD_TEXT 69 .text ALIGN(PAGE_SIZE) : {
55 } = 0
56 .text ALIGN(16) : {
57 TEXT_TEXT 70 TEXT_TEXT
58 SCHED_TEXT 71 SCHED_TEXT
59 LOCK_TEXT 72 LOCK_TEXT
@@ -68,21 +81,28 @@ SECTIONS
68 *(.lock.text) /* out-of-line lock text */ 81 *(.lock.text) /* out-of-line lock text */
69 *(.gnu.warning) 82 *(.gnu.warning)
70 } 83 }
71 /* End of text section */ 84 . = ALIGN(PAGE_SIZE);
72 _etext = .; 85 _etext = .;
86 /* End of text section */
73 87
74 /* Start of data section */ 88 /* Start of data section */
75 _sdata = .; 89 _sdata = .;
76 90
77 RODATA 91 RO_DATA_SECTION(8)
78 92
79 /* writeable */ 93#ifdef CONFIG_64BIT
80 /* Make sure this is page aligned so 94 . = ALIGN(16);
81 * that we can properly leave these 95 /* Linkage tables */
82 * as writable 96 .opd : {
83 */ 97 *(.opd)
84 . = ALIGN(PAGE_SIZE); 98 } PROVIDE (__gp = .);
85 data_start = .; 99 .plt : {
100 *(.plt)
101 }
102 .dlt : {
103 *(.dlt)
104 }
105#endif
86 106
87 /* unwind info */ 107 /* unwind info */
88 .PARISC.unwind : { 108 .PARISC.unwind : {
@@ -91,7 +111,15 @@ SECTIONS
91 __stop___unwind = .; 111 __stop___unwind = .;
92 } 112 }
93 113
94 EXCEPTION_TABLE(16) 114 /* writeable */
115 /* Make sure this is page aligned so
116 * that we can properly leave these
117 * as writable
118 */
119 . = ALIGN(PAGE_SIZE);
120 data_start = .;
121
122 EXCEPTION_TABLE(8)
95 NOTES 123 NOTES
96 124
97 /* Data */ 125 /* Data */
@@ -107,54 +135,8 @@ SECTIONS
107 _edata = .; 135 _edata = .;
108 136
109 /* BSS */ 137 /* BSS */
110 __bss_start = .; 138 BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 8)
111 /* page table entries need to be PAGE_SIZE aligned */
112 . = ALIGN(PAGE_SIZE);
113 .data..vmpages : {
114 *(.data..vm0.pmd)
115 *(.data..vm0.pgd)
116 *(.data..vm0.pte)
117 }
118 .bss : {
119 *(.bss)
120 *(COMMON)
121 }
122 __bss_stop = .;
123
124#ifdef CONFIG_64BIT
125 . = ALIGN(16);
126 /* Linkage tables */
127 .opd : {
128 *(.opd)
129 } PROVIDE (__gp = .);
130 .plt : {
131 *(.plt)
132 }
133 .dlt : {
134 *(.dlt)
135 }
136#endif
137 139
138 /* reserve space for interrupt stack by aligning __init* to 16k */
139 . = ALIGN(16384);
140 __init_begin = .;
141 INIT_TEXT_SECTION(16384)
142 . = ALIGN(PAGE_SIZE);
143 INIT_DATA_SECTION(16)
144 /* we have to discard exit text and such at runtime, not link time */
145 .exit.text :
146 {
147 EXIT_TEXT
148 }
149 .exit.data :
150 {
151 EXIT_DATA
152 }
153
154 PERCPU_SECTION(L1_CACHE_BYTES)
155 . = ALIGN(PAGE_SIZE);
156 __init_end = .;
157 /* freed after init ends here */
158 _end = . ; 140 _end = . ;
159 141
160 STABS_DEBUG 142 STABS_DEBUG
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index b0f96c0e6316..96f8168cf4ec 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -32,6 +32,7 @@
32#include <asm/sections.h> 32#include <asm/sections.h>
33 33
34extern int data_start; 34extern int data_start;
35extern void parisc_kernel_start(void); /* Kernel entry point in head.S */
35 36
36#if PT_NLEVELS == 3 37#if PT_NLEVELS == 3
37/* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout 38/* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout
@@ -324,8 +325,9 @@ static void __init setup_bootmem(void)
324 reserve_bootmem_node(NODE_DATA(0), 0UL, 325 reserve_bootmem_node(NODE_DATA(0), 0UL,
325 (unsigned long)(PAGE0->mem_free + 326 (unsigned long)(PAGE0->mem_free +
326 PDC_CONSOLE_IO_IODC_SIZE), BOOTMEM_DEFAULT); 327 PDC_CONSOLE_IO_IODC_SIZE), BOOTMEM_DEFAULT);
327 reserve_bootmem_node(NODE_DATA(0), __pa((unsigned long)_text), 328 reserve_bootmem_node(NODE_DATA(0), __pa(KERNEL_BINARY_TEXT_START),
328 (unsigned long)(_end - _text), BOOTMEM_DEFAULT); 329 (unsigned long)(_end - KERNEL_BINARY_TEXT_START),
330 BOOTMEM_DEFAULT);
329 reserve_bootmem_node(NODE_DATA(0), (bootmap_start_pfn << PAGE_SHIFT), 331 reserve_bootmem_node(NODE_DATA(0), (bootmap_start_pfn << PAGE_SHIFT),
330 ((bootmap_pfn - bootmap_start_pfn) << PAGE_SHIFT), 332 ((bootmap_pfn - bootmap_start_pfn) << PAGE_SHIFT),
331 BOOTMEM_DEFAULT); 333 BOOTMEM_DEFAULT);
@@ -378,6 +380,17 @@ static void __init setup_bootmem(void)
378 request_resource(&sysram_resources[0], &pdcdata_resource); 380 request_resource(&sysram_resources[0], &pdcdata_resource);
379} 381}
380 382
383static int __init parisc_text_address(unsigned long vaddr)
384{
385 static unsigned long head_ptr __initdata;
386
387 if (!head_ptr)
388 head_ptr = PAGE_MASK & (unsigned long)
389 dereference_function_descriptor(&parisc_kernel_start);
390
391 return core_kernel_text(vaddr) || vaddr == head_ptr;
392}
393
381static void __init map_pages(unsigned long start_vaddr, 394static void __init map_pages(unsigned long start_vaddr,
382 unsigned long start_paddr, unsigned long size, 395 unsigned long start_paddr, unsigned long size,
383 pgprot_t pgprot, int force) 396 pgprot_t pgprot, int force)
@@ -466,7 +479,7 @@ static void __init map_pages(unsigned long start_vaddr,
466 */ 479 */
467 if (force) 480 if (force)
468 pte = __mk_pte(address, pgprot); 481 pte = __mk_pte(address, pgprot);
469 else if (core_kernel_text(vaddr) && 482 else if (parisc_text_address(vaddr) &&
470 address != fv_addr) 483 address != fv_addr)
471 pte = __mk_pte(address, PAGE_KERNEL_EXEC); 484 pte = __mk_pte(address, PAGE_KERNEL_EXEC);
472 else 485 else
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c
index 4363528dc8fd..b3feabd39f31 100644
--- a/arch/s390/crypto/aes_s390.c
+++ b/arch/s390/crypto/aes_s390.c
@@ -55,8 +55,7 @@ struct pcc_param {
55 55
56struct s390_xts_ctx { 56struct s390_xts_ctx {
57 u8 key[32]; 57 u8 key[32];
58 u8 xts_param[16]; 58 u8 pcc_key[32];
59 struct pcc_param pcc;
60 long enc; 59 long enc;
61 long dec; 60 long dec;
62 int key_len; 61 int key_len;
@@ -591,7 +590,7 @@ static int xts_aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
591 xts_ctx->enc = KM_XTS_128_ENCRYPT; 590 xts_ctx->enc = KM_XTS_128_ENCRYPT;
592 xts_ctx->dec = KM_XTS_128_DECRYPT; 591 xts_ctx->dec = KM_XTS_128_DECRYPT;
593 memcpy(xts_ctx->key + 16, in_key, 16); 592 memcpy(xts_ctx->key + 16, in_key, 16);
594 memcpy(xts_ctx->pcc.key + 16, in_key + 16, 16); 593 memcpy(xts_ctx->pcc_key + 16, in_key + 16, 16);
595 break; 594 break;
596 case 48: 595 case 48:
597 xts_ctx->enc = 0; 596 xts_ctx->enc = 0;
@@ -602,7 +601,7 @@ static int xts_aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
602 xts_ctx->enc = KM_XTS_256_ENCRYPT; 601 xts_ctx->enc = KM_XTS_256_ENCRYPT;
603 xts_ctx->dec = KM_XTS_256_DECRYPT; 602 xts_ctx->dec = KM_XTS_256_DECRYPT;
604 memcpy(xts_ctx->key, in_key, 32); 603 memcpy(xts_ctx->key, in_key, 32);
605 memcpy(xts_ctx->pcc.key, in_key + 32, 32); 604 memcpy(xts_ctx->pcc_key, in_key + 32, 32);
606 break; 605 break;
607 default: 606 default:
608 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; 607 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
@@ -621,29 +620,33 @@ static int xts_aes_crypt(struct blkcipher_desc *desc, long func,
621 unsigned int nbytes = walk->nbytes; 620 unsigned int nbytes = walk->nbytes;
622 unsigned int n; 621 unsigned int n;
623 u8 *in, *out; 622 u8 *in, *out;
624 void *param; 623 struct pcc_param pcc_param;
624 struct {
625 u8 key[32];
626 u8 init[16];
627 } xts_param;
625 628
626 if (!nbytes) 629 if (!nbytes)
627 goto out; 630 goto out;
628 631
629 memset(xts_ctx->pcc.block, 0, sizeof(xts_ctx->pcc.block)); 632 memset(pcc_param.block, 0, sizeof(pcc_param.block));
630 memset(xts_ctx->pcc.bit, 0, sizeof(xts_ctx->pcc.bit)); 633 memset(pcc_param.bit, 0, sizeof(pcc_param.bit));
631 memset(xts_ctx->pcc.xts, 0, sizeof(xts_ctx->pcc.xts)); 634 memset(pcc_param.xts, 0, sizeof(pcc_param.xts));
632 memcpy(xts_ctx->pcc.tweak, walk->iv, sizeof(xts_ctx->pcc.tweak)); 635 memcpy(pcc_param.tweak, walk->iv, sizeof(pcc_param.tweak));
633 param = xts_ctx->pcc.key + offset; 636 memcpy(pcc_param.key, xts_ctx->pcc_key, 32);
634 ret = crypt_s390_pcc(func, param); 637 ret = crypt_s390_pcc(func, &pcc_param.key[offset]);
635 if (ret < 0) 638 if (ret < 0)
636 return -EIO; 639 return -EIO;
637 640
638 memcpy(xts_ctx->xts_param, xts_ctx->pcc.xts, 16); 641 memcpy(xts_param.key, xts_ctx->key, 32);
639 param = xts_ctx->key + offset; 642 memcpy(xts_param.init, pcc_param.xts, 16);
640 do { 643 do {
641 /* only use complete blocks */ 644 /* only use complete blocks */
642 n = nbytes & ~(AES_BLOCK_SIZE - 1); 645 n = nbytes & ~(AES_BLOCK_SIZE - 1);
643 out = walk->dst.virt.addr; 646 out = walk->dst.virt.addr;
644 in = walk->src.virt.addr; 647 in = walk->src.virt.addr;
645 648
646 ret = crypt_s390_km(func, param, out, in, n); 649 ret = crypt_s390_km(func, &xts_param.key[offset], out, in, n);
647 if (ret < 0 || ret != n) 650 if (ret < 0 || ret != n)
648 return -EIO; 651 return -EIO;
649 652
diff --git a/arch/um/Makefile b/arch/um/Makefile
index 48d92bbe62e9..36e658a4291c 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -33,12 +33,11 @@ MODE_INCLUDE += -I$(srctree)/$(ARCH_DIR)/include/shared/skas
33 33
34HEADER_ARCH := $(SUBARCH) 34HEADER_ARCH := $(SUBARCH)
35 35
36# Additional ARCH settings for x86 36ifneq ($(filter $(SUBARCH),x86 x86_64 i386),)
37ifeq ($(SUBARCH),i386) 37 HEADER_ARCH := x86
38 HEADER_ARCH := x86
39endif 38endif
40ifeq ($(SUBARCH),x86_64) 39
41 HEADER_ARCH := x86 40ifdef CONFIG_64BIT
42 KBUILD_CFLAGS += -mcmodel=large 41 KBUILD_CFLAGS += -mcmodel=large
43endif 42endif
44 43
diff --git a/arch/um/kernel/sysrq.c b/arch/um/kernel/sysrq.c
index 4d6fdf68edf3..799d7e413bf5 100644
--- a/arch/um/kernel/sysrq.c
+++ b/arch/um/kernel/sysrq.c
@@ -19,7 +19,7 @@ struct stack_frame {
19 unsigned long return_address; 19 unsigned long return_address;
20}; 20};
21 21
22static void print_stack_trace(unsigned long *sp, unsigned long bp) 22static void do_stack_trace(unsigned long *sp, unsigned long bp)
23{ 23{
24 int reliable; 24 int reliable;
25 unsigned long addr; 25 unsigned long addr;
@@ -94,5 +94,5 @@ void show_stack(struct task_struct *task, unsigned long *stack)
94 } 94 }
95 printk(KERN_CONT "\n"); 95 printk(KERN_CONT "\n");
96 96
97 print_stack_trace(sp, bp); 97 do_stack_trace(sp, bp);
98} 98}
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 41250fb33985..eda00f9be0cf 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -31,6 +31,9 @@ ifeq ($(CONFIG_X86_32),y)
31 31
32 KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return 32 KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return
33 33
34 # Don't autogenerate SSE instructions
35 KBUILD_CFLAGS += -mno-sse
36
34 # Never want PIC in a 32-bit kernel, prevent breakage with GCC built 37 # Never want PIC in a 32-bit kernel, prevent breakage with GCC built
35 # with nonstandard options 38 # with nonstandard options
36 KBUILD_CFLAGS += -fno-pic 39 KBUILD_CFLAGS += -fno-pic
@@ -57,8 +60,11 @@ else
57 KBUILD_AFLAGS += -m64 60 KBUILD_AFLAGS += -m64
58 KBUILD_CFLAGS += -m64 61 KBUILD_CFLAGS += -m64
59 62
63 # Don't autogenerate SSE instructions
64 KBUILD_CFLAGS += -mno-sse
65
60 # Use -mpreferred-stack-boundary=3 if supported. 66 # Use -mpreferred-stack-boundary=3 if supported.
61 KBUILD_CFLAGS += $(call cc-option,-mno-sse -mpreferred-stack-boundary=3) 67 KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3)
62 68
63 # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu) 69 # FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
64 cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8) 70 cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h
index da31c8b8a92d..b17f4f48ecd7 100644
--- a/arch/x86/include/asm/atomic.h
+++ b/arch/x86/include/asm/atomic.h
@@ -77,7 +77,7 @@ static inline void atomic_sub(int i, atomic_t *v)
77 */ 77 */
78static inline int atomic_sub_and_test(int i, atomic_t *v) 78static inline int atomic_sub_and_test(int i, atomic_t *v)
79{ 79{
80 GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, i, "%0", "e"); 80 GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, "er", i, "%0", "e");
81} 81}
82 82
83/** 83/**
@@ -141,7 +141,7 @@ static inline int atomic_inc_and_test(atomic_t *v)
141 */ 141 */
142static inline int atomic_add_negative(int i, atomic_t *v) 142static inline int atomic_add_negative(int i, atomic_t *v)
143{ 143{
144 GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, i, "%0", "s"); 144 GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, "er", i, "%0", "s");
145} 145}
146 146
147/** 147/**
diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h
index 3f065c985aee..46e9052bbd28 100644
--- a/arch/x86/include/asm/atomic64_64.h
+++ b/arch/x86/include/asm/atomic64_64.h
@@ -72,7 +72,7 @@ static inline void atomic64_sub(long i, atomic64_t *v)
72 */ 72 */
73static inline int atomic64_sub_and_test(long i, atomic64_t *v) 73static inline int atomic64_sub_and_test(long i, atomic64_t *v)
74{ 74{
75 GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, i, "%0", "e"); 75 GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, "er", i, "%0", "e");
76} 76}
77 77
78/** 78/**
@@ -138,7 +138,7 @@ static inline int atomic64_inc_and_test(atomic64_t *v)
138 */ 138 */
139static inline int atomic64_add_negative(long i, atomic64_t *v) 139static inline int atomic64_add_negative(long i, atomic64_t *v)
140{ 140{
141 GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, i, "%0", "s"); 141 GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, "er", i, "%0", "s");
142} 142}
143 143
144/** 144/**
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 6d76d0935989..9fc1af74dc83 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -205,7 +205,7 @@ static inline void change_bit(long nr, volatile unsigned long *addr)
205 */ 205 */
206static inline int test_and_set_bit(long nr, volatile unsigned long *addr) 206static inline int test_and_set_bit(long nr, volatile unsigned long *addr)
207{ 207{
208 GEN_BINARY_RMWcc(LOCK_PREFIX "bts", *addr, nr, "%0", "c"); 208 GEN_BINARY_RMWcc(LOCK_PREFIX "bts", *addr, "Ir", nr, "%0", "c");
209} 209}
210 210
211/** 211/**
@@ -251,7 +251,7 @@ static inline int __test_and_set_bit(long nr, volatile unsigned long *addr)
251 */ 251 */
252static inline int test_and_clear_bit(long nr, volatile unsigned long *addr) 252static inline int test_and_clear_bit(long nr, volatile unsigned long *addr)
253{ 253{
254 GEN_BINARY_RMWcc(LOCK_PREFIX "btr", *addr, nr, "%0", "c"); 254 GEN_BINARY_RMWcc(LOCK_PREFIX "btr", *addr, "Ir", nr, "%0", "c");
255} 255}
256 256
257/** 257/**
@@ -304,7 +304,7 @@ static inline int __test_and_change_bit(long nr, volatile unsigned long *addr)
304 */ 304 */
305static inline int test_and_change_bit(long nr, volatile unsigned long *addr) 305static inline int test_and_change_bit(long nr, volatile unsigned long *addr)
306{ 306{
307 GEN_BINARY_RMWcc(LOCK_PREFIX "btc", *addr, nr, "%0", "c"); 307 GEN_BINARY_RMWcc(LOCK_PREFIX "btc", *addr, "Ir", nr, "%0", "c");
308} 308}
309 309
310static __always_inline int constant_test_bit(long nr, const volatile unsigned long *addr) 310static __always_inline int constant_test_bit(long nr, const volatile unsigned long *addr)
diff --git a/arch/x86/include/asm/local.h b/arch/x86/include/asm/local.h
index 5b23e605e707..4ad6560847b1 100644
--- a/arch/x86/include/asm/local.h
+++ b/arch/x86/include/asm/local.h
@@ -52,7 +52,7 @@ static inline void local_sub(long i, local_t *l)
52 */ 52 */
53static inline int local_sub_and_test(long i, local_t *l) 53static inline int local_sub_and_test(long i, local_t *l)
54{ 54{
55 GEN_BINARY_RMWcc(_ASM_SUB, l->a.counter, i, "%0", "e"); 55 GEN_BINARY_RMWcc(_ASM_SUB, l->a.counter, "er", i, "%0", "e");
56} 56}
57 57
58/** 58/**
@@ -92,7 +92,7 @@ static inline int local_inc_and_test(local_t *l)
92 */ 92 */
93static inline int local_add_negative(long i, local_t *l) 93static inline int local_add_negative(long i, local_t *l)
94{ 94{
95 GEN_BINARY_RMWcc(_ASM_ADD, l->a.counter, i, "%0", "s"); 95 GEN_BINARY_RMWcc(_ASM_ADD, l->a.counter, "er", i, "%0", "s");
96} 96}
97 97
98/** 98/**
diff --git a/arch/x86/include/asm/rmwcc.h b/arch/x86/include/asm/rmwcc.h
index 1ff990f1de8e..8f7866a5b9a4 100644
--- a/arch/x86/include/asm/rmwcc.h
+++ b/arch/x86/include/asm/rmwcc.h
@@ -16,8 +16,8 @@ cc_label: \
16#define GEN_UNARY_RMWcc(op, var, arg0, cc) \ 16#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
17 __GEN_RMWcc(op " " arg0, var, cc) 17 __GEN_RMWcc(op " " arg0, var, cc)
18 18
19#define GEN_BINARY_RMWcc(op, var, val, arg0, cc) \ 19#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
20 __GEN_RMWcc(op " %1, " arg0, var, cc, "er" (val)) 20 __GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val))
21 21
22#else /* !CC_HAVE_ASM_GOTO */ 22#else /* !CC_HAVE_ASM_GOTO */
23 23
@@ -33,8 +33,8 @@ do { \
33#define GEN_UNARY_RMWcc(op, var, arg0, cc) \ 33#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
34 __GEN_RMWcc(op " " arg0, var, cc) 34 __GEN_RMWcc(op " " arg0, var, cc)
35 35
36#define GEN_BINARY_RMWcc(op, var, val, arg0, cc) \ 36#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
37 __GEN_RMWcc(op " %2, " arg0, var, cc, "er" (val)) 37 __GEN_RMWcc(op " %2, " arg0, var, cc, vcon (val))
38 38
39#endif /* CC_HAVE_ASM_GOTO */ 39#endif /* CC_HAVE_ASM_GOTO */
40 40
diff --git a/arch/x86/include/asm/trace/irq_vectors.h b/arch/x86/include/asm/trace/irq_vectors.h
index 2874df24e7a4..4cab890007a7 100644
--- a/arch/x86/include/asm/trace/irq_vectors.h
+++ b/arch/x86/include/asm/trace/irq_vectors.h
@@ -72,6 +72,17 @@ DEFINE_IRQ_VECTOR_EVENT(x86_platform_ipi);
72DEFINE_IRQ_VECTOR_EVENT(irq_work); 72DEFINE_IRQ_VECTOR_EVENT(irq_work);
73 73
74/* 74/*
75 * We must dis-allow sampling irq_work_exit() because perf event sampling
76 * itself can cause irq_work, which would lead to an infinite loop;
77 *
78 * 1) irq_work_exit happens
79 * 2) generates perf sample
80 * 3) generates irq_work
81 * 4) goto 1
82 */
83TRACE_EVENT_PERF_PERM(irq_work_exit, is_sampling_event(p_event) ? -EPERM : 0);
84
85/*
75 * call_function - called when entering/exiting a call function interrupt 86 * call_function - called when entering/exiting a call function interrupt
76 * vector handler 87 * vector handler
77 */ 88 */
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index da3c599584a3..c752cb43e52f 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -558,6 +558,17 @@ void native_machine_shutdown(void)
558{ 558{
559 /* Stop the cpus and apics */ 559 /* Stop the cpus and apics */
560#ifdef CONFIG_X86_IO_APIC 560#ifdef CONFIG_X86_IO_APIC
561 /*
562 * Disabling IO APIC before local APIC is a workaround for
563 * erratum AVR31 in "Intel Atom Processor C2000 Product Family
564 * Specification Update". In this situation, interrupts that target
565 * a Logical Processor whose Local APIC is either in the process of
566 * being hardware disabled or software disabled are neither delivered
567 * nor discarded. When this erratum occurs, the processor may hang.
568 *
569 * Even without the erratum, it still makes sense to quiet IO APIC
570 * before disabling Local APIC.
571 */
561 disable_IO_APIC(); 572 disable_IO_APIC();
562#endif 573#endif
563 574
diff --git a/arch/x86/platform/efi/early_printk.c b/arch/x86/platform/efi/early_printk.c
index 6599a0027b76..81b506d5befd 100644
--- a/arch/x86/platform/efi/early_printk.c
+++ b/arch/x86/platform/efi/early_printk.c
@@ -142,7 +142,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num)
142 efi_y += font->height; 142 efi_y += font->height;
143 } 143 }
144 144
145 if (efi_y + font->height >= si->lfb_height) { 145 if (efi_y + font->height > si->lfb_height) {
146 u32 i; 146 u32 i;
147 147
148 efi_y -= font->height; 148 efi_y -= font->height;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-21 00:21:59 -0500