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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-08-07 04:55:16 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-08-07 04:55:16 -0400
commita1b81a84fff05dbfef45b7012c26e1fee9973e5d (patch)
tree3d053e76542ad4d20bd83ad35c13eabff97003ab /arch
parent4fb8af10d0fd09372d52966b76922b9e82bbc950 (diff)
parent3663b736a5083b3bce74520b637f630f01f66a7f (diff)
Merge branch 'header-move' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6
Diffstat (limited to 'arch')
-rw-r--r--arch/avr32/Makefile7
-rw-r--r--arch/avr32/boards/atngw100/flash.c2
-rw-r--r--arch/avr32/boards/atngw100/setup.c8
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c10
-rw-r--r--arch/avr32/boards/atstk1000/atstk1003.c8
-rw-r--r--arch/avr32/boards/atstk1000/atstk1004.c8
-rw-r--r--arch/avr32/boards/atstk1000/flash.c2
-rw-r--r--arch/avr32/boards/atstk1000/setup.c6
-rw-r--r--arch/avr32/include/asm/Kbuild3
-rw-r--r--arch/avr32/include/asm/a.out.h20
-rw-r--r--arch/avr32/include/asm/addrspace.h43
-rw-r--r--arch/avr32/include/asm/asm.h102
-rw-r--r--arch/avr32/include/asm/atmel-mci.h9
-rw-r--r--arch/avr32/include/asm/atomic.h201
-rw-r--r--arch/avr32/include/asm/auxvec.h4
-rw-r--r--arch/avr32/include/asm/bitops.h301
-rw-r--r--arch/avr32/include/asm/bug.h73
-rw-r--r--arch/avr32/include/asm/bugs.h15
-rw-r--r--arch/avr32/include/asm/byteorder.h31
-rw-r--r--arch/avr32/include/asm/cache.h38
-rw-r--r--arch/avr32/include/asm/cachectl.h11
-rw-r--r--arch/avr32/include/asm/cacheflush.h131
-rw-r--r--arch/avr32/include/asm/checksum.h152
-rw-r--r--arch/avr32/include/asm/cputime.h6
-rw-r--r--arch/avr32/include/asm/current.h15
-rw-r--r--arch/avr32/include/asm/delay.h26
-rw-r--r--arch/avr32/include/asm/device.h7
-rw-r--r--arch/avr32/include/asm/div64.h6
-rw-r--r--arch/avr32/include/asm/dma-mapping.h349
-rw-r--r--arch/avr32/include/asm/dma.h8
-rw-r--r--arch/avr32/include/asm/elf.h108
-rw-r--r--arch/avr32/include/asm/emergency-restart.h6
-rw-r--r--arch/avr32/include/asm/errno.h6
-rw-r--r--arch/avr32/include/asm/fb.h21
-rw-r--r--arch/avr32/include/asm/fcntl.h6
-rw-r--r--arch/avr32/include/asm/futex.h6
-rw-r--r--arch/avr32/include/asm/gpio.h6
-rw-r--r--arch/avr32/include/asm/hardirq.h34
-rw-r--r--arch/avr32/include/asm/hw_irq.h9
-rw-r--r--arch/avr32/include/asm/io.h312
-rw-r--r--arch/avr32/include/asm/ioctl.h6
-rw-r--r--arch/avr32/include/asm/ioctls.h87
-rw-r--r--arch/avr32/include/asm/ipcbuf.h29
-rw-r--r--arch/avr32/include/asm/irq.h24
-rw-r--r--arch/avr32/include/asm/irq_regs.h1
-rw-r--r--arch/avr32/include/asm/irqflags.h68
-rw-r--r--arch/avr32/include/asm/kdebug.h11
-rw-r--r--arch/avr32/include/asm/kmap_types.h30
-rw-r--r--arch/avr32/include/asm/kprobes.h35
-rw-r--r--arch/avr32/include/asm/linkage.h7
-rw-r--r--arch/avr32/include/asm/local.h6
-rw-r--r--arch/avr32/include/asm/mach/serial_at91.h33
-rw-r--r--arch/avr32/include/asm/mman.h17
-rw-r--r--arch/avr32/include/asm/mmu.h10
-rw-r--r--arch/avr32/include/asm/mmu_context.h148
-rw-r--r--arch/avr32/include/asm/module.h28
-rw-r--r--arch/avr32/include/asm/msgbuf.h31
-rw-r--r--arch/avr32/include/asm/mutex.h9
-rw-r--r--arch/avr32/include/asm/numnodes.h7
-rw-r--r--arch/avr32/include/asm/ocd.h543
-rw-r--r--arch/avr32/include/asm/page.h104
-rw-r--r--arch/avr32/include/asm/param.h23
-rw-r--r--arch/avr32/include/asm/pci.h10
-rw-r--r--arch/avr32/include/asm/percpu.h6
-rw-r--r--arch/avr32/include/asm/pgalloc.h98
-rw-r--r--arch/avr32/include/asm/pgtable-2level.h47
-rw-r--r--arch/avr32/include/asm/pgtable.h377
-rw-r--r--arch/avr32/include/asm/poll.h1
-rw-r--r--arch/avr32/include/asm/posix_types.h125
-rw-r--r--arch/avr32/include/asm/processor.h178
-rw-r--r--arch/avr32/include/asm/ptrace.h157
-rw-r--r--arch/avr32/include/asm/resource.h6
-rw-r--r--arch/avr32/include/asm/scatterlist.h26
-rw-r--r--arch/avr32/include/asm/sections.h6
-rw-r--r--arch/avr32/include/asm/sembuf.h25
-rw-r--r--arch/avr32/include/asm/serial.h13
-rw-r--r--arch/avr32/include/asm/setup.h138
-rw-r--r--arch/avr32/include/asm/shmbuf.h42
-rw-r--r--arch/avr32/include/asm/shmparam.h6
-rw-r--r--arch/avr32/include/asm/sigcontext.h34
-rw-r--r--arch/avr32/include/asm/siginfo.h6
-rw-r--r--arch/avr32/include/asm/signal.h168
-rw-r--r--arch/avr32/include/asm/socket.h57
-rw-r--r--arch/avr32/include/asm/sockios.h13
-rw-r--r--arch/avr32/include/asm/stat.h79
-rw-r--r--arch/avr32/include/asm/statfs.h6
-rw-r--r--arch/avr32/include/asm/string.h17
-rw-r--r--arch/avr32/include/asm/sysreg.h291
-rw-r--r--arch/avr32/include/asm/system.h178
-rw-r--r--arch/avr32/include/asm/termbits.h195
-rw-r--r--arch/avr32/include/asm/termios.h62
-rw-r--r--arch/avr32/include/asm/thread_info.h115
-rw-r--r--arch/avr32/include/asm/timex.h39
-rw-r--r--arch/avr32/include/asm/tlb.h32
-rw-r--r--arch/avr32/include/asm/tlbflush.h32
-rw-r--r--arch/avr32/include/asm/topology.h6
-rw-r--r--arch/avr32/include/asm/traps.h23
-rw-r--r--arch/avr32/include/asm/types.h37
-rw-r--r--arch/avr32/include/asm/uaccess.h324
-rw-r--r--arch/avr32/include/asm/ucontext.h12
-rw-r--r--arch/avr32/include/asm/unaligned.h21
-rw-r--r--arch/avr32/include/asm/unistd.h345
-rw-r--r--arch/avr32/include/asm/user.h65
-rw-r--r--arch/avr32/include/asm/xor.h6
-rw-r--r--arch/avr32/kernel/process.c2
-rw-r--r--arch/avr32/kernel/setup.c4
-rw-r--r--arch/avr32/kernel/time.c2
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c8
-rw-r--r--arch/avr32/mach-at32ap/hsmc.c2
-rw-r--r--arch/avr32/mach-at32ap/include/mach/at32ap700x.h49
-rw-r--r--arch/avr32/mach-at32ap/include/mach/board.h121
-rw-r--r--arch/avr32/mach-at32ap/include/mach/cpu.h35
-rw-r--r--arch/avr32/mach-at32ap/include/mach/gpio.h45
-rw-r--r--arch/avr32/mach-at32ap/include/mach/init.h18
-rw-r--r--arch/avr32/mach-at32ap/include/mach/io.h39
-rw-r--r--arch/avr32/mach-at32ap/include/mach/irq.h14
-rw-r--r--arch/avr32/mach-at32ap/include/mach/pm.h51
-rw-r--r--arch/avr32/mach-at32ap/include/mach/portmux.h29
-rw-r--r--arch/avr32/mach-at32ap/include/mach/smc.h113
-rw-r--r--arch/avr32/mach-at32ap/include/mach/sram.h30
-rw-r--r--arch/avr32/mach-at32ap/pio.c2
-rw-r--r--arch/avr32/mach-at32ap/pm-at32ap700x.S2
-rw-r--r--arch/avr32/mach-at32ap/pm.c4
123 files changed, 7331 insertions, 36 deletions
diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
index 17a3529341dd..5b46433d53a5 100644
--- a/arch/avr32/Makefile
+++ b/arch/avr32/Makefile
@@ -23,9 +23,14 @@ KBUILD_AFLAGS += $(cpuflags-y)
23 23
24CHECKFLAGS += -D__avr32__ -D__BIG_ENDIAN 24CHECKFLAGS += -D__avr32__ -D__BIG_ENDIAN
25 25
26machine-$(CONFIG_PLATFORM_AT32AP) := at32ap
27machdirs := $(patsubst %,arch/avr32/mach-%/, $(machine-y))
28
29KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
30
26head-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/head.o 31head-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/head.o
27head-y += arch/avr32/kernel/head.o 32head-y += arch/avr32/kernel/head.o
28core-$(CONFIG_PLATFORM_AT32AP) += arch/avr32/mach-at32ap/ 33core-y += $(machdirs)
29core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/ 34core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/
30core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/ 35core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/
31core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ 36core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
index b07ae63aa548..55ccc9ce4892 100644
--- a/arch/avr32/boards/atngw100/flash.c
+++ b/arch/avr32/boards/atngw100/flash.c
@@ -13,7 +13,7 @@
13#include <linux/mtd/partitions.h> 13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h> 14#include <linux/mtd/physmap.h>
15 15
16#include <asm/arch/smc.h> 16#include <mach/smc.h>
17 17
18static struct smc_timing flash_timing __initdata = { 18static struct smc_timing flash_timing __initdata = {
19 .ncs_read_setup = 0, 19 .ncs_read_setup = 0,
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index c7fe94d03a1e..670c87b2db12 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -23,10 +23,10 @@
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/setup.h> 24#include <asm/setup.h>
25 25
26#include <asm/arch/at32ap700x.h> 26#include <mach/at32ap700x.h>
27#include <asm/arch/board.h> 27#include <mach/board.h>
28#include <asm/arch/init.h> 28#include <mach/init.h>
29#include <asm/arch/portmux.h> 29#include <mach/portmux.h>
30 30
31/* Oscillator frequencies. These are board-specific */ 31/* Oscillator frequencies. These are board-specific */
32unsigned long at32_board_osc_rates[3] = { 32unsigned long at32_board_osc_rates[3] = {
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 8538ba75ef92..b33542b97563 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -23,10 +23,10 @@
23#include <asm/setup.h> 23#include <asm/setup.h>
24#include <asm/atmel-mci.h> 24#include <asm/atmel-mci.h>
25 25
26#include <asm/arch/at32ap700x.h> 26#include <mach/at32ap700x.h>
27#include <asm/arch/board.h> 27#include <mach/board.h>
28#include <asm/arch/init.h> 28#include <mach/init.h>
29#include <asm/arch/portmux.h> 29#include <mach/portmux.h>
30 30
31#include "atstk1000.h" 31#include "atstk1000.h"
32 32
@@ -49,7 +49,7 @@ unsigned long at32_board_osc_rates[3] = {
49 */ 49 */
50#ifdef CONFIG_BOARD_ATSTK1006 50#ifdef CONFIG_BOARD_ATSTK1006
51#include <linux/mtd/partitions.h> 51#include <linux/mtd/partitions.h>
52#include <asm/arch/smc.h> 52#include <mach/smc.h>
53 53
54static struct smc_timing nand_timing __initdata = { 54static struct smc_timing nand_timing __initdata = {
55 .ncs_read_setup = 0, 55 .ncs_read_setup = 0,
diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
index 591fc73b554a..0cf664174c17 100644
--- a/arch/avr32/boards/atstk1000/atstk1003.c
+++ b/arch/avr32/boards/atstk1000/atstk1003.c
@@ -20,10 +20,10 @@
20 20
21#include <asm/setup.h> 21#include <asm/setup.h>
22 22
23#include <asm/arch/at32ap700x.h> 23#include <mach/at32ap700x.h>
24#include <asm/arch/board.h> 24#include <mach/board.h>
25#include <asm/arch/init.h> 25#include <mach/init.h>
26#include <asm/arch/portmux.h> 26#include <mach/portmux.h>
27 27
28#include "atstk1000.h" 28#include "atstk1000.h"
29 29
diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
index d9c5e0a21256..50a5273e5916 100644
--- a/arch/avr32/boards/atstk1000/atstk1004.c
+++ b/arch/avr32/boards/atstk1000/atstk1004.c
@@ -22,10 +22,10 @@
22 22
23#include <asm/setup.h> 23#include <asm/setup.h>
24 24
25#include <asm/arch/at32ap700x.h> 25#include <mach/at32ap700x.h>
26#include <asm/arch/board.h> 26#include <mach/board.h>
27#include <asm/arch/init.h> 27#include <mach/init.h>
28#include <asm/arch/portmux.h> 28#include <mach/portmux.h>
29 29
30#include "atstk1000.h" 30#include "atstk1000.h"
31 31
diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c
index 3d0a102ad45e..6e4d561977ff 100644
--- a/arch/avr32/boards/atstk1000/flash.c
+++ b/arch/avr32/boards/atstk1000/flash.c
@@ -13,7 +13,7 @@
13#include <linux/mtd/partitions.h> 13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h> 14#include <linux/mtd/physmap.h>
15 15
16#include <asm/arch/smc.h> 16#include <mach/smc.h>
17 17
18static struct smc_timing flash_timing __initdata = { 18static struct smc_timing flash_timing __initdata = {
19 .ncs_read_setup = 0, 19 .ncs_read_setup = 0,
diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c
index 8bedf93876a3..2d6b560115d9 100644
--- a/arch/avr32/boards/atstk1000/setup.c
+++ b/arch/avr32/boards/atstk1000/setup.c
@@ -18,9 +18,9 @@
18 18
19#include <asm/setup.h> 19#include <asm/setup.h>
20 20
21#include <asm/arch/at32ap700x.h> 21#include <mach/at32ap700x.h>
22#include <asm/arch/board.h> 22#include <mach/board.h>
23#include <asm/arch/portmux.h> 23#include <mach/portmux.h>
24 24
25#include "atstk1000.h" 25#include "atstk1000.h"
26 26
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild
new file mode 100644
index 000000000000..3136628ba8d2
--- /dev/null
+++ b/arch/avr32/include/asm/Kbuild
@@ -0,0 +1,3 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += cachectl.h
diff --git a/arch/avr32/include/asm/a.out.h b/arch/avr32/include/asm/a.out.h
new file mode 100644
index 000000000000..e46375a34a72
--- /dev/null
+++ b/arch/avr32/include/asm/a.out.h
@@ -0,0 +1,20 @@
1#ifndef __ASM_AVR32_A_OUT_H
2#define __ASM_AVR32_A_OUT_H
3
4struct exec
5{
6 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
7 unsigned a_text; /* length of text, in bytes */
8 unsigned a_data; /* length of data, in bytes */
9 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
10 unsigned a_syms; /* length of symbol table data in file, in bytes */
11 unsigned a_entry; /* start address */
12 unsigned a_trsize; /* length of relocation info for text, in bytes */
13 unsigned a_drsize; /* length of relocation info for data, in bytes */
14};
15
16#define N_TRSIZE(a) ((a).a_trsize)
17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms)
19
20#endif /* __ASM_AVR32_A_OUT_H */
diff --git a/arch/avr32/include/asm/addrspace.h b/arch/avr32/include/asm/addrspace.h
new file mode 100644
index 000000000000..366794858ec7
--- /dev/null
+++ b/arch/avr32/include/asm/addrspace.h
@@ -0,0 +1,43 @@
1/*
2 * Defitions for the address spaces of the AVR32 CPUs. Heavily based on
3 * include/asm-sh/addrspace.h
4 *
5 * Copyright (C) 2004-2006 Atmel Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ASM_AVR32_ADDRSPACE_H
12#define __ASM_AVR32_ADDRSPACE_H
13
14#ifdef CONFIG_MMU
15
16/* Memory segments when segmentation is enabled */
17#define P0SEG 0x00000000
18#define P1SEG 0x80000000
19#define P2SEG 0xa0000000
20#define P3SEG 0xc0000000
21#define P4SEG 0xe0000000
22
23/* Returns the privileged segment base of a given address */
24#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
25
26/* Returns the physical address of a PnSEG (n=1,2) address */
27#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
28
29/*
30 * Map an address to a certain privileged segment
31 */
32#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
33 | P1SEG))
34#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
35 | P2SEG))
36#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
37 | P3SEG))
38#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
39 | P4SEG))
40
41#endif /* CONFIG_MMU */
42
43#endif /* __ASM_AVR32_ADDRSPACE_H */
diff --git a/arch/avr32/include/asm/asm.h b/arch/avr32/include/asm/asm.h
new file mode 100644
index 000000000000..a2c64f404b98
--- /dev/null
+++ b/arch/avr32/include/asm/asm.h
@@ -0,0 +1,102 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_ASM_H__
9#define __ASM_AVR32_ASM_H__
10
11#include <asm/sysreg.h>
12#include <asm/asm-offsets.h>
13#include <asm/thread_info.h>
14
15#define mask_interrupts ssrf SYSREG_GM_OFFSET
16#define mask_exceptions ssrf SYSREG_EM_OFFSET
17#define unmask_interrupts csrf SYSREG_GM_OFFSET
18#define unmask_exceptions csrf SYSREG_EM_OFFSET
19
20#ifdef CONFIG_FRAME_POINTER
21 .macro save_fp
22 st.w --sp, r7
23 .endm
24 .macro restore_fp
25 ld.w r7, sp++
26 .endm
27 .macro zero_fp
28 mov r7, 0
29 .endm
30#else
31 .macro save_fp
32 .endm
33 .macro restore_fp
34 .endm
35 .macro zero_fp
36 .endm
37#endif
38 .macro get_thread_info reg
39 mov \reg, sp
40 andl \reg, ~(THREAD_SIZE - 1) & 0xffff
41 .endm
42
43 /* Save and restore registers */
44 .macro save_min sr, tmp=lr
45 pushm lr
46 mfsr \tmp, \sr
47 zero_fp
48 st.w --sp, \tmp
49 .endm
50
51 .macro restore_min sr, tmp=lr
52 ld.w \tmp, sp++
53 mtsr \sr, \tmp
54 popm lr
55 .endm
56
57 .macro save_half sr, tmp=lr
58 save_fp
59 pushm r8-r9,r10,r11,r12,lr
60 zero_fp
61 mfsr \tmp, \sr
62 st.w --sp, \tmp
63 .endm
64
65 .macro restore_half sr, tmp=lr
66 ld.w \tmp, sp++
67 mtsr \sr, \tmp
68 popm r8-r9,r10,r11,r12,lr
69 restore_fp
70 .endm
71
72 .macro save_full_user sr, tmp=lr
73 stmts --sp, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr
74 st.w --sp, lr
75 zero_fp
76 mfsr \tmp, \sr
77 st.w --sp, \tmp
78 .endm
79
80 .macro restore_full_user sr, tmp=lr
81 ld.w \tmp, sp++
82 mtsr \sr, \tmp
83 ld.w lr, sp++
84 ldmts sp++, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr
85 .endm
86
87 /* uaccess macros */
88 .macro branch_if_kernel scratch, label
89 get_thread_info \scratch
90 ld.w \scratch, \scratch[TI_flags]
91 bld \scratch, TIF_USERSPACE
92 brcc \label
93 .endm
94
95 .macro ret_if_privileged scratch, addr, size, ret
96 sub \scratch, \size, 1
97 add \scratch, \addr
98 retcs \ret
99 retmi \ret
100 .endm
101
102#endif /* __ASM_AVR32_ASM_H__ */
diff --git a/arch/avr32/include/asm/atmel-mci.h b/arch/avr32/include/asm/atmel-mci.h
new file mode 100644
index 000000000000..c2ea6e1c9aa1
--- /dev/null
+++ b/arch/avr32/include/asm/atmel-mci.h
@@ -0,0 +1,9 @@
1#ifndef __ASM_AVR32_ATMEL_MCI_H
2#define __ASM_AVR32_ATMEL_MCI_H
3
4struct mci_platform_data {
5 int detect_pin;
6 int wp_pin;
7};
8
9#endif /* __ASM_AVR32_ATMEL_MCI_H */
diff --git a/arch/avr32/include/asm/atomic.h b/arch/avr32/include/asm/atomic.h
new file mode 100644
index 000000000000..7ef3862a73d0
--- /dev/null
+++ b/arch/avr32/include/asm/atomic.h
@@ -0,0 +1,201 @@
1/*
2 * Atomic operations that C can't guarantee us. Useful for
3 * resource counting etc.
4 *
5 * But use these as seldom as possible since they are slower than
6 * regular operations.
7 *
8 * Copyright (C) 2004-2006 Atmel Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14#ifndef __ASM_AVR32_ATOMIC_H
15#define __ASM_AVR32_ATOMIC_H
16
17#include <asm/system.h>
18
19typedef struct { volatile int counter; } atomic_t;
20#define ATOMIC_INIT(i) { (i) }
21
22#define atomic_read(v) ((v)->counter)
23#define atomic_set(v, i) (((v)->counter) = i)
24
25/*
26 * atomic_sub_return - subtract the atomic variable
27 * @i: integer value to subtract
28 * @v: pointer of type atomic_t
29 *
30 * Atomically subtracts @i from @v. Returns the resulting value.
31 */
32static inline int atomic_sub_return(int i, atomic_t *v)
33{
34 int result;
35
36 asm volatile(
37 "/* atomic_sub_return */\n"
38 "1: ssrf 5\n"
39 " ld.w %0, %2\n"
40 " sub %0, %3\n"
41 " stcond %1, %0\n"
42 " brne 1b"
43 : "=&r"(result), "=o"(v->counter)
44 : "m"(v->counter), "rKs21"(i)
45 : "cc");
46
47 return result;
48}
49
50/*
51 * atomic_add_return - add integer to atomic variable
52 * @i: integer value to add
53 * @v: pointer of type atomic_t
54 *
55 * Atomically adds @i to @v. Returns the resulting value.
56 */
57static inline int atomic_add_return(int i, atomic_t *v)
58{
59 int result;
60
61 if (__builtin_constant_p(i) && (i >= -1048575) && (i <= 1048576))
62 result = atomic_sub_return(-i, v);
63 else
64 asm volatile(
65 "/* atomic_add_return */\n"
66 "1: ssrf 5\n"
67 " ld.w %0, %1\n"
68 " add %0, %3\n"
69 " stcond %2, %0\n"
70 " brne 1b"
71 : "=&r"(result), "=o"(v->counter)
72 : "m"(v->counter), "r"(i)
73 : "cc", "memory");
74
75 return result;
76}
77
78/*
79 * atomic_sub_unless - sub unless the number is a given value
80 * @v: pointer of type atomic_t
81 * @a: the amount to add to v...
82 * @u: ...unless v is equal to u.
83 *
84 * If the atomic value v is not equal to u, this function subtracts a
85 * from v, and returns non zero. If v is equal to u then it returns
86 * zero. This is done as an atomic operation.
87*/
88static inline int atomic_sub_unless(atomic_t *v, int a, int u)
89{
90 int tmp, result = 0;
91
92 asm volatile(
93 "/* atomic_sub_unless */\n"
94 "1: ssrf 5\n"
95 " ld.w %0, %3\n"
96 " cp.w %0, %5\n"
97 " breq 1f\n"
98 " sub %0, %4\n"
99 " stcond %2, %0\n"
100 " brne 1b\n"
101 " mov %1, 1\n"
102 "1:"
103 : "=&r"(tmp), "=&r"(result), "=o"(v->counter)
104 : "m"(v->counter), "rKs21"(a), "rKs21"(u), "1"(result)
105 : "cc", "memory");
106
107 return result;
108}
109
110/*
111 * atomic_add_unless - add unless the number is a given value
112 * @v: pointer of type atomic_t
113 * @a: the amount to add to v...
114 * @u: ...unless v is equal to u.
115 *
116 * If the atomic value v is not equal to u, this function adds a to v,
117 * and returns non zero. If v is equal to u then it returns zero. This
118 * is done as an atomic operation.
119*/
120static inline int atomic_add_unless(atomic_t *v, int a, int u)
121{
122 int tmp, result;
123
124 if (__builtin_constant_p(a) && (a >= -1048575) && (a <= 1048576))
125 result = atomic_sub_unless(v, -a, u);
126 else {
127 result = 0;
128 asm volatile(
129 "/* atomic_add_unless */\n"
130 "1: ssrf 5\n"
131 " ld.w %0, %3\n"
132 " cp.w %0, %5\n"
133 " breq 1f\n"
134 " add %0, %4\n"
135 " stcond %2, %0\n"
136 " brne 1b\n"
137 " mov %1, 1\n"
138 "1:"
139 : "=&r"(tmp), "=&r"(result), "=o"(v->counter)
140 : "m"(v->counter), "r"(a), "ir"(u), "1"(result)
141 : "cc", "memory");
142 }
143
144 return result;
145}
146
147/*
148 * atomic_sub_if_positive - conditionally subtract integer from atomic variable
149 * @i: integer value to subtract
150 * @v: pointer of type atomic_t
151 *
152 * Atomically test @v and subtract @i if @v is greater or equal than @i.
153 * The function returns the old value of @v minus @i.
154 */
155static inline int atomic_sub_if_positive(int i, atomic_t *v)
156{
157 int result;
158
159 asm volatile(
160 "/* atomic_sub_if_positive */\n"
161 "1: ssrf 5\n"
162 " ld.w %0, %2\n"
163 " sub %0, %3\n"
164 " brlt 1f\n"
165 " stcond %1, %0\n"
166 " brne 1b\n"
167 "1:"
168 : "=&r"(result), "=o"(v->counter)
169 : "m"(v->counter), "ir"(i)
170 : "cc", "memory");
171
172 return result;
173}
174
175#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
176#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
177
178#define atomic_sub(i, v) (void)atomic_sub_return(i, v)
179#define atomic_add(i, v) (void)atomic_add_return(i, v)
180#define atomic_dec(v) atomic_sub(1, (v))
181#define atomic_inc(v) atomic_add(1, (v))
182
183#define atomic_dec_return(v) atomic_sub_return(1, v)
184#define atomic_inc_return(v) atomic_add_return(1, v)
185
186#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
187#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
188#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
189#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
190
191#define atomic_inc_not_zero(v) atomic_add_unless(v, 1, 0)
192#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v)
193
194#define smp_mb__before_atomic_dec() barrier()
195#define smp_mb__after_atomic_dec() barrier()
196#define smp_mb__before_atomic_inc() barrier()
197#define smp_mb__after_atomic_inc() barrier()
198
199#include <asm-generic/atomic.h>
200
201#endif /* __ASM_AVR32_ATOMIC_H */
diff --git a/arch/avr32/include/asm/auxvec.h b/arch/avr32/include/asm/auxvec.h
new file mode 100644
index 000000000000..d5dd435bf8f4
--- /dev/null
+++ b/arch/avr32/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef __ASM_AVR32_AUXVEC_H
2#define __ASM_AVR32_AUXVEC_H
3
4#endif /* __ASM_AVR32_AUXVEC_H */
diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h
new file mode 100644
index 000000000000..1a50b69b1a19
--- /dev/null
+++ b/arch/avr32/include/asm/bitops.h
@@ -0,0 +1,301 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_BITOPS_H
9#define __ASM_AVR32_BITOPS_H
10
11#ifndef _LINUX_BITOPS_H
12#error only <linux/bitops.h> can be included directly
13#endif
14
15#include <asm/byteorder.h>
16#include <asm/system.h>
17
18/*
19 * clear_bit() doesn't provide any barrier for the compiler
20 */
21#define smp_mb__before_clear_bit() barrier()
22#define smp_mb__after_clear_bit() barrier()
23
24/*
25 * set_bit - Atomically set a bit in memory
26 * @nr: the bit to set
27 * @addr: the address to start counting from
28 *
29 * This function is atomic and may not be reordered. See __set_bit()
30 * if you do not require the atomic guarantees.
31 *
32 * Note that @nr may be almost arbitrarily large; this function is not
33 * restricted to acting on a single-word quantity.
34 */
35static inline void set_bit(int nr, volatile void * addr)
36{
37 unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
38 unsigned long tmp;
39
40 if (__builtin_constant_p(nr)) {
41 asm volatile(
42 "1: ssrf 5\n"
43 " ld.w %0, %2\n"
44 " sbr %0, %3\n"
45 " stcond %1, %0\n"
46 " brne 1b"
47 : "=&r"(tmp), "=o"(*p)
48 : "m"(*p), "i"(nr)
49 : "cc");
50 } else {
51 unsigned long mask = 1UL << (nr % BITS_PER_LONG);
52 asm volatile(
53 "1: ssrf 5\n"
54 " ld.w %0, %2\n"
55 " or %0, %3\n"
56 " stcond %1, %0\n"
57 " brne 1b"
58 : "=&r"(tmp), "=o"(*p)
59 : "m"(*p), "r"(mask)
60 : "cc");
61 }
62}
63
64/*
65 * clear_bit - Clears a bit in memory
66 * @nr: Bit to clear
67 * @addr: Address to start counting from
68 *
69 * clear_bit() is atomic and may not be reordered. However, it does
70 * not contain a memory barrier, so if it is used for locking purposes,
71 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
72 * in order to ensure changes are visible on other processors.
73 */
74static inline void clear_bit(int nr, volatile void * addr)
75{
76 unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
77 unsigned long tmp;
78
79 if (__builtin_constant_p(nr)) {
80 asm volatile(
81 "1: ssrf 5\n"
82 " ld.w %0, %2\n"
83 " cbr %0, %3\n"
84 " stcond %1, %0\n"
85 " brne 1b"
86 : "=&r"(tmp), "=o"(*p)
87 : "m"(*p), "i"(nr)
88 : "cc");
89 } else {
90 unsigned long mask = 1UL << (nr % BITS_PER_LONG);
91 asm volatile(
92 "1: ssrf 5\n"
93 " ld.w %0, %2\n"
94 " andn %0, %3\n"
95 " stcond %1, %0\n"
96 " brne 1b"
97 : "=&r"(tmp), "=o"(*p)
98 : "m"(*p), "r"(mask)
99 : "cc");
100 }
101}
102
103/*
104 * change_bit - Toggle a bit in memory
105 * @nr: Bit to change
106 * @addr: Address to start counting from
107 *
108 * change_bit() is atomic and may not be reordered.
109 * Note that @nr may be almost arbitrarily large; this function is not
110 * restricted to acting on a single-word quantity.
111 */
112static inline void change_bit(int nr, volatile void * addr)
113{
114 unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
115 unsigned long mask = 1UL << (nr % BITS_PER_LONG);
116 unsigned long tmp;
117
118 asm volatile(
119 "1: ssrf 5\n"
120 " ld.w %0, %2\n"
121 " eor %0, %3\n"
122 " stcond %1, %0\n"
123 " brne 1b"
124 : "=&r"(tmp), "=o"(*p)
125 : "m"(*p), "r"(mask)
126 : "cc");
127}
128
129/*
130 * test_and_set_bit - Set a bit and return its old value
131 * @nr: Bit to set
132 * @addr: Address to count from
133 *
134 * This operation is atomic and cannot be reordered.
135 * It also implies a memory barrier.
136 */
137static inline int test_and_set_bit(int nr, volatile void * addr)
138{
139 unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
140 unsigned long mask = 1UL << (nr % BITS_PER_LONG);
141 unsigned long tmp, old;
142
143 if (__builtin_constant_p(nr)) {
144 asm volatile(
145 "1: ssrf 5\n"
146 " ld.w %0, %3\n"
147 " mov %2, %0\n"
148 " sbr %0, %4\n"
149 " stcond %1, %0\n"
150 " brne 1b"
151 : "=&r"(tmp), "=o"(*p), "=&r"(old)
152 : "m"(*p), "i"(nr)
153 : "memory", "cc");
154 } else {
155 asm volatile(
156 "1: ssrf 5\n"
157 " ld.w %2, %3\n"
158 " or %0, %2, %4\n"
159 " stcond %1, %0\n"
160 " brne 1b"
161 : "=&r"(tmp), "=o"(*p), "=&r"(old)
162 : "m"(*p), "r"(mask)
163 : "memory", "cc");
164 }
165
166 return (old & mask) != 0;
167}
168
169/*
170 * test_and_clear_bit - Clear a bit and return its old value
171 * @nr: Bit to clear
172 * @addr: Address to count from
173 *
174 * This operation is atomic and cannot be reordered.
175 * It also implies a memory barrier.
176 */
177static inline int test_and_clear_bit(int nr, volatile void * addr)
178{
179 unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
180 unsigned long mask = 1UL << (nr % BITS_PER_LONG);
181 unsigned long tmp, old;
182
183 if (__builtin_constant_p(nr)) {
184 asm volatile(
185 "1: ssrf 5\n"
186 " ld.w %0, %3\n"
187 " mov %2, %0\n"
188 " cbr %0, %4\n"
189 " stcond %1, %0\n"
190 " brne 1b"
191 : "=&r"(tmp), "=o"(*p), "=&r"(old)
192 : "m"(*p), "i"(nr)
193 : "memory", "cc");
194 } else {
195 asm volatile(
196 "1: ssrf 5\n"
197 " ld.w %0, %3\n"
198 " mov %2, %0\n"
199 " andn %0, %4\n"
200 " stcond %1, %0\n"
201 " brne 1b"
202 : "=&r"(tmp), "=o"(*p), "=&r"(old)
203 : "m"(*p), "r"(mask)
204 : "memory", "cc");
205 }
206
207 return (old & mask) != 0;
208}
209
210/*
211 * test_and_change_bit - Change a bit and return its old value
212 * @nr: Bit to change
213 * @addr: Address to count from
214 *
215 * This operation is atomic and cannot be reordered.
216 * It also implies a memory barrier.
217 */
218static inline int test_and_change_bit(int nr, volatile void * addr)
219{
220 unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
221 unsigned long mask = 1UL << (nr % BITS_PER_LONG);
222 unsigned long tmp, old;
223
224 asm volatile(
225 "1: ssrf 5\n"
226 " ld.w %2, %3\n"
227 " eor %0, %2, %4\n"
228 " stcond %1, %0\n"
229 " brne 1b"
230 : "=&r"(tmp), "=o"(*p), "=&r"(old)
231 : "m"(*p), "r"(mask)
232 : "memory", "cc");
233
234 return (old & mask) != 0;
235}
236
237#include <asm-generic/bitops/non-atomic.h>
238
239/* Find First bit Set */
240static inline unsigned long __ffs(unsigned long word)
241{
242 unsigned long result;
243
244 asm("brev %1\n\t"
245 "clz %0,%1"
246 : "=r"(result), "=&r"(word)
247 : "1"(word));
248 return result;
249}
250
251/* Find First Zero */
252static inline unsigned long ffz(unsigned long word)
253{
254 return __ffs(~word);
255}
256
257/* Find Last bit Set */
258static inline int fls(unsigned long word)
259{
260 unsigned long result;
261
262 asm("clz %0,%1" : "=r"(result) : "r"(word));
263 return 32 - result;
264}
265
266unsigned long find_first_zero_bit(const unsigned long *addr,
267 unsigned long size);
268unsigned long find_next_zero_bit(const unsigned long *addr,
269 unsigned long size,
270 unsigned long offset);
271unsigned long find_first_bit(const unsigned long *addr,
272 unsigned long size);
273unsigned long find_next_bit(const unsigned long *addr,
274 unsigned long size,
275 unsigned long offset);
276
277/*
278 * ffs: find first bit set. This is defined the same way as
279 * the libc and compiler builtin ffs routines, therefore
280 * differs in spirit from the above ffz (man ffs).
281 *
282 * The difference is that bit numbering starts at 1, and if no bit is set,
283 * the function returns 0.
284 */
285static inline int ffs(unsigned long word)
286{
287 if(word == 0)
288 return 0;
289 return __ffs(word) + 1;
290}
291
292#include <asm-generic/bitops/fls64.h>
293#include <asm-generic/bitops/sched.h>
294#include <asm-generic/bitops/hweight.h>
295#include <asm-generic/bitops/lock.h>
296
297#include <asm-generic/bitops/ext2-non-atomic.h>
298#include <asm-generic/bitops/ext2-atomic.h>
299#include <asm-generic/bitops/minix-le.h>
300
301#endif /* __ASM_AVR32_BITOPS_H */
diff --git a/arch/avr32/include/asm/bug.h b/arch/avr32/include/asm/bug.h
new file mode 100644
index 000000000000..331d45bab18f
--- /dev/null
+++ b/arch/avr32/include/asm/bug.h
@@ -0,0 +1,73 @@
1/*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_BUG_H
9#define __ASM_AVR32_BUG_H
10
11#ifdef CONFIG_BUG
12
13/*
14 * According to our Chief Architect, this compact opcode is very
15 * unlikely to ever be implemented.
16 */
17#define AVR32_BUG_OPCODE 0x5df0
18
19#ifdef CONFIG_DEBUG_BUGVERBOSE
20
21#define _BUG_OR_WARN(flags) \
22 asm volatile( \
23 "1: .hword %0\n" \
24 " .section __bug_table,\"a\",@progbits\n" \
25 "2: .long 1b\n" \
26 " .long %1\n" \
27 " .short %2\n" \
28 " .short %3\n" \
29 " .org 2b + %4\n" \
30 " .previous" \
31 : \
32 : "i"(AVR32_BUG_OPCODE), "i"(__FILE__), \
33 "i"(__LINE__), "i"(flags), \
34 "i"(sizeof(struct bug_entry)))
35
36#else
37
38#define _BUG_OR_WARN(flags) \
39 asm volatile( \
40 "1: .hword %0\n" \
41 " .section __bug_table,\"a\",@progbits\n" \
42 "2: .long 1b\n" \
43 " .short %1\n" \
44 " .org 2b + %2\n" \
45 " .previous" \
46 : \
47 : "i"(AVR32_BUG_OPCODE), "i"(flags), \
48 "i"(sizeof(struct bug_entry)))
49
50#endif /* CONFIG_DEBUG_BUGVERBOSE */
51
52#define BUG() \
53 do { \
54 _BUG_OR_WARN(0); \
55 for (;;); \
56 } while (0)
57
58#define WARN_ON(condition) \
59 ({ \
60 int __ret_warn_on = !!(condition); \
61 if (unlikely(__ret_warn_on)) \
62 _BUG_OR_WARN(BUGFLAG_WARNING); \
63 unlikely(__ret_warn_on); \
64 })
65
66#define HAVE_ARCH_BUG
67#define HAVE_ARCH_WARN_ON
68
69#endif /* CONFIG_BUG */
70
71#include <asm-generic/bug.h>
72
73#endif /* __ASM_AVR32_BUG_H */
diff --git a/arch/avr32/include/asm/bugs.h b/arch/avr32/include/asm/bugs.h
new file mode 100644
index 000000000000..7635e770622e
--- /dev/null
+++ b/arch/avr32/include/asm/bugs.h
@@ -0,0 +1,15 @@
1/*
2 * This is included by init/main.c to check for architecture-dependent bugs.
3 *
4 * Needs:
5 * void check_bugs(void);
6 */
7#ifndef __ASM_AVR32_BUGS_H
8#define __ASM_AVR32_BUGS_H
9
10static void __init check_bugs(void)
11{
12 cpu_data->loops_per_jiffy = loops_per_jiffy;
13}
14
15#endif /* __ASM_AVR32_BUGS_H */
diff --git a/arch/avr32/include/asm/byteorder.h b/arch/avr32/include/asm/byteorder.h
new file mode 100644
index 000000000000..d77b48ba7338
--- /dev/null
+++ b/arch/avr32/include/asm/byteorder.h
@@ -0,0 +1,31 @@
1/*
2 * AVR32 endian-conversion functions.
3 */
4#ifndef __ASM_AVR32_BYTEORDER_H
5#define __ASM_AVR32_BYTEORDER_H
6
7#include <asm/types.h>
8#include <linux/compiler.h>
9
10#ifdef __CHECKER__
11extern unsigned long __builtin_bswap_32(unsigned long x);
12extern unsigned short __builtin_bswap_16(unsigned short x);
13#endif
14
15/*
16 * avr32-linux-gcc versions earlier than 4.2 improperly sign-extends
17 * the result.
18 */
19#if !(__GNUC__ == 4 && __GNUC_MINOR__ < 2)
20#define __arch__swab32(x) __builtin_bswap_32(x)
21#define __arch__swab16(x) __builtin_bswap_16(x)
22#endif
23
24#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
25# define __BYTEORDER_HAS_U64__
26# define __SWAB_64_THRU_32__
27#endif
28
29#include <linux/byteorder/big_endian.h>
30
31#endif /* __ASM_AVR32_BYTEORDER_H */
diff --git a/arch/avr32/include/asm/cache.h b/arch/avr32/include/asm/cache.h
new file mode 100644
index 000000000000..d3cf35ab11ab
--- /dev/null
+++ b/arch/avr32/include/asm/cache.h
@@ -0,0 +1,38 @@
1#ifndef __ASM_AVR32_CACHE_H
2#define __ASM_AVR32_CACHE_H
3
4#define L1_CACHE_SHIFT 5
5#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
6
7/*
8 * Memory returned by kmalloc() may be used for DMA, so we must make
9 * sure that all such allocations are cache aligned. Otherwise,
10 * unrelated code may cause parts of the buffer to be read into the
11 * cache before the transfer is done, causing old data to be seen by
12 * the CPU.
13 */
14#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
15
16#ifndef __ASSEMBLER__
17struct cache_info {
18 unsigned int ways;
19 unsigned int sets;
20 unsigned int linesz;
21};
22#endif /* __ASSEMBLER */
23
24/* Cache operation constants */
25#define ICACHE_FLUSH 0x00
26#define ICACHE_INVALIDATE 0x01
27#define ICACHE_LOCK 0x02
28#define ICACHE_UNLOCK 0x03
29#define ICACHE_PREFETCH 0x04
30
31#define DCACHE_FLUSH 0x08
32#define DCACHE_LOCK 0x09
33#define DCACHE_UNLOCK 0x0a
34#define DCACHE_INVALIDATE 0x0b
35#define DCACHE_CLEAN 0x0c
36#define DCACHE_CLEAN_INVAL 0x0d
37
38#endif /* __ASM_AVR32_CACHE_H */
diff --git a/arch/avr32/include/asm/cachectl.h b/arch/avr32/include/asm/cachectl.h
new file mode 100644
index 000000000000..4faf1ce60061
--- /dev/null
+++ b/arch/avr32/include/asm/cachectl.h
@@ -0,0 +1,11 @@
1#ifndef __ASM_AVR32_CACHECTL_H
2#define __ASM_AVR32_CACHECTL_H
3
4/*
5 * Operations that can be performed through the cacheflush system call
6 */
7
8/* Clean the data cache, then invalidate the icache */
9#define CACHE_IFLUSH 0
10
11#endif /* __ASM_AVR32_CACHECTL_H */
diff --git a/arch/avr32/include/asm/cacheflush.h b/arch/avr32/include/asm/cacheflush.h
new file mode 100644
index 000000000000..670674749b20
--- /dev/null
+++ b/arch/avr32/include/asm/cacheflush.h
@@ -0,0 +1,131 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_CACHEFLUSH_H
9#define __ASM_AVR32_CACHEFLUSH_H
10
11/* Keep includes the same across arches. */
12#include <linux/mm.h>
13
14#define CACHE_OP_ICACHE_INVALIDATE 0x01
15#define CACHE_OP_DCACHE_INVALIDATE 0x0b
16#define CACHE_OP_DCACHE_CLEAN 0x0c
17#define CACHE_OP_DCACHE_CLEAN_INVAL 0x0d
18
19/*
20 * Invalidate any cacheline containing virtual address vaddr without
21 * writing anything back to memory.
22 *
23 * Note that this function may corrupt unrelated data structures when
24 * applied on buffers that are not cacheline aligned in both ends.
25 */
26static inline void invalidate_dcache_line(void *vaddr)
27{
28 asm volatile("cache %0[0], %1"
29 :
30 : "r"(vaddr), "n"(CACHE_OP_DCACHE_INVALIDATE)
31 : "memory");
32}
33
34/*
35 * Make sure any cacheline containing virtual address vaddr is written
36 * to memory.
37 */
38static inline void clean_dcache_line(void *vaddr)
39{
40 asm volatile("cache %0[0], %1"
41 :
42 : "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN)
43 : "memory");
44}
45
46/*
47 * Make sure any cacheline containing virtual address vaddr is written
48 * to memory and then invalidate it.
49 */
50static inline void flush_dcache_line(void *vaddr)
51{
52 asm volatile("cache %0[0], %1"
53 :
54 : "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN_INVAL)
55 : "memory");
56}
57
58/*
59 * Invalidate any instruction cacheline containing virtual address
60 * vaddr.
61 */
62static inline void invalidate_icache_line(void *vaddr)
63{
64 asm volatile("cache %0[0], %1"
65 :
66 : "r"(vaddr), "n"(CACHE_OP_ICACHE_INVALIDATE)
67 : "memory");
68}
69
70/*
71 * Applies the above functions on all lines that are touched by the
72 * specified virtual address range.
73 */
74void invalidate_dcache_region(void *start, size_t len);
75void clean_dcache_region(void *start, size_t len);
76void flush_dcache_region(void *start, size_t len);
77void invalidate_icache_region(void *start, size_t len);
78
79/*
80 * Make sure any pending writes are completed before continuing.
81 */
82#define flush_write_buffer() asm volatile("sync 0" : : : "memory")
83
84/*
85 * The following functions are called when a virtual mapping changes.
86 * We do not need to flush anything in this case.
87 */
88#define flush_cache_all() do { } while (0)
89#define flush_cache_mm(mm) do { } while (0)
90#define flush_cache_dup_mm(mm) do { } while (0)
91#define flush_cache_range(vma, start, end) do { } while (0)
92#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
93#define flush_cache_vmap(start, end) do { } while (0)
94#define flush_cache_vunmap(start, end) do { } while (0)
95
96/*
97 * I think we need to implement this one to be able to reliably
98 * execute pages from RAMDISK. However, if we implement the
99 * flush_dcache_*() functions, it might not be needed anymore.
100 *
101 * #define flush_icache_page(vma, page) do { } while (0)
102 */
103extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
104
105/*
106 * These are (I think) related to D-cache aliasing. We might need to
107 * do something here, but only for certain configurations. No such
108 * configurations exist at this time.
109 */
110#define flush_dcache_page(page) do { } while (0)
111#define flush_dcache_mmap_lock(page) do { } while (0)
112#define flush_dcache_mmap_unlock(page) do { } while (0)
113
114/*
115 * These are for I/D cache coherency. In this case, we do need to
116 * flush with all configurations.
117 */
118extern void flush_icache_range(unsigned long start, unsigned long end);
119
120extern void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
121 unsigned long vaddr, void *dst, const void *src,
122 unsigned long len);
123
124static inline void copy_from_user_page(struct vm_area_struct *vma,
125 struct page *page, unsigned long vaddr, void *dst,
126 const void *src, unsigned long len)
127{
128 memcpy(dst, src, len);
129}
130
131#endif /* __ASM_AVR32_CACHEFLUSH_H */
diff --git a/arch/avr32/include/asm/checksum.h b/arch/avr32/include/asm/checksum.h
new file mode 100644
index 000000000000..4ddbfd2486af
--- /dev/null
+++ b/arch/avr32/include/asm/checksum.h
@@ -0,0 +1,152 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_CHECKSUM_H
9#define __ASM_AVR32_CHECKSUM_H
10
11/*
12 * computes the checksum of a memory block at buff, length len,
13 * and adds in "sum" (32-bit)
14 *
15 * returns a 32-bit number suitable for feeding into itself
16 * or csum_tcpudp_magic
17 *
18 * this function must be called with even lengths, except
19 * for the last fragment, which may be odd
20 *
21 * it's best to have buff aligned on a 32-bit boundary
22 */
23__wsum csum_partial(const void *buff, int len, __wsum sum);
24
25/*
26 * the same as csum_partial, but copies from src while it
27 * checksums, and handles user-space pointer exceptions correctly, when needed.
28 *
29 * here even more important to align src and dst on a 32-bit (or even
30 * better 64-bit) boundary
31 */
32__wsum csum_partial_copy_generic(const void *src, void *dst, int len,
33 __wsum sum, int *src_err_ptr,
34 int *dst_err_ptr);
35
36/*
37 * Note: when you get a NULL pointer exception here this means someone
38 * passed in an incorrect kernel address to one of these functions.
39 *
40 * If you use these functions directly please don't forget the
41 * access_ok().
42 */
43static inline
44__wsum csum_partial_copy_nocheck(const void *src, void *dst,
45 int len, __wsum sum)
46{
47 return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL);
48}
49
50static inline
51__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
52 int len, __wsum sum, int *err_ptr)
53{
54 return csum_partial_copy_generic((const void __force *)src, dst, len,
55 sum, err_ptr, NULL);
56}
57
58/*
59 * This is a version of ip_compute_csum() optimized for IP headers,
60 * which always checksum on 4 octet boundaries.
61 */
62static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
63{
64 unsigned int sum, tmp;
65
66 __asm__ __volatile__(
67 " ld.w %0, %1++\n"
68 " ld.w %3, %1++\n"
69 " sub %2, 4\n"
70 " add %0, %3\n"
71 " ld.w %3, %1++\n"
72 " adc %0, %0, %3\n"
73 " ld.w %3, %1++\n"
74 " adc %0, %0, %3\n"
75 " acr %0\n"
76 "1: ld.w %3, %1++\n"
77 " add %0, %3\n"
78 " acr %0\n"
79 " sub %2, 1\n"
80 " brne 1b\n"
81 " lsl %3, %0, 16\n"
82 " andl %0, 0\n"
83 " mov %2, 0xffff\n"
84 " add %0, %3\n"
85 " adc %0, %0, %2\n"
86 " com %0\n"
87 " lsr %0, 16\n"
88 : "=r"(sum), "=r"(iph), "=r"(ihl), "=r"(tmp)
89 : "1"(iph), "2"(ihl)
90 : "memory", "cc");
91 return (__force __sum16)sum;
92}
93
94/*
95 * Fold a partial checksum
96 */
97
98static inline __sum16 csum_fold(__wsum sum)
99{
100 unsigned int tmp;
101
102 asm(" bfextu %1, %0, 0, 16\n"
103 " lsr %0, 16\n"
104 " add %0, %1\n"
105 " bfextu %1, %0, 16, 16\n"
106 " add %0, %1"
107 : "=&r"(sum), "=&r"(tmp)
108 : "0"(sum));
109
110 return (__force __sum16)~sum;
111}
112
113static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
114 unsigned short len,
115 unsigned short proto,
116 __wsum sum)
117{
118 asm(" add %0, %1\n"
119 " adc %0, %0, %2\n"
120 " adc %0, %0, %3\n"
121 " acr %0"
122 : "=r"(sum)
123 : "r"(daddr), "r"(saddr), "r"(len + proto),
124 "0"(sum)
125 : "cc");
126
127 return sum;
128}
129
130/*
131 * computes the checksum of the TCP/UDP pseudo-header
132 * returns a 16-bit checksum, already complemented
133 */
134static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
135 unsigned short len,
136 unsigned short proto,
137 __wsum sum)
138{
139 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
140}
141
142/*
143 * this routine is used for miscellaneous IP-like checksums, mainly
144 * in icmp.c
145 */
146
147static inline __sum16 ip_compute_csum(const void *buff, int len)
148{
149 return csum_fold(csum_partial(buff, len, 0));
150}
151
152#endif /* __ASM_AVR32_CHECKSUM_H */
diff --git a/arch/avr32/include/asm/cputime.h b/arch/avr32/include/asm/cputime.h
new file mode 100644
index 000000000000..e87e0f81cbeb
--- /dev/null
+++ b/arch/avr32/include/asm/cputime.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_CPUTIME_H
2#define __ASM_AVR32_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __ASM_AVR32_CPUTIME_H */
diff --git a/arch/avr32/include/asm/current.h b/arch/avr32/include/asm/current.h
new file mode 100644
index 000000000000..c7b0549eab8a
--- /dev/null
+++ b/arch/avr32/include/asm/current.h
@@ -0,0 +1,15 @@
1#ifndef __ASM_AVR32_CURRENT_H
2#define __ASM_AVR32_CURRENT_H
3
4#include <linux/thread_info.h>
5
6struct task_struct;
7
8inline static struct task_struct * get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current get_current()
14
15#endif /* __ASM_AVR32_CURRENT_H */
diff --git a/arch/avr32/include/asm/delay.h b/arch/avr32/include/asm/delay.h
new file mode 100644
index 000000000000..a0ed9a9839a5
--- /dev/null
+++ b/arch/avr32/include/asm/delay.h
@@ -0,0 +1,26 @@
1#ifndef __ASM_AVR32_DELAY_H
2#define __ASM_AVR32_DELAY_H
3
4/*
5 * Copyright (C) 1993 Linus Torvalds
6 *
7 * Delay routines calling functions in arch/avr32/lib/delay.c
8 */
9
10extern void __bad_udelay(void);
11extern void __bad_ndelay(void);
12
13extern void __udelay(unsigned long usecs);
14extern void __ndelay(unsigned long nsecs);
15extern void __const_udelay(unsigned long xloops);
16extern void __delay(unsigned long loops);
17
18#define udelay(n) (__builtin_constant_p(n) ? \
19 ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \
20 __udelay(n))
21
22#define ndelay(n) (__builtin_constant_p(n) ? \
23 ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
24 __ndelay(n))
25
26#endif /* __ASM_AVR32_DELAY_H */
diff --git a/arch/avr32/include/asm/device.h b/arch/avr32/include/asm/device.h
new file mode 100644
index 000000000000..d8f9872b0e2d
--- /dev/null
+++ b/arch/avr32/include/asm/device.h
@@ -0,0 +1,7 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/arch/avr32/include/asm/div64.h b/arch/avr32/include/asm/div64.h
new file mode 100644
index 000000000000..d7ddd4fdeca6
--- /dev/null
+++ b/arch/avr32/include/asm/div64.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_DIV64_H
2#define __ASM_AVR32_DIV64_H
3
4#include <asm-generic/div64.h>
5
6#endif /* __ASM_AVR32_DIV64_H */
diff --git a/arch/avr32/include/asm/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..0399359ab5d8
--- /dev/null
+++ b/arch/avr32/include/asm/dma-mapping.h
@@ -0,0 +1,349 @@
1#ifndef __ASM_AVR32_DMA_MAPPING_H
2#define __ASM_AVR32_DMA_MAPPING_H
3
4#include <linux/mm.h>
5#include <linux/device.h>
6#include <linux/scatterlist.h>
7#include <asm/processor.h>
8#include <asm/cacheflush.h>
9#include <asm/io.h>
10
11extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
12 int direction);
13
14/*
15 * Return whether the given device DMA address mask can be supported
16 * properly. For example, if your device can only drive the low 24-bits
17 * during bus mastering, then you would pass 0x00ffffff as the mask
18 * to this function.
19 */
20static inline int dma_supported(struct device *dev, u64 mask)
21{
22 /* Fix when needed. I really don't know of any limitations */
23 return 1;
24}
25
26static inline int dma_set_mask(struct device *dev, u64 dma_mask)
27{
28 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
29 return -EIO;
30
31 *dev->dma_mask = dma_mask;
32 return 0;
33}
34
35/*
36 * dma_map_single can't fail as it is implemented now.
37 */
38static inline int dma_mapping_error(struct device *dev, dma_addr_t addr)
39{
40 return 0;
41}
42
43/**
44 * dma_alloc_coherent - allocate consistent memory for DMA
45 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
46 * @size: required memory size
47 * @handle: bus-specific DMA address
48 *
49 * Allocate some uncached, unbuffered memory for a device for
50 * performing DMA. This function allocates pages, and will
51 * return the CPU-viewed address, and sets @handle to be the
52 * device-viewed address.
53 */
54extern void *dma_alloc_coherent(struct device *dev, size_t size,
55 dma_addr_t *handle, gfp_t gfp);
56
57/**
58 * dma_free_coherent - free memory allocated by dma_alloc_coherent
59 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
60 * @size: size of memory originally requested in dma_alloc_coherent
61 * @cpu_addr: CPU-view address returned from dma_alloc_coherent
62 * @handle: device-view address returned from dma_alloc_coherent
63 *
64 * Free (and unmap) a DMA buffer previously allocated by
65 * dma_alloc_coherent().
66 *
67 * References to memory and mappings associated with cpu_addr/handle
68 * during and after this call executing are illegal.
69 */
70extern void dma_free_coherent(struct device *dev, size_t size,
71 void *cpu_addr, dma_addr_t handle);
72
73/**
74 * dma_alloc_writecombine - allocate write-combining memory for DMA
75 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
76 * @size: required memory size
77 * @handle: bus-specific DMA address
78 *
79 * Allocate some uncached, buffered memory for a device for
80 * performing DMA. This function allocates pages, and will
81 * return the CPU-viewed address, and sets @handle to be the
82 * device-viewed address.
83 */
84extern void *dma_alloc_writecombine(struct device *dev, size_t size,
85 dma_addr_t *handle, gfp_t gfp);
86
87/**
88 * dma_free_coherent - free memory allocated by dma_alloc_writecombine
89 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
90 * @size: size of memory originally requested in dma_alloc_writecombine
91 * @cpu_addr: CPU-view address returned from dma_alloc_writecombine
92 * @handle: device-view address returned from dma_alloc_writecombine
93 *
94 * Free (and unmap) a DMA buffer previously allocated by
95 * dma_alloc_writecombine().
96 *
97 * References to memory and mappings associated with cpu_addr/handle
98 * during and after this call executing are illegal.
99 */
100extern void dma_free_writecombine(struct device *dev, size_t size,
101 void *cpu_addr, dma_addr_t handle);
102
103/**
104 * dma_map_single - map a single buffer for streaming DMA
105 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
106 * @cpu_addr: CPU direct mapped address of buffer
107 * @size: size of buffer to map
108 * @dir: DMA transfer direction
109 *
110 * Ensure that any data held in the cache is appropriately discarded
111 * or written back.
112 *
113 * The device owns this memory once this call has completed. The CPU
114 * can regain ownership by calling dma_unmap_single() or dma_sync_single().
115 */
116static inline dma_addr_t
117dma_map_single(struct device *dev, void *cpu_addr, size_t size,
118 enum dma_data_direction direction)
119{
120 dma_cache_sync(dev, cpu_addr, size, direction);
121 return virt_to_bus(cpu_addr);
122}
123
124/**
125 * dma_unmap_single - unmap a single buffer previously mapped
126 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
127 * @handle: DMA address of buffer
128 * @size: size of buffer to map
129 * @dir: DMA transfer direction
130 *
131 * Unmap a single streaming mode DMA translation. The handle and size
132 * must match what was provided in the previous dma_map_single() call.
133 * All other usages are undefined.
134 *
135 * After this call, reads by the CPU to the buffer are guaranteed to see
136 * whatever the device wrote there.
137 */
138static inline void
139dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
140 enum dma_data_direction direction)
141{
142
143}
144
145/**
146 * dma_map_page - map a portion of a page for streaming DMA
147 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
148 * @page: page that buffer resides in
149 * @offset: offset into page for start of buffer
150 * @size: size of buffer to map
151 * @dir: DMA transfer direction
152 *
153 * Ensure that any data held in the cache is appropriately discarded
154 * or written back.
155 *
156 * The device owns this memory once this call has completed. The CPU
157 * can regain ownership by calling dma_unmap_page() or dma_sync_single().
158 */
159static inline dma_addr_t
160dma_map_page(struct device *dev, struct page *page,
161 unsigned long offset, size_t size,
162 enum dma_data_direction direction)
163{
164 return dma_map_single(dev, page_address(page) + offset,
165 size, direction);
166}
167
168/**
169 * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
170 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
171 * @handle: DMA address of buffer
172 * @size: size of buffer to map
173 * @dir: DMA transfer direction
174 *
175 * Unmap a single streaming mode DMA translation. The handle and size
176 * must match what was provided in the previous dma_map_single() call.
177 * All other usages are undefined.
178 *
179 * After this call, reads by the CPU to the buffer are guaranteed to see
180 * whatever the device wrote there.
181 */
182static inline void
183dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
184 enum dma_data_direction direction)
185{
186 dma_unmap_single(dev, dma_address, size, direction);
187}
188
189/**
190 * dma_map_sg - map a set of SG buffers for streaming mode DMA
191 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
192 * @sg: list of buffers
193 * @nents: number of buffers to map
194 * @dir: DMA transfer direction
195 *
196 * Map a set of buffers described by scatterlist in streaming
197 * mode for DMA. This is the scatter-gather version of the
198 * above pci_map_single interface. Here the scatter gather list
199 * elements are each tagged with the appropriate dma address
200 * and length. They are obtained via sg_dma_{address,length}(SG).
201 *
202 * NOTE: An implementation may be able to use a smaller number of
203 * DMA address/length pairs than there are SG table elements.
204 * (for example via virtual mapping capabilities)
205 * The routine returns the number of addr/length pairs actually
206 * used, at most nents.
207 *
208 * Device ownership issues as mentioned above for pci_map_single are
209 * the same here.
210 */
211static inline int
212dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
213 enum dma_data_direction direction)
214{
215 int i;
216
217 for (i = 0; i < nents; i++) {
218 char *virt;
219
220 sg[i].dma_address = page_to_bus(sg_page(&sg[i])) + sg[i].offset;
221 virt = sg_virt(&sg[i]);
222 dma_cache_sync(dev, virt, sg[i].length, direction);
223 }
224
225 return nents;
226}
227
228/**
229 * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
230 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
231 * @sg: list of buffers
232 * @nents: number of buffers to map
233 * @dir: DMA transfer direction
234 *
235 * Unmap a set of streaming mode DMA translations.
236 * Again, CPU read rules concerning calls here are the same as for
237 * pci_unmap_single() above.
238 */
239static inline void
240dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
241 enum dma_data_direction direction)
242{
243
244}
245
246/**
247 * dma_sync_single_for_cpu
248 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
249 * @handle: DMA address of buffer
250 * @size: size of buffer to map
251 * @dir: DMA transfer direction
252 *
253 * Make physical memory consistent for a single streaming mode DMA
254 * translation after a transfer.
255 *
256 * If you perform a dma_map_single() but wish to interrogate the
257 * buffer using the cpu, yet do not wish to teardown the DMA mapping,
258 * you must call this function before doing so. At the next point you
259 * give the DMA address back to the card, you must first perform a
260 * dma_sync_single_for_device, and then the device again owns the
261 * buffer.
262 */
263static inline void
264dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
265 size_t size, enum dma_data_direction direction)
266{
267 /*
268 * No need to do anything since the CPU isn't supposed to
269 * touch this memory after we flushed it at mapping- or
270 * sync-for-device time.
271 */
272}
273
274static inline void
275dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
276 size_t size, enum dma_data_direction direction)
277{
278 dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
279}
280
281static inline void
282dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
283 unsigned long offset, size_t size,
284 enum dma_data_direction direction)
285{
286 /* just sync everything, that's all the pci API can do */
287 dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
288}
289
290static inline void
291dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
292 unsigned long offset, size_t size,
293 enum dma_data_direction direction)
294{
295 /* just sync everything, that's all the pci API can do */
296 dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
297}
298
299/**
300 * dma_sync_sg_for_cpu
301 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
302 * @sg: list of buffers
303 * @nents: number of buffers to map
304 * @dir: DMA transfer direction
305 *
306 * Make physical memory consistent for a set of streaming
307 * mode DMA translations after a transfer.
308 *
309 * The same as dma_sync_single_for_* but for a scatter-gather list,
310 * same rules and usage.
311 */
312static inline void
313dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
314 int nents, enum dma_data_direction direction)
315{
316 /*
317 * No need to do anything since the CPU isn't supposed to
318 * touch this memory after we flushed it at mapping- or
319 * sync-for-device time.
320 */
321}
322
323static inline void
324dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
325 int nents, enum dma_data_direction direction)
326{
327 int i;
328
329 for (i = 0; i < nents; i++) {
330 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, direction);
331 }
332}
333
334/* Now for the API extensions over the pci_ one */
335
336#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
337#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
338
339static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
340{
341 return 1;
342}
343
344static inline int dma_get_cache_alignment(void)
345{
346 return boot_cpu_data.dcache.linesz;
347}
348
349#endif /* __ASM_AVR32_DMA_MAPPING_H */
diff --git a/arch/avr32/include/asm/dma.h b/arch/avr32/include/asm/dma.h
new file mode 100644
index 000000000000..9e91205590ac
--- /dev/null
+++ b/arch/avr32/include/asm/dma.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_AVR32_DMA_H
2#define __ASM_AVR32_DMA_H
3
4/* The maximum address that we can perform a DMA transfer to on this platform.
5 * Not really applicable to AVR32, but some functions need it. */
6#define MAX_DMA_ADDRESS 0xffffffff
7
8#endif /* __ASM_AVR32_DMA_H */
diff --git a/arch/avr32/include/asm/elf.h b/arch/avr32/include/asm/elf.h
new file mode 100644
index 000000000000..64ce40ee1d58
--- /dev/null
+++ b/arch/avr32/include/asm/elf.h
@@ -0,0 +1,108 @@
1#ifndef __ASM_AVR32_ELF_H
2#define __ASM_AVR32_ELF_H
3
4/* AVR32 relocation numbers */
5#define R_AVR32_NONE 0
6#define R_AVR32_32 1
7#define R_AVR32_16 2
8#define R_AVR32_8 3
9#define R_AVR32_32_PCREL 4
10#define R_AVR32_16_PCREL 5
11#define R_AVR32_8_PCREL 6
12#define R_AVR32_DIFF32 7
13#define R_AVR32_DIFF16 8
14#define R_AVR32_DIFF8 9
15#define R_AVR32_GOT32 10
16#define R_AVR32_GOT16 11
17#define R_AVR32_GOT8 12
18#define R_AVR32_21S 13
19#define R_AVR32_16U 14
20#define R_AVR32_16S 15
21#define R_AVR32_8S 16
22#define R_AVR32_8S_EXT 17
23#define R_AVR32_22H_PCREL 18
24#define R_AVR32_18W_PCREL 19
25#define R_AVR32_16B_PCREL 20
26#define R_AVR32_16N_PCREL 21
27#define R_AVR32_14UW_PCREL 22
28#define R_AVR32_11H_PCREL 23
29#define R_AVR32_10UW_PCREL 24
30#define R_AVR32_9H_PCREL 25
31#define R_AVR32_9UW_PCREL 26
32#define R_AVR32_HI16 27
33#define R_AVR32_LO16 28
34#define R_AVR32_GOTPC 29
35#define R_AVR32_GOTCALL 30
36#define R_AVR32_LDA_GOT 31
37#define R_AVR32_GOT21S 32
38#define R_AVR32_GOT18SW 33
39#define R_AVR32_GOT16S 34
40#define R_AVR32_GOT7UW 35
41#define R_AVR32_32_CPENT 36
42#define R_AVR32_CPCALL 37
43#define R_AVR32_16_CP 38
44#define R_AVR32_9W_CP 39
45#define R_AVR32_RELATIVE 40
46#define R_AVR32_GLOB_DAT 41
47#define R_AVR32_JMP_SLOT 42
48#define R_AVR32_ALIGN 43
49
50/*
51 * ELF register definitions..
52 */
53
54#include <asm/ptrace.h>
55#include <asm/user.h>
56
57typedef unsigned long elf_greg_t;
58
59#define ELF_NGREG (sizeof (struct pt_regs) / sizeof (elf_greg_t))
60typedef elf_greg_t elf_gregset_t[ELF_NGREG];
61
62typedef struct user_fpu_struct elf_fpregset_t;
63
64/*
65 * This is used to ensure we don't load something for the wrong architecture.
66 */
67#define elf_check_arch(x) ( (x)->e_machine == EM_AVR32 )
68
69/*
70 * These are used to set parameters in the core dumps.
71 */
72#define ELF_CLASS ELFCLASS32
73#ifdef __LITTLE_ENDIAN__
74#define ELF_DATA ELFDATA2LSB
75#else
76#define ELF_DATA ELFDATA2MSB
77#endif
78#define ELF_ARCH EM_AVR32
79
80#define USE_ELF_CORE_DUMP
81#define ELF_EXEC_PAGESIZE 4096
82
83/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
84 use of this is to invoke "./ld.so someprog" to test out a new version of
85 the loader. We need to make sure that it is out of the way of the program
86 that it will "exec", and that there is sufficient room for the brk. */
87
88#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
89
90
91/* This yields a mask that user programs can use to figure out what
92 instruction set this CPU supports. This could be done in user space,
93 but it's not easy, and we've already done it here. */
94
95#define ELF_HWCAP (0)
96
97/* This yields a string that ld.so will use to load implementation
98 specific libraries for optimization. This is more specific in
99 intent than poking at uname or /proc/cpuinfo.
100
101 For the moment, we have only optimizations for the Intel generations,
102 but that could change... */
103
104#define ELF_PLATFORM (NULL)
105
106#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
107
108#endif /* __ASM_AVR32_ELF_H */
diff --git a/arch/avr32/include/asm/emergency-restart.h b/arch/avr32/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..3e7e014776ba
--- /dev/null
+++ b/arch/avr32/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_EMERGENCY_RESTART_H
2#define __ASM_AVR32_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* __ASM_AVR32_EMERGENCY_RESTART_H */
diff --git a/arch/avr32/include/asm/errno.h b/arch/avr32/include/asm/errno.h
new file mode 100644
index 000000000000..558a7249f06d
--- /dev/null
+++ b/arch/avr32/include/asm/errno.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_ERRNO_H
2#define __ASM_AVR32_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* __ASM_AVR32_ERRNO_H */
diff --git a/arch/avr32/include/asm/fb.h b/arch/avr32/include/asm/fb.h
new file mode 100644
index 000000000000..41baf84ad402
--- /dev/null
+++ b/arch/avr32/include/asm/fb.h
@@ -0,0 +1,21 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot)
12 & ~_PAGE_CACHABLE)
13 | (_PAGE_BUFFER | _PAGE_DIRTY));
14}
15
16static inline int fb_is_primary_device(struct fb_info *info)
17{
18 return 0;
19}
20
21#endif /* _ASM_FB_H_ */
diff --git a/arch/avr32/include/asm/fcntl.h b/arch/avr32/include/asm/fcntl.h
new file mode 100644
index 000000000000..14c0c4402b11
--- /dev/null
+++ b/arch/avr32/include/asm/fcntl.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_FCNTL_H
2#define __ASM_AVR32_FCNTL_H
3
4#include <asm-generic/fcntl.h>
5
6#endif /* __ASM_AVR32_FCNTL_H */
diff --git a/arch/avr32/include/asm/futex.h b/arch/avr32/include/asm/futex.h
new file mode 100644
index 000000000000..10419f14a68a
--- /dev/null
+++ b/arch/avr32/include/asm/futex.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_FUTEX_H
2#define __ASM_AVR32_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif /* __ASM_AVR32_FUTEX_H */
diff --git a/arch/avr32/include/asm/gpio.h b/arch/avr32/include/asm/gpio.h
new file mode 100644
index 000000000000..b771f7105964
--- /dev/null
+++ b/arch/avr32/include/asm/gpio.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_GPIO_H
2#define __ASM_AVR32_GPIO_H
3
4#include <mach/gpio.h>
5
6#endif /* __ASM_AVR32_GPIO_H */
diff --git a/arch/avr32/include/asm/hardirq.h b/arch/avr32/include/asm/hardirq.h
new file mode 100644
index 000000000000..267354356f60
--- /dev/null
+++ b/arch/avr32/include/asm/hardirq.h
@@ -0,0 +1,34 @@
1#ifndef __ASM_AVR32_HARDIRQ_H
2#define __ASM_AVR32_HARDIRQ_H
3
4#include <linux/threads.h>
5#include <asm/irq.h>
6
7#ifndef __ASSEMBLY__
8
9#include <linux/cache.h>
10
11/* entry.S is sensitive to the offsets of these fields */
12typedef struct {
13 unsigned int __softirq_pending;
14} ____cacheline_aligned irq_cpustat_t;
15
16void ack_bad_irq(unsigned int irq);
17
18/* Standard mappings for irq_cpustat_t above */
19#include <linux/irq_cpustat.h>
20
21#endif /* __ASSEMBLY__ */
22
23#define HARDIRQ_BITS 12
24
25/*
26 * The hardirq mask has to be large enough to have
27 * space for potentially all IRQ sources in the system
28 * nesting on a single CPU:
29 */
30#if (1 << HARDIRQ_BITS) < NR_IRQS
31# error HARDIRQ_BITS is too low!
32#endif
33
34#endif /* __ASM_AVR32_HARDIRQ_H */
diff --git a/arch/avr32/include/asm/hw_irq.h b/arch/avr32/include/asm/hw_irq.h
new file mode 100644
index 000000000000..218b0a6bfd1b
--- /dev/null
+++ b/arch/avr32/include/asm/hw_irq.h
@@ -0,0 +1,9 @@
1#ifndef __ASM_AVR32_HW_IRQ_H
2#define __ASM_AVR32_HW_IRQ_H
3
4static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
5{
6 /* Nothing to do */
7}
8
9#endif /* __ASM_AVR32_HW_IRQ_H */
diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h
new file mode 100644
index 000000000000..a520f77ead96
--- /dev/null
+++ b/arch/avr32/include/asm/io.h
@@ -0,0 +1,312 @@
1#ifndef __ASM_AVR32_IO_H
2#define __ASM_AVR32_IO_H
3
4#include <linux/kernel.h>
5#include <linux/string.h>
6#include <linux/types.h>
7
8#include <asm/addrspace.h>
9#include <asm/byteorder.h>
10
11#include <mach/io.h>
12
13/* virt_to_phys will only work when address is in P1 or P2 */
14static __inline__ unsigned long virt_to_phys(volatile void *address)
15{
16 return PHYSADDR(address);
17}
18
19static __inline__ void * phys_to_virt(unsigned long address)
20{
21 return (void *)P1SEGADDR(address);
22}
23
24#define cached_to_phys(addr) ((unsigned long)PHYSADDR(addr))
25#define uncached_to_phys(addr) ((unsigned long)PHYSADDR(addr))
26#define phys_to_cached(addr) ((void *)P1SEGADDR(addr))
27#define phys_to_uncached(addr) ((void *)P2SEGADDR(addr))
28
29/*
30 * Generic IO read/write. These perform native-endian accesses. Note
31 * that some architectures will want to re-define __raw_{read,write}w.
32 */
33extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
34extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
35extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
36
37extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
38extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
39extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
40
41static inline void __raw_writeb(u8 v, volatile void __iomem *addr)
42{
43 *(volatile u8 __force *)addr = v;
44}
45static inline void __raw_writew(u16 v, volatile void __iomem *addr)
46{
47 *(volatile u16 __force *)addr = v;
48}
49static inline void __raw_writel(u32 v, volatile void __iomem *addr)
50{
51 *(volatile u32 __force *)addr = v;
52}
53
54static inline u8 __raw_readb(const volatile void __iomem *addr)
55{
56 return *(const volatile u8 __force *)addr;
57}
58static inline u16 __raw_readw(const volatile void __iomem *addr)
59{
60 return *(const volatile u16 __force *)addr;
61}
62static inline u32 __raw_readl(const volatile void __iomem *addr)
63{
64 return *(const volatile u32 __force *)addr;
65}
66
67/* Convert I/O port address to virtual address */
68#ifndef __io
69# define __io(p) ((void *)phys_to_uncached(p))
70#endif
71
72/*
73 * Not really sure about the best way to slow down I/O on
74 * AVR32. Defining it as a no-op until we have an actual test case.
75 */
76#define SLOW_DOWN_IO do { } while (0)
77
78#define __BUILD_MEMORY_SINGLE(pfx, bwl, type) \
79static inline void \
80pfx##write##bwl(type val, volatile void __iomem *addr) \
81{ \
82 volatile type *__addr; \
83 type __val; \
84 \
85 __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \
86 __val = pfx##ioswab##bwl(__addr, val); \
87 \
88 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
89 \
90 *__addr = __val; \
91} \
92 \
93static inline type pfx##read##bwl(const volatile void __iomem *addr) \
94{ \
95 volatile type *__addr; \
96 type __val; \
97 \
98 __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \
99 \
100 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
101 \
102 __val = *__addr; \
103 return pfx##ioswab##bwl(__addr, __val); \
104}
105
106#define __BUILD_IOPORT_SINGLE(pfx, bwl, type, p, slow) \
107static inline void pfx##out##bwl##p(type val, unsigned long port) \
108{ \
109 volatile type *__addr; \
110 type __val; \
111 \
112 __addr = __io(__swizzle_addr_##bwl(port)); \
113 __val = pfx##ioswab##bwl(__addr, val); \
114 \
115 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
116 \
117 *__addr = __val; \
118 slow; \
119} \
120 \
121static inline type pfx##in##bwl##p(unsigned long port) \
122{ \
123 volatile type *__addr; \
124 type __val; \
125 \
126 __addr = __io(__swizzle_addr_##bwl(port)); \
127 \
128 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
129 \
130 __val = *__addr; \
131 slow; \
132 \
133 return pfx##ioswab##bwl(__addr, __val); \
134}
135
136#define __BUILD_MEMORY_PFX(bus, bwl, type) \
137 __BUILD_MEMORY_SINGLE(bus, bwl, type)
138
139#define BUILDIO_MEM(bwl, type) \
140 __BUILD_MEMORY_PFX(, bwl, type) \
141 __BUILD_MEMORY_PFX(__mem_, bwl, type)
142
143#define __BUILD_IOPORT_PFX(bus, bwl, type) \
144 __BUILD_IOPORT_SINGLE(bus, bwl, type, ,) \
145 __BUILD_IOPORT_SINGLE(bus, bwl, type, _p, SLOW_DOWN_IO)
146
147#define BUILDIO_IOPORT(bwl, type) \
148 __BUILD_IOPORT_PFX(, bwl, type) \
149 __BUILD_IOPORT_PFX(__mem_, bwl, type)
150
151BUILDIO_MEM(b, u8)
152BUILDIO_MEM(w, u16)
153BUILDIO_MEM(l, u32)
154
155BUILDIO_IOPORT(b, u8)
156BUILDIO_IOPORT(w, u16)
157BUILDIO_IOPORT(l, u32)
158
159#define readb_relaxed readb
160#define readw_relaxed readw
161#define readl_relaxed readl
162
163#define __BUILD_MEMORY_STRING(bwl, type) \
164static inline void writes##bwl(volatile void __iomem *addr, \
165 const void *data, unsigned int count) \
166{ \
167 const type *__data = data; \
168 \
169 while (count--) \
170 __mem_write##bwl(*__data++, addr); \
171} \
172 \
173static inline void reads##bwl(const volatile void __iomem *addr, \
174 void *data, unsigned int count) \
175{ \
176 type *__data = data; \
177 \
178 while (count--) \
179 *__data++ = __mem_read##bwl(addr); \
180}
181
182#define __BUILD_IOPORT_STRING(bwl, type) \
183static inline void outs##bwl(unsigned long port, const void *data, \
184 unsigned int count) \
185{ \
186 const type *__data = data; \
187 \
188 while (count--) \
189 __mem_out##bwl(*__data++, port); \
190} \
191 \
192static inline void ins##bwl(unsigned long port, void *data, \
193 unsigned int count) \
194{ \
195 type *__data = data; \
196 \
197 while (count--) \
198 *__data++ = __mem_in##bwl(port); \
199}
200
201#define BUILDSTRING(bwl, type) \
202 __BUILD_MEMORY_STRING(bwl, type) \
203 __BUILD_IOPORT_STRING(bwl, type)
204
205BUILDSTRING(b, u8)
206BUILDSTRING(w, u16)
207BUILDSTRING(l, u32)
208
209/*
210 * io{read,write}{8,16,32} macros in both le (for PCI style consumers) and native be
211 */
212#ifndef ioread8
213
214#define ioread8(p) ((unsigned int)readb(p))
215
216#define ioread16(p) ((unsigned int)readw(p))
217#define ioread16be(p) ((unsigned int)__raw_readw(p))
218
219#define ioread32(p) ((unsigned int)readl(p))
220#define ioread32be(p) ((unsigned int)__raw_readl(p))
221
222#define iowrite8(v,p) writeb(v, p)
223
224#define iowrite16(v,p) writew(v, p)
225#define iowrite16be(v,p) __raw_writew(v, p)
226
227#define iowrite32(v,p) writel(v, p)
228#define iowrite32be(v,p) __raw_writel(v, p)
229
230#define ioread8_rep(p,d,c) readsb(p,d,c)
231#define ioread16_rep(p,d,c) readsw(p,d,c)
232#define ioread32_rep(p,d,c) readsl(p,d,c)
233
234#define iowrite8_rep(p,s,c) writesb(p,s,c)
235#define iowrite16_rep(p,s,c) writesw(p,s,c)
236#define iowrite32_rep(p,s,c) writesl(p,s,c)
237
238#endif
239
240static inline void memcpy_fromio(void * to, const volatile void __iomem *from,
241 unsigned long count)
242{
243 memcpy(to, (const void __force *)from, count);
244}
245
246static inline void memcpy_toio(volatile void __iomem *to, const void * from,
247 unsigned long count)
248{
249 memcpy((void __force *)to, from, count);
250}
251
252static inline void memset_io(volatile void __iomem *addr, unsigned char val,
253 unsigned long count)
254{
255 memset((void __force *)addr, val, count);
256}
257
258#define mmiowb()
259
260#define IO_SPACE_LIMIT 0xffffffff
261
262extern void __iomem *__ioremap(unsigned long offset, size_t size,
263 unsigned long flags);
264extern void __iounmap(void __iomem *addr);
265
266/*
267 * ioremap - map bus memory into CPU space
268 * @offset bus address of the memory
269 * @size size of the resource to map
270 *
271 * ioremap performs a platform specific sequence of operations to make
272 * bus memory CPU accessible via the readb/.../writel functions and
273 * the other mmio helpers. The returned address is not guaranteed to
274 * be usable directly as a virtual address.
275 */
276#define ioremap(offset, size) \
277 __ioremap((offset), (size), 0)
278
279#define ioremap_nocache(offset, size) \
280 __ioremap((offset), (size), 0)
281
282#define iounmap(addr) \
283 __iounmap(addr)
284
285#define cached(addr) P1SEGADDR(addr)
286#define uncached(addr) P2SEGADDR(addr)
287
288#define virt_to_bus virt_to_phys
289#define bus_to_virt phys_to_virt
290#define page_to_bus page_to_phys
291#define bus_to_page phys_to_page
292
293/*
294 * Create a virtual mapping cookie for an IO port range. There exists
295 * no such thing as port-based I/O on AVR32, so a regular ioremap()
296 * should do what we need.
297 */
298#define ioport_map(port, nr) ioremap(port, nr)
299#define ioport_unmap(port) iounmap(port)
300
301/*
302 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
303 * access
304 */
305#define xlate_dev_mem_ptr(p) __va(p)
306
307/*
308 * Convert a virtual cached pointer to an uncached pointer
309 */
310#define xlate_dev_kmem_ptr(p) p
311
312#endif /* __ASM_AVR32_IO_H */
diff --git a/arch/avr32/include/asm/ioctl.h b/arch/avr32/include/asm/ioctl.h
new file mode 100644
index 000000000000..c8472c1398ef
--- /dev/null
+++ b/arch/avr32/include/asm/ioctl.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_IOCTL_H
2#define __ASM_AVR32_IOCTL_H
3
4#include <asm-generic/ioctl.h>
5
6#endif /* __ASM_AVR32_IOCTL_H */
diff --git a/arch/avr32/include/asm/ioctls.h b/arch/avr32/include/asm/ioctls.h
new file mode 100644
index 000000000000..0cf2c0a4502b
--- /dev/null
+++ b/arch/avr32/include/asm/ioctls.h
@@ -0,0 +1,87 @@
1#ifndef __ASM_AVR32_IOCTLS_H
2#define __ASM_AVR32_IOCTLS_H
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T',0x2A, struct termios2)
51#define TCSETS2 _IOW('T',0x2B, struct termios2)
52#define TCSETSW2 _IOW('T',0x2C, struct termios2)
53#define TCSETSF2 _IOW('T',0x2D, struct termios2)
54#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
55#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
56
57#define FIONCLEX 0x5450
58#define FIOCLEX 0x5451
59#define FIOASYNC 0x5452
60#define TIOCSERCONFIG 0x5453
61#define TIOCSERGWILD 0x5454
62#define TIOCSERSWILD 0x5455
63#define TIOCGLCKTRMIOS 0x5456
64#define TIOCSLCKTRMIOS 0x5457
65#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
66#define TIOCSERGETLSR 0x5459 /* Get line status register */
67#define TIOCSERGETMULTI 0x545A /* Get multiport config */
68#define TIOCSERSETMULTI 0x545B /* Set multiport config */
69
70#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
71#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
72#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
73#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
74#define FIOQSIZE 0x5460
75
76/* Used for packet mode */
77#define TIOCPKT_DATA 0
78#define TIOCPKT_FLUSHREAD 1
79#define TIOCPKT_FLUSHWRITE 2
80#define TIOCPKT_STOP 4
81#define TIOCPKT_START 8
82#define TIOCPKT_NOSTOP 16
83#define TIOCPKT_DOSTOP 32
84
85#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
86
87#endif /* __ASM_AVR32_IOCTLS_H */
diff --git a/arch/avr32/include/asm/ipcbuf.h b/arch/avr32/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..1552c9698f5e
--- /dev/null
+++ b/arch/avr32/include/asm/ipcbuf.h
@@ -0,0 +1,29 @@
1#ifndef __ASM_AVR32_IPCBUF_H
2#define __ASM_AVR32_IPCBUF_H
3
4/*
5* The user_ipc_perm structure for AVR32 architecture.
6* Note extra padding because this structure is passed back and forth
7* between kernel and user space.
8*
9* Pad space is left for:
10* - 32-bit mode_t and seq
11* - 2 miscellaneous 32-bit values
12*/
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __ASM_AVR32_IPCBUF_H */
diff --git a/arch/avr32/include/asm/irq.h b/arch/avr32/include/asm/irq.h
new file mode 100644
index 000000000000..6fa8913f8548
--- /dev/null
+++ b/arch/avr32/include/asm/irq.h
@@ -0,0 +1,24 @@
1#ifndef __ASM_AVR32_IRQ_H
2#define __ASM_AVR32_IRQ_H
3
4#define NR_INTERNAL_IRQS 64
5
6#include <mach/irq.h>
7
8#ifndef NR_IRQS
9#define NR_IRQS (NR_INTERNAL_IRQS)
10#endif
11
12#define irq_canonicalize(i) (i)
13
14#ifndef __ASSEMBLER__
15int nmi_enable(void);
16void nmi_disable(void);
17
18/*
19 * Returns a bitmask of pending interrupts in a group.
20 */
21extern unsigned long intc_get_pending(unsigned int group);
22#endif
23
24#endif /* __ASM_AVR32_IOCTLS_H */
diff --git a/arch/avr32/include/asm/irq_regs.h b/arch/avr32/include/asm/irq_regs.h
new file mode 100644
index 000000000000..3dd9c0b70270
--- /dev/null
+++ b/arch/avr32/include/asm/irq_regs.h
@@ -0,0 +1 @@
#include <asm-generic/irq_regs.h>
diff --git a/arch/avr32/include/asm/irqflags.h b/arch/avr32/include/asm/irqflags.h
new file mode 100644
index 000000000000..93570daac38a
--- /dev/null
+++ b/arch/avr32/include/asm/irqflags.h
@@ -0,0 +1,68 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_IRQFLAGS_H
9#define __ASM_AVR32_IRQFLAGS_H
10
11#include <asm/sysreg.h>
12
13static inline unsigned long __raw_local_save_flags(void)
14{
15 return sysreg_read(SR);
16}
17
18#define raw_local_save_flags(x) \
19 do { (x) = __raw_local_save_flags(); } while (0)
20
21/*
22 * This will restore ALL status register flags, not only the interrupt
23 * mask flag.
24 *
25 * The empty asm statement informs the compiler of this fact while
26 * also serving as a barrier.
27 */
28static inline void raw_local_irq_restore(unsigned long flags)
29{
30 sysreg_write(SR, flags);
31 asm volatile("" : : : "memory", "cc");
32}
33
34static inline void raw_local_irq_disable(void)
35{
36 asm volatile("ssrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory");
37}
38
39static inline void raw_local_irq_enable(void)
40{
41 asm volatile("csrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory");
42}
43
44static inline int raw_irqs_disabled_flags(unsigned long flags)
45{
46 return (flags & SYSREG_BIT(GM)) != 0;
47}
48
49static inline int raw_irqs_disabled(void)
50{
51 unsigned long flags = __raw_local_save_flags();
52
53 return raw_irqs_disabled_flags(flags);
54}
55
56static inline unsigned long __raw_local_irq_save(void)
57{
58 unsigned long flags = __raw_local_save_flags();
59
60 raw_local_irq_disable();
61
62 return flags;
63}
64
65#define raw_local_irq_save(flags) \
66 do { (flags) = __raw_local_irq_save(); } while (0)
67
68#endif /* __ASM_AVR32_IRQFLAGS_H */
diff --git a/arch/avr32/include/asm/kdebug.h b/arch/avr32/include/asm/kdebug.h
new file mode 100644
index 000000000000..ca4f9542365a
--- /dev/null
+++ b/arch/avr32/include/asm/kdebug.h
@@ -0,0 +1,11 @@
1#ifndef __ASM_AVR32_KDEBUG_H
2#define __ASM_AVR32_KDEBUG_H
3
4/* Grossly misnamed. */
5enum die_val {
6 DIE_BREAKPOINT,
7 DIE_SSTEP,
8 DIE_NMI,
9};
10
11#endif /* __ASM_AVR32_KDEBUG_H */
diff --git a/arch/avr32/include/asm/kmap_types.h b/arch/avr32/include/asm/kmap_types.h
new file mode 100644
index 000000000000..b7f5c6870107
--- /dev/null
+++ b/arch/avr32/include/asm/kmap_types.h
@@ -0,0 +1,30 @@
1#ifndef __ASM_AVR32_KMAP_TYPES_H
2#define __ASM_AVR32_KMAP_TYPES_H
3
4#ifdef CONFIG_DEBUG_HIGHMEM
5# define D(n) __KM_FENCE_##n ,
6#else
7# define D(n)
8#endif
9
10enum km_type {
11D(0) KM_BOUNCE_READ,
12D(1) KM_SKB_SUNRPC_DATA,
13D(2) KM_SKB_DATA_SOFTIRQ,
14D(3) KM_USER0,
15D(4) KM_USER1,
16D(5) KM_BIO_SRC_IRQ,
17D(6) KM_BIO_DST_IRQ,
18D(7) KM_PTE0,
19D(8) KM_PTE1,
20D(9) KM_PTE2,
21D(10) KM_IRQ0,
22D(11) KM_IRQ1,
23D(12) KM_SOFTIRQ0,
24D(13) KM_SOFTIRQ1,
25D(14) KM_TYPE_NR
26};
27
28#undef D
29
30#endif /* __ASM_AVR32_KMAP_TYPES_H */
diff --git a/arch/avr32/include/asm/kprobes.h b/arch/avr32/include/asm/kprobes.h
new file mode 100644
index 000000000000..996cb656474e
--- /dev/null
+++ b/arch/avr32/include/asm/kprobes.h
@@ -0,0 +1,35 @@
1/*
2 * Kernel Probes (KProbes)
3 *
4 * Copyright (C) 2005-2006 Atmel Corporation
5 * Copyright (C) IBM Corporation, 2002, 2004
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ASM_AVR32_KPROBES_H
12#define __ASM_AVR32_KPROBES_H
13
14#include <linux/types.h>
15
16typedef u16 kprobe_opcode_t;
17#define BREAKPOINT_INSTRUCTION 0xd673 /* breakpoint */
18#define MAX_INSN_SIZE 2
19
20#define kretprobe_blacklist_size 0
21
22#define arch_remove_kprobe(p) do { } while (0)
23
24/* Architecture specific copy of original instruction */
25struct arch_specific_insn {
26 kprobe_opcode_t insn[MAX_INSN_SIZE];
27};
28
29extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
30extern int kprobe_exceptions_notify(struct notifier_block *self,
31 unsigned long val, void *data);
32
33#define flush_insn_slot(p) do { } while (0)
34
35#endif /* __ASM_AVR32_KPROBES_H */
diff --git a/arch/avr32/include/asm/linkage.h b/arch/avr32/include/asm/linkage.h
new file mode 100644
index 000000000000..f7b285e910d4
--- /dev/null
+++ b/arch/avr32/include/asm/linkage.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4#define __ALIGN .balign 2
5#define __ALIGN_STR ".balign 2"
6
7#endif /* __ASM_LINKAGE_H */
diff --git a/arch/avr32/include/asm/local.h b/arch/avr32/include/asm/local.h
new file mode 100644
index 000000000000..1c1619694da3
--- /dev/null
+++ b/arch/avr32/include/asm/local.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_LOCAL_H
2#define __ASM_AVR32_LOCAL_H
3
4#include <asm-generic/local.h>
5
6#endif /* __ASM_AVR32_LOCAL_H */
diff --git a/arch/avr32/include/asm/mach/serial_at91.h b/arch/avr32/include/asm/mach/serial_at91.h
new file mode 100644
index 000000000000..55b317a89061
--- /dev/null
+++ b/arch/avr32/include/asm/mach/serial_at91.h
@@ -0,0 +1,33 @@
1/*
2 * linux/include/asm-arm/mach/serial_at91.h
3 *
4 * Based on serial_sa1100.h by Nicolas Pitre
5 *
6 * Copyright (C) 2002 ATMEL Rousset
7 *
8 * Low level machine dependent UART functions.
9 */
10
11struct uart_port;
12
13/*
14 * This is a temporary structure for registering these
15 * functions; it is intended to be discarded after boot.
16 */
17struct atmel_port_fns {
18 void (*set_mctrl)(struct uart_port *, u_int);
19 u_int (*get_mctrl)(struct uart_port *);
20 void (*enable_ms)(struct uart_port *);
21 void (*pm)(struct uart_port *, u_int, u_int);
22 int (*set_wake)(struct uart_port *, u_int);
23 int (*open)(struct uart_port *);
24 void (*close)(struct uart_port *);
25};
26
27#if defined(CONFIG_SERIAL_ATMEL)
28void atmel_register_uart_fns(struct atmel_port_fns *fns);
29#else
30#define atmel_register_uart_fns(fns) do { } while (0)
31#endif
32
33
diff --git a/arch/avr32/include/asm/mman.h b/arch/avr32/include/asm/mman.h
new file mode 100644
index 000000000000..648f91e7187a
--- /dev/null
+++ b/arch/avr32/include/asm/mman.h
@@ -0,0 +1,17 @@
1#ifndef __ASM_AVR32_MMAN_H__
2#define __ASM_AVR32_MMAN_H__
3
4#include <asm-generic/mman.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) page tables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __ASM_AVR32_MMAN_H__ */
diff --git a/arch/avr32/include/asm/mmu.h b/arch/avr32/include/asm/mmu.h
new file mode 100644
index 000000000000..60c2d2650d32
--- /dev/null
+++ b/arch/avr32/include/asm/mmu.h
@@ -0,0 +1,10 @@
1#ifndef __ASM_AVR32_MMU_H
2#define __ASM_AVR32_MMU_H
3
4/* Default "unsigned long" context */
5typedef unsigned long mm_context_t;
6
7#define MMU_ITLB_ENTRIES 64
8#define MMU_DTLB_ENTRIES 64
9
10#endif /* __ASM_AVR32_MMU_H */
diff --git a/arch/avr32/include/asm/mmu_context.h b/arch/avr32/include/asm/mmu_context.h
new file mode 100644
index 000000000000..27ff23407100
--- /dev/null
+++ b/arch/avr32/include/asm/mmu_context.h
@@ -0,0 +1,148 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * ASID handling taken from SH implementation.
5 * Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2003 Paul Mundt
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef __ASM_AVR32_MMU_CONTEXT_H
13#define __ASM_AVR32_MMU_CONTEXT_H
14
15#include <asm/tlbflush.h>
16#include <asm/sysreg.h>
17#include <asm-generic/mm_hooks.h>
18
19/*
20 * The MMU "context" consists of two things:
21 * (a) TLB cache version
22 * (b) ASID (Address Space IDentifier)
23 */
24#define MMU_CONTEXT_ASID_MASK 0x000000ff
25#define MMU_CONTEXT_VERSION_MASK 0xffffff00
26#define MMU_CONTEXT_FIRST_VERSION 0x00000100
27#define NO_CONTEXT 0
28
29#define MMU_NO_ASID 0x100
30
31/* Virtual Page Number mask */
32#define MMU_VPN_MASK 0xfffff000
33
34/* Cache of MMU context last used */
35extern unsigned long mmu_context_cache;
36
37/*
38 * Get MMU context if needed
39 */
40static inline void
41get_mmu_context(struct mm_struct *mm)
42{
43 unsigned long mc = mmu_context_cache;
44
45 if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0)
46 /* It's up to date, do nothing */
47 return;
48
49 /* It's old, we need to get new context with new version */
50 mc = ++mmu_context_cache;
51 if (!(mc & MMU_CONTEXT_ASID_MASK)) {
52 /*
53 * We have exhausted all ASIDs of this version.
54 * Flush the TLB and start new cycle.
55 */
56 flush_tlb_all();
57 /*
58 * Fix version. Note that we avoid version #0
59 * to distinguish NO_CONTEXT.
60 */
61 if (!mc)
62 mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
63 }
64 mm->context = mc;
65}
66
67/*
68 * Initialize the context related info for a new mm_struct
69 * instance.
70 */
71static inline int init_new_context(struct task_struct *tsk,
72 struct mm_struct *mm)
73{
74 mm->context = NO_CONTEXT;
75 return 0;
76}
77
78/*
79 * Destroy context related info for an mm_struct that is about
80 * to be put to rest.
81 */
82static inline void destroy_context(struct mm_struct *mm)
83{
84 /* Do nothing */
85}
86
87static inline void set_asid(unsigned long asid)
88{
89 /* XXX: We're destroying TLBEHI[8:31] */
90 sysreg_write(TLBEHI, asid & MMU_CONTEXT_ASID_MASK);
91 cpu_sync_pipeline();
92}
93
94static inline unsigned long get_asid(void)
95{
96 unsigned long asid;
97
98 asid = sysreg_read(TLBEHI);
99 return asid & MMU_CONTEXT_ASID_MASK;
100}
101
102static inline void activate_context(struct mm_struct *mm)
103{
104 get_mmu_context(mm);
105 set_asid(mm->context & MMU_CONTEXT_ASID_MASK);
106}
107
108static inline void switch_mm(struct mm_struct *prev,
109 struct mm_struct *next,
110 struct task_struct *tsk)
111{
112 if (likely(prev != next)) {
113 unsigned long __pgdir = (unsigned long)next->pgd;
114
115 sysreg_write(PTBR, __pgdir);
116 activate_context(next);
117 }
118}
119
120#define deactivate_mm(tsk,mm) do { } while(0)
121
122#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
123
124static inline void
125enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
126{
127}
128
129
130static inline void enable_mmu(void)
131{
132 sysreg_write(MMUCR, (SYSREG_BIT(MMUCR_S)
133 | SYSREG_BIT(E)
134 | SYSREG_BIT(MMUCR_I)));
135 nop(); nop(); nop(); nop(); nop(); nop(); nop(); nop();
136
137 if (mmu_context_cache == NO_CONTEXT)
138 mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
139
140 set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
141}
142
143static inline void disable_mmu(void)
144{
145 sysreg_write(MMUCR, SYSREG_BIT(MMUCR_S));
146}
147
148#endif /* __ASM_AVR32_MMU_CONTEXT_H */
diff --git a/arch/avr32/include/asm/module.h b/arch/avr32/include/asm/module.h
new file mode 100644
index 000000000000..451444538a1b
--- /dev/null
+++ b/arch/avr32/include/asm/module.h
@@ -0,0 +1,28 @@
1#ifndef __ASM_AVR32_MODULE_H
2#define __ASM_AVR32_MODULE_H
3
4struct mod_arch_syminfo {
5 unsigned long got_offset;
6 int got_initialized;
7};
8
9struct mod_arch_specific {
10 /* Starting offset of got in the module core memory. */
11 unsigned long got_offset;
12 /* Size of the got. */
13 unsigned long got_size;
14 /* Number of symbols in syminfo. */
15 int nsyms;
16 /* Additional symbol information (got offsets). */
17 struct mod_arch_syminfo *syminfo;
18};
19
20#define Elf_Shdr Elf32_Shdr
21#define Elf_Sym Elf32_Sym
22#define Elf_Ehdr Elf32_Ehdr
23
24#define MODULE_PROC_FAMILY "AVR32v1"
25
26#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
27
28#endif /* __ASM_AVR32_MODULE_H */
diff --git a/arch/avr32/include/asm/msgbuf.h b/arch/avr32/include/asm/msgbuf.h
new file mode 100644
index 000000000000..ac18bc4da7f7
--- /dev/null
+++ b/arch/avr32/include/asm/msgbuf.h
@@ -0,0 +1,31 @@
1#ifndef __ASM_AVR32_MSGBUF_H
2#define __ASM_AVR32_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for i386 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* __ASM_AVR32_MSGBUF_H */
diff --git a/arch/avr32/include/asm/mutex.h b/arch/avr32/include/asm/mutex.h
new file mode 100644
index 000000000000..458c1f7fbc18
--- /dev/null
+++ b/arch/avr32/include/asm/mutex.h
@@ -0,0 +1,9 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/avr32/include/asm/numnodes.h b/arch/avr32/include/asm/numnodes.h
new file mode 100644
index 000000000000..0b864d7ce330
--- /dev/null
+++ b/arch/avr32/include/asm/numnodes.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_AVR32_NUMNODES_H
2#define __ASM_AVR32_NUMNODES_H
3
4/* Max 4 nodes */
5#define NODES_SHIFT 2
6
7#endif /* __ASM_AVR32_NUMNODES_H */
diff --git a/arch/avr32/include/asm/ocd.h b/arch/avr32/include/asm/ocd.h
new file mode 100644
index 000000000000..6bef09490235
--- /dev/null
+++ b/arch/avr32/include/asm/ocd.h
@@ -0,0 +1,543 @@
1/*
2 * AVR32 OCD Interface and register definitions
3 *
4 * Copyright (C) 2004-2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_AVR32_OCD_H
11#define __ASM_AVR32_OCD_H
12
13/* OCD Register offsets. Abbreviations used below:
14 *
15 * BP Breakpoint
16 * Comm Communication
17 * DT Data Trace
18 * PC Program Counter
19 * PID Process ID
20 * R/W Read/Write
21 * WP Watchpoint
22 */
23#define OCD_DID 0x0000 /* Device ID */
24#define OCD_DC 0x0008 /* Development Control */
25#define OCD_DS 0x0010 /* Development Status */
26#define OCD_RWCS 0x001c /* R/W Access Control */
27#define OCD_RWA 0x0024 /* R/W Access Address */
28#define OCD_RWD 0x0028 /* R/W Access Data */
29#define OCD_WT 0x002c /* Watchpoint Trigger */
30#define OCD_DTC 0x0034 /* Data Trace Control */
31#define OCD_DTSA0 0x0038 /* DT Start Addr Channel 0 */
32#define OCD_DTSA1 0x003c /* DT Start Addr Channel 1 */
33#define OCD_DTEA0 0x0048 /* DT End Addr Channel 0 */
34#define OCD_DTEA1 0x004c /* DT End Addr Channel 1 */
35#define OCD_BWC0A 0x0058 /* PC BP/WP Control 0A */
36#define OCD_BWC0B 0x005c /* PC BP/WP Control 0B */
37#define OCD_BWC1A 0x0060 /* PC BP/WP Control 1A */
38#define OCD_BWC1B 0x0064 /* PC BP/WP Control 1B */
39#define OCD_BWC2A 0x0068 /* PC BP/WP Control 2A */
40#define OCD_BWC2B 0x006c /* PC BP/WP Control 2B */
41#define OCD_BWC3A 0x0070 /* Data BP/WP Control 3A */
42#define OCD_BWC3B 0x0074 /* Data BP/WP Control 3B */
43#define OCD_BWA0A 0x0078 /* PC BP/WP Address 0A */
44#define OCD_BWA0B 0x007c /* PC BP/WP Address 0B */
45#define OCD_BWA1A 0x0080 /* PC BP/WP Address 1A */
46#define OCD_BWA1B 0x0084 /* PC BP/WP Address 1B */
47#define OCD_BWA2A 0x0088 /* PC BP/WP Address 2A */
48#define OCD_BWA2B 0x008c /* PC BP/WP Address 2B */
49#define OCD_BWA3A 0x0090 /* Data BP/WP Address 3A */
50#define OCD_BWA3B 0x0094 /* Data BP/WP Address 3B */
51#define OCD_NXCFG 0x0100 /* Nexus Configuration */
52#define OCD_DINST 0x0104 /* Debug Instruction */
53#define OCD_DPC 0x0108 /* Debug Program Counter */
54#define OCD_CPUCM 0x010c /* CPU Control Mask */
55#define OCD_DCCPU 0x0110 /* Debug Comm CPU */
56#define OCD_DCEMU 0x0114 /* Debug Comm Emulator */
57#define OCD_DCSR 0x0118 /* Debug Comm Status */
58#define OCD_PID 0x011c /* Ownership Trace PID */
59#define OCD_EPC0 0x0120 /* Event Pair Control 0 */
60#define OCD_EPC1 0x0124 /* Event Pair Control 1 */
61#define OCD_EPC2 0x0128 /* Event Pair Control 2 */
62#define OCD_EPC3 0x012c /* Event Pair Control 3 */
63#define OCD_AXC 0x0130 /* AUX port Control */
64
65/* Bits in DID */
66#define OCD_DID_MID_START 1
67#define OCD_DID_MID_SIZE 11
68#define OCD_DID_PN_START 12
69#define OCD_DID_PN_SIZE 16
70#define OCD_DID_RN_START 28
71#define OCD_DID_RN_SIZE 4
72
73/* Bits in DC */
74#define OCD_DC_TM_START 0
75#define OCD_DC_TM_SIZE 2
76#define OCD_DC_EIC_START 3
77#define OCD_DC_EIC_SIZE 2
78#define OCD_DC_OVC_START 5
79#define OCD_DC_OVC_SIZE 3
80#define OCD_DC_SS_BIT 8
81#define OCD_DC_DBR_BIT 12
82#define OCD_DC_DBE_BIT 13
83#define OCD_DC_EOS_START 20
84#define OCD_DC_EOS_SIZE 2
85#define OCD_DC_SQA_BIT 22
86#define OCD_DC_IRP_BIT 23
87#define OCD_DC_IFM_BIT 24
88#define OCD_DC_TOZ_BIT 25
89#define OCD_DC_TSR_BIT 26
90#define OCD_DC_RID_BIT 27
91#define OCD_DC_ORP_BIT 28
92#define OCD_DC_MM_BIT 29
93#define OCD_DC_RES_BIT 30
94#define OCD_DC_ABORT_BIT 31
95
96/* Bits in DS */
97#define OCD_DS_SSS_BIT 0
98#define OCD_DS_SWB_BIT 1
99#define OCD_DS_HWB_BIT 2
100#define OCD_DS_HWE_BIT 3
101#define OCD_DS_STP_BIT 4
102#define OCD_DS_DBS_BIT 5
103#define OCD_DS_BP_START 8
104#define OCD_DS_BP_SIZE 8
105#define OCD_DS_INC_BIT 24
106#define OCD_DS_BOZ_BIT 25
107#define OCD_DS_DBA_BIT 26
108#define OCD_DS_EXB_BIT 27
109#define OCD_DS_NTBF_BIT 28
110
111/* Bits in RWCS */
112#define OCD_RWCS_DV_BIT 0
113#define OCD_RWCS_ERR_BIT 1
114#define OCD_RWCS_CNT_START 2
115#define OCD_RWCS_CNT_SIZE 14
116#define OCD_RWCS_CRC_BIT 19
117#define OCD_RWCS_NTBC_START 20
118#define OCD_RWCS_NTBC_SIZE 2
119#define OCD_RWCS_NTE_BIT 22
120#define OCD_RWCS_NTAP_BIT 23
121#define OCD_RWCS_WRAPPED_BIT 24
122#define OCD_RWCS_CCTRL_START 25
123#define OCD_RWCS_CCTRL_SIZE 2
124#define OCD_RWCS_SZ_START 27
125#define OCD_RWCS_SZ_SIZE 3
126#define OCD_RWCS_RW_BIT 30
127#define OCD_RWCS_AC_BIT 31
128
129/* Bits in RWA */
130#define OCD_RWA_RWA_START 0
131#define OCD_RWA_RWA_SIZE 32
132
133/* Bits in RWD */
134#define OCD_RWD_RWD_START 0
135#define OCD_RWD_RWD_SIZE 32
136
137/* Bits in WT */
138#define OCD_WT_DTE_START 20
139#define OCD_WT_DTE_SIZE 3
140#define OCD_WT_DTS_START 23
141#define OCD_WT_DTS_SIZE 3
142#define OCD_WT_PTE_START 26
143#define OCD_WT_PTE_SIZE 3
144#define OCD_WT_PTS_START 29
145#define OCD_WT_PTS_SIZE 3
146
147/* Bits in DTC */
148#define OCD_DTC_T0WP_BIT 0
149#define OCD_DTC_T1WP_BIT 1
150#define OCD_DTC_ASID0EN_BIT 2
151#define OCD_DTC_ASID0_START 3
152#define OCD_DTC_ASID0_SIZE 8
153#define OCD_DTC_ASID1EN_BIT 11
154#define OCD_DTC_ASID1_START 12
155#define OCD_DTC_ASID1_SIZE 8
156#define OCD_DTC_RWT1_START 28
157#define OCD_DTC_RWT1_SIZE 2
158#define OCD_DTC_RWT0_START 30
159#define OCD_DTC_RWT0_SIZE 2
160
161/* Bits in DTSA0 */
162#define OCD_DTSA0_DTSA_START 0
163#define OCD_DTSA0_DTSA_SIZE 32
164
165/* Bits in DTSA1 */
166#define OCD_DTSA1_DTSA_START 0
167#define OCD_DTSA1_DTSA_SIZE 32
168
169/* Bits in DTEA0 */
170#define OCD_DTEA0_DTEA_START 0
171#define OCD_DTEA0_DTEA_SIZE 32
172
173/* Bits in DTEA1 */
174#define OCD_DTEA1_DTEA_START 0
175#define OCD_DTEA1_DTEA_SIZE 32
176
177/* Bits in BWC0A */
178#define OCD_BWC0A_ASIDEN_BIT 0
179#define OCD_BWC0A_ASID_START 1
180#define OCD_BWC0A_ASID_SIZE 8
181#define OCD_BWC0A_EOC_BIT 14
182#define OCD_BWC0A_AME_BIT 25
183#define OCD_BWC0A_BWE_START 30
184#define OCD_BWC0A_BWE_SIZE 2
185
186/* Bits in BWC0B */
187#define OCD_BWC0B_ASIDEN_BIT 0
188#define OCD_BWC0B_ASID_START 1
189#define OCD_BWC0B_ASID_SIZE 8
190#define OCD_BWC0B_EOC_BIT 14
191#define OCD_BWC0B_AME_BIT 25
192#define OCD_BWC0B_BWE_START 30
193#define OCD_BWC0B_BWE_SIZE 2
194
195/* Bits in BWC1A */
196#define OCD_BWC1A_ASIDEN_BIT 0
197#define OCD_BWC1A_ASID_START 1
198#define OCD_BWC1A_ASID_SIZE 8
199#define OCD_BWC1A_EOC_BIT 14
200#define OCD_BWC1A_AME_BIT 25
201#define OCD_BWC1A_BWE_START 30
202#define OCD_BWC1A_BWE_SIZE 2
203
204/* Bits in BWC1B */
205#define OCD_BWC1B_ASIDEN_BIT 0
206#define OCD_BWC1B_ASID_START 1
207#define OCD_BWC1B_ASID_SIZE 8
208#define OCD_BWC1B_EOC_BIT 14
209#define OCD_BWC1B_AME_BIT 25
210#define OCD_BWC1B_BWE_START 30
211#define OCD_BWC1B_BWE_SIZE 2
212
213/* Bits in BWC2A */
214#define OCD_BWC2A_ASIDEN_BIT 0
215#define OCD_BWC2A_ASID_START 1
216#define OCD_BWC2A_ASID_SIZE 8
217#define OCD_BWC2A_EOC_BIT 14
218#define OCD_BWC2A_AMB_START 20
219#define OCD_BWC2A_AMB_SIZE 5
220#define OCD_BWC2A_AME_BIT 25
221#define OCD_BWC2A_BWE_START 30
222#define OCD_BWC2A_BWE_SIZE 2
223
224/* Bits in BWC2B */
225#define OCD_BWC2B_ASIDEN_BIT 0
226#define OCD_BWC2B_ASID_START 1
227#define OCD_BWC2B_ASID_SIZE 8
228#define OCD_BWC2B_EOC_BIT 14
229#define OCD_BWC2B_AME_BIT 25
230#define OCD_BWC2B_BWE_START 30
231#define OCD_BWC2B_BWE_SIZE 2
232
233/* Bits in BWC3A */
234#define OCD_BWC3A_ASIDEN_BIT 0
235#define OCD_BWC3A_ASID_START 1
236#define OCD_BWC3A_ASID_SIZE 8
237#define OCD_BWC3A_SIZE_START 9
238#define OCD_BWC3A_SIZE_SIZE 3
239#define OCD_BWC3A_EOC_BIT 14
240#define OCD_BWC3A_BWO_START 16
241#define OCD_BWC3A_BWO_SIZE 2
242#define OCD_BWC3A_BME_START 20
243#define OCD_BWC3A_BME_SIZE 4
244#define OCD_BWC3A_BRW_START 28
245#define OCD_BWC3A_BRW_SIZE 2
246#define OCD_BWC3A_BWE_START 30
247#define OCD_BWC3A_BWE_SIZE 2
248
249/* Bits in BWC3B */
250#define OCD_BWC3B_ASIDEN_BIT 0
251#define OCD_BWC3B_ASID_START 1
252#define OCD_BWC3B_ASID_SIZE 8
253#define OCD_BWC3B_SIZE_START 9
254#define OCD_BWC3B_SIZE_SIZE 3
255#define OCD_BWC3B_EOC_BIT 14
256#define OCD_BWC3B_BWO_START 16
257#define OCD_BWC3B_BWO_SIZE 2
258#define OCD_BWC3B_BME_START 20
259#define OCD_BWC3B_BME_SIZE 4
260#define OCD_BWC3B_BRW_START 28
261#define OCD_BWC3B_BRW_SIZE 2
262#define OCD_BWC3B_BWE_START 30
263#define OCD_BWC3B_BWE_SIZE 2
264
265/* Bits in BWA0A */
266#define OCD_BWA0A_BWA_START 0
267#define OCD_BWA0A_BWA_SIZE 32
268
269/* Bits in BWA0B */
270#define OCD_BWA0B_BWA_START 0
271#define OCD_BWA0B_BWA_SIZE 32
272
273/* Bits in BWA1A */
274#define OCD_BWA1A_BWA_START 0
275#define OCD_BWA1A_BWA_SIZE 32
276
277/* Bits in BWA1B */
278#define OCD_BWA1B_BWA_START 0
279#define OCD_BWA1B_BWA_SIZE 32
280
281/* Bits in BWA2A */
282#define OCD_BWA2A_BWA_START 0
283#define OCD_BWA2A_BWA_SIZE 32
284
285/* Bits in BWA2B */
286#define OCD_BWA2B_BWA_START 0
287#define OCD_BWA2B_BWA_SIZE 32
288
289/* Bits in BWA3A */
290#define OCD_BWA3A_BWA_START 0
291#define OCD_BWA3A_BWA_SIZE 32
292
293/* Bits in BWA3B */
294#define OCD_BWA3B_BWA_START 0
295#define OCD_BWA3B_BWA_SIZE 32
296
297/* Bits in NXCFG */
298#define OCD_NXCFG_NXARCH_START 0
299#define OCD_NXCFG_NXARCH_SIZE 4
300#define OCD_NXCFG_NXOCD_START 4
301#define OCD_NXCFG_NXOCD_SIZE 4
302#define OCD_NXCFG_NXPCB_START 8
303#define OCD_NXCFG_NXPCB_SIZE 4
304#define OCD_NXCFG_NXDB_START 12
305#define OCD_NXCFG_NXDB_SIZE 4
306#define OCD_NXCFG_MXMSEO_BIT 16
307#define OCD_NXCFG_NXMDO_START 17
308#define OCD_NXCFG_NXMDO_SIZE 4
309#define OCD_NXCFG_NXPT_BIT 21
310#define OCD_NXCFG_NXOT_BIT 22
311#define OCD_NXCFG_NXDWT_BIT 23
312#define OCD_NXCFG_NXDRT_BIT 24
313#define OCD_NXCFG_NXDTC_START 25
314#define OCD_NXCFG_NXDTC_SIZE 3
315#define OCD_NXCFG_NXDMA_BIT 28
316
317/* Bits in DINST */
318#define OCD_DINST_DINST_START 0
319#define OCD_DINST_DINST_SIZE 32
320
321/* Bits in CPUCM */
322#define OCD_CPUCM_BEM_BIT 1
323#define OCD_CPUCM_FEM_BIT 2
324#define OCD_CPUCM_REM_BIT 3
325#define OCD_CPUCM_IBEM_BIT 4
326#define OCD_CPUCM_IEEM_BIT 5
327
328/* Bits in DCCPU */
329#define OCD_DCCPU_DATA_START 0
330#define OCD_DCCPU_DATA_SIZE 32
331
332/* Bits in DCEMU */
333#define OCD_DCEMU_DATA_START 0
334#define OCD_DCEMU_DATA_SIZE 32
335
336/* Bits in DCSR */
337#define OCD_DCSR_CPUD_BIT 0
338#define OCD_DCSR_EMUD_BIT 1
339
340/* Bits in PID */
341#define OCD_PID_PROCESS_START 0
342#define OCD_PID_PROCESS_SIZE 32
343
344/* Bits in EPC0 */
345#define OCD_EPC0_RNG_START 0
346#define OCD_EPC0_RNG_SIZE 2
347#define OCD_EPC0_CE_BIT 4
348#define OCD_EPC0_ECNT_START 16
349#define OCD_EPC0_ECNT_SIZE 16
350
351/* Bits in EPC1 */
352#define OCD_EPC1_RNG_START 0
353#define OCD_EPC1_RNG_SIZE 2
354#define OCD_EPC1_ATB_BIT 5
355#define OCD_EPC1_AM_BIT 6
356
357/* Bits in EPC2 */
358#define OCD_EPC2_RNG_START 0
359#define OCD_EPC2_RNG_SIZE 2
360#define OCD_EPC2_DB_START 2
361#define OCD_EPC2_DB_SIZE 2
362
363/* Bits in EPC3 */
364#define OCD_EPC3_RNG_START 0
365#define OCD_EPC3_RNG_SIZE 2
366#define OCD_EPC3_DWE_BIT 2
367
368/* Bits in AXC */
369#define OCD_AXC_DIV_START 0
370#define OCD_AXC_DIV_SIZE 4
371#define OCD_AXC_AXE_BIT 8
372#define OCD_AXC_AXS_BIT 9
373#define OCD_AXC_DDR_BIT 10
374#define OCD_AXC_LS_BIT 11
375#define OCD_AXC_REX_BIT 12
376#define OCD_AXC_REXTEN_BIT 13
377
378/* Constants for DC:EIC */
379#define OCD_EIC_PROGRAM_AND_DATA_TRACE 0
380#define OCD_EIC_BREAKPOINT 1
381#define OCD_EIC_NOP 2
382
383/* Constants for DC:OVC */
384#define OCD_OVC_OVERRUN 0
385#define OCD_OVC_DELAY_CPU_BTM 1
386#define OCD_OVC_DELAY_CPU_DTM 2
387#define OCD_OVC_DELAY_CPU_BTM_DTM 3
388
389/* Constants for DC:EOS */
390#define OCD_EOS_NOP 0
391#define OCD_EOS_DEBUG_MODE 1
392#define OCD_EOS_BREAKPOINT_WATCHPOINT 2
393#define OCD_EOS_THQ 3
394
395/* Constants for RWCS:NTBC */
396#define OCD_NTBC_OVERWRITE 0
397#define OCD_NTBC_DISABLE 1
398#define OCD_NTBC_BREAKPOINT 2
399
400/* Constants for RWCS:CCTRL */
401#define OCD_CCTRL_AUTO 0
402#define OCD_CCTRL_CACHED 1
403#define OCD_CCTRL_UNCACHED 2
404
405/* Constants for RWCS:SZ */
406#define OCD_SZ_BYTE 0
407#define OCD_SZ_HALFWORD 1
408#define OCD_SZ_WORD 2
409
410/* Constants for WT:PTS */
411#define OCD_PTS_DISABLED 0
412#define OCD_PTS_PROGRAM_0B 1
413#define OCD_PTS_PROGRAM_1A 2
414#define OCD_PTS_PROGRAM_1B 3
415#define OCD_PTS_PROGRAM_2A 4
416#define OCD_PTS_PROGRAM_2B 5
417#define OCD_PTS_DATA_3A 6
418#define OCD_PTS_DATA_3B 7
419
420/* Constants for DTC:RWT1 */
421#define OCD_RWT1_NO_TRACE 0
422#define OCD_RWT1_DATA_READ 1
423#define OCD_RWT1_DATA_WRITE 2
424#define OCD_RWT1_DATA_READ_WRITE 3
425
426/* Constants for DTC:RWT0 */
427#define OCD_RWT0_NO_TRACE 0
428#define OCD_RWT0_DATA_READ 1
429#define OCD_RWT0_DATA_WRITE 2
430#define OCD_RWT0_DATA_READ_WRITE 3
431
432/* Constants for BWC0A:BWE */
433#define OCD_BWE_DISABLED 0
434#define OCD_BWE_BREAKPOINT_ENABLED 1
435#define OCD_BWE_WATCHPOINT_ENABLED 3
436
437/* Constants for BWC0B:BWE */
438#define OCD_BWE_DISABLED 0
439#define OCD_BWE_BREAKPOINT_ENABLED 1
440#define OCD_BWE_WATCHPOINT_ENABLED 3
441
442/* Constants for BWC1A:BWE */
443#define OCD_BWE_DISABLED 0
444#define OCD_BWE_BREAKPOINT_ENABLED 1
445#define OCD_BWE_WATCHPOINT_ENABLED 3
446
447/* Constants for BWC1B:BWE */
448#define OCD_BWE_DISABLED 0
449#define OCD_BWE_BREAKPOINT_ENABLED 1
450#define OCD_BWE_WATCHPOINT_ENABLED 3
451
452/* Constants for BWC2A:BWE */
453#define OCD_BWE_DISABLED 0
454#define OCD_BWE_BREAKPOINT_ENABLED 1
455#define OCD_BWE_WATCHPOINT_ENABLED 3
456
457/* Constants for BWC2B:BWE */
458#define OCD_BWE_DISABLED 0
459#define OCD_BWE_BREAKPOINT_ENABLED 1
460#define OCD_BWE_WATCHPOINT_ENABLED 3
461
462/* Constants for BWC3A:SIZE */
463#define OCD_SIZE_BYTE_ACCESS 4
464#define OCD_SIZE_HALFWORD_ACCESS 5
465#define OCD_SIZE_WORD_ACCESS 6
466#define OCD_SIZE_DOUBLE_WORD_ACCESS 7
467
468/* Constants for BWC3A:BRW */
469#define OCD_BRW_READ_BREAK 0
470#define OCD_BRW_WRITE_BREAK 1
471#define OCD_BRW_ANY_ACCES_BREAK 2
472
473/* Constants for BWC3A:BWE */
474#define OCD_BWE_DISABLED 0
475#define OCD_BWE_BREAKPOINT_ENABLED 1
476#define OCD_BWE_WATCHPOINT_ENABLED 3
477
478/* Constants for BWC3B:SIZE */
479#define OCD_SIZE_BYTE_ACCESS 4
480#define OCD_SIZE_HALFWORD_ACCESS 5
481#define OCD_SIZE_WORD_ACCESS 6
482#define OCD_SIZE_DOUBLE_WORD_ACCESS 7
483
484/* Constants for BWC3B:BRW */
485#define OCD_BRW_READ_BREAK 0
486#define OCD_BRW_WRITE_BREAK 1
487#define OCD_BRW_ANY_ACCES_BREAK 2
488
489/* Constants for BWC3B:BWE */
490#define OCD_BWE_DISABLED 0
491#define OCD_BWE_BREAKPOINT_ENABLED 1
492#define OCD_BWE_WATCHPOINT_ENABLED 3
493
494/* Constants for EPC0:RNG */
495#define OCD_RNG_DISABLED 0
496#define OCD_RNG_EXCLUSIVE 1
497#define OCD_RNG_INCLUSIVE 2
498
499/* Constants for EPC1:RNG */
500#define OCD_RNG_DISABLED 0
501#define OCD_RNG_EXCLUSIVE 1
502#define OCD_RNG_INCLUSIVE 2
503
504/* Constants for EPC2:RNG */
505#define OCD_RNG_DISABLED 0
506#define OCD_RNG_EXCLUSIVE 1
507#define OCD_RNG_INCLUSIVE 2
508
509/* Constants for EPC2:DB */
510#define OCD_DB_DISABLED 0
511#define OCD_DB_CHAINED_B 1
512#define OCD_DB_CHAINED_A 2
513#define OCD_DB_AHAINED_A_AND_B 3
514
515/* Constants for EPC3:RNG */
516#define OCD_RNG_DISABLED 0
517#define OCD_RNG_EXCLUSIVE 1
518#define OCD_RNG_INCLUSIVE 2
519
520#ifndef __ASSEMBLER__
521
522/* Register access macros */
523static inline unsigned long __ocd_read(unsigned int reg)
524{
525 return __builtin_mfdr(reg);
526}
527
528static inline void __ocd_write(unsigned int reg, unsigned long value)
529{
530 __builtin_mtdr(reg, value);
531}
532
533#define ocd_read(reg) __ocd_read(OCD_##reg)
534#define ocd_write(reg, value) __ocd_write(OCD_##reg, value)
535
536struct task_struct;
537
538void ocd_enable(struct task_struct *child);
539void ocd_disable(struct task_struct *child);
540
541#endif /* !__ASSEMBLER__ */
542
543#endif /* __ASM_AVR32_OCD_H */
diff --git a/arch/avr32/include/asm/page.h b/arch/avr32/include/asm/page.h
new file mode 100644
index 000000000000..f805d1cb11bc
--- /dev/null
+++ b/arch/avr32/include/asm/page.h
@@ -0,0 +1,104 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_PAGE_H
9#define __ASM_AVR32_PAGE_H
10
11#include <linux/const.h>
12
13/* PAGE_SHIFT determines the page size */
14#define PAGE_SHIFT 12
15#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
16#define PAGE_MASK (~(PAGE_SIZE-1))
17#define PTE_MASK PAGE_MASK
18
19#ifndef __ASSEMBLY__
20
21#include <asm/addrspace.h>
22
23extern void clear_page(void *to);
24extern void copy_page(void *to, void *from);
25
26#define clear_user_page(page, vaddr, pg) clear_page(page)
27#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
28
29/*
30 * These are used to make use of C type-checking..
31 */
32typedef struct { unsigned long pte; } pte_t;
33typedef struct { unsigned long pgd; } pgd_t;
34typedef struct { unsigned long pgprot; } pgprot_t;
35typedef struct page *pgtable_t;
36
37#define pte_val(x) ((x).pte)
38#define pgd_val(x) ((x).pgd)
39#define pgprot_val(x) ((x).pgprot)
40
41#define __pte(x) ((pte_t) { (x) })
42#define __pgd(x) ((pgd_t) { (x) })
43#define __pgprot(x) ((pgprot_t) { (x) })
44
45/* FIXME: These should be removed soon */
46extern unsigned long memory_start, memory_end;
47
48/* Pure 2^n version of get_order */
49static inline int get_order(unsigned long size)
50{
51 unsigned lz;
52
53 size = (size - 1) >> PAGE_SHIFT;
54 asm("clz %0, %1" : "=r"(lz) : "r"(size));
55 return 32 - lz;
56}
57
58#endif /* !__ASSEMBLY__ */
59
60/*
61 * The hardware maps the virtual addresses 0x80000000 -> 0x9fffffff
62 * permanently to the physical addresses 0x00000000 -> 0x1fffffff when
63 * segmentation is enabled. We want to make use of this in order to
64 * minimize TLB pressure.
65 */
66#define PAGE_OFFSET (0x80000000UL)
67
68/*
69 * ALSA uses virt_to_page() on DMA pages, which I'm not entirely sure
70 * is a good idea. Anyway, we can't simply subtract PAGE_OFFSET here
71 * in that case, so we'll have to mask out the three most significant
72 * bits of the address instead...
73 *
74 * What's the difference between __pa() and virt_to_phys() anyway?
75 */
76#define __pa(x) PHYSADDR(x)
77#define __va(x) ((void *)(P1SEGADDR(x)))
78
79#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT)
80
81#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT))
82#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
83
84#ifndef CONFIG_NEED_MULTIPLE_NODES
85
86#define PHYS_PFN_OFFSET (CONFIG_PHYS_OFFSET >> PAGE_SHIFT)
87
88#define pfn_to_page(pfn) (mem_map + ((pfn) - PHYS_PFN_OFFSET))
89#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + PHYS_PFN_OFFSET)
90#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
91#endif /* CONFIG_NEED_MULTIPLE_NODES */
92
93#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
94#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
95
96#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
97 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
98
99/*
100 * Memory above this physical address will be considered highmem.
101 */
102#define HIGHMEM_START 0x20000000UL
103
104#endif /* __ASM_AVR32_PAGE_H */
diff --git a/arch/avr32/include/asm/param.h b/arch/avr32/include/asm/param.h
new file mode 100644
index 000000000000..34bc8d4c3b29
--- /dev/null
+++ b/arch/avr32/include/asm/param.h
@@ -0,0 +1,23 @@
1#ifndef __ASM_AVR32_PARAM_H
2#define __ASM_AVR32_PARAM_H
3
4#ifdef __KERNEL__
5# define HZ CONFIG_HZ
6# define USER_HZ 100 /* User interfaces are in "ticks" */
7# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
8#endif
9
10#ifndef HZ
11# define HZ 100
12#endif
13
14/* TODO: Should be configurable */
15#define EXEC_PAGESIZE 4096
16
17#ifndef NOGROUP
18# define NOGROUP (-1)
19#endif
20
21#define MAXHOSTNAMELEN 64
22
23#endif /* __ASM_AVR32_PARAM_H */
diff --git a/arch/avr32/include/asm/pci.h b/arch/avr32/include/asm/pci.h
new file mode 100644
index 000000000000..a32a02372017
--- /dev/null
+++ b/arch/avr32/include/asm/pci.h
@@ -0,0 +1,10 @@
1#ifndef __ASM_AVR32_PCI_H__
2#define __ASM_AVR32_PCI_H__
3
4/* We don't support PCI yet, but some drivers require this file anyway */
5
6#define PCI_DMA_BUS_IS_PHYS (1)
7
8#include <asm-generic/pci-dma-compat.h>
9
10#endif /* __ASM_AVR32_PCI_H__ */
diff --git a/arch/avr32/include/asm/percpu.h b/arch/avr32/include/asm/percpu.h
new file mode 100644
index 000000000000..69227b4cd0d4
--- /dev/null
+++ b/arch/avr32/include/asm/percpu.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_PERCPU_H
2#define __ASM_AVR32_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ASM_AVR32_PERCPU_H */
diff --git a/arch/avr32/include/asm/pgalloc.h b/arch/avr32/include/asm/pgalloc.h
new file mode 100644
index 000000000000..640821323943
--- /dev/null
+++ b/arch/avr32/include/asm/pgalloc.h
@@ -0,0 +1,98 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_PGALLOC_H
9#define __ASM_AVR32_PGALLOC_H
10
11#include <linux/quicklist.h>
12#include <asm/page.h>
13#include <asm/pgtable.h>
14
15#define QUICK_PGD 0 /* Preserve kernel mappings over free */
16#define QUICK_PT 1 /* Zero on free */
17
18static inline void pmd_populate_kernel(struct mm_struct *mm,
19 pmd_t *pmd, pte_t *pte)
20{
21 set_pmd(pmd, __pmd((unsigned long)pte));
22}
23
24static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
25 pgtable_t pte)
26{
27 set_pmd(pmd, __pmd((unsigned long)page_address(pte)));
28}
29#define pmd_pgtable(pmd) pmd_page(pmd)
30
31static inline void pgd_ctor(void *x)
32{
33 pgd_t *pgd = x;
34
35 memcpy(pgd + USER_PTRS_PER_PGD,
36 swapper_pg_dir + USER_PTRS_PER_PGD,
37 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
38}
39
40/*
41 * Allocate and free page tables
42 */
43static inline pgd_t *pgd_alloc(struct mm_struct *mm)
44{
45 return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor);
46}
47
48static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
49{
50 quicklist_free(QUICK_PGD, NULL, pgd);
51}
52
53static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
54 unsigned long address)
55{
56 return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
57}
58
59static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
60 unsigned long address)
61{
62 struct page *page;
63 void *pg;
64
65 pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
66 if (!pg)
67 return NULL;
68
69 page = virt_to_page(pg);
70 pgtable_page_ctor(page);
71
72 return page;
73}
74
75static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
76{
77 quicklist_free(QUICK_PT, NULL, pte);
78}
79
80static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
81{
82 pgtable_page_dtor(pte);
83 quicklist_free_page(QUICK_PT, NULL, pte);
84}
85
86#define __pte_free_tlb(tlb,pte) \
87do { \
88 pgtable_page_dtor(pte); \
89 tlb_remove_page((tlb), pte); \
90} while (0)
91
92static inline void check_pgt_cache(void)
93{
94 quicklist_trim(QUICK_PGD, NULL, 25, 16);
95 quicklist_trim(QUICK_PT, NULL, 25, 16);
96}
97
98#endif /* __ASM_AVR32_PGALLOC_H */
diff --git a/arch/avr32/include/asm/pgtable-2level.h b/arch/avr32/include/asm/pgtable-2level.h
new file mode 100644
index 000000000000..425dd567b5b9
--- /dev/null
+++ b/arch/avr32/include/asm/pgtable-2level.h
@@ -0,0 +1,47 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_PGTABLE_2LEVEL_H
9#define __ASM_AVR32_PGTABLE_2LEVEL_H
10
11#include <asm-generic/pgtable-nopmd.h>
12
13/*
14 * Traditional 2-level paging structure
15 */
16#define PGDIR_SHIFT 22
17#define PTRS_PER_PGD 1024
18
19#define PTRS_PER_PTE 1024
20
21#ifndef __ASSEMBLY__
22#define pte_ERROR(e) \
23 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
24#define pgd_ERROR(e) \
25 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
26
27/*
28 * Certain architectures need to do special things when PTEs
29 * within a page table are directly modified. Thus, the following
30 * hook is made available.
31 */
32#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
33#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep, pteval)
34
35/*
36 * (pmds are folded into pgds so this doesn't get actually called,
37 * but the define is needed for a generic inline function.)
38 */
39#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
40
41#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
42#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
43#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
44
45#endif /* !__ASSEMBLY__ */
46
47#endif /* __ASM_AVR32_PGTABLE_2LEVEL_H */
diff --git a/arch/avr32/include/asm/pgtable.h b/arch/avr32/include/asm/pgtable.h
new file mode 100644
index 000000000000..fecdda16f444
--- /dev/null
+++ b/arch/avr32/include/asm/pgtable.h
@@ -0,0 +1,377 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_PGTABLE_H
9#define __ASM_AVR32_PGTABLE_H
10
11#include <asm/addrspace.h>
12
13#ifndef __ASSEMBLY__
14#include <linux/sched.h>
15
16#endif /* !__ASSEMBLY__ */
17
18/*
19 * Use two-level page tables just as the i386 (without PAE)
20 */
21#include <asm/pgtable-2level.h>
22
23/*
24 * The following code might need some cleanup when the values are
25 * final...
26 */
27#define PMD_SIZE (1UL << PMD_SHIFT)
28#define PMD_MASK (~(PMD_SIZE-1))
29#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
30#define PGDIR_MASK (~(PGDIR_SIZE-1))
31
32#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
33#define FIRST_USER_ADDRESS 0
34
35#ifndef __ASSEMBLY__
36extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
37extern void paging_init(void);
38
39/*
40 * ZERO_PAGE is a global shared page that is always zero: used for
41 * zero-mapped memory areas etc.
42 */
43extern struct page *empty_zero_page;
44#define ZERO_PAGE(vaddr) (empty_zero_page)
45
46/*
47 * Just any arbitrary offset to the start of the vmalloc VM area: the
48 * current 8 MiB value just means that there will be a 8 MiB "hole"
49 * after the uncached physical memory (P2 segment) until the vmalloc
50 * area starts. That means that any out-of-bounds memory accesses will
51 * hopefully be caught; we don't know if the end of the P1/P2 segments
52 * are actually used for anything, but it is anyway safer to let the
53 * MMU catch these kinds of errors than to rely on the memory bus.
54 *
55 * A "hole" of the same size is added to the end of the P3 segment as
56 * well. It might seem wasteful to use 16 MiB of virtual address space
57 * on this, but we do have 512 MiB of it...
58 *
59 * The vmalloc() routines leave a hole of 4 KiB between each vmalloced
60 * area for the same reason.
61 */
62#define VMALLOC_OFFSET (8 * 1024 * 1024)
63#define VMALLOC_START (P3SEG + VMALLOC_OFFSET)
64#define VMALLOC_END (P4SEG - VMALLOC_OFFSET)
65#endif /* !__ASSEMBLY__ */
66
67/*
68 * Page flags. Some of these flags are not directly supported by
69 * hardware, so we have to emulate them.
70 */
71#define _TLBEHI_BIT_VALID 9
72#define _TLBEHI_VALID (1 << _TLBEHI_BIT_VALID)
73
74#define _PAGE_BIT_WT 0 /* W-bit : write-through */
75#define _PAGE_BIT_DIRTY 1 /* D-bit : page changed */
76#define _PAGE_BIT_SZ0 2 /* SZ0-bit : Size of page */
77#define _PAGE_BIT_SZ1 3 /* SZ1-bit : Size of page */
78#define _PAGE_BIT_EXECUTE 4 /* X-bit : execute access allowed */
79#define _PAGE_BIT_RW 5 /* AP0-bit : write access allowed */
80#define _PAGE_BIT_USER 6 /* AP1-bit : user space access allowed */
81#define _PAGE_BIT_BUFFER 7 /* B-bit : bufferable */
82#define _PAGE_BIT_GLOBAL 8 /* G-bit : global (ignore ASID) */
83#define _PAGE_BIT_CACHABLE 9 /* C-bit : cachable */
84
85/* If we drop support for 1K pages, we get two extra bits */
86#define _PAGE_BIT_PRESENT 10
87#define _PAGE_BIT_ACCESSED 11 /* software: page was accessed */
88
89/* The following flags are only valid when !PRESENT */
90#define _PAGE_BIT_FILE 0 /* software: pagecache or swap? */
91
92#define _PAGE_WT (1 << _PAGE_BIT_WT)
93#define _PAGE_DIRTY (1 << _PAGE_BIT_DIRTY)
94#define _PAGE_EXECUTE (1 << _PAGE_BIT_EXECUTE)
95#define _PAGE_RW (1 << _PAGE_BIT_RW)
96#define _PAGE_USER (1 << _PAGE_BIT_USER)
97#define _PAGE_BUFFER (1 << _PAGE_BIT_BUFFER)
98#define _PAGE_GLOBAL (1 << _PAGE_BIT_GLOBAL)
99#define _PAGE_CACHABLE (1 << _PAGE_BIT_CACHABLE)
100
101/* Software flags */
102#define _PAGE_ACCESSED (1 << _PAGE_BIT_ACCESSED)
103#define _PAGE_PRESENT (1 << _PAGE_BIT_PRESENT)
104#define _PAGE_FILE (1 << _PAGE_BIT_FILE)
105
106/*
107 * Page types, i.e. sizes. _PAGE_TYPE_NONE corresponds to what is
108 * usually called _PAGE_PROTNONE on other architectures.
109 *
110 * XXX: Find out if _PAGE_PROTNONE is equivalent with !_PAGE_USER. If
111 * so, we can encode all possible page sizes (although we can't really
112 * support 1K pages anyway due to the _PAGE_PRESENT and _PAGE_ACCESSED
113 * bits)
114 *
115 */
116#define _PAGE_TYPE_MASK ((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1))
117#define _PAGE_TYPE_NONE (0 << _PAGE_BIT_SZ0)
118#define _PAGE_TYPE_SMALL (1 << _PAGE_BIT_SZ0)
119#define _PAGE_TYPE_MEDIUM (2 << _PAGE_BIT_SZ0)
120#define _PAGE_TYPE_LARGE (3 << _PAGE_BIT_SZ0)
121
122/*
123 * Mask which drop software flags. We currently can't handle more than
124 * 512 MiB of physical memory, so we can use bits 29-31 for other
125 * stuff. With a fixed 4K page size, we can use bits 10-11 as well as
126 * bits 2-3 (SZ)
127 */
128#define _PAGE_FLAGS_HARDWARE_MASK 0xfffff3ff
129
130#define _PAGE_FLAGS_CACHE_MASK (_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT)
131
132/* Flags that may be modified by software */
133#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \
134 | _PAGE_FLAGS_CACHE_MASK)
135
136#define _PAGE_FLAGS_READ (_PAGE_CACHABLE | _PAGE_BUFFER)
137#define _PAGE_FLAGS_WRITE (_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY)
138
139#define _PAGE_NORMAL(x) __pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL \
140 | _PAGE_ACCESSED)
141
142#define PAGE_NONE (_PAGE_ACCESSED | _PAGE_TYPE_NONE)
143#define PAGE_READ (_PAGE_FLAGS_READ | _PAGE_USER)
144#define PAGE_EXEC (_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER)
145#define PAGE_WRITE (_PAGE_FLAGS_WRITE | _PAGE_USER)
146#define PAGE_KERNEL _PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL)
147#define PAGE_KERNEL_RO _PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL)
148
149#define _PAGE_P(x) _PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY))
150#define _PAGE_S(x) _PAGE_NORMAL(x)
151
152#define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ)
153#define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ)
154
155#ifndef __ASSEMBLY__
156/*
157 * The hardware supports flags for write- and execute access. Read is
158 * always allowed if the page is loaded into the TLB, so the "-w-",
159 * "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx",
160 * respectively.
161 *
162 * The "---" case is handled by software; the page will simply not be
163 * loaded into the TLB if the page type is _PAGE_TYPE_NONE.
164 */
165
166#define __P000 __pgprot(PAGE_NONE)
167#define __P001 _PAGE_P(PAGE_READ)
168#define __P010 _PAGE_P(PAGE_WRITE)
169#define __P011 _PAGE_P(PAGE_WRITE | PAGE_READ)
170#define __P100 _PAGE_P(PAGE_EXEC)
171#define __P101 _PAGE_P(PAGE_EXEC | PAGE_READ)
172#define __P110 _PAGE_P(PAGE_EXEC | PAGE_WRITE)
173#define __P111 _PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
174
175#define __S000 __pgprot(PAGE_NONE)
176#define __S001 _PAGE_S(PAGE_READ)
177#define __S010 _PAGE_S(PAGE_WRITE)
178#define __S011 _PAGE_S(PAGE_WRITE | PAGE_READ)
179#define __S100 _PAGE_S(PAGE_EXEC)
180#define __S101 _PAGE_S(PAGE_EXEC | PAGE_READ)
181#define __S110 _PAGE_S(PAGE_EXEC | PAGE_WRITE)
182#define __S111 _PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
183
184#define pte_none(x) (!pte_val(x))
185#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
186
187#define pte_clear(mm,addr,xp) \
188 do { \
189 set_pte_at(mm, addr, xp, __pte(0)); \
190 } while (0)
191
192/*
193 * The following only work if pte_present() is true.
194 * Undefined behaviour if not..
195 */
196static inline int pte_write(pte_t pte)
197{
198 return pte_val(pte) & _PAGE_RW;
199}
200static inline int pte_dirty(pte_t pte)
201{
202 return pte_val(pte) & _PAGE_DIRTY;
203}
204static inline int pte_young(pte_t pte)
205{
206 return pte_val(pte) & _PAGE_ACCESSED;
207}
208static inline int pte_special(pte_t pte)
209{
210 return 0;
211}
212
213/*
214 * The following only work if pte_present() is not true.
215 */
216static inline int pte_file(pte_t pte)
217{
218 return pte_val(pte) & _PAGE_FILE;
219}
220
221/* Mutator functions for PTE bits */
222static inline pte_t pte_wrprotect(pte_t pte)
223{
224 set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW));
225 return pte;
226}
227static inline pte_t pte_mkclean(pte_t pte)
228{
229 set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY));
230 return pte;
231}
232static inline pte_t pte_mkold(pte_t pte)
233{
234 set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED));
235 return pte;
236}
237static inline pte_t pte_mkwrite(pte_t pte)
238{
239 set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW));
240 return pte;
241}
242static inline pte_t pte_mkdirty(pte_t pte)
243{
244 set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY));
245 return pte;
246}
247static inline pte_t pte_mkyoung(pte_t pte)
248{
249 set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED));
250 return pte;
251}
252static inline pte_t pte_mkspecial(pte_t pte)
253{
254 return pte;
255}
256
257#define pmd_none(x) (!pmd_val(x))
258#define pmd_present(x) (pmd_val(x))
259
260static inline void pmd_clear(pmd_t *pmdp)
261{
262 set_pmd(pmdp, __pmd(0));
263}
264
265#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
266
267/*
268 * Permanent address of a page. We don't support highmem, so this is
269 * trivial.
270 */
271#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
272#define pte_page(x) (pfn_to_page(pte_pfn(x)))
273
274/*
275 * Mark the prot value as uncacheable and unbufferable
276 */
277#define pgprot_noncached(prot) \
278 __pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE))
279
280/*
281 * Mark the prot value as uncacheable but bufferable
282 */
283#define pgprot_writecombine(prot) \
284 __pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER)
285
286/*
287 * Conversion functions: convert a page and protection to a page entry,
288 * and a page entry and page directory to the page they refer to.
289 *
290 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
291 */
292#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
293
294static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
295{
296 set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK)
297 | pgprot_val(newprot)));
298 return pte;
299}
300
301#define page_pte(page) page_pte_prot(page, __pgprot(0))
302
303#define pmd_page_vaddr(pmd) pmd_val(pmd)
304#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
305
306/* to find an entry in a page-table-directory. */
307#define pgd_index(address) (((address) >> PGDIR_SHIFT) \
308 & (PTRS_PER_PGD - 1))
309#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
310
311/* to find an entry in a kernel page-table-directory */
312#define pgd_offset_k(address) pgd_offset(&init_mm, address)
313
314/* Find an entry in the third-level page table.. */
315#define pte_index(address) \
316 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
317#define pte_offset(dir, address) \
318 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
319#define pte_offset_kernel(dir, address) \
320 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
321#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
322#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
323#define pte_unmap(pte) do { } while (0)
324#define pte_unmap_nested(pte) do { } while (0)
325
326struct vm_area_struct;
327extern void update_mmu_cache(struct vm_area_struct * vma,
328 unsigned long address, pte_t pte);
329
330/*
331 * Encode and decode a swap entry
332 *
333 * Constraints:
334 * _PAGE_FILE at bit 0
335 * _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE)
336 * _PAGE_PRESENT at bit 10
337 *
338 * We encode the type into bits 4-9 and offset into bits 11-31. This
339 * gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per
340 * device, and 64 possible types.
341 *
342 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
343 * and _PAGE_PROTNONE bits
344 */
345#define __swp_type(x) (((x).val >> 4) & 0x3f)
346#define __swp_offset(x) ((x).val >> 11)
347#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) })
348#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
349#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
350
351/*
352 * Encode and decode a nonlinear file mapping entry. We have to
353 * preserve _PAGE_FILE and _PAGE_PRESENT here. _PAGE_TYPE_* isn't
354 * necessary, since _PAGE_FILE implies !_PAGE_PROTNONE (?)
355 */
356#define PTE_FILE_MAX_BITS 30
357#define pte_to_pgoff(pte) (((pte_val(pte) >> 1) & 0x1ff) \
358 | ((pte_val(pte) >> 11) << 9))
359#define pgoff_to_pte(off) ((pte_t) { ((((off) & 0x1ff) << 1) \
360 | (((off) >> 9) << 11) \
361 | _PAGE_FILE) })
362
363typedef pte_t *pte_addr_t;
364
365#define kern_addr_valid(addr) (1)
366
367#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
368 remap_pfn_range(vma, vaddr, pfn, size, prot)
369
370/* No page table caches to initialize (?) */
371#define pgtable_cache_init() do { } while(0)
372
373#include <asm-generic/pgtable.h>
374
375#endif /* !__ASSEMBLY__ */
376
377#endif /* __ASM_AVR32_PGTABLE_H */
diff --git a/arch/avr32/include/asm/poll.h b/arch/avr32/include/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/avr32/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/avr32/include/asm/posix_types.h b/arch/avr32/include/asm/posix_types.h
new file mode 100644
index 000000000000..fe0c0c014389
--- /dev/null
+++ b/arch/avr32/include/asm/posix_types.h
@@ -0,0 +1,125 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_POSIX_TYPES_H
9#define __ASM_AVR32_POSIX_TYPES_H
10
11/*
12 * This file is generally used by user-level software, so you need to
13 * be a little careful about namespace pollution etc. Also, we cannot
14 * assume GCC is being used.
15 */
16
17typedef unsigned long __kernel_ino_t;
18typedef unsigned short __kernel_mode_t;
19typedef unsigned short __kernel_nlink_t;
20typedef long __kernel_off_t;
21typedef int __kernel_pid_t;
22typedef unsigned short __kernel_ipc_pid_t;
23typedef unsigned int __kernel_uid_t;
24typedef unsigned int __kernel_gid_t;
25typedef unsigned long __kernel_size_t;
26typedef long __kernel_ssize_t;
27typedef int __kernel_ptrdiff_t;
28typedef long __kernel_time_t;
29typedef long __kernel_suseconds_t;
30typedef long __kernel_clock_t;
31typedef int __kernel_timer_t;
32typedef int __kernel_clockid_t;
33typedef int __kernel_daddr_t;
34typedef char * __kernel_caddr_t;
35typedef unsigned short __kernel_uid16_t;
36typedef unsigned short __kernel_gid16_t;
37typedef unsigned int __kernel_uid32_t;
38typedef unsigned int __kernel_gid32_t;
39
40typedef unsigned short __kernel_old_uid_t;
41typedef unsigned short __kernel_old_gid_t;
42typedef unsigned short __kernel_old_dev_t;
43
44#ifdef __GNUC__
45typedef long long __kernel_loff_t;
46#endif
47
48typedef struct {
49 int val[2];
50} __kernel_fsid_t;
51
52#if defined(__KERNEL__)
53
54#undef __FD_SET
55static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
56{
57 unsigned long __tmp = __fd / __NFDBITS;
58 unsigned long __rem = __fd % __NFDBITS;
59 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
60}
61
62#undef __FD_CLR
63static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
64{
65 unsigned long __tmp = __fd / __NFDBITS;
66 unsigned long __rem = __fd % __NFDBITS;
67 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
68}
69
70
71#undef __FD_ISSET
72static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
73{
74 unsigned long __tmp = __fd / __NFDBITS;
75 unsigned long __rem = __fd % __NFDBITS;
76 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
77}
78
79/*
80 * This will unroll the loop for the normal constant case (8 ints,
81 * for a 256-bit fd_set)
82 */
83#undef __FD_ZERO
84static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
85{
86 unsigned long *__tmp = __p->fds_bits;
87 int __i;
88
89 if (__builtin_constant_p(__FDSET_LONGS)) {
90 switch (__FDSET_LONGS) {
91 case 16:
92 __tmp[ 0] = 0; __tmp[ 1] = 0;
93 __tmp[ 2] = 0; __tmp[ 3] = 0;
94 __tmp[ 4] = 0; __tmp[ 5] = 0;
95 __tmp[ 6] = 0; __tmp[ 7] = 0;
96 __tmp[ 8] = 0; __tmp[ 9] = 0;
97 __tmp[10] = 0; __tmp[11] = 0;
98 __tmp[12] = 0; __tmp[13] = 0;
99 __tmp[14] = 0; __tmp[15] = 0;
100 return;
101
102 case 8:
103 __tmp[ 0] = 0; __tmp[ 1] = 0;
104 __tmp[ 2] = 0; __tmp[ 3] = 0;
105 __tmp[ 4] = 0; __tmp[ 5] = 0;
106 __tmp[ 6] = 0; __tmp[ 7] = 0;
107 return;
108
109 case 4:
110 __tmp[ 0] = 0; __tmp[ 1] = 0;
111 __tmp[ 2] = 0; __tmp[ 3] = 0;
112 return;
113 }
114 }
115 __i = __FDSET_LONGS;
116 while (__i) {
117 __i--;
118 *__tmp = 0;
119 __tmp++;
120 }
121}
122
123#endif /* defined(__KERNEL__) */
124
125#endif /* __ASM_AVR32_POSIX_TYPES_H */
diff --git a/arch/avr32/include/asm/processor.h b/arch/avr32/include/asm/processor.h
new file mode 100644
index 000000000000..49a88f5a9d2f
--- /dev/null
+++ b/arch/avr32/include/asm/processor.h
@@ -0,0 +1,178 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_PROCESSOR_H
9#define __ASM_AVR32_PROCESSOR_H
10
11#include <asm/page.h>
12#include <asm/cache.h>
13
14#define TASK_SIZE 0x80000000
15
16#ifdef __KERNEL__
17#define STACK_TOP TASK_SIZE
18#define STACK_TOP_MAX STACK_TOP
19#endif
20
21#ifndef __ASSEMBLY__
22
23static inline void *current_text_addr(void)
24{
25 register void *pc asm("pc");
26 return pc;
27}
28
29enum arch_type {
30 ARCH_AVR32A,
31 ARCH_AVR32B,
32 ARCH_MAX
33};
34
35enum cpu_type {
36 CPU_MORGAN,
37 CPU_AT32AP,
38 CPU_MAX
39};
40
41enum tlb_config {
42 TLB_NONE,
43 TLB_SPLIT,
44 TLB_UNIFIED,
45 TLB_INVALID
46};
47
48#define AVR32_FEATURE_RMW (1 << 0)
49#define AVR32_FEATURE_DSP (1 << 1)
50#define AVR32_FEATURE_SIMD (1 << 2)
51#define AVR32_FEATURE_OCD (1 << 3)
52#define AVR32_FEATURE_PCTR (1 << 4)
53#define AVR32_FEATURE_JAVA (1 << 5)
54#define AVR32_FEATURE_FPU (1 << 6)
55
56struct avr32_cpuinfo {
57 struct clk *clk;
58 unsigned long loops_per_jiffy;
59 enum arch_type arch_type;
60 enum cpu_type cpu_type;
61 unsigned short arch_revision;
62 unsigned short cpu_revision;
63 enum tlb_config tlb_config;
64 unsigned long features;
65 u32 device_id;
66
67 struct cache_info icache;
68 struct cache_info dcache;
69};
70
71static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
72{
73 return (cpu->device_id >> 1) & 0x7f;
74}
75static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
76{
77 return (cpu->device_id >> 12) & 0xffff;
78}
79static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
80{
81 return (cpu->device_id >> 28) & 0x0f;
82}
83
84extern struct avr32_cpuinfo boot_cpu_data;
85
86#ifdef CONFIG_SMP
87extern struct avr32_cpuinfo cpu_data[];
88#define current_cpu_data cpu_data[smp_processor_id()]
89#else
90#define cpu_data (&boot_cpu_data)
91#define current_cpu_data boot_cpu_data
92#endif
93
94/* This decides where the kernel will search for a free chunk of vm
95 * space during mmap's
96 */
97#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
98
99#define cpu_relax() barrier()
100#define cpu_sync_pipeline() asm volatile("sub pc, -2" : : : "memory")
101
102struct cpu_context {
103 unsigned long sr;
104 unsigned long pc;
105 unsigned long ksp; /* Kernel stack pointer */
106 unsigned long r7;
107 unsigned long r6;
108 unsigned long r5;
109 unsigned long r4;
110 unsigned long r3;
111 unsigned long r2;
112 unsigned long r1;
113 unsigned long r0;
114};
115
116/* This struct contains the CPU context as stored by switch_to() */
117struct thread_struct {
118 struct cpu_context cpu_context;
119 unsigned long single_step_addr;
120 u16 single_step_insn;
121};
122
123#define INIT_THREAD { \
124 .cpu_context = { \
125 .ksp = sizeof(init_stack) + (long)&init_stack, \
126 }, \
127}
128
129/*
130 * Do necessary setup to start up a newly executed thread.
131 */
132#define start_thread(regs, new_pc, new_sp) \
133 do { \
134 set_fs(USER_DS); \
135 memset(regs, 0, sizeof(*regs)); \
136 regs->sr = MODE_USER; \
137 regs->pc = new_pc & ~1; \
138 regs->sp = new_sp; \
139 } while(0)
140
141struct task_struct;
142
143/* Free all resources held by a thread */
144extern void release_thread(struct task_struct *);
145
146/* Create a kernel thread without removing it from tasklists */
147extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
148
149/* Prepare to copy thread state - unlazy all lazy status */
150#define prepare_to_copy(tsk) do { } while(0)
151
152/* Return saved PC of a blocked thread */
153#define thread_saved_pc(tsk) ((tsk)->thread.cpu_context.pc)
154
155struct pt_regs;
156extern unsigned long get_wchan(struct task_struct *p);
157extern void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl);
158extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
159 struct pt_regs *regs, const char *log_lvl);
160
161#define task_pt_regs(p) \
162 ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
163
164#define KSTK_EIP(tsk) ((tsk)->thread.cpu_context.pc)
165#define KSTK_ESP(tsk) ((tsk)->thread.cpu_context.ksp)
166
167#define ARCH_HAS_PREFETCH
168
169static inline void prefetch(const void *x)
170{
171 const char *c = x;
172 asm volatile("pref %0" : : "r"(c));
173}
174#define PREFETCH_STRIDE L1_CACHE_BYTES
175
176#endif /* __ASSEMBLY__ */
177
178#endif /* __ASM_AVR32_PROCESSOR_H */
diff --git a/arch/avr32/include/asm/ptrace.h b/arch/avr32/include/asm/ptrace.h
new file mode 100644
index 000000000000..9e2d44f4e0fe
--- /dev/null
+++ b/arch/avr32/include/asm/ptrace.h
@@ -0,0 +1,157 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_PTRACE_H
9#define __ASM_AVR32_PTRACE_H
10
11#define PTRACE_GETREGS 12
12#define PTRACE_SETREGS 13
13
14/*
15 * Status Register bits
16 */
17#define SR_H 0x20000000
18#define SR_J 0x10000000
19#define SR_DM 0x08000000
20#define SR_D 0x04000000
21#define MODE_NMI 0x01c00000
22#define MODE_EXCEPTION 0x01800000
23#define MODE_INT3 0x01400000
24#define MODE_INT2 0x01000000
25#define MODE_INT1 0x00c00000
26#define MODE_INT0 0x00800000
27#define MODE_SUPERVISOR 0x00400000
28#define MODE_USER 0x00000000
29#define MODE_MASK 0x01c00000
30#define SR_EM 0x00200000
31#define SR_I3M 0x00100000
32#define SR_I2M 0x00080000
33#define SR_I1M 0x00040000
34#define SR_I0M 0x00020000
35#define SR_GM 0x00010000
36
37#define SR_H_BIT 29
38#define SR_J_BIT 28
39#define SR_DM_BIT 27
40#define SR_D_BIT 26
41#define MODE_SHIFT 22
42#define SR_EM_BIT 21
43#define SR_I3M_BIT 20
44#define SR_I2M_BIT 19
45#define SR_I1M_BIT 18
46#define SR_I0M_BIT 17
47#define SR_GM_BIT 16
48
49/* The user-visible part */
50#define SR_L 0x00000020
51#define SR_Q 0x00000010
52#define SR_V 0x00000008
53#define SR_N 0x00000004
54#define SR_Z 0x00000002
55#define SR_C 0x00000001
56
57#define SR_L_BIT 5
58#define SR_Q_BIT 4
59#define SR_V_BIT 3
60#define SR_N_BIT 2
61#define SR_Z_BIT 1
62#define SR_C_BIT 0
63
64/*
65 * The order is defined by the stmts instruction. r0 is stored first,
66 * so it gets the highest address.
67 *
68 * Registers 0-12 are general-purpose registers (r12 is normally used for
69 * the function return value).
70 * Register 13 is the stack pointer
71 * Register 14 is the link register
72 * Register 15 is the program counter (retrieved from the RAR sysreg)
73 */
74#define FRAME_SIZE_FULL 72
75#define REG_R12_ORIG 68
76#define REG_R0 64
77#define REG_R1 60
78#define REG_R2 56
79#define REG_R3 52
80#define REG_R4 48
81#define REG_R5 44
82#define REG_R6 40
83#define REG_R7 36
84#define REG_R8 32
85#define REG_R9 28
86#define REG_R10 24
87#define REG_R11 20
88#define REG_R12 16
89#define REG_SP 12
90#define REG_LR 8
91
92#define FRAME_SIZE_MIN 8
93#define REG_PC 4
94#define REG_SR 0
95
96#ifndef __ASSEMBLY__
97struct pt_regs {
98 /* These are always saved */
99 unsigned long sr;
100 unsigned long pc;
101
102 /* These are sometimes saved */
103 unsigned long lr;
104 unsigned long sp;
105 unsigned long r12;
106 unsigned long r11;
107 unsigned long r10;
108 unsigned long r9;
109 unsigned long r8;
110 unsigned long r7;
111 unsigned long r6;
112 unsigned long r5;
113 unsigned long r4;
114 unsigned long r3;
115 unsigned long r2;
116 unsigned long r1;
117 unsigned long r0;
118
119 /* Only saved on system call */
120 unsigned long r12_orig;
121};
122
123#ifdef __KERNEL__
124
125#include <asm/ocd.h>
126
127#define arch_ptrace_attach(child) ocd_enable(child)
128
129#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
130#define instruction_pointer(regs) ((regs)->pc)
131#define profile_pc(regs) instruction_pointer(regs)
132
133extern void show_regs (struct pt_regs *);
134
135static __inline__ int valid_user_regs(struct pt_regs *regs)
136{
137 /*
138 * Some of the Java bits might be acceptable if/when we
139 * implement some support for that stuff...
140 */
141 if ((regs->sr & 0xffff0000) == 0)
142 return 1;
143
144 /*
145 * Force status register flags to be sane and report this
146 * illegal behaviour...
147 */
148 regs->sr &= 0x0000ffff;
149 return 0;
150}
151
152
153#endif /* __KERNEL__ */
154
155#endif /* ! __ASSEMBLY__ */
156
157#endif /* __ASM_AVR32_PTRACE_H */
diff --git a/arch/avr32/include/asm/resource.h b/arch/avr32/include/asm/resource.h
new file mode 100644
index 000000000000..c6dd101472b1
--- /dev/null
+++ b/arch/avr32/include/asm/resource.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_RESOURCE_H
2#define __ASM_AVR32_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* __ASM_AVR32_RESOURCE_H */
diff --git a/arch/avr32/include/asm/scatterlist.h b/arch/avr32/include/asm/scatterlist.h
new file mode 100644
index 000000000000..377320e3bd17
--- /dev/null
+++ b/arch/avr32/include/asm/scatterlist.h
@@ -0,0 +1,26 @@
1#ifndef __ASM_AVR32_SCATTERLIST_H
2#define __ASM_AVR32_SCATTERLIST_H
3
4#include <asm/types.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 dma_addr_t dma_address;
13 unsigned int length;
14};
15
16/* These macros should be used after a pci_map_sg call has been done
17 * to get bus addresses of each of the SG entries and their lengths.
18 * You should only work with the number of sg entries pci_map_sg
19 * returns.
20 */
21#define sg_dma_address(sg) ((sg)->dma_address)
22#define sg_dma_len(sg) ((sg)->length)
23
24#define ISA_DMA_THRESHOLD (0xffffffff)
25
26#endif /* __ASM_AVR32_SCATTERLIST_H */
diff --git a/arch/avr32/include/asm/sections.h b/arch/avr32/include/asm/sections.h
new file mode 100644
index 000000000000..aa14252e4181
--- /dev/null
+++ b/arch/avr32/include/asm/sections.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_SECTIONS_H
2#define __ASM_AVR32_SECTIONS_H
3
4#include <asm-generic/sections.h>
5
6#endif /* __ASM_AVR32_SECTIONS_H */
diff --git a/arch/avr32/include/asm/sembuf.h b/arch/avr32/include/asm/sembuf.h
new file mode 100644
index 000000000000..e472216e0c97
--- /dev/null
+++ b/arch/avr32/include/asm/sembuf.h
@@ -0,0 +1,25 @@
1#ifndef __ASM_AVR32_SEMBUF_H
2#define __ASM_AVR32_SEMBUF_H
3
4/*
5* The semid64_ds structure for AVR32 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* __ASM_AVR32_SEMBUF_H */
diff --git a/arch/avr32/include/asm/serial.h b/arch/avr32/include/asm/serial.h
new file mode 100644
index 000000000000..5ecaebc22b02
--- /dev/null
+++ b/arch/avr32/include/asm/serial.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_SERIAL_H
2#define _ASM_SERIAL_H
3
4/*
5 * This assumes you have a 1.8432 MHz clock for your UART.
6 *
7 * It'd be nice if someone built a serial card with a 24.576 MHz
8 * clock, since the 16550A is capable of handling a top speed of 1.5
9 * megabits/second; but this requires the faster clock.
10 */
11#define BASE_BAUD (1843200 / 16)
12
13#endif /* _ASM_SERIAL_H */
diff --git a/arch/avr32/include/asm/setup.h b/arch/avr32/include/asm/setup.h
new file mode 100644
index 000000000000..ff5b7cf6be4d
--- /dev/null
+++ b/arch/avr32/include/asm/setup.h
@@ -0,0 +1,138 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * Based on linux/include/asm-arm/setup.h
5 * Copyright (C) 1997-1999 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ASM_AVR32_SETUP_H__
12#define __ASM_AVR32_SETUP_H__
13
14#define COMMAND_LINE_SIZE 256
15
16#ifdef __KERNEL__
17
18/* Magic number indicating that a tag table is present */
19#define ATAG_MAGIC 0xa2a25441
20
21#ifndef __ASSEMBLY__
22
23/*
24 * Generic memory range, used by several tags.
25 *
26 * addr is always physical.
27 * size is measured in bytes.
28 * next is for use by the OS, e.g. for grouping regions into
29 * linked lists.
30 */
31struct tag_mem_range {
32 u32 addr;
33 u32 size;
34 struct tag_mem_range * next;
35};
36
37/* The list ends with an ATAG_NONE node. */
38#define ATAG_NONE 0x00000000
39
40struct tag_header {
41 u32 size;
42 u32 tag;
43};
44
45/* The list must start with an ATAG_CORE node */
46#define ATAG_CORE 0x54410001
47
48struct tag_core {
49 u32 flags;
50 u32 pagesize;
51 u32 rootdev;
52};
53
54/* it is allowed to have multiple ATAG_MEM nodes */
55#define ATAG_MEM 0x54410002
56/* ATAG_MEM uses tag_mem_range */
57
58/* command line: \0 terminated string */
59#define ATAG_CMDLINE 0x54410003
60
61struct tag_cmdline {
62 char cmdline[1]; /* this is the minimum size */
63};
64
65/* Ramdisk image (may be compressed) */
66#define ATAG_RDIMG 0x54410004
67/* ATAG_RDIMG uses tag_mem_range */
68
69/* Information about various clocks present in the system */
70#define ATAG_CLOCK 0x54410005
71
72struct tag_clock {
73 u32 clock_id; /* Which clock are we talking about? */
74 u32 clock_flags; /* Special features */
75 u64 clock_hz; /* Clock speed in Hz */
76};
77
78/* The clock types we know about */
79#define CLOCK_BOOTCPU 0
80
81/* Memory reserved for the system (e.g. the bootloader) */
82#define ATAG_RSVD_MEM 0x54410006
83/* ATAG_RSVD_MEM uses tag_mem_range */
84
85/* Ethernet information */
86
87#define ATAG_ETHERNET 0x54410007
88
89struct tag_ethernet {
90 u8 mac_index;
91 u8 mii_phy_addr;
92 u8 hw_address[6];
93};
94
95#define ETH_INVALID_PHY 0xff
96
97struct tag {
98 struct tag_header hdr;
99 union {
100 struct tag_core core;
101 struct tag_mem_range mem_range;
102 struct tag_cmdline cmdline;
103 struct tag_clock clock;
104 struct tag_ethernet ethernet;
105 } u;
106};
107
108struct tagtable {
109 u32 tag;
110 int (*parse)(struct tag *);
111};
112
113#define __tag __used __attribute__((__section__(".taglist.init")))
114#define __tagtable(tag, fn) \
115 static struct tagtable __tagtable_##fn __tag = { tag, fn }
116
117#define tag_member_present(tag,member) \
118 ((unsigned long)(&((struct tag *)0L)->member + 1) \
119 <= (tag)->hdr.size * 4)
120
121#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size))
122#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
123
124#define for_each_tag(t,base) \
125 for (t = base; t->hdr.size; t = tag_next(t))
126
127extern struct tag *bootloader_tags;
128
129extern resource_size_t fbmem_start;
130extern resource_size_t fbmem_size;
131
132void setup_processor(void);
133
134#endif /* !__ASSEMBLY__ */
135
136#endif /* __KERNEL__ */
137
138#endif /* __ASM_AVR32_SETUP_H__ */
diff --git a/arch/avr32/include/asm/shmbuf.h b/arch/avr32/include/asm/shmbuf.h
new file mode 100644
index 000000000000..c62fba41739a
--- /dev/null
+++ b/arch/avr32/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef __ASM_AVR32_SHMBUF_H
2#define __ASM_AVR32_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for i386 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* __ASM_AVR32_SHMBUF_H */
diff --git a/arch/avr32/include/asm/shmparam.h b/arch/avr32/include/asm/shmparam.h
new file mode 100644
index 000000000000..3681266c77f7
--- /dev/null
+++ b/arch/avr32/include/asm/shmparam.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_SHMPARAM_H
2#define __ASM_AVR32_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* __ASM_AVR32_SHMPARAM_H */
diff --git a/arch/avr32/include/asm/sigcontext.h b/arch/avr32/include/asm/sigcontext.h
new file mode 100644
index 000000000000..e04062b5f39f
--- /dev/null
+++ b/arch/avr32/include/asm/sigcontext.h
@@ -0,0 +1,34 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_SIGCONTEXT_H
9#define __ASM_AVR32_SIGCONTEXT_H
10
11struct sigcontext {
12 unsigned long oldmask;
13
14 /* CPU registers */
15 unsigned long sr;
16 unsigned long pc;
17 unsigned long lr;
18 unsigned long sp;
19 unsigned long r12;
20 unsigned long r11;
21 unsigned long r10;
22 unsigned long r9;
23 unsigned long r8;
24 unsigned long r7;
25 unsigned long r6;
26 unsigned long r5;
27 unsigned long r4;
28 unsigned long r3;
29 unsigned long r2;
30 unsigned long r1;
31 unsigned long r0;
32};
33
34#endif /* __ASM_AVR32_SIGCONTEXT_H */
diff --git a/arch/avr32/include/asm/siginfo.h b/arch/avr32/include/asm/siginfo.h
new file mode 100644
index 000000000000..5ee93f40a8a8
--- /dev/null
+++ b/arch/avr32/include/asm/siginfo.h
@@ -0,0 +1,6 @@
1#ifndef _AVR32_SIGINFO_H
2#define _AVR32_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif
diff --git a/arch/avr32/include/asm/signal.h b/arch/avr32/include/asm/signal.h
new file mode 100644
index 000000000000..caffefeeba1f
--- /dev/null
+++ b/arch/avr32/include/asm/signal.h
@@ -0,0 +1,168 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_SIGNAL_H
9#define __ASM_AVR32_SIGNAL_H
10
11#include <linux/types.h>
12
13/* Avoid too many header ordering problems. */
14struct siginfo;
15
16#ifdef __KERNEL__
17/* Most things should be clean enough to redefine this at will, if care
18 is taken to make libc match. */
19
20#define _NSIG 64
21#define _NSIG_BPW 32
22#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
23
24typedef unsigned long old_sigset_t; /* at least 32 bits */
25
26typedef struct {
27 unsigned long sig[_NSIG_WORDS];
28} sigset_t;
29
30#else
31/* Here we must cater to libcs that poke about in kernel headers. */
32
33#define NSIG 32
34typedef unsigned long sigset_t;
35
36#endif /* __KERNEL__ */
37
38#define SIGHUP 1
39#define SIGINT 2
40#define SIGQUIT 3
41#define SIGILL 4
42#define SIGTRAP 5
43#define SIGABRT 6
44#define SIGIOT 6
45#define SIGBUS 7
46#define SIGFPE 8
47#define SIGKILL 9
48#define SIGUSR1 10
49#define SIGSEGV 11
50#define SIGUSR2 12
51#define SIGPIPE 13
52#define SIGALRM 14
53#define SIGTERM 15
54#define SIGSTKFLT 16
55#define SIGCHLD 17
56#define SIGCONT 18
57#define SIGSTOP 19
58#define SIGTSTP 20
59#define SIGTTIN 21
60#define SIGTTOU 22
61#define SIGURG 23
62#define SIGXCPU 24
63#define SIGXFSZ 25
64#define SIGVTALRM 26
65#define SIGPROF 27
66#define SIGWINCH 28
67#define SIGIO 29
68#define SIGPOLL SIGIO
69/*
70#define SIGLOST 29
71*/
72#define SIGPWR 30
73#define SIGSYS 31
74#define SIGUNUSED 31
75
76/* These should not be considered constants from userland. */
77#define SIGRTMIN 32
78#define SIGRTMAX (_NSIG-1)
79
80/*
81 * SA_FLAGS values:
82 *
83 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
84 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
85 * SA_SIGINFO deliver the signal with SIGINFO structs
86 * SA_ONSTACK indicates that a registered stack_t will be used.
87 * SA_RESTART flag to get restarting signals (which were the default long ago)
88 * SA_NODEFER prevents the current signal from being masked in the handler.
89 * SA_RESETHAND clears the handler when the signal is delivered.
90 *
91 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
92 * Unix names RESETHAND and NODEFER respectively.
93 */
94#define SA_NOCLDSTOP 0x00000001
95#define SA_NOCLDWAIT 0x00000002
96#define SA_SIGINFO 0x00000004
97#define SA_RESTORER 0x04000000
98#define SA_ONSTACK 0x08000000
99#define SA_RESTART 0x10000000
100#define SA_NODEFER 0x40000000
101#define SA_RESETHAND 0x80000000
102
103#define SA_NOMASK SA_NODEFER
104#define SA_ONESHOT SA_RESETHAND
105
106/*
107 * sigaltstack controls
108 */
109#define SS_ONSTACK 1
110#define SS_DISABLE 2
111
112#define MINSIGSTKSZ 2048
113#define SIGSTKSZ 8192
114
115#include <asm-generic/signal.h>
116
117#ifdef __KERNEL__
118struct old_sigaction {
119 __sighandler_t sa_handler;
120 old_sigset_t sa_mask;
121 unsigned long sa_flags;
122 __sigrestore_t sa_restorer;
123};
124
125struct sigaction {
126 __sighandler_t sa_handler;
127 unsigned long sa_flags;
128 __sigrestore_t sa_restorer;
129 sigset_t sa_mask; /* mask last for extensibility */
130};
131
132struct k_sigaction {
133 struct sigaction sa;
134};
135#else
136/* Here we must cater to libcs that poke about in kernel headers. */
137
138struct sigaction {
139 union {
140 __sighandler_t _sa_handler;
141 void (*_sa_sigaction)(int, struct siginfo *, void *);
142 } _u;
143 sigset_t sa_mask;
144 unsigned long sa_flags;
145 void (*sa_restorer)(void);
146};
147
148#define sa_handler _u._sa_handler
149#define sa_sigaction _u._sa_sigaction
150
151#endif /* __KERNEL__ */
152
153typedef struct sigaltstack {
154 void __user *ss_sp;
155 int ss_flags;
156 size_t ss_size;
157} stack_t;
158
159#ifdef __KERNEL__
160
161#include <asm/sigcontext.h>
162#undef __HAVE_ARCH_SIG_BITOPS
163
164#define ptrace_signal_deliver(regs, cookie) do { } while (0)
165
166#endif /* __KERNEL__ */
167
168#endif
diff --git a/arch/avr32/include/asm/socket.h b/arch/avr32/include/asm/socket.h
new file mode 100644
index 000000000000..35863f260929
--- /dev/null
+++ b/arch/avr32/include/asm/socket.h
@@ -0,0 +1,57 @@
1#ifndef __ASM_AVR32_SOCKET_H
2#define __ASM_AVR32_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#endif /* __ASM_AVR32_SOCKET_H */
diff --git a/arch/avr32/include/asm/sockios.h b/arch/avr32/include/asm/sockios.h
new file mode 100644
index 000000000000..0802d742f97d
--- /dev/null
+++ b/arch/avr32/include/asm/sockios.h
@@ -0,0 +1,13 @@
1#ifndef __ASM_AVR32_SOCKIOS_H
2#define __ASM_AVR32_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* __ASM_AVR32_SOCKIOS_H */
diff --git a/arch/avr32/include/asm/stat.h b/arch/avr32/include/asm/stat.h
new file mode 100644
index 000000000000..e72881e10230
--- /dev/null
+++ b/arch/avr32/include/asm/stat.h
@@ -0,0 +1,79 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_STAT_H
9#define __ASM_AVR32_STAT_H
10
11struct __old_kernel_stat {
12 unsigned short st_dev;
13 unsigned short st_ino;
14 unsigned short st_mode;
15 unsigned short st_nlink;
16 unsigned short st_uid;
17 unsigned short st_gid;
18 unsigned short st_rdev;
19 unsigned long st_size;
20 unsigned long st_atime;
21 unsigned long st_mtime;
22 unsigned long st_ctime;
23};
24
25struct stat {
26 unsigned long st_dev;
27 unsigned long st_ino;
28 unsigned short st_mode;
29 unsigned short st_nlink;
30 unsigned short st_uid;
31 unsigned short st_gid;
32 unsigned long st_rdev;
33 unsigned long st_size;
34 unsigned long st_blksize;
35 unsigned long st_blocks;
36 unsigned long st_atime;
37 unsigned long st_atime_nsec;
38 unsigned long st_mtime;
39 unsigned long st_mtime_nsec;
40 unsigned long st_ctime;
41 unsigned long st_ctime_nsec;
42 unsigned long __unused4;
43 unsigned long __unused5;
44};
45
46#define STAT_HAVE_NSEC 1
47
48struct stat64 {
49 unsigned long long st_dev;
50
51 unsigned long long st_ino;
52 unsigned int st_mode;
53 unsigned int st_nlink;
54
55 unsigned long st_uid;
56 unsigned long st_gid;
57
58 unsigned long long st_rdev;
59
60 long long st_size;
61 unsigned long __pad1; /* align 64-bit st_blocks */
62 unsigned long st_blksize;
63
64 unsigned long long st_blocks; /* Number 512-byte blocks allocated. */
65
66 unsigned long st_atime;
67 unsigned long st_atime_nsec;
68
69 unsigned long st_mtime;
70 unsigned long st_mtime_nsec;
71
72 unsigned long st_ctime;
73 unsigned long st_ctime_nsec;
74
75 unsigned long __unused1;
76 unsigned long __unused2;
77};
78
79#endif /* __ASM_AVR32_STAT_H */
diff --git a/arch/avr32/include/asm/statfs.h b/arch/avr32/include/asm/statfs.h
new file mode 100644
index 000000000000..2961bd18c50e
--- /dev/null
+++ b/arch/avr32/include/asm/statfs.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_STATFS_H
2#define __ASM_AVR32_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* __ASM_AVR32_STATFS_H */
diff --git a/arch/avr32/include/asm/string.h b/arch/avr32/include/asm/string.h
new file mode 100644
index 000000000000..c91a623cd585
--- /dev/null
+++ b/arch/avr32/include/asm/string.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_STRING_H
9#define __ASM_AVR32_STRING_H
10
11#define __HAVE_ARCH_MEMSET
12extern void *memset(void *b, int c, size_t len);
13
14#define __HAVE_ARCH_MEMCPY
15extern void *memcpy(void *to, const void *from, size_t len);
16
17#endif /* __ASM_AVR32_STRING_H */
diff --git a/arch/avr32/include/asm/sysreg.h b/arch/avr32/include/asm/sysreg.h
new file mode 100644
index 000000000000..d4e0950170ca
--- /dev/null
+++ b/arch/avr32/include/asm/sysreg.h
@@ -0,0 +1,291 @@
1/*
2 * AVR32 System Registers
3 *
4 * Copyright (C) 2004-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_AVR32_SYSREG_H
11#define __ASM_AVR32_SYSREG_H
12
13/* sysreg register offsets */
14#define SYSREG_SR 0x0000
15#define SYSREG_EVBA 0x0004
16#define SYSREG_ACBA 0x0008
17#define SYSREG_CPUCR 0x000c
18#define SYSREG_ECR 0x0010
19#define SYSREG_RSR_SUP 0x0014
20#define SYSREG_RSR_INT0 0x0018
21#define SYSREG_RSR_INT1 0x001c
22#define SYSREG_RSR_INT2 0x0020
23#define SYSREG_RSR_INT3 0x0024
24#define SYSREG_RSR_EX 0x0028
25#define SYSREG_RSR_NMI 0x002c
26#define SYSREG_RSR_DBG 0x0030
27#define SYSREG_RAR_SUP 0x0034
28#define SYSREG_RAR_INT0 0x0038
29#define SYSREG_RAR_INT1 0x003c
30#define SYSREG_RAR_INT2 0x0040
31#define SYSREG_RAR_INT3 0x0044
32#define SYSREG_RAR_EX 0x0048
33#define SYSREG_RAR_NMI 0x004c
34#define SYSREG_RAR_DBG 0x0050
35#define SYSREG_JECR 0x0054
36#define SYSREG_JOSP 0x0058
37#define SYSREG_JAVA_LV0 0x005c
38#define SYSREG_JAVA_LV1 0x0060
39#define SYSREG_JAVA_LV2 0x0064
40#define SYSREG_JAVA_LV3 0x0068
41#define SYSREG_JAVA_LV4 0x006c
42#define SYSREG_JAVA_LV5 0x0070
43#define SYSREG_JAVA_LV6 0x0074
44#define SYSREG_JAVA_LV7 0x0078
45#define SYSREG_JTBA 0x007c
46#define SYSREG_JBCR 0x0080
47#define SYSREG_CONFIG0 0x0100
48#define SYSREG_CONFIG1 0x0104
49#define SYSREG_COUNT 0x0108
50#define SYSREG_COMPARE 0x010c
51#define SYSREG_TLBEHI 0x0110
52#define SYSREG_TLBELO 0x0114
53#define SYSREG_PTBR 0x0118
54#define SYSREG_TLBEAR 0x011c
55#define SYSREG_MMUCR 0x0120
56#define SYSREG_TLBARLO 0x0124
57#define SYSREG_TLBARHI 0x0128
58#define SYSREG_PCCNT 0x012c
59#define SYSREG_PCNT0 0x0130
60#define SYSREG_PCNT1 0x0134
61#define SYSREG_PCCR 0x0138
62#define SYSREG_BEAR 0x013c
63#define SYSREG_SABAL 0x0300
64#define SYSREG_SABAH 0x0304
65#define SYSREG_SABD 0x0308
66
67/* Bitfields in SR */
68#define SYSREG_SR_C_OFFSET 0
69#define SYSREG_SR_C_SIZE 1
70#define SYSREG_Z_OFFSET 1
71#define SYSREG_Z_SIZE 1
72#define SYSREG_SR_N_OFFSET 2
73#define SYSREG_SR_N_SIZE 1
74#define SYSREG_SR_V_OFFSET 3
75#define SYSREG_SR_V_SIZE 1
76#define SYSREG_Q_OFFSET 4
77#define SYSREG_Q_SIZE 1
78#define SYSREG_L_OFFSET 5
79#define SYSREG_L_SIZE 1
80#define SYSREG_T_OFFSET 14
81#define SYSREG_T_SIZE 1
82#define SYSREG_SR_R_OFFSET 15
83#define SYSREG_SR_R_SIZE 1
84#define SYSREG_GM_OFFSET 16
85#define SYSREG_GM_SIZE 1
86#define SYSREG_I0M_OFFSET 17
87#define SYSREG_I0M_SIZE 1
88#define SYSREG_I1M_OFFSET 18
89#define SYSREG_I1M_SIZE 1
90#define SYSREG_I2M_OFFSET 19
91#define SYSREG_I2M_SIZE 1
92#define SYSREG_I3M_OFFSET 20
93#define SYSREG_I3M_SIZE 1
94#define SYSREG_EM_OFFSET 21
95#define SYSREG_EM_SIZE 1
96#define SYSREG_MODE_OFFSET 22
97#define SYSREG_MODE_SIZE 3
98#define SYSREG_M0_OFFSET 22
99#define SYSREG_M0_SIZE 1
100#define SYSREG_M1_OFFSET 23
101#define SYSREG_M1_SIZE 1
102#define SYSREG_M2_OFFSET 24
103#define SYSREG_M2_SIZE 1
104#define SYSREG_SR_D_OFFSET 26
105#define SYSREG_SR_D_SIZE 1
106#define SYSREG_DM_OFFSET 27
107#define SYSREG_DM_SIZE 1
108#define SYSREG_SR_J_OFFSET 28
109#define SYSREG_SR_J_SIZE 1
110#define SYSREG_H_OFFSET 29
111#define SYSREG_H_SIZE 1
112
113/* Bitfields in CPUCR */
114#define SYSREG_BI_OFFSET 0
115#define SYSREG_BI_SIZE 1
116#define SYSREG_BE_OFFSET 1
117#define SYSREG_BE_SIZE 1
118#define SYSREG_FE_OFFSET 2
119#define SYSREG_FE_SIZE 1
120#define SYSREG_RE_OFFSET 3
121#define SYSREG_RE_SIZE 1
122#define SYSREG_IBE_OFFSET 4
123#define SYSREG_IBE_SIZE 1
124#define SYSREG_IEE_OFFSET 5
125#define SYSREG_IEE_SIZE 1
126
127/* Bitfields in CONFIG0 */
128#define SYSREG_CONFIG0_R_OFFSET 0
129#define SYSREG_CONFIG0_R_SIZE 1
130#define SYSREG_CONFIG0_D_OFFSET 1
131#define SYSREG_CONFIG0_D_SIZE 1
132#define SYSREG_CONFIG0_S_OFFSET 2
133#define SYSREG_CONFIG0_S_SIZE 1
134#define SYSREG_CONFIG0_O_OFFSET 3
135#define SYSREG_CONFIG0_O_SIZE 1
136#define SYSREG_CONFIG0_P_OFFSET 4
137#define SYSREG_CONFIG0_P_SIZE 1
138#define SYSREG_CONFIG0_J_OFFSET 5
139#define SYSREG_CONFIG0_J_SIZE 1
140#define SYSREG_CONFIG0_F_OFFSET 6
141#define SYSREG_CONFIG0_F_SIZE 1
142#define SYSREG_MMUT_OFFSET 7
143#define SYSREG_MMUT_SIZE 3
144#define SYSREG_AR_OFFSET 10
145#define SYSREG_AR_SIZE 3
146#define SYSREG_AT_OFFSET 13
147#define SYSREG_AT_SIZE 3
148#define SYSREG_PROCESSORREVISION_OFFSET 16
149#define SYSREG_PROCESSORREVISION_SIZE 8
150#define SYSREG_PROCESSORID_OFFSET 24
151#define SYSREG_PROCESSORID_SIZE 8
152
153/* Bitfields in CONFIG1 */
154#define SYSREG_DASS_OFFSET 0
155#define SYSREG_DASS_SIZE 3
156#define SYSREG_DLSZ_OFFSET 3
157#define SYSREG_DLSZ_SIZE 3
158#define SYSREG_DSET_OFFSET 6
159#define SYSREG_DSET_SIZE 4
160#define SYSREG_IASS_OFFSET 10
161#define SYSREG_IASS_SIZE 3
162#define SYSREG_ILSZ_OFFSET 13
163#define SYSREG_ILSZ_SIZE 3
164#define SYSREG_ISET_OFFSET 16
165#define SYSREG_ISET_SIZE 4
166#define SYSREG_DMMUSZ_OFFSET 20
167#define SYSREG_DMMUSZ_SIZE 6
168#define SYSREG_IMMUSZ_OFFSET 26
169#define SYSREG_IMMUSZ_SIZE 6
170
171/* Bitfields in TLBEHI */
172#define SYSREG_ASID_OFFSET 0
173#define SYSREG_ASID_SIZE 8
174#define SYSREG_TLBEHI_I_OFFSET 8
175#define SYSREG_TLBEHI_I_SIZE 1
176#define SYSREG_TLBEHI_V_OFFSET 9
177#define SYSREG_TLBEHI_V_SIZE 1
178#define SYSREG_VPN_OFFSET 10
179#define SYSREG_VPN_SIZE 22
180
181/* Bitfields in TLBELO */
182#define SYSREG_W_OFFSET 0
183#define SYSREG_W_SIZE 1
184#define SYSREG_TLBELO_D_OFFSET 1
185#define SYSREG_TLBELO_D_SIZE 1
186#define SYSREG_SZ_OFFSET 2
187#define SYSREG_SZ_SIZE 2
188#define SYSREG_AP_OFFSET 4
189#define SYSREG_AP_SIZE 3
190#define SYSREG_B_OFFSET 7
191#define SYSREG_B_SIZE 1
192#define SYSREG_G_OFFSET 8
193#define SYSREG_G_SIZE 1
194#define SYSREG_TLBELO_C_OFFSET 9
195#define SYSREG_TLBELO_C_SIZE 1
196#define SYSREG_PFN_OFFSET 10
197#define SYSREG_PFN_SIZE 22
198
199/* Bitfields in MMUCR */
200#define SYSREG_E_OFFSET 0
201#define SYSREG_E_SIZE 1
202#define SYSREG_M_OFFSET 1
203#define SYSREG_M_SIZE 1
204#define SYSREG_MMUCR_I_OFFSET 2
205#define SYSREG_MMUCR_I_SIZE 1
206#define SYSREG_MMUCR_N_OFFSET 3
207#define SYSREG_MMUCR_N_SIZE 1
208#define SYSREG_MMUCR_S_OFFSET 4
209#define SYSREG_MMUCR_S_SIZE 1
210#define SYSREG_DLA_OFFSET 8
211#define SYSREG_DLA_SIZE 6
212#define SYSREG_DRP_OFFSET 14
213#define SYSREG_DRP_SIZE 6
214#define SYSREG_ILA_OFFSET 20
215#define SYSREG_ILA_SIZE 6
216#define SYSREG_IRP_OFFSET 26
217#define SYSREG_IRP_SIZE 6
218
219/* Bitfields in PCCR */
220#define SYSREG_PCCR_E_OFFSET 0
221#define SYSREG_PCCR_E_SIZE 1
222#define SYSREG_PCCR_R_OFFSET 1
223#define SYSREG_PCCR_R_SIZE 1
224#define SYSREG_PCCR_C_OFFSET 2
225#define SYSREG_PCCR_C_SIZE 1
226#define SYSREG_PCCR_S_OFFSET 3
227#define SYSREG_PCCR_S_SIZE 1
228#define SYSREG_IEC_OFFSET 4
229#define SYSREG_IEC_SIZE 1
230#define SYSREG_IE0_OFFSET 5
231#define SYSREG_IE0_SIZE 1
232#define SYSREG_IE1_OFFSET 6
233#define SYSREG_IE1_SIZE 1
234#define SYSREG_FC_OFFSET 8
235#define SYSREG_FC_SIZE 1
236#define SYSREG_F0_OFFSET 9
237#define SYSREG_F0_SIZE 1
238#define SYSREG_F1_OFFSET 10
239#define SYSREG_F1_SIZE 1
240#define SYSREG_CONF0_OFFSET 12
241#define SYSREG_CONF0_SIZE 6
242#define SYSREG_CONF1_OFFSET 18
243#define SYSREG_CONF1_SIZE 6
244
245/* Constants for ECR */
246#define ECR_UNRECOVERABLE 0
247#define ECR_TLB_MULTIPLE 1
248#define ECR_BUS_ERROR_WRITE 2
249#define ECR_BUS_ERROR_READ 3
250#define ECR_NMI 4
251#define ECR_ADDR_ALIGN_X 5
252#define ECR_PROTECTION_X 6
253#define ECR_DEBUG 7
254#define ECR_ILLEGAL_OPCODE 8
255#define ECR_UNIMPL_INSTRUCTION 9
256#define ECR_PRIVILEGE_VIOLATION 10
257#define ECR_FPE 11
258#define ECR_COPROC_ABSENT 12
259#define ECR_ADDR_ALIGN_R 13
260#define ECR_ADDR_ALIGN_W 14
261#define ECR_PROTECTION_R 15
262#define ECR_PROTECTION_W 16
263#define ECR_DTLB_MODIFIED 17
264#define ECR_TLB_MISS_X 20
265#define ECR_TLB_MISS_R 24
266#define ECR_TLB_MISS_W 28
267
268/* Bit manipulation macros */
269#define SYSREG_BIT(name) \
270 (1 << SYSREG_##name##_OFFSET)
271#define SYSREG_BF(name,value) \
272 (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \
273 << SYSREG_##name##_OFFSET)
274#define SYSREG_BFEXT(name,value)\
275 (((value) >> SYSREG_##name##_OFFSET) \
276 & ((1 << SYSREG_##name##_SIZE) - 1))
277#define SYSREG_BFINS(name,value,old) \
278 (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \
279 << SYSREG_##name##_OFFSET)) \
280 | SYSREG_BF(name,value))
281
282/* Register access macros */
283#ifdef __CHECKER__
284extern unsigned long __builtin_mfsr(unsigned long reg);
285extern void __builtin_mtsr(unsigned long reg, unsigned long value);
286#endif
287
288#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg)
289#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value)
290
291#endif /* __ASM_AVR32_SYSREG_H */
diff --git a/arch/avr32/include/asm/system.h b/arch/avr32/include/asm/system.h
new file mode 100644
index 000000000000..9702c2213e1e
--- /dev/null
+++ b/arch/avr32/include/asm/system.h
@@ -0,0 +1,178 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_SYSTEM_H
9#define __ASM_AVR32_SYSTEM_H
10
11#include <linux/compiler.h>
12#include <linux/linkage.h>
13#include <linux/types.h>
14
15#include <asm/ptrace.h>
16#include <asm/sysreg.h>
17
18#define xchg(ptr,x) \
19 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
20
21#define nop() asm volatile("nop")
22
23#define mb() asm volatile("" : : : "memory")
24#define rmb() mb()
25#define wmb() asm volatile("sync 0" : : : "memory")
26#define read_barrier_depends() do { } while(0)
27#define set_mb(var, value) do { var = value; mb(); } while(0)
28
29/*
30 * Help PathFinder and other Nexus-compliant debuggers keep track of
31 * the current PID by emitting an Ownership Trace Message each time we
32 * switch task.
33 */
34#ifdef CONFIG_OWNERSHIP_TRACE
35#include <asm/ocd.h>
36#define finish_arch_switch(prev) \
37 do { \
38 ocd_write(PID, prev->pid); \
39 ocd_write(PID, current->pid); \
40 } while(0)
41#endif
42
43/*
44 * switch_to(prev, next, last) should switch from task `prev' to task
45 * `next'. `prev' will never be the same as `next'.
46 *
47 * We just delegate everything to the __switch_to assembly function,
48 * which is implemented in arch/avr32/kernel/switch_to.S
49 *
50 * mb() tells GCC not to cache `current' across this call.
51 */
52struct cpu_context;
53struct task_struct;
54extern struct task_struct *__switch_to(struct task_struct *,
55 struct cpu_context *,
56 struct cpu_context *);
57#define switch_to(prev, next, last) \
58 do { \
59 last = __switch_to(prev, &prev->thread.cpu_context + 1, \
60 &next->thread.cpu_context); \
61 } while (0)
62
63#ifdef CONFIG_SMP
64# error "The AVR32 port does not support SMP"
65#else
66# define smp_mb() barrier()
67# define smp_rmb() barrier()
68# define smp_wmb() barrier()
69# define smp_read_barrier_depends() do { } while(0)
70#endif
71
72#include <linux/irqflags.h>
73
74extern void __xchg_called_with_bad_pointer(void);
75
76static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
77{
78 u32 ret;
79
80 asm volatile("xchg %[ret], %[m], %[val]"
81 : [ret] "=&r"(ret), "=m"(*m)
82 : "m"(*m), [m] "r"(m), [val] "r"(val)
83 : "memory");
84 return ret;
85}
86
87static inline unsigned long __xchg(unsigned long x,
88 volatile void *ptr,
89 int size)
90{
91 switch(size) {
92 case 4:
93 return xchg_u32(x, ptr);
94 default:
95 __xchg_called_with_bad_pointer();
96 return x;
97 }
98}
99
100static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
101 unsigned long new)
102{
103 __u32 ret;
104
105 asm volatile(
106 "1: ssrf 5\n"
107 " ld.w %[ret], %[m]\n"
108 " cp.w %[ret], %[old]\n"
109 " brne 2f\n"
110 " stcond %[m], %[new]\n"
111 " brne 1b\n"
112 "2:\n"
113 : [ret] "=&r"(ret), [m] "=m"(*m)
114 : "m"(m), [old] "ir"(old), [new] "r"(new)
115 : "memory", "cc");
116 return ret;
117}
118
119extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
120 volatile int * m, unsigned long old, unsigned long new);
121#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
122
123/* This function doesn't exist, so you'll get a linker error
124 if something tries to do an invalid cmpxchg(). */
125extern void __cmpxchg_called_with_bad_pointer(void);
126
127#define __HAVE_ARCH_CMPXCHG 1
128
129static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
130 unsigned long new, int size)
131{
132 switch (size) {
133 case 4:
134 return __cmpxchg_u32(ptr, old, new);
135 case 8:
136 return __cmpxchg_u64(ptr, old, new);
137 }
138
139 __cmpxchg_called_with_bad_pointer();
140 return old;
141}
142
143#define cmpxchg(ptr, old, new) \
144 ((typeof(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), \
145 (unsigned long)(new), \
146 sizeof(*(ptr))))
147
148#include <asm-generic/cmpxchg-local.h>
149
150static inline unsigned long __cmpxchg_local(volatile void *ptr,
151 unsigned long old,
152 unsigned long new, int size)
153{
154 switch (size) {
155 case 4:
156 return __cmpxchg_u32(ptr, old, new);
157 default:
158 return __cmpxchg_local_generic(ptr, old, new, size);
159 }
160
161 return old;
162}
163
164#define cmpxchg_local(ptr, old, new) \
165 ((typeof(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(old), \
166 (unsigned long)(new), \
167 sizeof(*(ptr))))
168
169#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
170
171struct pt_regs;
172void NORET_TYPE die(const char *str, struct pt_regs *regs, long err);
173void _exception(long signr, struct pt_regs *regs, int code,
174 unsigned long addr);
175
176#define arch_align_stack(x) (x)
177
178#endif /* __ASM_AVR32_SYSTEM_H */
diff --git a/arch/avr32/include/asm/termbits.h b/arch/avr32/include/asm/termbits.h
new file mode 100644
index 000000000000..db2daab31fdb
--- /dev/null
+++ b/arch/avr32/include/asm/termbits.h
@@ -0,0 +1,195 @@
1#ifndef __ASM_AVR32_TERMBITS_H
2#define __ASM_AVR32_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61/* c_iflag bits */
62#define IGNBRK 0000001
63#define BRKINT 0000002
64#define IGNPAR 0000004
65#define PARMRK 0000010
66#define INPCK 0000020
67#define ISTRIP 0000040
68#define INLCR 0000100
69#define IGNCR 0000200
70#define ICRNL 0000400
71#define IUCLC 0001000
72#define IXON 0002000
73#define IXANY 0004000
74#define IXOFF 0010000
75#define IMAXBEL 0020000
76#define IUTF8 0040000
77
78/* c_oflag bits */
79#define OPOST 0000001
80#define OLCUC 0000002
81#define ONLCR 0000004
82#define OCRNL 0000010
83#define ONOCR 0000020
84#define ONLRET 0000040
85#define OFILL 0000100
86#define OFDEL 0000200
87#define NLDLY 0000400
88#define NL0 0000000
89#define NL1 0000400
90#define CRDLY 0003000
91#define CR0 0000000
92#define CR1 0001000
93#define CR2 0002000
94#define CR3 0003000
95#define TABDLY 0014000
96#define TAB0 0000000
97#define TAB1 0004000
98#define TAB2 0010000
99#define TAB3 0014000
100#define XTABS 0014000
101#define BSDLY 0020000
102#define BS0 0000000
103#define BS1 0020000
104#define VTDLY 0040000
105#define VT0 0000000
106#define VT1 0040000
107#define FFDLY 0100000
108#define FF0 0000000
109#define FF1 0100000
110
111/* c_cflag bit meaning */
112#define CBAUD 0010017
113#define B0 0000000 /* hang up */
114#define B50 0000001
115#define B75 0000002
116#define B110 0000003
117#define B134 0000004
118#define B150 0000005
119#define B200 0000006
120#define B300 0000007
121#define B600 0000010
122#define B1200 0000011
123#define B1800 0000012
124#define B2400 0000013
125#define B4800 0000014
126#define B9600 0000015
127#define B19200 0000016
128#define B38400 0000017
129#define EXTA B19200
130#define EXTB B38400
131#define CSIZE 0000060
132#define CS5 0000000
133#define CS6 0000020
134#define CS7 0000040
135#define CS8 0000060
136#define CSTOPB 0000100
137#define CREAD 0000200
138#define PARENB 0000400
139#define PARODD 0001000
140#define HUPCL 0002000
141#define CLOCAL 0004000
142#define CBAUDEX 0010000
143#define B57600 0010001
144#define B115200 0010002
145#define B230400 0010003
146#define B460800 0010004
147#define B500000 0010005
148#define B576000 0010006
149#define B921600 0010007
150#define B1000000 0010010
151#define B1152000 0010011
152#define B1500000 0010012
153#define B2000000 0010013
154#define B2500000 0010014
155#define B3000000 0010015
156#define B3500000 0010016
157#define B4000000 0010017
158#define CIBAUD 002003600000 /* input baud rate (not used) */
159#define CMSPAR 010000000000 /* mark or space (stick) parity */
160#define CRTSCTS 020000000000 /* flow control */
161
162/* c_lflag bits */
163#define ISIG 0000001
164#define ICANON 0000002
165#define XCASE 0000004
166#define ECHO 0000010
167#define ECHOE 0000020
168#define ECHOK 0000040
169#define ECHONL 0000100
170#define NOFLSH 0000200
171#define TOSTOP 0000400
172#define ECHOCTL 0001000
173#define ECHOPRT 0002000
174#define ECHOKE 0004000
175#define FLUSHO 0010000
176#define PENDIN 0040000
177#define IEXTEN 0100000
178
179/* tcflow() and TCXONC use these */
180#define TCOOFF 0
181#define TCOON 1
182#define TCIOFF 2
183#define TCION 3
184
185/* tcflush() and TCFLSH use these */
186#define TCIFLUSH 0
187#define TCOFLUSH 1
188#define TCIOFLUSH 2
189
190/* tcsetattr uses these */
191#define TCSANOW 0
192#define TCSADRAIN 1
193#define TCSAFLUSH 2
194
195#endif /* __ASM_AVR32_TERMBITS_H */
diff --git a/arch/avr32/include/asm/termios.h b/arch/avr32/include/asm/termios.h
new file mode 100644
index 000000000000..0152aba35154
--- /dev/null
+++ b/arch/avr32/include/asm/termios.h
@@ -0,0 +1,62 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_TERMIOS_H
9#define __ASM_AVR32_TERMIOS_H
10
11#include <asm/termbits.h>
12#include <asm/ioctls.h>
13
14struct winsize {
15 unsigned short ws_row;
16 unsigned short ws_col;
17 unsigned short ws_xpixel;
18 unsigned short ws_ypixel;
19};
20
21#define NCC 8
22struct termio {
23 unsigned short c_iflag; /* input mode flags */
24 unsigned short c_oflag; /* output mode flags */
25 unsigned short c_cflag; /* control mode flags */
26 unsigned short c_lflag; /* local mode flags */
27 unsigned char c_line; /* line discipline */
28 unsigned char c_cc[NCC]; /* control characters */
29};
30
31/* modem lines */
32#define TIOCM_LE 0x001
33#define TIOCM_DTR 0x002
34#define TIOCM_RTS 0x004
35#define TIOCM_ST 0x008
36#define TIOCM_SR 0x010
37#define TIOCM_CTS 0x020
38#define TIOCM_CAR 0x040
39#define TIOCM_RNG 0x080
40#define TIOCM_DSR 0x100
41#define TIOCM_CD TIOCM_CAR
42#define TIOCM_RI TIOCM_RNG
43#define TIOCM_OUT1 0x2000
44#define TIOCM_OUT2 0x4000
45#define TIOCM_LOOP 0x8000
46
47/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
48
49#ifdef __KERNEL__
50/* intr=^C quit=^\ erase=del kill=^U
51 eof=^D vtime=\0 vmin=\1 sxtc=\0
52 start=^Q stop=^S susp=^Z eol=\0
53 reprint=^R discard=^U werase=^W lnext=^V
54 eol2=\0
55*/
56#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
57
58#include <asm-generic/termios.h>
59
60#endif /* __KERNEL__ */
61
62#endif /* __ASM_AVR32_TERMIOS_H */
diff --git a/arch/avr32/include/asm/thread_info.h b/arch/avr32/include/asm/thread_info.h
new file mode 100644
index 000000000000..294b25f9323d
--- /dev/null
+++ b/arch/avr32/include/asm/thread_info.h
@@ -0,0 +1,115 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_THREAD_INFO_H
9#define __ASM_AVR32_THREAD_INFO_H
10
11#include <asm/page.h>
12
13#define THREAD_SIZE_ORDER 1
14#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
15
16#ifndef __ASSEMBLY__
17#include <asm/types.h>
18
19struct task_struct;
20struct exec_domain;
21
22struct thread_info {
23 struct task_struct *task; /* main task structure */
24 struct exec_domain *exec_domain; /* execution domain */
25 unsigned long flags; /* low level flags */
26 __u32 cpu;
27 __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
28 __u32 rar_saved; /* return address... */
29 __u32 rsr_saved; /* ...and status register
30 saved by debug handler
31 when setting up
32 trampoline */
33 struct restart_block restart_block;
34 __u8 supervisor_stack[0];
35};
36
37#define INIT_THREAD_INFO(tsk) \
38{ \
39 .task = &tsk, \
40 .exec_domain = &default_exec_domain, \
41 .flags = 0, \
42 .cpu = 0, \
43 .preempt_count = 1, \
44 .restart_block = { \
45 .fn = do_no_restart_syscall \
46 } \
47}
48
49#define init_thread_info (init_thread_union.thread_info)
50#define init_stack (init_thread_union.stack)
51
52/*
53 * Get the thread information struct from C.
54 * We do the usual trick and use the lower end of the stack for this
55 */
56static inline struct thread_info *current_thread_info(void)
57{
58 unsigned long addr = ~(THREAD_SIZE - 1);
59
60 asm("and %0, sp" : "=r"(addr) : "0"(addr));
61 return (struct thread_info *)addr;
62}
63
64#define get_thread_info(ti) get_task_struct((ti)->task)
65#define put_thread_info(ti) put_task_struct((ti)->task)
66
67#endif /* !__ASSEMBLY__ */
68
69#define PREEMPT_ACTIVE 0x40000000
70
71/*
72 * Thread information flags
73 * - these are process state flags that various assembly files may need to access
74 * - pending work-to-be-done flags are in LSW
75 * - other flags in MSW
76 */
77#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
78#define TIF_SIGPENDING 1 /* signal pending */
79#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
80#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling
81 TIF_NEED_RESCHED */
82#define TIF_BREAKPOINT 4 /* enter monitor mode on return */
83#define TIF_SINGLE_STEP 5 /* single step in progress */
84#define TIF_MEMDIE 6
85#define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */
86#define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */
87#define TIF_FREEZE 29
88#define TIF_DEBUG 30 /* debugging enabled */
89#define TIF_USERSPACE 31 /* true if FS sets userspace */
90
91#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
92#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
93#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
94#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
95#define _TIF_SINGLE_STEP (1 << TIF_SINGLE_STEP)
96#define _TIF_MEMDIE (1 << TIF_MEMDIE)
97#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
98#define _TIF_CPU_GOING_TO_SLEEP (1 << TIF_CPU_GOING_TO_SLEEP)
99
100/* Note: The masks below must never span more than 16 bits! */
101
102/* work to do on interrupt/exception return */
103#define _TIF_WORK_MASK \
104 ((1 << TIF_SIGPENDING) \
105 | (1 << TIF_NEED_RESCHED) \
106 | (1 << TIF_POLLING_NRFLAG) \
107 | (1 << TIF_BREAKPOINT) \
108 | (1 << TIF_RESTORE_SIGMASK))
109
110/* work to do on any return to userspace */
111#define _TIF_ALLWORK_MASK (_TIF_WORK_MASK | (1 << TIF_SYSCALL_TRACE))
112/* work to do on return from debug mode */
113#define _TIF_DBGWORK_MASK (_TIF_WORK_MASK & ~(1 << TIF_BREAKPOINT))
114
115#endif /* __ASM_AVR32_THREAD_INFO_H */
diff --git a/arch/avr32/include/asm/timex.h b/arch/avr32/include/asm/timex.h
new file mode 100644
index 000000000000..187dcf38b210
--- /dev/null
+++ b/arch/avr32/include/asm/timex.h
@@ -0,0 +1,39 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_TIMEX_H
9#define __ASM_AVR32_TIMEX_H
10
11/*
12 * This is the frequency of the timer used for Linux's timer interrupt.
13 * The value should be defined as accurate as possible or under certain
14 * circumstances Linux timekeeping might become inaccurate or fail.
15 *
16 * For many system the exact clockrate of the timer isn't known but due to
17 * the way this value is used we can get away with a wrong value as long
18 * as this value is:
19 *
20 * - a multiple of HZ
21 * - a divisor of the actual rate
22 *
23 * 500000 is a good such cheat value.
24 *
25 * The obscure number 1193182 is the same as used by the original i8254
26 * time in legacy PC hardware; the chip is never found in AVR32 systems.
27 */
28#define CLOCK_TICK_RATE 500000 /* Underlying HZ */
29
30typedef unsigned long cycles_t;
31
32static inline cycles_t get_cycles (void)
33{
34 return 0;
35}
36
37#define ARCH_HAS_READ_CURRENT_TIMER
38
39#endif /* __ASM_AVR32_TIMEX_H */
diff --git a/arch/avr32/include/asm/tlb.h b/arch/avr32/include/asm/tlb.h
new file mode 100644
index 000000000000..5c55f9ce7c7d
--- /dev/null
+++ b/arch/avr32/include/asm/tlb.h
@@ -0,0 +1,32 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_TLB_H
9#define __ASM_AVR32_TLB_H
10
11#define tlb_start_vma(tlb, vma) \
12 flush_cache_range(vma, vma->vm_start, vma->vm_end)
13
14#define tlb_end_vma(tlb, vma) \
15 flush_tlb_range(vma, vma->vm_start, vma->vm_end)
16
17#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while(0)
18
19/*
20 * Flush whole TLB for MM
21 */
22#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
23
24#include <asm-generic/tlb.h>
25
26/*
27 * For debugging purposes
28 */
29extern void show_dtlb_entry(unsigned int index);
30extern void dump_dtlb(void);
31
32#endif /* __ASM_AVR32_TLB_H */
diff --git a/arch/avr32/include/asm/tlbflush.h b/arch/avr32/include/asm/tlbflush.h
new file mode 100644
index 000000000000..bf90a786f6be
--- /dev/null
+++ b/arch/avr32/include/asm/tlbflush.h
@@ -0,0 +1,32 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_TLBFLUSH_H
9#define __ASM_AVR32_TLBFLUSH_H
10
11#include <asm/mmu.h>
12
13/*
14 * TLB flushing:
15 *
16 * - flush_tlb() flushes the current mm struct TLBs
17 * - flush_tlb_all() flushes all processes' TLB entries
18 * - flush_tlb_mm(mm) flushes the specified mm context TLBs
19 * - flush_tlb_page(vma, vmaddr) flushes one page
20 * - flush_tlb_range(vma, start, end) flushes a range of pages
21 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
22 */
23extern void flush_tlb(void);
24extern void flush_tlb_all(void);
25extern void flush_tlb_mm(struct mm_struct *mm);
26extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
27 unsigned long end);
28extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page);
29
30extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
31
32#endif /* __ASM_AVR32_TLBFLUSH_H */
diff --git a/arch/avr32/include/asm/topology.h b/arch/avr32/include/asm/topology.h
new file mode 100644
index 000000000000..5b766cbb4806
--- /dev/null
+++ b/arch/avr32/include/asm/topology.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_AVR32_TOPOLOGY_H
2#define __ASM_AVR32_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* __ASM_AVR32_TOPOLOGY_H */
diff --git a/arch/avr32/include/asm/traps.h b/arch/avr32/include/asm/traps.h
new file mode 100644
index 000000000000..6a8fb944f414
--- /dev/null
+++ b/arch/avr32/include/asm/traps.h
@@ -0,0 +1,23 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_TRAPS_H
9#define __ASM_AVR32_TRAPS_H
10
11#include <linux/list.h>
12
13struct undef_hook {
14 struct list_head node;
15 u32 insn_mask;
16 u32 insn_val;
17 int (*fn)(struct pt_regs *regs, u32 insn);
18};
19
20void register_undef_hook(struct undef_hook *hook);
21void unregister_undef_hook(struct undef_hook *hook);
22
23#endif /* __ASM_AVR32_TRAPS_H */
diff --git a/arch/avr32/include/asm/types.h b/arch/avr32/include/asm/types.h
new file mode 100644
index 000000000000..9cefda6f534a
--- /dev/null
+++ b/arch/avr32/include/asm/types.h
@@ -0,0 +1,37 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_TYPES_H
9#define __ASM_AVR32_TYPES_H
10
11#include <asm-generic/int-ll64.h>
12
13#ifndef __ASSEMBLY__
14
15typedef unsigned short umode_t;
16
17#endif /* __ASSEMBLY__ */
18
19/*
20 * These aren't exported outside the kernel to avoid name space clashes
21 */
22#ifdef __KERNEL__
23
24#define BITS_PER_LONG 32
25
26#ifndef __ASSEMBLY__
27
28/* Dma addresses are 32-bits wide. */
29
30typedef u32 dma_addr_t;
31
32#endif /* __ASSEMBLY__ */
33
34#endif /* __KERNEL__ */
35
36
37#endif /* __ASM_AVR32_TYPES_H */
diff --git a/arch/avr32/include/asm/uaccess.h b/arch/avr32/include/asm/uaccess.h
new file mode 100644
index 000000000000..ed092395215e
--- /dev/null
+++ b/arch/avr32/include/asm/uaccess.h
@@ -0,0 +1,324 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_UACCESS_H
9#define __ASM_AVR32_UACCESS_H
10
11#include <linux/errno.h>
12#include <linux/sched.h>
13
14#define VERIFY_READ 0
15#define VERIFY_WRITE 1
16
17typedef struct {
18 unsigned int is_user_space;
19} mm_segment_t;
20
21/*
22 * The fs value determines whether argument validity checking should be
23 * performed or not. If get_fs() == USER_DS, checking is performed, with
24 * get_fs() == KERNEL_DS, checking is bypassed.
25 *
26 * For historical reasons (Data Segment Register?), these macros are misnamed.
27 */
28#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
29#define segment_eq(a,b) ((a).is_user_space == (b).is_user_space)
30
31#define USER_ADDR_LIMIT 0x80000000
32
33#define KERNEL_DS MAKE_MM_SEG(0)
34#define USER_DS MAKE_MM_SEG(1)
35
36#define get_ds() (KERNEL_DS)
37
38static inline mm_segment_t get_fs(void)
39{
40 return MAKE_MM_SEG(test_thread_flag(TIF_USERSPACE));
41}
42
43static inline void set_fs(mm_segment_t s)
44{
45 if (s.is_user_space)
46 set_thread_flag(TIF_USERSPACE);
47 else
48 clear_thread_flag(TIF_USERSPACE);
49}
50
51/*
52 * Test whether a block of memory is a valid user space address.
53 * Returns 0 if the range is valid, nonzero otherwise.
54 *
55 * We do the following checks:
56 * 1. Is the access from kernel space?
57 * 2. Does (addr + size) set the carry bit?
58 * 3. Is (addr + size) a negative number (i.e. >= 0x80000000)?
59 *
60 * If yes on the first check, access is granted.
61 * If no on any of the others, access is denied.
62 */
63#define __range_ok(addr, size) \
64 (test_thread_flag(TIF_USERSPACE) \
65 && (((unsigned long)(addr) >= 0x80000000) \
66 || ((unsigned long)(size) > 0x80000000) \
67 || (((unsigned long)(addr) + (unsigned long)(size)) > 0x80000000)))
68
69#define access_ok(type, addr, size) (likely(__range_ok(addr, size) == 0))
70
71/* Generic arbitrary sized copy. Return the number of bytes NOT copied */
72extern __kernel_size_t __copy_user(void *to, const void *from,
73 __kernel_size_t n);
74
75extern __kernel_size_t copy_to_user(void __user *to, const void *from,
76 __kernel_size_t n);
77extern __kernel_size_t copy_from_user(void *to, const void __user *from,
78 __kernel_size_t n);
79
80static inline __kernel_size_t __copy_to_user(void __user *to, const void *from,
81 __kernel_size_t n)
82{
83 return __copy_user((void __force *)to, from, n);
84}
85static inline __kernel_size_t __copy_from_user(void *to,
86 const void __user *from,
87 __kernel_size_t n)
88{
89 return __copy_user(to, (const void __force *)from, n);
90}
91
92#define __copy_to_user_inatomic __copy_to_user
93#define __copy_from_user_inatomic __copy_from_user
94
95/*
96 * put_user: - Write a simple value into user space.
97 * @x: Value to copy to user space.
98 * @ptr: Destination address, in user space.
99 *
100 * Context: User context only. This function may sleep.
101 *
102 * This macro copies a single simple value from kernel space to user
103 * space. It supports simple types like char and int, but not larger
104 * data types like structures or arrays.
105 *
106 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
107 * to the result of dereferencing @ptr.
108 *
109 * Returns zero on success, or -EFAULT on error.
110 */
111#define put_user(x,ptr) \
112 __put_user_check((x),(ptr),sizeof(*(ptr)))
113
114/*
115 * get_user: - Get a simple variable from user space.
116 * @x: Variable to store result.
117 * @ptr: Source address, in user space.
118 *
119 * Context: User context only. This function may sleep.
120 *
121 * This macro copies a single simple variable from user space to kernel
122 * space. It supports simple types like char and int, but not larger
123 * data types like structures or arrays.
124 *
125 * @ptr must have pointer-to-simple-variable type, and the result of
126 * dereferencing @ptr must be assignable to @x without a cast.
127 *
128 * Returns zero on success, or -EFAULT on error.
129 * On error, the variable @x is set to zero.
130 */
131#define get_user(x,ptr) \
132 __get_user_check((x),(ptr),sizeof(*(ptr)))
133
134/*
135 * __put_user: - Write a simple value into user space, with less checking.
136 * @x: Value to copy to user space.
137 * @ptr: Destination address, in user space.
138 *
139 * Context: User context only. This function may sleep.
140 *
141 * This macro copies a single simple value from kernel space to user
142 * space. It supports simple types like char and int, but not larger
143 * data types like structures or arrays.
144 *
145 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
146 * to the result of dereferencing @ptr.
147 *
148 * Caller must check the pointer with access_ok() before calling this
149 * function.
150 *
151 * Returns zero on success, or -EFAULT on error.
152 */
153#define __put_user(x,ptr) \
154 __put_user_nocheck((x),(ptr),sizeof(*(ptr)))
155
156/*
157 * __get_user: - Get a simple variable from user space, with less checking.
158 * @x: Variable to store result.
159 * @ptr: Source address, in user space.
160 *
161 * Context: User context only. This function may sleep.
162 *
163 * This macro copies a single simple variable from user space to kernel
164 * space. It supports simple types like char and int, but not larger
165 * data types like structures or arrays.
166 *
167 * @ptr must have pointer-to-simple-variable type, and the result of
168 * dereferencing @ptr must be assignable to @x without a cast.
169 *
170 * Caller must check the pointer with access_ok() before calling this
171 * function.
172 *
173 * Returns zero on success, or -EFAULT on error.
174 * On error, the variable @x is set to zero.
175 */
176#define __get_user(x,ptr) \
177 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
178
179extern int __get_user_bad(void);
180extern int __put_user_bad(void);
181
182#define __get_user_nocheck(x, ptr, size) \
183({ \
184 unsigned long __gu_val = 0; \
185 int __gu_err = 0; \
186 \
187 switch (size) { \
188 case 1: __get_user_asm("ub", __gu_val, ptr, __gu_err); break; \
189 case 2: __get_user_asm("uh", __gu_val, ptr, __gu_err); break; \
190 case 4: __get_user_asm("w", __gu_val, ptr, __gu_err); break; \
191 default: __gu_err = __get_user_bad(); break; \
192 } \
193 \
194 x = (typeof(*(ptr)))__gu_val; \
195 __gu_err; \
196})
197
198#define __get_user_check(x, ptr, size) \
199({ \
200 unsigned long __gu_val = 0; \
201 const typeof(*(ptr)) __user * __gu_addr = (ptr); \
202 int __gu_err = 0; \
203 \
204 if (access_ok(VERIFY_READ, __gu_addr, size)) { \
205 switch (size) { \
206 case 1: \
207 __get_user_asm("ub", __gu_val, __gu_addr, \
208 __gu_err); \
209 break; \
210 case 2: \
211 __get_user_asm("uh", __gu_val, __gu_addr, \
212 __gu_err); \
213 break; \
214 case 4: \
215 __get_user_asm("w", __gu_val, __gu_addr, \
216 __gu_err); \
217 break; \
218 default: \
219 __gu_err = __get_user_bad(); \
220 break; \
221 } \
222 } else { \
223 __gu_err = -EFAULT; \
224 } \
225 x = (typeof(*(ptr)))__gu_val; \
226 __gu_err; \
227})
228
229#define __get_user_asm(suffix, __gu_val, ptr, __gu_err) \
230 asm volatile( \
231 "1: ld." suffix " %1, %3 \n" \
232 "2: \n" \
233 " .section .fixup, \"ax\" \n" \
234 "3: mov %0, %4 \n" \
235 " rjmp 2b \n" \
236 " .previous \n" \
237 " .section __ex_table, \"a\" \n" \
238 " .long 1b, 3b \n" \
239 " .previous \n" \
240 : "=r"(__gu_err), "=r"(__gu_val) \
241 : "0"(__gu_err), "m"(*(ptr)), "i"(-EFAULT))
242
243#define __put_user_nocheck(x, ptr, size) \
244({ \
245 typeof(*(ptr)) __pu_val; \
246 int __pu_err = 0; \
247 \
248 __pu_val = (x); \
249 switch (size) { \
250 case 1: __put_user_asm("b", ptr, __pu_val, __pu_err); break; \
251 case 2: __put_user_asm("h", ptr, __pu_val, __pu_err); break; \
252 case 4: __put_user_asm("w", ptr, __pu_val, __pu_err); break; \
253 case 8: __put_user_asm("d", ptr, __pu_val, __pu_err); break; \
254 default: __pu_err = __put_user_bad(); break; \
255 } \
256 __pu_err; \
257})
258
259#define __put_user_check(x, ptr, size) \
260({ \
261 typeof(*(ptr)) __pu_val; \
262 typeof(*(ptr)) __user *__pu_addr = (ptr); \
263 int __pu_err = 0; \
264 \
265 __pu_val = (x); \
266 if (access_ok(VERIFY_WRITE, __pu_addr, size)) { \
267 switch (size) { \
268 case 1: \
269 __put_user_asm("b", __pu_addr, __pu_val, \
270 __pu_err); \
271 break; \
272 case 2: \
273 __put_user_asm("h", __pu_addr, __pu_val, \
274 __pu_err); \
275 break; \
276 case 4: \
277 __put_user_asm("w", __pu_addr, __pu_val, \
278 __pu_err); \
279 break; \
280 case 8: \
281 __put_user_asm("d", __pu_addr, __pu_val, \
282 __pu_err); \
283 break; \
284 default: \
285 __pu_err = __put_user_bad(); \
286 break; \
287 } \
288 } else { \
289 __pu_err = -EFAULT; \
290 } \
291 __pu_err; \
292})
293
294#define __put_user_asm(suffix, ptr, __pu_val, __gu_err) \
295 asm volatile( \
296 "1: st." suffix " %1, %3 \n" \
297 "2: \n" \
298 " .section .fixup, \"ax\" \n" \
299 "3: mov %0, %4 \n" \
300 " rjmp 2b \n" \
301 " .previous \n" \
302 " .section __ex_table, \"a\" \n" \
303 " .long 1b, 3b \n" \
304 " .previous \n" \
305 : "=r"(__gu_err), "=m"(*(ptr)) \
306 : "0"(__gu_err), "r"(__pu_val), "i"(-EFAULT))
307
308extern __kernel_size_t clear_user(void __user *addr, __kernel_size_t size);
309extern __kernel_size_t __clear_user(void __user *addr, __kernel_size_t size);
310
311extern long strncpy_from_user(char *dst, const char __user *src, long count);
312extern long __strncpy_from_user(char *dst, const char __user *src, long count);
313
314extern long strnlen_user(const char __user *__s, long __n);
315extern long __strnlen_user(const char __user *__s, long __n);
316
317#define strlen_user(s) strnlen_user(s, ~0UL >> 1)
318
319struct exception_table_entry
320{
321 unsigned long insn, fixup;
322};
323
324#endif /* __ASM_AVR32_UACCESS_H */
diff --git a/arch/avr32/include/asm/ucontext.h b/arch/avr32/include/asm/ucontext.h
new file mode 100644
index 000000000000..ac7259c2a799
--- /dev/null
+++ b/arch/avr32/include/asm/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef __ASM_AVR32_UCONTEXT_H
2#define __ASM_AVR32_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext * uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask;
10};
11
12#endif /* __ASM_AVR32_UCONTEXT_H */
diff --git a/arch/avr32/include/asm/unaligned.h b/arch/avr32/include/asm/unaligned.h
new file mode 100644
index 000000000000..041877290470
--- /dev/null
+++ b/arch/avr32/include/asm/unaligned.h
@@ -0,0 +1,21 @@
1#ifndef _ASM_AVR32_UNALIGNED_H
2#define _ASM_AVR32_UNALIGNED_H
3
4/*
5 * AVR32 can handle some unaligned accesses, depending on the
6 * implementation. The AVR32 AP implementation can handle unaligned
7 * words, but halfwords must be halfword-aligned, and doublewords must
8 * be word-aligned.
9 *
10 * However, swapped word loads must be word-aligned so we can't
11 * optimize word loads in general.
12 */
13
14#include <linux/unaligned/be_struct.h>
15#include <linux/unaligned/le_byteshift.h>
16#include <linux/unaligned/generic.h>
17
18#define get_unaligned __get_unaligned_be
19#define put_unaligned __put_unaligned_be
20
21#endif /* _ASM_AVR32_UNALIGNED_H */
diff --git a/arch/avr32/include/asm/unistd.h b/arch/avr32/include/asm/unistd.h
new file mode 100644
index 000000000000..89861a27543e
--- /dev/null
+++ b/arch/avr32/include/asm/unistd.h
@@ -0,0 +1,345 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_UNISTD_H
9#define __ASM_AVR32_UNISTD_H
10
11/*
12 * This file contains the system call numbers.
13 */
14
15#define __NR_restart_syscall 0
16#define __NR_exit 1
17#define __NR_fork 2
18#define __NR_read 3
19#define __NR_write 4
20#define __NR_open 5
21#define __NR_close 6
22#define __NR_umask 7
23#define __NR_creat 8
24#define __NR_link 9
25#define __NR_unlink 10
26#define __NR_execve 11
27#define __NR_chdir 12
28#define __NR_time 13
29#define __NR_mknod 14
30#define __NR_chmod 15
31#define __NR_chown 16
32#define __NR_lchown 17
33#define __NR_lseek 18
34#define __NR__llseek 19
35#define __NR_getpid 20
36#define __NR_mount 21
37#define __NR_umount2 22
38#define __NR_setuid 23
39#define __NR_getuid 24
40#define __NR_stime 25
41#define __NR_ptrace 26
42#define __NR_alarm 27
43#define __NR_pause 28
44#define __NR_utime 29
45#define __NR_stat 30
46#define __NR_fstat 31
47#define __NR_lstat 32
48#define __NR_access 33
49#define __NR_chroot 34
50#define __NR_sync 35
51#define __NR_fsync 36
52#define __NR_kill 37
53#define __NR_rename 38
54#define __NR_mkdir 39
55#define __NR_rmdir 40
56#define __NR_dup 41
57#define __NR_pipe 42
58#define __NR_times 43
59#define __NR_clone 44
60#define __NR_brk 45
61#define __NR_setgid 46
62#define __NR_getgid 47
63#define __NR_getcwd 48
64#define __NR_geteuid 49
65#define __NR_getegid 50
66#define __NR_acct 51
67#define __NR_setfsuid 52
68#define __NR_setfsgid 53
69#define __NR_ioctl 54
70#define __NR_fcntl 55
71#define __NR_setpgid 56
72#define __NR_mremap 57
73#define __NR_setresuid 58
74#define __NR_getresuid 59
75#define __NR_setreuid 60
76#define __NR_setregid 61
77#define __NR_ustat 62
78#define __NR_dup2 63
79#define __NR_getppid 64
80#define __NR_getpgrp 65
81#define __NR_setsid 66
82#define __NR_rt_sigaction 67
83#define __NR_rt_sigreturn 68
84#define __NR_rt_sigprocmask 69
85#define __NR_rt_sigpending 70
86#define __NR_rt_sigtimedwait 71
87#define __NR_rt_sigqueueinfo 72
88#define __NR_rt_sigsuspend 73
89#define __NR_sethostname 74
90#define __NR_setrlimit 75
91#define __NR_getrlimit 76 /* SuS compliant getrlimit */
92#define __NR_getrusage 77
93#define __NR_gettimeofday 78
94#define __NR_settimeofday 79
95#define __NR_getgroups 80
96#define __NR_setgroups 81
97#define __NR_select 82
98#define __NR_symlink 83
99#define __NR_fchdir 84
100#define __NR_readlink 85
101#define __NR_pread 86
102#define __NR_pwrite 87
103#define __NR_swapon 88
104#define __NR_reboot 89
105#define __NR_mmap2 90
106#define __NR_munmap 91
107#define __NR_truncate 92
108#define __NR_ftruncate 93
109#define __NR_fchmod 94
110#define __NR_fchown 95
111#define __NR_getpriority 96
112#define __NR_setpriority 97
113#define __NR_wait4 98
114#define __NR_statfs 99
115#define __NR_fstatfs 100
116#define __NR_vhangup 101
117#define __NR_sigaltstack 102
118#define __NR_syslog 103
119#define __NR_setitimer 104
120#define __NR_getitimer 105
121#define __NR_swapoff 106
122#define __NR_sysinfo 107
123/* 108 was __NR_ipc for a little while */
124#define __NR_sendfile 109
125#define __NR_setdomainname 110
126#define __NR_uname 111
127#define __NR_adjtimex 112
128#define __NR_mprotect 113
129#define __NR_vfork 114
130#define __NR_init_module 115
131#define __NR_delete_module 116
132#define __NR_quotactl 117
133#define __NR_getpgid 118
134#define __NR_bdflush 119
135#define __NR_sysfs 120
136#define __NR_personality 121
137#define __NR_afs_syscall 122 /* Syscall for Andrew File System */
138#define __NR_getdents 123
139#define __NR_flock 124
140#define __NR_msync 125
141#define __NR_readv 126
142#define __NR_writev 127
143#define __NR_getsid 128
144#define __NR_fdatasync 129
145#define __NR__sysctl 130
146#define __NR_mlock 131
147#define __NR_munlock 132
148#define __NR_mlockall 133
149#define __NR_munlockall 134
150#define __NR_sched_setparam 135
151#define __NR_sched_getparam 136
152#define __NR_sched_setscheduler 137
153#define __NR_sched_getscheduler 138
154#define __NR_sched_yield 139
155#define __NR_sched_get_priority_max 140
156#define __NR_sched_get_priority_min 141
157#define __NR_sched_rr_get_interval 142
158#define __NR_nanosleep 143
159#define __NR_poll 144
160#define __NR_nfsservctl 145
161#define __NR_setresgid 146
162#define __NR_getresgid 147
163#define __NR_prctl 148
164#define __NR_socket 149
165#define __NR_bind 150
166#define __NR_connect 151
167#define __NR_listen 152
168#define __NR_accept 153
169#define __NR_getsockname 154
170#define __NR_getpeername 155
171#define __NR_socketpair 156
172#define __NR_send 157
173#define __NR_recv 158
174#define __NR_sendto 159
175#define __NR_recvfrom 160
176#define __NR_shutdown 161
177#define __NR_setsockopt 162
178#define __NR_getsockopt 163
179#define __NR_sendmsg 164
180#define __NR_recvmsg 165
181#define __NR_truncate64 166
182#define __NR_ftruncate64 167
183#define __NR_stat64 168
184#define __NR_lstat64 169
185#define __NR_fstat64 170
186#define __NR_pivot_root 171
187#define __NR_mincore 172
188#define __NR_madvise 173
189#define __NR_getdents64 174
190#define __NR_fcntl64 175
191#define __NR_gettid 176
192#define __NR_readahead 177
193#define __NR_setxattr 178
194#define __NR_lsetxattr 179
195#define __NR_fsetxattr 180
196#define __NR_getxattr 181
197#define __NR_lgetxattr 182
198#define __NR_fgetxattr 183
199#define __NR_listxattr 184
200#define __NR_llistxattr 185
201#define __NR_flistxattr 186
202#define __NR_removexattr 187
203#define __NR_lremovexattr 188
204#define __NR_fremovexattr 189
205#define __NR_tkill 190
206#define __NR_sendfile64 191
207#define __NR_futex 192
208#define __NR_sched_setaffinity 193
209#define __NR_sched_getaffinity 194
210#define __NR_capget 195
211#define __NR_capset 196
212#define __NR_io_setup 197
213#define __NR_io_destroy 198
214#define __NR_io_getevents 199
215#define __NR_io_submit 200
216#define __NR_io_cancel 201
217#define __NR_fadvise64 202
218#define __NR_exit_group 203
219#define __NR_lookup_dcookie 204
220#define __NR_epoll_create 205
221#define __NR_epoll_ctl 206
222#define __NR_epoll_wait 207
223#define __NR_remap_file_pages 208
224#define __NR_set_tid_address 209
225
226#define __NR_timer_create 210
227#define __NR_timer_settime 211
228#define __NR_timer_gettime 212
229#define __NR_timer_getoverrun 213
230#define __NR_timer_delete 214
231#define __NR_clock_settime 215
232#define __NR_clock_gettime 216
233#define __NR_clock_getres 217
234#define __NR_clock_nanosleep 218
235#define __NR_statfs64 219
236#define __NR_fstatfs64 220
237#define __NR_tgkill 221
238 /* 222 reserved for tux */
239#define __NR_utimes 223
240#define __NR_fadvise64_64 224
241
242#define __NR_cacheflush 225
243
244#define __NR_vserver 226
245#define __NR_mq_open 227
246#define __NR_mq_unlink 228
247#define __NR_mq_timedsend 229
248#define __NR_mq_timedreceive 230
249#define __NR_mq_notify 231
250#define __NR_mq_getsetattr 232
251#define __NR_kexec_load 233
252#define __NR_waitid 234
253#define __NR_add_key 235
254#define __NR_request_key 236
255#define __NR_keyctl 237
256#define __NR_ioprio_set 238
257#define __NR_ioprio_get 239
258#define __NR_inotify_init 240
259#define __NR_inotify_add_watch 241
260#define __NR_inotify_rm_watch 242
261#define __NR_openat 243
262#define __NR_mkdirat 244
263#define __NR_mknodat 245
264#define __NR_fchownat 246
265#define __NR_futimesat 247
266#define __NR_fstatat64 248
267#define __NR_unlinkat 249
268#define __NR_renameat 250
269#define __NR_linkat 251
270#define __NR_symlinkat 252
271#define __NR_readlinkat 253
272#define __NR_fchmodat 254
273#define __NR_faccessat 255
274#define __NR_pselect6 256
275#define __NR_ppoll 257
276#define __NR_unshare 258
277#define __NR_set_robust_list 259
278#define __NR_get_robust_list 260
279#define __NR_splice 261
280#define __NR_sync_file_range 262
281#define __NR_tee 263
282#define __NR_vmsplice 264
283#define __NR_epoll_pwait 265
284
285#define __NR_msgget 266
286#define __NR_msgsnd 267
287#define __NR_msgrcv 268
288#define __NR_msgctl 269
289#define __NR_semget 270
290#define __NR_semop 271
291#define __NR_semctl 272
292#define __NR_semtimedop 273
293#define __NR_shmat 274
294#define __NR_shmget 275
295#define __NR_shmdt 276
296#define __NR_shmctl 277
297
298#define __NR_utimensat 278
299#define __NR_signalfd 279
300/* 280 was __NR_timerfd */
301#define __NR_eventfd 281
302
303#ifdef __KERNEL__
304#define NR_syscalls 282
305
306/* Old stuff */
307#define __IGNORE_uselib
308#define __IGNORE_mmap
309
310/* NUMA stuff */
311#define __IGNORE_mbind
312#define __IGNORE_get_mempolicy
313#define __IGNORE_set_mempolicy
314#define __IGNORE_migrate_pages
315#define __IGNORE_move_pages
316
317/* SMP stuff */
318#define __IGNORE_getcpu
319
320#define __ARCH_WANT_IPC_PARSE_VERSION
321#define __ARCH_WANT_STAT64
322#define __ARCH_WANT_SYS_ALARM
323#define __ARCH_WANT_SYS_GETHOSTNAME
324#define __ARCH_WANT_SYS_PAUSE
325#define __ARCH_WANT_SYS_TIME
326#define __ARCH_WANT_SYS_UTIME
327#define __ARCH_WANT_SYS_WAITPID
328#define __ARCH_WANT_SYS_FADVISE64
329#define __ARCH_WANT_SYS_GETPGRP
330#define __ARCH_WANT_SYS_LLSEEK
331#define __ARCH_WANT_SYS_GETPGRP
332#define __ARCH_WANT_SYS_RT_SIGACTION
333#define __ARCH_WANT_SYS_RT_SIGSUSPEND
334
335/*
336 * "Conditional" syscalls
337 *
338 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
339 * but it doesn't work on all toolchains, so we just do it by hand
340 */
341#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
342
343#endif /* __KERNEL__ */
344
345#endif /* __ASM_AVR32_UNISTD_H */
diff --git a/arch/avr32/include/asm/user.h b/arch/avr32/include/asm/user.h
new file mode 100644
index 000000000000..7e9152f81f5e
--- /dev/null
+++ b/arch/avr32/include/asm/user.h
@@ -0,0 +1,65 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Note: We may not need these definitions for AVR32, as we don't
9 * support a.out.
10 */
11#ifndef __ASM_AVR32_USER_H
12#define __ASM_AVR32_USER_H
13
14#include <linux/types.h>
15#include <asm/ptrace.h>
16#include <asm/page.h>
17
18/*
19 * Core file format: The core file is written in such a way that gdb
20 * can understand it and provide useful information to the user (under
21 * linux we use the `trad-core' bfd). The file contents are as follows:
22 *
23 * upage: 1 page consisting of a user struct that tells gdb
24 * what is present in the file. Directly after this is a
25 * copy of the task_struct, which is currently not used by gdb,
26 * but it may come in handy at some point. All of the registers
27 * are stored as part of the upage. The upage should always be
28 * only one page long.
29 * data: The data segment follows next. We use current->end_text to
30 * current->brk to pick up all of the user variables, plus any memory
31 * that may have been sbrk'ed. No attempt is made to determine if a
32 * page is demand-zero or if a page is totally unused, we just cover
33 * the entire range. All of the addresses are rounded in such a way
34 * that an integral number of pages is written.
35 * stack: We need the stack information in order to get a meaningful
36 * backtrace. We need to write the data from usp to
37 * current->start_stack, so we round each of these in order to be able
38 * to write an integer number of pages.
39 */
40
41struct user_fpu_struct {
42 /* We have no FPU (yet) */
43};
44
45struct user {
46 struct pt_regs regs; /* entire machine state */
47 size_t u_tsize; /* text size (pages) */
48 size_t u_dsize; /* data size (pages) */
49 size_t u_ssize; /* stack size (pages) */
50 unsigned long start_code; /* text starting address */
51 unsigned long start_data; /* data starting address */
52 unsigned long start_stack; /* stack starting address */
53 long int signal; /* signal causing core dump */
54 unsigned long u_ar0; /* help gdb find registers */
55 unsigned long magic; /* identifies a core file */
56 char u_comm[32]; /* user command name */
57};
58
59#define NBPG PAGE_SIZE
60#define UPAGES 1
61#define HOST_TEXT_START_ADDR (u.start_code)
62#define HOST_DATA_START_ADDR (u.start_data)
63#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
64
65#endif /* __ASM_AVR32_USER_H */
diff --git a/arch/avr32/include/asm/xor.h b/arch/avr32/include/asm/xor.h
new file mode 100644
index 000000000000..99c87aa0af4f
--- /dev/null
+++ b/arch/avr32/include/asm/xor.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_XOR_H
2#define _ASM_XOR_H
3
4#include <asm-generic/xor.h>
5
6#endif
diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c
index ff820a9e743a..2c08ac992ac3 100644
--- a/arch/avr32/kernel/process.c
+++ b/arch/avr32/kernel/process.c
@@ -18,7 +18,7 @@
18#include <asm/sysreg.h> 18#include <asm/sysreg.h>
19#include <asm/ocd.h> 19#include <asm/ocd.h>
20 20
21#include <asm/arch/pm.h> 21#include <mach/pm.h>
22 22
23void (*pm_power_off)(void) = NULL; 23void (*pm_power_off)(void) = NULL;
24EXPORT_SYMBOL(pm_power_off); 24EXPORT_SYMBOL(pm_power_off);
diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
index ce48c14f4349..d8e623c426c1 100644
--- a/arch/avr32/kernel/setup.c
+++ b/arch/avr32/kernel/setup.c
@@ -26,8 +26,8 @@
26#include <asm/setup.h> 26#include <asm/setup.h>
27#include <asm/sysreg.h> 27#include <asm/sysreg.h>
28 28
29#include <asm/arch/board.h> 29#include <mach/board.h>
30#include <asm/arch/init.h> 30#include <mach/init.h>
31 31
32extern int root_mountflags; 32extern int root_mountflags;
33 33
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
index 7e7f32771ae1..283481d74a5b 100644
--- a/arch/avr32/kernel/time.c
+++ b/arch/avr32/kernel/time.c
@@ -15,7 +15,7 @@
15 15
16#include <asm/sysreg.h> 16#include <asm/sysreg.h>
17 17
18#include <asm/arch/pm.h> 18#include <mach/pm.h>
19 19
20 20
21static cycle_t read_cycle_count(void) 21static cycle_t read_cycle_count(void)
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 1617048c86c5..92bfb4d8ae45 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -20,10 +20,10 @@
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/irq.h> 21#include <asm/irq.h>
22 22
23#include <asm/arch/at32ap700x.h> 23#include <mach/at32ap700x.h>
24#include <asm/arch/board.h> 24#include <mach/board.h>
25#include <asm/arch/portmux.h> 25#include <mach/portmux.h>
26#include <asm/arch/sram.h> 26#include <mach/sram.h>
27 27
28#include <video/atmel_lcdc.h> 28#include <video/atmel_lcdc.h>
29 29
diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
index b2d9bc61a35c..2875c11be95d 100644
--- a/arch/avr32/mach-at32ap/hsmc.c
+++ b/arch/avr32/mach-at32ap/hsmc.c
@@ -14,7 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15 15
16#include <asm/io.h> 16#include <asm/io.h>
17#include <asm/arch/smc.h> 17#include <mach/smc.h>
18 18
19#include "hsmc.h" 19#include "hsmc.h"
20 20
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
new file mode 100644
index 000000000000..d18a3053be0d
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
@@ -0,0 +1,49 @@
1/*
2 * Pin definitions for AT32AP7000.
3 *
4 * Copyright (C) 2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARCH_AT32AP700X_H__
11#define __ASM_ARCH_AT32AP700X_H__
12
13#define GPIO_PERIPH_A 0
14#define GPIO_PERIPH_B 1
15
16/*
17 * Pin numbers identifying specific GPIO pins on the chip. They can
18 * also be converted to IRQ numbers by passing them through
19 * gpio_to_irq().
20 */
21#define GPIO_PIOA_BASE (0)
22#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
23#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
24#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
25#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
26
27#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
28#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
29#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
30#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
31#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
32
33
34/*
35 * DMAC peripheral hardware handshaking interfaces, used with dw_dmac
36 */
37#define DMAC_MCI_RX 0
38#define DMAC_MCI_TX 1
39#define DMAC_DAC_TX 2
40#define DMAC_AC97_A_RX 3
41#define DMAC_AC97_A_TX 4
42#define DMAC_AC97_B_RX 5
43#define DMAC_AC97_B_TX 6
44#define DMAC_DMAREQ_0 7
45#define DMAC_DMAREQ_1 8
46#define DMAC_DMAREQ_2 9
47#define DMAC_DMAREQ_3 10
48
49#endif /* __ASM_ARCH_AT32AP700X_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
new file mode 100644
index 000000000000..e60e9076544d
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/board.h
@@ -0,0 +1,121 @@
1/*
2 * Platform data definitions.
3 */
4#ifndef __ASM_ARCH_BOARD_H
5#define __ASM_ARCH_BOARD_H
6
7#include <linux/types.h>
8
9#define GPIO_PIN_NONE (-1)
10
11/*
12 * Clock rates for various on-board oscillators. The number of entries
13 * in this array is chip-dependent.
14 */
15extern unsigned long at32_board_osc_rates[];
16
17/* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
18void at32_add_system_devices(void);
19
20#define ATMEL_MAX_UART 4
21extern struct platform_device *atmel_default_console_device;
22
23struct atmel_uart_data {
24 short use_dma_tx; /* use transmit DMA? */
25 short use_dma_rx; /* use receive DMA? */
26 void __iomem *regs; /* virtual base address, if any */
27};
28void at32_map_usart(unsigned int hw_id, unsigned int line);
29struct platform_device *at32_add_device_usart(unsigned int id);
30
31struct eth_platform_data {
32 u32 phy_mask;
33 u8 is_rmii;
34};
35struct platform_device *
36at32_add_device_eth(unsigned int id, struct eth_platform_data *data);
37
38struct spi_board_info;
39struct platform_device *
40at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
41
42struct atmel_lcdfb_info;
43struct platform_device *
44at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
45 unsigned long fbmem_start, unsigned long fbmem_len,
46 unsigned int pin_config);
47
48struct usba_platform_data;
49struct platform_device *
50at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
51
52struct ide_platform_data {
53 u8 cs;
54};
55struct platform_device *
56at32_add_device_ide(unsigned int id, unsigned int extint,
57 struct ide_platform_data *data);
58
59/* mask says which PWM channels to mux */
60struct platform_device *at32_add_device_pwm(u32 mask);
61
62/* depending on what's hooked up, not all SSC pins will be used */
63#define ATMEL_SSC_TK 0x01
64#define ATMEL_SSC_TF 0x02
65#define ATMEL_SSC_TD 0x04
66#define ATMEL_SSC_TX (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD)
67
68#define ATMEL_SSC_RK 0x10
69#define ATMEL_SSC_RF 0x20
70#define ATMEL_SSC_RD 0x40
71#define ATMEL_SSC_RX (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD)
72
73struct platform_device *
74at32_add_device_ssc(unsigned int id, unsigned int flags);
75
76struct i2c_board_info;
77struct platform_device *at32_add_device_twi(unsigned int id,
78 struct i2c_board_info *b,
79 unsigned int n);
80
81struct mci_platform_data;
82struct platform_device *
83at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
84
85struct ac97c_platform_data {
86 unsigned short dma_rx_periph_id;
87 unsigned short dma_tx_periph_id;
88 unsigned short dma_controller_id;
89 int reset_pin;
90};
91struct platform_device *
92at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data);
93
94struct platform_device *at32_add_device_abdac(unsigned int id);
95struct platform_device *at32_add_device_psif(unsigned int id);
96
97struct cf_platform_data {
98 int detect_pin;
99 int reset_pin;
100 int vcc_pin;
101 int ready_pin;
102 u8 cs;
103};
104struct platform_device *
105at32_add_device_cf(unsigned int id, unsigned int extint,
106 struct cf_platform_data *data);
107
108/* NAND / SmartMedia */
109struct atmel_nand_data {
110 int enable_pin; /* chip enable */
111 int det_pin; /* card detect */
112 int rdy_pin; /* ready/busy */
113 u8 ale; /* address line number connected to ALE */
114 u8 cle; /* address line number connected to CLE */
115 u8 bus_width_16; /* buswidth is 16 bit */
116 struct mtd_partition *(*partition_info)(int size, int *num_partitions);
117};
118struct platform_device *
119at32_add_device_nand(unsigned int id, struct atmel_nand_data *data);
120
121#endif /* __ASM_ARCH_BOARD_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/cpu.h b/arch/avr32/mach-at32ap/include/mach/cpu.h
new file mode 100644
index 000000000000..44d0bfa1f409
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/cpu.h
@@ -0,0 +1,35 @@
1/*
2 * AVR32 and (fake) AT91 CPU identification
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARCH_CPU_H
11#define __ASM_ARCH_CPU_H
12
13/*
14 * Only AT32AP7000 is defined for now. We can identify the specific
15 * chip at runtime, but I'm not sure if it's really worth it.
16 */
17#ifdef CONFIG_CPU_AT32AP700X
18# define cpu_is_at32ap7000() (1)
19#else
20# define cpu_is_at32ap7000() (0)
21#endif
22
23/*
24 * Since this is AVR32, we will never run on any AT91 CPU. But these
25 * definitions may reduce clutter in common drivers.
26 */
27#define cpu_is_at91rm9200() (0)
28#define cpu_is_at91sam9xe() (0)
29#define cpu_is_at91sam9260() (0)
30#define cpu_is_at91sam9261() (0)
31#define cpu_is_at91sam9263() (0)
32#define cpu_is_at91sam9rl() (0)
33#define cpu_is_at91cap9() (0)
34
35#endif /* __ASM_ARCH_CPU_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/gpio.h b/arch/avr32/mach-at32ap/include/mach/gpio.h
new file mode 100644
index 000000000000..0180f584ef03
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/gpio.h
@@ -0,0 +1,45 @@
1#ifndef __ASM_AVR32_ARCH_GPIO_H
2#define __ASM_AVR32_ARCH_GPIO_H
3
4#include <linux/compiler.h>
5#include <asm/irq.h>
6
7
8/* Some GPIO chips can manage IRQs; some can't. The exact numbers can
9 * be changed if needed, but for the moment they're not configurable.
10 */
11#define ARCH_NR_GPIOS (NR_GPIO_IRQS + 2 * 32)
12
13
14/* Arch-neutral GPIO API, supporting both "native" and external GPIOs. */
15#include <asm-generic/gpio.h>
16
17static inline int gpio_get_value(unsigned int gpio)
18{
19 return __gpio_get_value(gpio);
20}
21
22static inline void gpio_set_value(unsigned int gpio, int value)
23{
24 __gpio_set_value(gpio, value);
25}
26
27static inline int gpio_cansleep(unsigned int gpio)
28{
29 return __gpio_cansleep(gpio);
30}
31
32
33static inline int gpio_to_irq(unsigned int gpio)
34{
35 if (gpio < NR_GPIO_IRQS)
36 return gpio + GPIO_IRQ_BASE;
37 return -EINVAL;
38}
39
40static inline int irq_to_gpio(unsigned int irq)
41{
42 return irq - GPIO_IRQ_BASE;
43}
44
45#endif /* __ASM_AVR32_ARCH_GPIO_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/init.h b/arch/avr32/mach-at32ap/include/mach/init.h
new file mode 100644
index 000000000000..bc40e3d46150
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/init.h
@@ -0,0 +1,18 @@
1/*
2 * AT32AP platform initialization calls.
3 *
4 * Copyright (C) 2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_AVR32_AT32AP_INIT_H__
11#define __ASM_AVR32_AT32AP_INIT_H__
12
13void setup_platform(void);
14void setup_board(void);
15
16void at32_setup_serial_console(unsigned int usart_id);
17
18#endif /* __ASM_AVR32_AT32AP_INIT_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/io.h b/arch/avr32/mach-at32ap/include/mach/io.h
new file mode 100644
index 000000000000..4ec6abc68ea3
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/io.h
@@ -0,0 +1,39 @@
1#ifndef __ASM_AVR32_ARCH_AT32AP_IO_H
2#define __ASM_AVR32_ARCH_AT32AP_IO_H
3
4/* For "bizarre" halfword swapping */
5#include <linux/byteorder/swabb.h>
6
7#if defined(CONFIG_AP700X_32_BIT_SMC)
8# define __swizzle_addr_b(addr) (addr ^ 3UL)
9# define __swizzle_addr_w(addr) (addr ^ 2UL)
10# define __swizzle_addr_l(addr) (addr)
11# define ioswabb(a, x) (x)
12# define ioswabw(a, x) (x)
13# define ioswabl(a, x) (x)
14# define __mem_ioswabb(a, x) (x)
15# define __mem_ioswabw(a, x) swab16(x)
16# define __mem_ioswabl(a, x) swab32(x)
17#elif defined(CONFIG_AP700X_16_BIT_SMC)
18# define __swizzle_addr_b(addr) (addr ^ 1UL)
19# define __swizzle_addr_w(addr) (addr)
20# define __swizzle_addr_l(addr) (addr)
21# define ioswabb(a, x) (x)
22# define ioswabw(a, x) (x)
23# define ioswabl(a, x) swahw32(x)
24# define __mem_ioswabb(a, x) (x)
25# define __mem_ioswabw(a, x) swab16(x)
26# define __mem_ioswabl(a, x) swahb32(x)
27#else
28# define __swizzle_addr_b(addr) (addr)
29# define __swizzle_addr_w(addr) (addr)
30# define __swizzle_addr_l(addr) (addr)
31# define ioswabb(a, x) (x)
32# define ioswabw(a, x) swab16(x)
33# define ioswabl(a, x) swab32(x)
34# define __mem_ioswabb(a, x) (x)
35# define __mem_ioswabw(a, x) (x)
36# define __mem_ioswabl(a, x) (x)
37#endif
38
39#endif /* __ASM_AVR32_ARCH_AT32AP_IO_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/irq.h b/arch/avr32/mach-at32ap/include/mach/irq.h
new file mode 100644
index 000000000000..608e350368c7
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/irq.h
@@ -0,0 +1,14 @@
1#ifndef __ASM_AVR32_ARCH_IRQ_H
2#define __ASM_AVR32_ARCH_IRQ_H
3
4#define EIM_IRQ_BASE NR_INTERNAL_IRQS
5#define NR_EIM_IRQS 32
6#define AT32_EXTINT(n) (EIM_IRQ_BASE + (n))
7
8#define GPIO_IRQ_BASE (EIM_IRQ_BASE + NR_EIM_IRQS)
9#define NR_GPIO_CTLR (5 /*internal*/ + 1 /*external*/)
10#define NR_GPIO_IRQS (NR_GPIO_CTLR * 32)
11
12#define NR_IRQS (GPIO_IRQ_BASE + NR_GPIO_IRQS)
13
14#endif /* __ASM_AVR32_ARCH_IRQ_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/pm.h b/arch/avr32/mach-at32ap/include/mach/pm.h
new file mode 100644
index 000000000000..979b355b77b6
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/pm.h
@@ -0,0 +1,51 @@
1/*
2 * AVR32 AP Power Management.
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_AVR32_ARCH_PM_H
11#define __ASM_AVR32_ARCH_PM_H
12
13/* Possible arguments to the "sleep" instruction */
14#define CPU_SLEEP_IDLE 0
15#define CPU_SLEEP_FROZEN 1
16#define CPU_SLEEP_STANDBY 2
17#define CPU_SLEEP_STOP 3
18#define CPU_SLEEP_STATIC 5
19
20#ifndef __ASSEMBLY__
21extern void cpu_enter_idle(void);
22extern void cpu_enter_standby(unsigned long sdramc_base);
23
24extern bool disable_idle_sleep;
25
26static inline void cpu_disable_idle_sleep(void)
27{
28 disable_idle_sleep = true;
29}
30
31static inline void cpu_enable_idle_sleep(void)
32{
33 disable_idle_sleep = false;
34}
35
36static inline void cpu_idle_sleep(void)
37{
38 /*
39 * If we're using the COUNT and COMPARE registers for
40 * timekeeping, we can't use the IDLE state.
41 */
42 if (disable_idle_sleep)
43 cpu_relax();
44 else
45 cpu_enter_idle();
46}
47
48void intc_set_suspend_handler(unsigned long offset);
49#endif
50
51#endif /* __ASM_AVR32_ARCH_PM_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/portmux.h b/arch/avr32/mach-at32ap/include/mach/portmux.h
new file mode 100644
index 000000000000..b1abe6b4e4ef
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/portmux.h
@@ -0,0 +1,29 @@
1/*
2 * AT32 portmux interface.
3 *
4 * Copyright (C) 2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARCH_PORTMUX_H__
11#define __ASM_ARCH_PORTMUX_H__
12
13/*
14 * Set up pin multiplexing, called from board init only.
15 *
16 * The following flags determine the initial state of the pin.
17 */
18#define AT32_GPIOF_PULLUP 0x00000001 /* (not-OUT) Enable pull-up */
19#define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */
20#define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */
21#define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */
22#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */
23
24void at32_select_periph(unsigned int pin, unsigned int periph,
25 unsigned long flags);
26void at32_select_gpio(unsigned int pin, unsigned long flags);
27void at32_reserve_pin(unsigned int pin);
28
29#endif /* __ASM_ARCH_PORTMUX_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/smc.h b/arch/avr32/mach-at32ap/include/mach/smc.h
new file mode 100644
index 000000000000..c98eea44a70a
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/smc.h
@@ -0,0 +1,113 @@
1/*
2 * Static Memory Controller for AT32 chips
3 *
4 * Copyright (C) 2006 Atmel Corporation
5 *
6 * Inspired by the OMAP2 General-Purpose Memory Controller interface
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef __ARCH_AT32AP_SMC_H
13#define __ARCH_AT32AP_SMC_H
14
15/*
16 * All timing parameters are in nanoseconds.
17 */
18struct smc_timing {
19 /* Delay from address valid to assertion of given strobe */
20 int ncs_read_setup;
21 int nrd_setup;
22 int ncs_write_setup;
23 int nwe_setup;
24
25 /* Pulse length of given strobe */
26 int ncs_read_pulse;
27 int nrd_pulse;
28 int ncs_write_pulse;
29 int nwe_pulse;
30
31 /* Total cycle length of given operation */
32 int read_cycle;
33 int write_cycle;
34
35 /* Minimal recovery times, will extend cycle if needed */
36 int ncs_read_recover;
37 int nrd_recover;
38 int ncs_write_recover;
39 int nwe_recover;
40};
41
42/*
43 * All timing parameters are in clock cycles.
44 */
45struct smc_config {
46
47 /* Delay from address valid to assertion of given strobe */
48 u8 ncs_read_setup;
49 u8 nrd_setup;
50 u8 ncs_write_setup;
51 u8 nwe_setup;
52
53 /* Pulse length of given strobe */
54 u8 ncs_read_pulse;
55 u8 nrd_pulse;
56 u8 ncs_write_pulse;
57 u8 nwe_pulse;
58
59 /* Total cycle length of given operation */
60 u8 read_cycle;
61 u8 write_cycle;
62
63 /* Bus width in bytes */
64 u8 bus_width;
65
66 /*
67 * 0: Data is sampled on rising edge of NCS
68 * 1: Data is sampled on rising edge of NRD
69 */
70 unsigned int nrd_controlled:1;
71
72 /*
73 * 0: Data is driven on falling edge of NCS
74 * 1: Data is driven on falling edge of NWR
75 */
76 unsigned int nwe_controlled:1;
77
78 /*
79 * 0: NWAIT is disabled
80 * 1: Reserved
81 * 2: NWAIT is frozen mode
82 * 3: NWAIT in ready mode
83 */
84 unsigned int nwait_mode:2;
85
86 /*
87 * 0: Byte select access type
88 * 1: Byte write access type
89 */
90 unsigned int byte_write:1;
91
92 /*
93 * Number of clock cycles before data is released after
94 * the rising edge of the read controlling signal
95 *
96 * Total cycles from SMC is tdf_cycles + 1
97 */
98 unsigned int tdf_cycles:4;
99
100 /*
101 * 0: TDF optimization disabled
102 * 1: TDF optimization enabled
103 */
104 unsigned int tdf_mode:1;
105};
106
107extern void smc_set_timing(struct smc_config *config,
108 const struct smc_timing *timing);
109
110extern int smc_set_configuration(int cs, const struct smc_config *config);
111extern struct smc_config *smc_get_configuration(int cs);
112
113#endif /* __ARCH_AT32AP_SMC_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/sram.h b/arch/avr32/mach-at32ap/include/mach/sram.h
new file mode 100644
index 000000000000..4838dae7601a
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/sram.h
@@ -0,0 +1,30 @@
1/*
2 * Simple SRAM allocator
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_AVR32_ARCH_SRAM_H
11#define __ASM_AVR32_ARCH_SRAM_H
12
13#include <linux/genalloc.h>
14
15extern struct gen_pool *sram_pool;
16
17static inline unsigned long sram_alloc(size_t len)
18{
19 if (!sram_pool)
20 return 0UL;
21
22 return gen_pool_alloc(sram_pool, len);
23}
24
25static inline void sram_free(unsigned long addr, size_t len)
26{
27 return gen_pool_free(sram_pool, addr, len);
28}
29
30#endif /* __ASM_AVR32_ARCH_SRAM_H */
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index 296294f8ed81..405ee6bad4ce 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -17,7 +17,7 @@
17#include <asm/gpio.h> 17#include <asm/gpio.h>
18#include <asm/io.h> 18#include <asm/io.h>
19 19
20#include <asm/arch/portmux.h> 20#include <mach/portmux.h>
21 21
22#include "pio.h" 22#include "pio.h"
23 23
diff --git a/arch/avr32/mach-at32ap/pm-at32ap700x.S b/arch/avr32/mach-at32ap/pm-at32ap700x.S
index 0a53ad314ff4..5be4de65b209 100644
--- a/arch/avr32/mach-at32ap/pm-at32ap700x.S
+++ b/arch/avr32/mach-at32ap/pm-at32ap700x.S
@@ -10,7 +10,7 @@
10#include <asm/asm.h> 10#include <asm/asm.h>
11#include <asm/asm-offsets.h> 11#include <asm/asm-offsets.h>
12#include <asm/thread_info.h> 12#include <asm/thread_info.h>
13#include <asm/arch/pm.h> 13#include <mach/pm.h>
14 14
15#include "pm.h" 15#include "pm.h"
16#include "sdramc.h" 16#include "sdramc.h"
diff --git a/arch/avr32/mach-at32ap/pm.c b/arch/avr32/mach-at32ap/pm.c
index 0b764320135d..a0cbef54fc2a 100644
--- a/arch/avr32/mach-at32ap/pm.c
+++ b/arch/avr32/mach-at32ap/pm.c
@@ -14,8 +14,8 @@
14#include <asm/cacheflush.h> 14#include <asm/cacheflush.h>
15#include <asm/sysreg.h> 15#include <asm/sysreg.h>
16 16
17#include <asm/arch/pm.h> 17#include <mach/pm.h>
18#include <asm/arch/sram.h> 18#include <mach/sram.h>
19 19
20/* FIXME: This is only valid for AP7000 */ 20/* FIXME: This is only valid for AP7000 */
21#define SDRAMC_BASE 0xfff03800 21#define SDRAMC_BASE 0xfff03800
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-15 14:57:42 -0500