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authorsteve@digidescorp.com <steve@digidescorp.com>2009-11-17 09:43:39 -0500
committerMichal Simek <monstr@monstr.eu>2009-12-14 02:45:06 -0500
commit33d9ff5985ff015cbaaef85285d19fe580487cf3 (patch)
tree5cfe889e9da8d89dbafc062ef41746697ecce11c /arch
parent833d0d8da41b80e5f7c3b34cb187b12c33ef66c8 (diff)
microblaze: Fix level interrupt ACKing
Level interrupts need to be ack'd in the unmask handler, as in powerpc. Among other issues, this bug causes the system clock to appear to run at double-speed. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch')
-rw-r--r--arch/microblaze/kernel/intc.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index 6eea6f92b84e..03172c1da770 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -42,8 +42,16 @@ unsigned int nr_irq;
42 42
43static void intc_enable_or_unmask(unsigned int irq) 43static void intc_enable_or_unmask(unsigned int irq)
44{ 44{
45 unsigned long mask = 1 << irq;
45 pr_debug("enable_or_unmask: %d\n", irq); 46 pr_debug("enable_or_unmask: %d\n", irq);
46 out_be32(INTC_BASE + SIE, 1 << irq); 47 out_be32(INTC_BASE + SIE, mask);
48
49 /* ack level irqs because they can't be acked during
50 * ack function since the handle_level_irq function
51 * acks the irq before calling the interrupt handler
52 */
53 if (irq_desc[irq].status & IRQ_LEVEL)
54 out_be32(INTC_BASE + IAR, mask);
47} 55}
48 56
49static void intc_disable_or_mask(unsigned int irq) 57static void intc_disable_or_mask(unsigned int irq)