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authorAnton Vorontsov <avorontsov@ru.mvista.com>2008-10-08 20:32:59 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-10-13 12:48:24 -0400
commitc0da99d5f7b0349cb11f970b3283c0d57beb5ec9 (patch)
tree43c6bf5406b4f93ccb6fd7e1d47b3c1bafd6ebbe /arch
parent1fb25be1e74498d389e4de819a6d1b174d6ccb7c (diff)
powerpc: fix fsl_upm nand driver modular build
The fsl_upm nand driver fails to build because fsl_lbc_lock isn't exported, the lock is needed by the inlined fsl_upm_run_pattern() function: ERROR: "fsl_lbc_lock" [drivers/mtd/nand/fsl_upm.ko] undefined! Dave Jones purposed to export the lock, but it is better to just uninline the fsl_upm_run_pattern(). When uninlined we also no longer need the exported fsl_lbc_regs, and both fsl_lbc_lock and fsl_lbc_regs could be marked static. While at it, also add some missing includes that we should have included explicitly. Reported-by: Dave Jones <davej@redhat.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h48
-rw-r--r--arch/powerpc/sysdev/fsl_lbc.c53
2 files changed, 53 insertions, 48 deletions
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 303f5484c050..63a4f779f531 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -23,9 +23,9 @@
23#ifndef __ASM_FSL_LBC_H 23#ifndef __ASM_FSL_LBC_H
24#define __ASM_FSL_LBC_H 24#define __ASM_FSL_LBC_H
25 25
26#include <linux/compiler.h>
26#include <linux/types.h> 27#include <linux/types.h>
27#include <linux/spinlock.h> 28#include <linux/io.h>
28#include <asm/io.h>
29 29
30struct fsl_lbc_bank { 30struct fsl_lbc_bank {
31 __be32 br; /**< Base Register */ 31 __be32 br; /**< Base Register */
@@ -227,9 +227,6 @@ struct fsl_lbc_regs {
227 u8 res8[0xF00]; 227 u8 res8[0xF00];
228}; 228};
229 229
230extern struct fsl_lbc_regs __iomem *fsl_lbc_regs;
231extern spinlock_t fsl_lbc_lock;
232
233/* 230/*
234 * FSL UPM routines 231 * FSL UPM routines
235 */ 232 */
@@ -268,44 +265,7 @@ static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
268 cpu_relax(); 265 cpu_relax();
269} 266}
270 267
271/** 268extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base,
272 * fsl_upm_run_pattern - actually run an UPM pattern 269 u32 mar);
273 * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
274 * @io_base: remapped pointer to where memory access should happen
275 * @mar: MAR register content during pattern execution
276 *
277 * This function triggers dummy write to the memory specified by the io_base,
278 * thus UPM pattern actually executed. Note that mar usage depends on the
279 * pre-programmed AMX bits in the UPM RAM.
280 */
281static inline int fsl_upm_run_pattern(struct fsl_upm *upm,
282 void __iomem *io_base, u32 mar)
283{
284 int ret = 0;
285 unsigned long flags;
286
287 spin_lock_irqsave(&fsl_lbc_lock, flags);
288
289 out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
290
291 switch (upm->width) {
292 case 8:
293 out_8(io_base, 0x0);
294 break;
295 case 16:
296 out_be16(io_base, 0x0);
297 break;
298 case 32:
299 out_be32(io_base, 0x0);
300 break;
301 default:
302 ret = -EINVAL;
303 break;
304 }
305
306 spin_unlock_irqrestore(&fsl_lbc_lock, flags);
307
308 return ret;
309}
310 270
311#endif /* __ASM_FSL_LBC_H */ 271#endif /* __ASM_FSL_LBC_H */
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index 422c8faef593..0494ee55920f 100644
--- a/arch/powerpc/sysdev/fsl_lbc.c
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -11,14 +11,19 @@
11 * (at your option) any later version. 11 * (at your option) any later version.
12 */ 12 */
13 13
14#include <linux/init.h>
15#include <linux/module.h>
14#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/compiler.h>
18#include <linux/spinlock.h>
19#include <linux/types.h>
20#include <linux/io.h>
15#include <linux/of.h> 21#include <linux/of.h>
22#include <asm/prom.h>
16#include <asm/fsl_lbc.h> 23#include <asm/fsl_lbc.h>
17 24
18spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock); 25static spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock);
19 26static struct fsl_lbc_regs __iomem *fsl_lbc_regs;
20struct fsl_lbc_regs __iomem *fsl_lbc_regs;
21EXPORT_SYMBOL(fsl_lbc_regs);
22 27
23static char __initdata *compat_lbc[] = { 28static char __initdata *compat_lbc[] = {
24 "fsl,pq2-localbus", 29 "fsl,pq2-localbus",
@@ -127,3 +132,43 @@ int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm)
127 return 0; 132 return 0;
128} 133}
129EXPORT_SYMBOL(fsl_upm_find); 134EXPORT_SYMBOL(fsl_upm_find);
135
136/**
137 * fsl_upm_run_pattern - actually run an UPM pattern
138 * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
139 * @io_base: remapped pointer to where memory access should happen
140 * @mar: MAR register content during pattern execution
141 *
142 * This function triggers dummy write to the memory specified by the io_base,
143 * thus UPM pattern actually executed. Note that mar usage depends on the
144 * pre-programmed AMX bits in the UPM RAM.
145 */
146int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
147{
148 int ret = 0;
149 unsigned long flags;
150
151 spin_lock_irqsave(&fsl_lbc_lock, flags);
152
153 out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
154
155 switch (upm->width) {
156 case 8:
157 out_8(io_base, 0x0);
158 break;
159 case 16:
160 out_be16(io_base, 0x0);
161 break;
162 case 32:
163 out_be32(io_base, 0x0);
164 break;
165 default:
166 ret = -EINVAL;
167 break;
168 }
169
170 spin_unlock_irqrestore(&fsl_lbc_lock, flags);
171
172 return ret;
173}
174EXPORT_SYMBOL(fsl_upm_run_pattern);