diff options
author | Shaohua Li <shaohua.li@intel.com> | 2005-11-07 03:58:42 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-07 10:53:30 -0500 |
commit | 31ab269a0307d8725737dfbbdeb5dcde7b41bc36 (patch) | |
tree | 15bfdaddcb3831d30e6d34caa54356b63adc61ae /arch | |
parent | 47b90ffe5c10ab9b5cfd14087b28b13109673ee5 (diff) |
[PATCH] x86: add MCE resume
It's widely seen a MCE non-fatal error reported after resume. It seems MCE
resume is lacked under ia32. This patch tries to fix the gap.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/i386/kernel/cpu/common.c | 5 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/mcheck/k7.c | 2 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/mcheck/mce.c | 4 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/mcheck/p4.c | 4 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/mcheck/p5.c | 2 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/mcheck/p6.c | 2 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/mcheck/winchip.c | 2 | ||||
-rw-r--r-- | arch/i386/power/cpu.c | 1 |
8 files changed, 10 insertions, 12 deletions
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c index 74145a33cb0f..c145fb30002e 100644 --- a/arch/i386/kernel/cpu/common.c +++ b/arch/i386/kernel/cpu/common.c | |||
@@ -30,8 +30,6 @@ static int disable_x86_serial_nr __devinitdata = 1; | |||
30 | 30 | ||
31 | struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {}; | 31 | struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {}; |
32 | 32 | ||
33 | extern void mcheck_init(struct cpuinfo_x86 *c); | ||
34 | |||
35 | extern int disable_pse; | 33 | extern int disable_pse; |
36 | 34 | ||
37 | static void default_init(struct cpuinfo_x86 * c) | 35 | static void default_init(struct cpuinfo_x86 * c) |
@@ -429,9 +427,8 @@ void __devinit identify_cpu(struct cpuinfo_x86 *c) | |||
429 | } | 427 | } |
430 | 428 | ||
431 | /* Init Machine Check Exception if available. */ | 429 | /* Init Machine Check Exception if available. */ |
432 | #ifdef CONFIG_X86_MCE | ||
433 | mcheck_init(c); | 430 | mcheck_init(c); |
434 | #endif | 431 | |
435 | if (c == &boot_cpu_data) | 432 | if (c == &boot_cpu_data) |
436 | sysenter_setup(); | 433 | sysenter_setup(); |
437 | enable_sep_cpu(); | 434 | enable_sep_cpu(); |
diff --git a/arch/i386/kernel/cpu/mcheck/k7.c b/arch/i386/kernel/cpu/mcheck/k7.c index 7c6b9c73522f..fc5d5215e23d 100644 --- a/arch/i386/kernel/cpu/mcheck/k7.c +++ b/arch/i386/kernel/cpu/mcheck/k7.c | |||
@@ -68,7 +68,7 @@ static fastcall void k7_machine_check(struct pt_regs * regs, long error_code) | |||
68 | 68 | ||
69 | 69 | ||
70 | /* AMD K7 machine check is Intel like */ | 70 | /* AMD K7 machine check is Intel like */ |
71 | void __devinit amd_mcheck_init(struct cpuinfo_x86 *c) | 71 | void amd_mcheck_init(struct cpuinfo_x86 *c) |
72 | { | 72 | { |
73 | u32 l, h; | 73 | u32 l, h; |
74 | int i; | 74 | int i; |
diff --git a/arch/i386/kernel/cpu/mcheck/mce.c b/arch/i386/kernel/cpu/mcheck/mce.c index 2cf25d2ba0f1..6170af3c271a 100644 --- a/arch/i386/kernel/cpu/mcheck/mce.c +++ b/arch/i386/kernel/cpu/mcheck/mce.c | |||
@@ -16,7 +16,7 @@ | |||
16 | 16 | ||
17 | #include "mce.h" | 17 | #include "mce.h" |
18 | 18 | ||
19 | int mce_disabled __devinitdata = 0; | 19 | int mce_disabled = 0; |
20 | int nr_mce_banks; | 20 | int nr_mce_banks; |
21 | 21 | ||
22 | EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */ | 22 | EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */ |
@@ -31,7 +31,7 @@ static fastcall void unexpected_machine_check(struct pt_regs * regs, long error_ | |||
31 | void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check; | 31 | void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check; |
32 | 32 | ||
33 | /* This has to be run for each processor */ | 33 | /* This has to be run for each processor */ |
34 | void __devinit mcheck_init(struct cpuinfo_x86 *c) | 34 | void mcheck_init(struct cpuinfo_x86 *c) |
35 | { | 35 | { |
36 | if (mce_disabled==1) | 36 | if (mce_disabled==1) |
37 | return; | 37 | return; |
diff --git a/arch/i386/kernel/cpu/mcheck/p4.c b/arch/i386/kernel/cpu/mcheck/p4.c index 1d1e885f500a..fd2c459a31ef 100644 --- a/arch/i386/kernel/cpu/mcheck/p4.c +++ b/arch/i386/kernel/cpu/mcheck/p4.c | |||
@@ -77,7 +77,7 @@ fastcall void smp_thermal_interrupt(struct pt_regs *regs) | |||
77 | } | 77 | } |
78 | 78 | ||
79 | /* P4/Xeon Thermal regulation detect and init */ | 79 | /* P4/Xeon Thermal regulation detect and init */ |
80 | static void __devinit intel_init_thermal(struct cpuinfo_x86 *c) | 80 | static void intel_init_thermal(struct cpuinfo_x86 *c) |
81 | { | 81 | { |
82 | u32 l, h; | 82 | u32 l, h; |
83 | unsigned int cpu = smp_processor_id(); | 83 | unsigned int cpu = smp_processor_id(); |
@@ -231,7 +231,7 @@ static fastcall void intel_machine_check(struct pt_regs * regs, long error_code) | |||
231 | } | 231 | } |
232 | 232 | ||
233 | 233 | ||
234 | void __devinit intel_p4_mcheck_init(struct cpuinfo_x86 *c) | 234 | void intel_p4_mcheck_init(struct cpuinfo_x86 *c) |
235 | { | 235 | { |
236 | u32 l, h; | 236 | u32 l, h; |
237 | int i; | 237 | int i; |
diff --git a/arch/i386/kernel/cpu/mcheck/p5.c b/arch/i386/kernel/cpu/mcheck/p5.c index 3a2e24baddc7..94bc43d950cf 100644 --- a/arch/i386/kernel/cpu/mcheck/p5.c +++ b/arch/i386/kernel/cpu/mcheck/p5.c | |||
@@ -28,7 +28,7 @@ static fastcall void pentium_machine_check(struct pt_regs * regs, long error_cod | |||
28 | } | 28 | } |
29 | 29 | ||
30 | /* Set up machine check reporting for processors with Intel style MCE */ | 30 | /* Set up machine check reporting for processors with Intel style MCE */ |
31 | void __devinit intel_p5_mcheck_init(struct cpuinfo_x86 *c) | 31 | void intel_p5_mcheck_init(struct cpuinfo_x86 *c) |
32 | { | 32 | { |
33 | u32 l, h; | 33 | u32 l, h; |
34 | 34 | ||
diff --git a/arch/i386/kernel/cpu/mcheck/p6.c b/arch/i386/kernel/cpu/mcheck/p6.c index 979b18bc95c1..deeae42ce199 100644 --- a/arch/i386/kernel/cpu/mcheck/p6.c +++ b/arch/i386/kernel/cpu/mcheck/p6.c | |||
@@ -79,7 +79,7 @@ static fastcall void intel_machine_check(struct pt_regs * regs, long error_code) | |||
79 | } | 79 | } |
80 | 80 | ||
81 | /* Set up machine check reporting for processors with Intel style MCE */ | 81 | /* Set up machine check reporting for processors with Intel style MCE */ |
82 | void __devinit intel_p6_mcheck_init(struct cpuinfo_x86 *c) | 82 | void intel_p6_mcheck_init(struct cpuinfo_x86 *c) |
83 | { | 83 | { |
84 | u32 l, h; | 84 | u32 l, h; |
85 | int i; | 85 | int i; |
diff --git a/arch/i386/kernel/cpu/mcheck/winchip.c b/arch/i386/kernel/cpu/mcheck/winchip.c index 5b9d2dd411d3..9e424b6c293d 100644 --- a/arch/i386/kernel/cpu/mcheck/winchip.c +++ b/arch/i386/kernel/cpu/mcheck/winchip.c | |||
@@ -22,7 +22,7 @@ static fastcall void winchip_machine_check(struct pt_regs * regs, long error_cod | |||
22 | } | 22 | } |
23 | 23 | ||
24 | /* Set up machine check reporting on the Winchip C6 series */ | 24 | /* Set up machine check reporting on the Winchip C6 series */ |
25 | void __devinit winchip_mcheck_init(struct cpuinfo_x86 *c) | 25 | void winchip_mcheck_init(struct cpuinfo_x86 *c) |
26 | { | 26 | { |
27 | u32 lo, hi; | 27 | u32 lo, hi; |
28 | machine_check_vector = winchip_machine_check; | 28 | machine_check_vector = winchip_machine_check; |
diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c index 1f1572692e0b..50a0bef8c85f 100644 --- a/arch/i386/power/cpu.c +++ b/arch/i386/power/cpu.c | |||
@@ -118,6 +118,7 @@ void __restore_processor_state(struct saved_context *ctxt) | |||
118 | fix_processor_context(); | 118 | fix_processor_context(); |
119 | do_fpu_end(); | 119 | do_fpu_end(); |
120 | mtrr_ap_init(); | 120 | mtrr_ap_init(); |
121 | mcheck_init(&boot_cpu_data); | ||
121 | } | 122 | } |
122 | 123 | ||
123 | void restore_processor_state(void) | 124 | void restore_processor_state(void) |