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authorMike Wolf <mjw@linux.vnet.ibm.com>2007-07-10 14:13:47 -0400
committerPaul Mackerras <paulus@samba.org>2007-07-10 23:21:46 -0400
commit31a12cece7c71c47e61ab8ed45bbff5aac4c1931 (patch)
tree221d8e6f8206f50912b7c4fff429706a31d892ff /arch
parent665f5600cb80c9cfa2e9bc832f9cd28164d8e283 (diff)
[POWERPC] Oprofile support for Power 5++
This adds a new oprofile cpu type for Power 5 revision 3 chips. The new name is ppc64/power5++ and is used so that the performance counters can be set up correctly. Signed-off-by: Mike Wolf <mjw@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kernel/cputable.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 157e6e3d237b..b1f8000952f3 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -294,6 +294,21 @@ static struct cpu_spec cpu_specs[] = {
294 .oprofile_mmcra_sipr = MMCRA_SIPR, 294 .oprofile_mmcra_sipr = MMCRA_SIPR,
295 .platform = "power5", 295 .platform = "power5",
296 }, 296 },
297 { /* Power5++ */
298 .pvr_mask = 0xffffff00,
299 .pvr_value = 0x003b0300,
300 .cpu_name = "POWER5+ (gs)",
301 .cpu_features = CPU_FTRS_POWER5,
302 .cpu_user_features = COMMON_USER_POWER5_PLUS,
303 .icache_bsize = 128,
304 .dcache_bsize = 128,
305 .num_pmcs = 6,
306 .oprofile_cpu_type = "ppc64/power5++",
307 .oprofile_type = PPC_OPROFILE_POWER4,
308 .oprofile_mmcra_sihv = MMCRA_SIHV,
309 .oprofile_mmcra_sipr = MMCRA_SIPR,
310 .platform = "power5+",
311 },
297 { /* Power5 GS */ 312 { /* Power5 GS */
298 .pvr_mask = 0xffff0000, 313 .pvr_mask = 0xffff0000,
299 .pvr_value = 0x003b0000, 314 .pvr_value = 0x003b0000,