Merge branch 'x86/cleanups' into x86/irq

[ merged x86/cleanups into x86/irq to enable a wider IRQ entry code
  patch to be applied, which depends on a cleanup patch in x86/cleanups. ]

66 files changed, 849 insertions, 463 deletions

diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 1cb8602dd9d5..4ed149cbb32a 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -256,8 +256,17 @@ int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
 int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
                 size_t, enum dma_data_direction);
 #else
-#define dmabounce_sync_for_cpu(dev,dma,off,sz,dir)      (1)
-#define dmabounce_sync_for_device(dev,dma,off,sz,dir)   (1)
+static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
+        unsigned long offset, size_t size, enum dma_data_direction dir)
+{
+        return 1;
+}
+
+static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
+        unsigned long offset, size_t size, enum dma_data_direction dir)
+{
+        return 1;
+}
 
 
 /**
diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h
index 87bff09633aa..83e6ba338e2c 100644
--- a/arch/arm/include/asm/hardware/iop3xx-adma.h
+++ b/arch/arm/include/asm/hardware/iop3xx-adma.h
@@ -730,7 +730,8 @@ static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc,
 {
         /* hw_desc->next_desc is the same location for all channels */
         union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
-        BUG_ON(hw_desc.dma->next_desc);
+
+        iop_paranoia(hw_desc.dma->next_desc);
         hw_desc.dma->next_desc = next_desc_addr;
 }
 
@@ -760,7 +761,7 @@ static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)
         struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
         struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;
 
-        BUG_ON(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en));
+        iop_paranoia(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en));
         return desc_ctrl.zero_result_err;
 }
 
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index cb7e3611bcba..385c6e8cbbd2 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -23,6 +23,12 @@
 
 #define IOP_ADMA_SLOT_SIZE 32
 #define IOP_ADMA_THRESHOLD 4
+#ifdef DEBUG
+#define IOP_PARANOIA 1
+#else
+#define IOP_PARANOIA 0
+#endif
+#define iop_paranoia(x) BUG_ON(IOP_PARANOIA && (x))
 
 /**
  * struct iop_adma_device - internal representation of an ADMA device
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index cb1139ac1943..39d949b63e80 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -19,12 +19,13 @@ struct map_desc {
 };
 
 /* types 0-3 are defined in asm/io.h */
-#define MT_CACHECLEAN           4
-#define MT_MINICLEAN            5
-#define MT_LOW_VECTORS          6
-#define MT_HIGH_VECTORS         7
-#define MT_MEMORY               8
-#define MT_ROM                  9
+#define MT_UNCACHED             4
+#define MT_CACHECLEAN           5
+#define MT_MINICLEAN            6
+#define MT_LOW_VECTORS          7
+#define MT_HIGH_VECTORS         8
+#define MT_MEMORY               9
+#define MT_ROM                  10
 
 #ifdef CONFIG_MMU
 extern void iotable_init(struct map_desc *, int);
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 4c3e101b96c9..b3ebe9e4871f 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -94,20 +94,6 @@
 #include <asm/hardware/ep7212.h>
 #include <asm/hardware/cs89712.h>
 
-/* dynamic ioremap() areas */
-#define FLASH_START      0x00000000
-#define FLASH_SIZE       0x800000
-#define FLASH_WIDTH      4
-
-#define SRAM_START       0x60000000
-#define SRAM_SIZE        0xc000
-#define SRAM_WIDTH       4
-
-#define BOOTROM_START    0x70000000
-#define BOOTROM_SIZE     0x80
-#define BOOTROM_WIDTH    4
-
-
 /* static cdb89712_map_io() areas */
 #define REGISTER_START   0x80000000
 #define REGISTER_SIZE    0x4000
@@ -198,14 +184,6 @@
 #define CEIVA_FLASH_SIZE        0x100000
 #define CEIVA_FLASH_WIDTH       2
 
-#define SRAM_START       0x60000000
-#define SRAM_SIZE        0xc000
-#define SRAM_WIDTH       4
-
-#define BOOTROM_START    0x70000000
-#define BOOTROM_SIZE     0x80
-#define BOOTROM_WIDTH    4
-
 /*
  * SED1355 LCD controller
  */
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index c3a33b8a5aac..7e247c04d41c 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -275,9 +275,9 @@ static struct map_desc cl7500_io_desc[] __initdata = {
                 .length         = ISA_SIZE,
                 .type           = MT_DEVICE
         }, {    /* Flash        */
-                .virtual        = FLASH_BASE,
-                .pfn            = __phys_to_pfn(FLASH_START),
-                .length         = FLASH_SIZE,
+                .virtual        = CLPS7500_FLASH_BASE,
+                .pfn            = __phys_to_pfn(CLPS7500_FLASH_START),
+                .length         = CLPS7500_FLASH_SIZE,
                 .type           = MT_DEVICE
         }, {    /* LED          */
                 .virtual        = LED_BASE,
diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h
index d66578a3371c..a6ad1d44badf 100644
--- a/arch/arm/mach-clps7500/include/mach/hardware.h
+++ b/arch/arm/mach-clps7500/include/mach/hardware.h
@@ -39,9 +39,9 @@
 #define ISA_SIZE                0x00010000
 #define ISA_BASE                0xe1000000
 
-#define FLASH_START             0x01000000      /* XXX */
-#define FLASH_SIZE              0x01000000
-#define FLASH_BASE              0xe2000000
+#define CLPS7500_FLASH_START    0x01000000      /* XXX */
+#define CLPS7500_FLASH_SIZE     0x01000000
+#define CLPS7500_FLASH_BASE     0xe2000000
 
 #define LED_START               0x0302B000
 #define LED_SIZE                0x00001000
diff --git a/arch/arm/mach-h720x/include/mach/boards.h b/arch/arm/mach-h720x/include/mach/boards.h
index 079b279e1242..38b8e0d61fbf 100644
--- a/arch/arm/mach-h720x/include/mach/boards.h
+++ b/arch/arm/mach-h720x/include/mach/boards.h
@@ -19,9 +19,9 @@
 #ifdef CONFIG_ARCH_H7202
 
 /* FLASH */
-#define FLASH_VIRT              0xd0000000
-#define FLASH_PHYS              0x00000000
-#define FLASH_SIZE              0x02000000
+#define H720X_FLASH_VIRT        0xd0000000
+#define H720X_FLASH_PHYS        0x00000000
+#define H720X_FLASH_SIZE        0x02000000
 
 /* onboard LAN controller */
 # define ETH0_PHYS              0x08000000
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index 028b87839c0f..e00a2624f269 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -408,27 +408,10 @@
 #define uHAL_MEMORY_SIZE                INTEGRATOR_SSRAM_SIZE
 
 /*
- *  Application Flash
- *
- */
-#define FLASH_BASE                      INTEGRATOR_FLASH_BASE
-#define FLASH_SIZE                      INTEGRATOR_FLASH_SIZE
-#define FLASH_END                       (FLASH_BASE + FLASH_SIZE - 1)
-#define FLASH_BLOCK_SIZE                SZ_128K
-
-/*
- *  Boot Flash
- *
- */
-#define EPROM_BASE                      INTEGRATOR_BOOT_ROM_HI
-#define EPROM_SIZE                      INTEGRATOR_BOOT_ROM_SIZE
-#define EPROM_END                       (EPROM_BASE + EPROM_SIZE - 1)
-
-/*
  *  Clean base - dummy
  *
  */
-#define CLEAN_BASE                      EPROM_BASE
+#define CLEAN_BASE                      INTEGRATOR_BOOT_ROM_HI
 
 /*
  *  Timer definitions
diff --git a/arch/arm/mach-iop13xx/include/mach/adma.h b/arch/arm/mach-iop13xx/include/mach/adma.h
index 60019c8e6465..5722e86f2174 100644
--- a/arch/arm/mach-iop13xx/include/mach/adma.h
+++ b/arch/arm/mach-iop13xx/include/mach/adma.h
@@ -404,7 +404,8 @@ static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc,
                                         u32 next_desc_addr)
 {
         struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
-        BUG_ON(hw_desc->next_desc);
+
+        iop_paranoia(hw_desc->next_desc);
         hw_desc->next_desc = next_desc_addr;
 }
 
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
index 3e706c57833a..3347c4236a60 100644
--- a/arch/arm/mach-realview/clock.c
+++ b/arch/arm/mach-realview/clock.c
@@ -104,7 +104,7 @@ static struct clk uart_clk = {
 
 static struct clk mmci_clk = {
         .name   = "MCLK",
-        .rate   = 33000000,
+        .rate   = 24000000,
 };
 
 int clk_register(struct clk *clk)
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h
index 4034b54950c2..793a3a332712 100644
--- a/arch/arm/mach-realview/include/mach/platform.h
+++ b/arch/arm/mach-realview/include/mach/platform.h
@@ -239,27 +239,10 @@
 #define REALVIEW_DECODE_OFFSET          0xC     /* Fitted logic modules */
 
 /* 
- *  Application Flash
- * 
- */
-#define FLASH_BASE                      REALVIEW_FLASH_BASE
-#define FLASH_SIZE                      REALVIEW_FLASH_SIZE
-#define FLASH_END                       (FLASH_BASE + FLASH_SIZE - 1)
-#define FLASH_BLOCK_SIZE                SZ_128K
-
-/* 
- *  Boot Flash
- * 
- */
-#define EPROM_BASE                      REALVIEW_BOOT_ROM_HI
-#define EPROM_SIZE                      REALVIEW_BOOT_ROM_SIZE
-#define EPROM_END                       (EPROM_BASE + EPROM_SIZE - 1)
-
-/* 
  *  Clean base - dummy
  * 
  */
-#define CLEAN_BASE                      EPROM_BASE
+#define CLEAN_BASE                      REALVIEW_BOOT_ROM_HI
 
 /*
  * System controller bit assignment
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
index 9336508ec0b2..58937f1fb38c 100644
--- a/arch/arm/mach-versatile/clock.c
+++ b/arch/arm/mach-versatile/clock.c
@@ -105,7 +105,7 @@ static struct clk uart_clk = {
 
 static struct clk mmci_clk = {
         .name   = "MCLK",
-        .rate   = 33000000,
+        .rate   = 24000000,
 };
 
 int clk_register(struct clk *clk)
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
index 27cbe6a3f220..f91ba930ca8a 100644
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ b/arch/arm/mach-versatile/include/mach/platform.h
@@ -436,28 +436,12 @@
 #define SIC_INTMASK_PCI1                (1 << SIC_INT_PCI1)
 #define SIC_INTMASK_PCI2                (1 << SIC_INT_PCI2)
 #define SIC_INTMASK_PCI3                (1 << SIC_INT_PCI3)
-/* 
- *  Application Flash
- * 
- */
-#define FLASH_BASE                      VERSATILE_FLASH_BASE
-#define FLASH_SIZE                      VERSATILE_FLASH_SIZE
-#define FLASH_END                       (FLASH_BASE + FLASH_SIZE - 1)
-#define FLASH_BLOCK_SIZE                SZ_128K
-
-/* 
- *  Boot Flash
- * 
- */
-#define EPROM_BASE                      VERSATILE_BOOT_ROM_HI
-#define EPROM_SIZE                      VERSATILE_BOOT_ROM_SIZE
-#define EPROM_END                       (EPROM_BASE + EPROM_SIZE - 1)
 
 /* 
  *  Clean base - dummy
  * 
  */
-#define CLEAN_BASE                      EPROM_BASE
+#define CLEAN_BASE                      VERSATILE_BOOT_ROM_HI
 
 /*
  * System controller bit assignment
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 13cdae8b0d44..80cd207cbaea 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -150,7 +150,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
         /*
          * Clean and invalidate partial last cache line.
          */
-        if (end & (CACHE_LINE_SIZE - 1)) {
+        if (start < end && end & (CACHE_LINE_SIZE - 1)) {
                 l2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
                 end &= ~(CACHE_LINE_SIZE - 1);
         }
@@ -158,7 +158,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
         /*
          * Invalidate all full cache lines between 'start' and 'end'.
          */
-        while (start != end) {
+        while (start < end) {
                 unsigned long range_end = calc_range_end(start, end);
                 l2_inv_pa_range(start, range_end - CACHE_LINE_SIZE);
                 start = range_end;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index e63db11f16a8..7f36c825718d 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -208,6 +208,12 @@ static struct mem_type mem_types[] = {
                 .prot_sect      = PROT_SECT_DEVICE,
                 .domain         = DOMAIN_IO,
         },
+        [MT_UNCACHED] = {
+                .prot_pte       = PROT_PTE_DEVICE,
+                .prot_l1        = PMD_TYPE_TABLE,
+                .prot_sect      = PMD_TYPE_SECT | PMD_SECT_XN,
+                .domain         = DOMAIN_IO,
+        },
         [MT_CACHECLEAN] = {
                 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
                 .domain    = DOMAIN_KERNEL,
diff --git a/arch/arm/plat-iop/setup.c b/arch/arm/plat-iop/setup.c
index 4689db638e95..9e573e78176a 100644
--- a/arch/arm/plat-iop/setup.c
+++ b/arch/arm/plat-iop/setup.c
@@ -16,14 +16,15 @@
 #include <asm/hardware/iop3xx.h>
 
 /*
- * Standard IO mapping for all IOP3xx based systems
+ * Standard IO mapping for all IOP3xx based systems.  Note that
+ * the IOP3xx OCCDR must be mapped uncached and unbuffered.
  */
 static struct map_desc iop3xx_std_desc[] __initdata = {
          {      /* mem mapped registers */
                 .virtual        = IOP3XX_PERIPHERAL_VIRT_BASE,
                 .pfn            = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE),
                 .length         = IOP3XX_PERIPHERAL_SIZE,
-                .type           = MT_DEVICE,
+                .type           = MT_UNCACHED,
          }, {   /* PCI IO space */
                 .virtual        = IOP3XX_PCI_LOWER_IO_VA,
                 .pfn            = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA),
diff --git a/arch/ia64/kvm/Kconfig b/arch/ia64/kvm/Kconfig
index 8e99fed6b3fd..f833a0b4188d 100644
--- a/arch/ia64/kvm/Kconfig
+++ b/arch/ia64/kvm/Kconfig
@@ -20,6 +20,8 @@ if VIRTUALIZATION
 config KVM
         tristate "Kernel-based Virtual Machine (KVM) support"
         depends on HAVE_KVM && EXPERIMENTAL
+        # for device assignment:
+        depends on PCI
         select PREEMPT_NOTIFIERS
         select ANON_INODES
         ---help---
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index 3caac477de9e..af1464f7a6ad 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -673,16 +673,16 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         vcpu_load(vcpu);
 
+        if (vcpu->sigset_active)
+                sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
+
         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
                 kvm_vcpu_block(vcpu);
                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
-                vcpu_put(vcpu);
-                return -EAGAIN;
+                r = -EAGAIN;
+                goto out;
         }
 
-        if (vcpu->sigset_active)
-                sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
-
         if (vcpu->mmio_needed) {
                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
                 kvm_set_mmio_data(vcpu);
@@ -690,7 +690,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 vcpu->mmio_needed = 0;
         }
         r = __vcpu_run(vcpu, kvm_run);
-
+out:
         if (vcpu->sigset_active)
                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
 
diff --git a/arch/ia64/kvm/vcpu.h b/arch/ia64/kvm/vcpu.h
index 341e3fee280c..e9b2a4e121c0 100644
--- a/arch/ia64/kvm/vcpu.h
+++ b/arch/ia64/kvm/vcpu.h
@@ -384,6 +384,10 @@ static inline u64 __gpfn_is_io(u64 gpfn)
 #define MODE_IND(psr)   \
         (((psr).it << 2) + ((psr).dt << 1) + (psr).rt)
 
+#ifndef CONFIG_SMP
+#define _vmm_raw_spin_lock(x)    do {}while(0)
+#define _vmm_raw_spin_unlock(x) do {}while(0)
+#else
 #define _vmm_raw_spin_lock(x)                                           \
         do {                                                            \
                 __u32 *ia64_spinlock_ptr = (__u32 *) (x);               \
@@ -403,6 +407,7 @@ static inline u64 __gpfn_is_io(u64 gpfn)
         do { barrier();                         \
                 ((spinlock_t *)x)->raw_lock.lock = 0; } \
 while (0)
+#endif
 
 void vmm_spin_lock(spinlock_t *lock);
 void vmm_spin_unlock(spinlock_t *lock);
diff --git a/arch/m68k/kernel/ints.c b/arch/m68k/kernel/ints.c
index 7e8a0d394e61..761ee0440c99 100644
--- a/arch/m68k/kernel/ints.c
+++ b/arch/m68k/kernel/ints.c
@@ -133,7 +133,7 @@ void __init m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt,
 {
         int i;
 
-        BUG_ON(IRQ_USER + cnt >= NR_IRQS);
+        BUG_ON(IRQ_USER + cnt > NR_IRQS);
         m68k_first_user_vec = vec;
         for (i = 0; i < cnt; i++)
                 irq_controller[IRQ_USER + i] = &user_irq_controller;
diff --git a/arch/mn10300/Kconfig.debug b/arch/mn10300/Kconfig.debug
index 524e33819f32..ff80e86b9bd2 100644
--- a/arch/mn10300/Kconfig.debug
+++ b/arch/mn10300/Kconfig.debug
@@ -15,6 +15,15 @@ config DEBUG_DECOMPRESS_KERNEL
           decompressing Linux seeing "Uncompressing Linux... " and
           "Ok, booting the kernel.\n" on console.
 
+config TEST_MISALIGNMENT_HANDLER
+        bool "Run tests on the misalignment handler"
+        depends on DEBUG_KERNEL
+        default n
+        help
+          If you say Y here the kernel will execute a list of misaligned memory
+          accesses to make sure the misalignment handler deals them with
+          correctly.  If it does not, the kernel will throw a BUG.
+
 config KPROBES
         bool "Kprobes"
         depends on DEBUG_KERNEL
diff --git a/arch/mn10300/mm/misalignment.c b/arch/mn10300/mm/misalignment.c
index 32aa89dc3848..94c4a4358065 100644
--- a/arch/mn10300/mm/misalignment.c
+++ b/arch/mn10300/mm/misalignment.c
@@ -37,26 +37,22 @@
 #include <asm/asm-offsets.h>
 
 #if 0
-#define kdebug(FMT, ...) printk(KERN_DEBUG FMT, ##__VA_ARGS__)
+#define kdebug(FMT, ...) printk(KERN_DEBUG "MISALIGN: "FMT"\n", ##__VA_ARGS__)
 #else
 #define kdebug(FMT, ...) do {} while (0)
 #endif
 
-static int misalignment_addr(unsigned long *registers, unsigned params,
-                             unsigned opcode, unsigned disp,
-                             void **_address, unsigned long **_postinc);
+static int misalignment_addr(unsigned long *registers, unsigned long sp,
+                             unsigned params, unsigned opcode,
+                             unsigned long disp,
+                             void **_address, unsigned long **_postinc,
+                             unsigned long *_inc);
 
 static int misalignment_reg(unsigned long *registers, unsigned params,
-                            unsigned opcode, unsigned disp,
+                            unsigned opcode, unsigned long disp,
                             unsigned long **_register);
 
-static inline unsigned int_log2(unsigned x)
-{
-        unsigned y;
-        asm("bsch %1,%0" : "=r"(y) : "r"(x), "0"(0));
-        return y;
-}
-#define log2(x) int_log2(x)
+static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode);
 
 static const unsigned Dreg_index[] = {
         REG_D0 >> 2, REG_D1 >> 2, REG_D2 >> 2, REG_D3 >> 2
@@ -86,9 +82,10 @@ enum format_id {
         FMT_D7,
         FMT_D8,
         FMT_D9,
+        FMT_D10,
 };
 
-struct {
+static const struct {
         u_int8_t opsz, dispsz;
 } format_tbl[16] = {
         [FMT_S0]        = { 8,  0       },
@@ -103,6 +100,7 @@ struct {
         [FMT_D7]        = { 24, 8       },
         [FMT_D8]        = { 24, 24      },
         [FMT_D9]        = { 24, 32      },
+        [FMT_D10]       = { 32, 0       },
 };
 
 enum value_id {
@@ -128,9 +126,14 @@ enum value_id {
         SD24,           /* 24-bit signed displacement */
         SIMM4_2,        /* 4-bit signed displacement in opcode bits 4-7 */
         SIMM8,          /* 8-bit signed immediate */
+        IMM8,           /* 8-bit unsigned immediate */
+        IMM16,          /* 16-bit unsigned immediate */
         IMM24,          /* 24-bit unsigned immediate */
         IMM32,          /* 32-bit unsigned immediate */
-        IMM32_HIGH8,    /* 32-bit unsigned immediate, high 8-bits in opcode */
+        IMM32_HIGH8,    /* 32-bit unsigned immediate, LSB in opcode */
+
+        IMM32_MEM,      /* 32-bit unsigned displacement */
+        IMM32_HIGH8_MEM, /* 32-bit unsigned displacement, LSB in opcode */
 
         DN0     = DM0,
         DN1     = DM1,
@@ -149,7 +152,7 @@ enum value_id {
 };
 
 struct mn10300_opcode {
-        const char      *name;
+        const char      name[8];
         u_int32_t       opcode;
         u_int32_t       opmask;
         unsigned        exclusion;
@@ -185,6 +188,10 @@ struct mn10300_opcode {
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 */
 static const struct mn10300_opcode mn10300_opcodes[] = {
+{ "mov",        0x4200,      0xf300,      0,    FMT_S1, 0,      {DM1, MEM2(IMM8, SP)}},
+{ "mov",        0x4300,      0xf300,      0,    FMT_S1, 0,      {AM1, MEM2(IMM8, SP)}},
+{ "mov",        0x5800,      0xfc00,      0,    FMT_S1, 0,      {MEM2(IMM8, SP), DN0}},
+{ "mov",        0x5c00,      0xfc00,      0,    FMT_S1, 0,      {MEM2(IMM8, SP), AN0}},
 { "mov",        0x60,        0xf0,        0,    FMT_S0, 0,      {DM1, MEM(AN0)}},
 { "mov",        0x70,        0xf0,        0,    FMT_S0, 0,      {MEM(AM0), DN1}},
 { "mov",        0xf000,      0xfff0,      0,    FMT_D0, 0,      {MEM(AM0), AN1}},
@@ -197,8 +204,6 @@ static const struct mn10300_opcode mn10300_opcodes[] = {
 { "mov",        0xf81000,    0xfff000,    0,    FMT_D1, 0,      {DM1, MEM2(SD8, AN0)}},
 { "mov",        0xf82000,    0xfff000,    0,    FMT_D1, 0,      {MEM2(SD8,AM0), AN1}},
 { "mov",        0xf83000,    0xfff000,    0,    FMT_D1, 0,      {AM1, MEM2(SD8, AN0)}},
-{ "mov",        0xf8f000,    0xfffc00,    0,    FMT_D1, AM33,   {MEM2(SD8, AM0), SP}},
-{ "mov",        0xf8f400,    0xfffc00,    0,    FMT_D1, AM33,   {SP, MEM2(SD8, AN0)}},
 { "mov",        0xf90a00,    0xffff00,    0,    FMT_D6, AM33,   {MEM(RM0), RN2}},
 { "mov",        0xf91a00,    0xffff00,    0,    FMT_D6, AM33,   {RM2, MEM(RN0)}},
 { "mov",        0xf96a00,    0xffff00,    0x12, FMT_D6, AM33,   {MEMINC(RM0), RN2}},
@@ -207,24 +212,46 @@ static const struct mn10300_opcode mn10300_opcodes[] = {
 { "mov",        0xfa100000,  0xfff00000,  0,    FMT_D2, 0,      {DM1, MEM2(SD16, AN0)}},
 { "mov",        0xfa200000,  0xfff00000,  0,    FMT_D2, 0,      {MEM2(SD16, AM0), AN1}},
 { "mov",        0xfa300000,  0xfff00000,  0,    FMT_D2, 0,      {AM1, MEM2(SD16, AN0)}},
+{ "mov",        0xfa900000,  0xfff30000,  0,    FMT_D2, 0,      {AM1, MEM2(IMM16, SP)}},
+{ "mov",        0xfa910000,  0xfff30000,  0,    FMT_D2, 0,      {DM1, MEM2(IMM16, SP)}},
+{ "mov",        0xfab00000,  0xfffc0000,  0,    FMT_D2, 0,      {MEM2(IMM16, SP), AN0}},
+{ "mov",        0xfab40000,  0xfffc0000,  0,    FMT_D2, 0,      {MEM2(IMM16, SP), DN0}},
 { "mov",        0xfb0a0000,  0xffff0000,  0,    FMT_D7, AM33,   {MEM2(SD8, RM0), RN2}},
 { "mov",        0xfb1a0000,  0xffff0000,  0,    FMT_D7, AM33,   {RM2, MEM2(SD8, RN0)}},
 { "mov",        0xfb6a0000,  0xffff0000,  0x22, FMT_D7, AM33,   {MEMINC2 (RM0, SIMM8), RN2}},
 { "mov",        0xfb7a0000,  0xffff0000,  0,    FMT_D7, AM33,   {RM2, MEMINC2 (RN0, SIMM8)}},
+{ "mov",        0xfb8a0000,  0xffff0f00,  0,    FMT_D7, AM33,   {MEM2(IMM8, SP), RN2}},
 { "mov",        0xfb8e0000,  0xffff000f,  0,    FMT_D7, AM33,   {MEM2(RI, RM0), RD2}},
+{ "mov",        0xfb9a0000,  0xffff0f00,  0,    FMT_D7, AM33,   {RM2, MEM2(IMM8, SP)}},
 { "mov",        0xfb9e0000,  0xffff000f,  0,    FMT_D7, AM33,   {RD2, MEM2(RI, RN0)}},
 { "mov",        0xfc000000,  0xfff00000,  0,    FMT_D4, 0,      {MEM2(IMM32,AM0), DN1}},
 { "mov",        0xfc100000,  0xfff00000,  0,    FMT_D4, 0,      {DM1, MEM2(IMM32,AN0)}},
 { "mov",        0xfc200000,  0xfff00000,  0,    FMT_D4, 0,      {MEM2(IMM32,AM0), AN1}},
 { "mov",        0xfc300000,  0xfff00000,  0,    FMT_D4, 0,      {AM1, MEM2(IMM32,AN0)}},
+{ "mov",        0xfc800000,  0xfff30000,  0,    FMT_D4, 0,      {AM1, MEM(IMM32_MEM)}},
+{ "mov",        0xfc810000,  0xfff30000,  0,    FMT_D4, 0,      {DM1, MEM(IMM32_MEM)}},
+{ "mov",        0xfc900000,  0xfff30000,  0,    FMT_D4, 0,      {AM1, MEM2(IMM32, SP)}},
+{ "mov",        0xfc910000,  0xfff30000,  0,    FMT_D4, 0,      {DM1, MEM2(IMM32, SP)}},
+{ "mov",        0xfca00000,  0xfffc0000,  0,    FMT_D4, 0,      {MEM(IMM32_MEM), AN0}},
+{ "mov",        0xfca40000,  0xfffc0000,  0,    FMT_D4, 0,      {MEM(IMM32_MEM), DN0}},
+{ "mov",        0xfcb00000,  0xfffc0000,  0,    FMT_D4, 0,      {MEM2(IMM32, SP), AN0}},
+{ "mov",        0xfcb40000,  0xfffc0000,  0,    FMT_D4, 0,      {MEM2(IMM32, SP), DN0}},
 { "mov",        0xfd0a0000,  0xffff0000,  0,    FMT_D8, AM33,   {MEM2(SD24, RM0), RN2}},
 { "mov",        0xfd1a0000,  0xffff0000,  0,    FMT_D8, AM33,   {RM2, MEM2(SD24, RN0)}},
 { "mov",        0xfd6a0000,  0xffff0000,  0x22, FMT_D8, AM33,   {MEMINC2 (RM0, IMM24), RN2}},
 { "mov",        0xfd7a0000,  0xffff0000,  0,    FMT_D8, AM33,   {RM2, MEMINC2 (RN0, IMM24)}},
+{ "mov",        0xfd8a0000,  0xffff0f00,  0,    FMT_D8, AM33,   {MEM2(IMM24, SP), RN2}},
+{ "mov",        0xfd9a0000,  0xffff0f00,  0,    FMT_D8, AM33,   {RM2, MEM2(IMM24, SP)}},
 { "mov",        0xfe0a0000,  0xffff0000,  0,    FMT_D9, AM33,   {MEM2(IMM32_HIGH8,RM0), RN2}},
+{ "mov",        0xfe0a0000,  0xffff0000,  0,    FMT_D9, AM33,   {MEM2(IMM32_HIGH8,RM0), RN2}},
+{ "mov",        0xfe0e0000,  0xffff0f00,  0,    FMT_D9, AM33,   {MEM(IMM32_HIGH8_MEM), RN2}},
+{ "mov",        0xfe1a0000,  0xffff0000,  0,    FMT_D9, AM33,   {RM2, MEM2(IMM32_HIGH8, RN0)}},
 { "mov",        0xfe1a0000,  0xffff0000,  0,    FMT_D9, AM33,   {RM2, MEM2(IMM32_HIGH8, RN0)}},
+{ "mov",        0xfe1e0000,  0xffff0f00,  0,    FMT_D9, AM33,   {RM2, MEM(IMM32_HIGH8_MEM)}},
 { "mov",        0xfe6a0000,  0xffff0000,  0x22, FMT_D9, AM33,   {MEMINC2 (RM0, IMM32_HIGH8), RN2}},
 { "mov",        0xfe7a0000,  0xffff0000,  0,    FMT_D9, AM33,   {RN2, MEMINC2 (RM0, IMM32_HIGH8)}},
+{ "mov",        0xfe8a0000,  0xffff0f00,  0,    FMT_D9, AM33,   {MEM2(IMM32_HIGH8, SP), RN2}},
+{ "mov",        0xfe9a0000,  0xffff0f00,  0,    FMT_D9, AM33,   {RM2, MEM2(IMM32_HIGH8, SP)}},
 
 { "movhu",      0xf060,      0xfff0,      0,    FMT_D0, 0,      {MEM(AM0), DN1}},
 { "movhu",      0xf070,      0xfff0,      0,    FMT_D0, 0,      {DM1, MEM(AN0)}},
@@ -232,29 +259,58 @@ static const struct mn10300_opcode mn10300_opcodes[] = {
 { "movhu",      0xf4c0,      0xffc0,      0,    FMT_D0, 0,      {DM2, MEM2(DI, AN0)}},
 { "movhu",      0xf86000,    0xfff000,    0,    FMT_D1, 0,      {MEM2(SD8, AM0), DN1}},
 { "movhu",      0xf87000,    0xfff000,    0,    FMT_D1, 0,      {DM1, MEM2(SD8, AN0)}},
+{ "movhu",      0xf89300,    0xfff300,    0,    FMT_D1, 0,      {DM1, MEM2(IMM8, SP)}},
+{ "movhu",      0xf8bc00,    0xfffc00,    0,    FMT_D1, 0,      {MEM2(IMM8, SP), DN0}},
 { "movhu",      0xf94a00,    0xffff00,    0,    FMT_D6, AM33,   {MEM(RM0), RN2}},
 { "movhu",      0xf95a00,    0xffff00,    0,    FMT_D6, AM33,   {RM2, MEM(RN0)}},
 { "movhu",      0xf9ea00,    0xffff00,    0x12, FMT_D6, AM33,   {MEMINC(RM0), RN2}},
 { "movhu",      0xf9fa00,    0xffff00,    0,    FMT_D6, AM33,   {RM2, MEMINC(RN0)}},
 { "movhu",      0xfa600000,  0xfff00000,  0,    FMT_D2, 0,      {MEM2(SD16, AM0), DN1}},
 { "movhu",      0xfa700000,  0xfff00000,  0,    FMT_D2, 0,      {DM1, MEM2(SD16, AN0)}},
+{ "movhu",      0xfa930000,  0xfff30000,  0,    FMT_D2, 0,      {DM1, MEM2(IMM16, SP)}},
+{ "movhu",      0xfabc0000,  0xfffc0000,  0,    FMT_D2, 0,      {MEM2(IMM16, SP), DN0}},
 { "movhu",      0xfb4a0000,  0xffff0000,  0,    FMT_D7, AM33,   {MEM2(SD8, RM0), RN2}},
 { "movhu",      0xfb5a0000,  0xffff0000,  0,    FMT_D7, AM33,   {RM2, MEM2(SD8, RN0)}},
+{ "movhu",      0xfbca0000,  0xffff0f00,  0,    FMT_D7, AM33,   {MEM2(IMM8, SP), RN2}},
 { "movhu",      0xfbce0000,  0xffff000f,  0,    FMT_D7, AM33,   {MEM2(RI, RM0), RD2}},
+{ "movhu",      0xfbda0000,  0xffff0f00,  0,    FMT_D7, AM33,   {RM2, MEM2(IMM8, SP)}},
 { "movhu",      0xfbde0000,  0xffff000f,  0,    FMT_D7, AM33,   {RD2, MEM2(RI, RN0)}},
 { "movhu",      0xfbea0000,  0xffff0000,  0x22, FMT_D7, AM33,   {MEMINC2 (RM0, SIMM8), RN2}},
 { "movhu",      0xfbfa0000,  0xffff0000,  0,    FMT_D7, AM33,   {RM2, MEMINC2 (RN0, SIMM8)}},
 { "movhu",      0xfc600000,  0xfff00000,  0,    FMT_D4, 0,      {MEM2(IMM32,AM0), DN1}},
 { "movhu",      0xfc700000,  0xfff00000,  0,    FMT_D4, 0,      {DM1, MEM2(IMM32,AN0)}},
+{ "movhu",      0xfc830000,  0xfff30000,  0,    FMT_D4, 0,      {DM1, MEM(IMM32_MEM)}},
+{ "movhu",      0xfc930000,  0xfff30000,  0,    FMT_D4, 0,      {DM1, MEM2(IMM32, SP)}},
+{ "movhu",      0xfcac0000,  0xfffc0000,  0,    FMT_D4, 0,      {MEM(IMM32_MEM), DN0}},
+{ "movhu",      0xfcbc0000,  0xfffc0000,  0,    FMT_D4, 0,      {MEM2(IMM32, SP), DN0}},
 { "movhu",      0xfd4a0000,  0xffff0000,  0,    FMT_D8, AM33,   {MEM2(SD24, RM0), RN2}},
 { "movhu",      0xfd5a0000,  0xffff0000,  0,    FMT_D8, AM33,   {RM2, MEM2(SD24, RN0)}},
+{ "movhu",      0xfdca0000,  0xffff0f00,  0,    FMT_D8, AM33,   {MEM2(IMM24, SP), RN2}},
+{ "movhu",      0xfdda0000,  0xffff0f00,  0,    FMT_D8, AM33,   {RM2, MEM2(IMM24, SP)}},
 { "movhu",      0xfdea0000,  0xffff0000,  0x22, FMT_D8, AM33,   {MEMINC2 (RM0, IMM24), RN2}},
 { "movhu",      0xfdfa0000,  0xffff0000,  0,    FMT_D8, AM33,   {RM2, MEMINC2 (RN0, IMM24)}},
 { "movhu",      0xfe4a0000,  0xffff0000,  0,    FMT_D9, AM33,   {MEM2(IMM32_HIGH8,RM0), RN2}},
+{ "movhu",      0xfe4e0000,  0xffff0f00,  0,    FMT_D9, AM33,   {MEM(IMM32_HIGH8_MEM), RN2}},
 { "movhu",      0xfe5a0000,  0xffff0000,  0,    FMT_D9, AM33,   {RM2, MEM2(IMM32_HIGH8, RN0)}},
+{ "movhu",      0xfe5e0000,  0xffff0f00,  0,    FMT_D9, AM33,   {RM2, MEM(IMM32_HIGH8_MEM)}},
+{ "movhu",      0xfeca0000,  0xffff0f00,  0,    FMT_D9, AM33,   {MEM2(IMM32_HIGH8, SP), RN2}},
+{ "movhu",      0xfeda0000,  0xffff0f00,  0,    FMT_D9, AM33,   {RM2, MEM2(IMM32_HIGH8, SP)}},
 { "movhu",      0xfeea0000,  0xffff0000,  0x22, FMT_D9, AM33,   {MEMINC2 (RM0, IMM32_HIGH8), RN2}},
 { "movhu",      0xfefa0000,  0xffff0000,  0,    FMT_D9, AM33,   {RN2, MEMINC2 (RM0, IMM32_HIGH8)}},
-{ 0, 0, 0, 0, 0, 0, {0}},
+
+{ "mov_llt",    0xf7e00000,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lgt",    0xf7e00001,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lge",    0xf7e00002,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lle",    0xf7e00003,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lcs",    0xf7e00004,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lhi",    0xf7e00005,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lcc",    0xf7e00006,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lls",    0xf7e00007,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_leq",    0xf7e00008,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lne",    0xf7e00009,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+{ "mov_lra",    0xf7e0000a,  0xffff000f,  0x22, FMT_D10, AM33,   {MEMINC2 (RN4,SIMM4_2), RM6}},
+
+{ "", 0, 0, 0, 0, 0, {0}},
 };
 
 /*
@@ -265,18 +321,21 @@ asmlinkage void misalignment(struct pt_regs *regs, enum exception_code code)
         const struct exception_table_entry *fixup;
         const struct mn10300_opcode *pop;
         unsigned long *registers = (unsigned long *) regs;
-        unsigned long data, *store, *postinc;
+        unsigned long data, *store, *postinc, disp, inc, sp;
         mm_segment_t seg;
         siginfo_t info;
-        uint32_t opcode, disp, noc, xo, xm;
-        uint8_t *pc, byte;
+        uint32_t opcode, noc, xo, xm;
+        uint8_t *pc, byte, datasz;
         void *address;
-        unsigned tmp, npop;
+        unsigned tmp, npop, dispsz, loop;
+
+        /* we don't fix up userspace misalignment faults */
+        if (user_mode(regs))
+                goto bus_error;
 
-        kdebug("MISALIGN at %lx\n", regs->pc);
+        sp = (unsigned long) regs + sizeof(*regs);
 
-        if (in_interrupt())
-                die("Misalignment trap in interrupt context", regs, code);
+        kdebug("==>misalignment({pc=%lx,sp=%lx})", regs->pc, sp);
 
         if (regs->epsw & EPSW_IE)
                 asm volatile("or %0,epsw" : : "i"(EPSW_IE));
@@ -294,8 +353,8 @@ asmlinkage void misalignment(struct pt_regs *regs, enum exception_code code)
         opcode = byte;
         noc = 8;
 
-        for (pop = mn10300_opcodes; pop->name; pop++) {
-                npop = log2(pop->opcode | pop->opmask);
+        for (pop = mn10300_opcodes; pop->name[0]; pop++) {
+                npop = ilog2(pop->opcode | pop->opmask);
                 if (npop <= 0 || npop > 31)
                         continue;
                 npop = (npop + 8) & ~7;
@@ -328,15 +387,15 @@ asmlinkage void misalignment(struct pt_regs *regs, enum exception_code code)
         }
 
         /* didn't manage to find a fixup */
-        if (!user_mode(regs))
-                printk(KERN_CRIT "MISALIGN: %lx: unsupported instruction %x\n",
-                       regs->pc, opcode);
+        printk(KERN_CRIT "MISALIGN: %lx: unsupported instruction %x\n",
+               regs->pc, opcode);
 
 failed:
         set_fs(seg);
         if (die_if_no_fixup("misalignment error", regs, code))
                 return;
 
+bus_error:
         info.si_signo   = SIGBUS;
         info.si_errno   = 0;
         info.si_code    = BUS_ADRALN;
@@ -346,31 +405,27 @@ failed:
 
         /* error reading opcodes */
 fetch_error:
-        if (!user_mode(regs))
-                printk(KERN_CRIT
-                       "MISALIGN: %p: fault whilst reading instruction data\n",
-                       pc);
+        printk(KERN_CRIT
+               "MISALIGN: %p: fault whilst reading instruction data\n",
+               pc);
         goto failed;
 
 bad_addr_mode:
-        if (!user_mode(regs))
-                printk(KERN_CRIT
-                       "MISALIGN: %lx: unsupported addressing mode %x\n",
-                       regs->pc, opcode);
+        printk(KERN_CRIT
+               "MISALIGN: %lx: unsupported addressing mode %x\n",
+               regs->pc, opcode);
         goto failed;
 
 bad_reg_mode:
-        if (!user_mode(regs))
-                printk(KERN_CRIT
-                       "MISALIGN: %lx: unsupported register mode %x\n",
-                       regs->pc, opcode);
+        printk(KERN_CRIT
+               "MISALIGN: %lx: unsupported register mode %x\n",
+               regs->pc, opcode);
         goto failed;
 
 unsupported_instruction:
-        if (!user_mode(regs))
-                printk(KERN_CRIT
-                       "MISALIGN: %lx: unsupported instruction %x (%s)\n",
-                       regs->pc, opcode, pop->name);
+        printk(KERN_CRIT
+               "MISALIGN: %lx: unsupported instruction %x (%s)\n",
+               regs->pc, opcode, pop->name);
         goto failed;
 
 transfer_failed:
@@ -391,7 +446,7 @@ transfer_failed:
 
         /* we matched the opcode */
 found_opcode:
-        kdebug("MISALIGN: %lx: %x==%x { %x, %x }\n",
+        kdebug("%lx: %x==%x { %x, %x }",
                regs->pc, opcode, pop->opcode, pop->params[0], pop->params[1]);
 
         tmp = format_tbl[pop->format].opsz;
@@ -406,106 +461,108 @@ found_opcode:
 
         /* grab the extra displacement (note it's LSB first) */
         disp = 0;
-        tmp = format_tbl[pop->format].dispsz >> 3;
-        while (tmp > 0) {
-                tmp--;
-                disp <<= 8;
-
+        dispsz = format_tbl[pop->format].dispsz;
+        for (loop = 0; loop < dispsz; loop += 8) {
                 pc++;
                 if (__get_user(byte, pc) != 0)
                         goto fetch_error;
-                disp |= byte;
+                disp |= byte << loop;
+                kdebug("{%p} disp[%02x]=%02x", pc, loop, byte);
         }
 
+        kdebug("disp=%lx", disp);
+
         set_fs(KERNEL_XDS);
-        if (fixup || regs->epsw & EPSW_nSL)
+        if (fixup)
                 set_fs(seg);
 
         tmp = (pop->params[0] ^ pop->params[1]) & 0x80000000;
         if (!tmp) {
-                if (!user_mode(regs))
-                        printk(KERN_CRIT
-                               "MISALIGN: %lx:"
-                               " insn not move to/from memory %x\n",
-                               regs->pc, opcode);
+                printk(KERN_CRIT
+                       "MISALIGN: %lx: insn not move to/from memory %x\n",
+                       regs->pc, opcode);
                 goto failed;
         }
 
+        /* determine the data transfer size of the move */
+        if (pop->name[3] == 0 || /* "mov" */
+            pop->name[4] == 'l') /* mov_lcc */
+                inc = datasz = 4;
+        else if (pop->name[3] == 'h') /* movhu */
+                inc = datasz = 2;
+        else
+                goto unsupported_instruction;
+
         if (pop->params[0] & 0x80000000) {
                 /* move memory to register */
-                if (!misalignment_addr(registers, pop->params[0], opcode, disp,
-                                       &address, &postinc))
+                if (!misalignment_addr(registers, sp,
+                                       pop->params[0], opcode, disp,
+                                       &address, &postinc, &inc))
                         goto bad_addr_mode;
 
                 if (!misalignment_reg(registers, pop->params[1], opcode, disp,
                                       &store))
                         goto bad_reg_mode;
 
-                if (strcmp(pop->name, "mov") == 0) {
-                        kdebug("FIXUP: mov (%p),DARn\n", address);
-                        if (copy_from_user(&data, (void *) address, 4) != 0)
-                                goto transfer_failed;
-                        if (pop->params[0] & 0x1000000)
-                                *postinc += 4;
-                } else if (strcmp(pop->name, "movhu") == 0) {
-                        kdebug("FIXUP: movhu (%p),DARn\n", address);
-                        data = 0;
-                        if (copy_from_user(&data, (void *) address, 2) != 0)
-                                goto transfer_failed;
-                        if (pop->params[0] & 0x1000000)
-                                *postinc += 2;
-                } else {
-                        goto unsupported_instruction;
+                kdebug("mov%u (%p),DARn", datasz, address);
+                if (copy_from_user(&data, (void *) address, datasz) != 0)
+                        goto transfer_failed;
+                if (pop->params[0] & 0x1000000) {
+                        kdebug("inc=%lx", inc);
+                        *postinc += inc;
                 }
 
                 *store = data;
+                kdebug("loaded %lx", data);
         } else {
                 /* move register to memory */
                 if (!misalignment_reg(registers, pop->params[0], opcode, disp,
                                       &store))
                         goto bad_reg_mode;
 
-                if (!misalignment_addr(registers, pop->params[1], opcode, disp,
-                                       &address, &postinc))
+                if (!misalignment_addr(registers, sp,
+                                       pop->params[1], opcode, disp,
+                                       &address, &postinc, &inc))
                         goto bad_addr_mode;
 
                 data = *store;
 
-                if (strcmp(pop->name, "mov") == 0) {
-                        kdebug("FIXUP: mov %lx,(%p)\n", data, address);
-                        if (copy_to_user((void *) address, &data, 4) != 0)
-                                goto transfer_failed;
-                        if (pop->params[1] & 0x1000000)
-                                *postinc += 4;
-                } else if (strcmp(pop->name, "movhu") == 0) {
-                        kdebug("FIXUP: movhu %hx,(%p)\n",
-                               (uint16_t) data, address);
-                        if (copy_to_user((void *) address, &data, 2) != 0)
-                                goto transfer_failed;
-                        if (pop->params[1] & 0x1000000)
-                                *postinc += 2;
-                } else {
-                        goto unsupported_instruction;
-                }
+                kdebug("mov%u %lx,(%p)", datasz, data, address);
+                if (copy_to_user((void *) address, &data, datasz) != 0)
+                        goto transfer_failed;
+                if (pop->params[1] & 0x1000000)
+                        *postinc += inc;
         }
 
         tmp = format_tbl[pop->format].opsz + format_tbl[pop->format].dispsz;
         regs->pc += tmp >> 3;
 
+        /* handle MOV_Lcc, which are currently the only FMT_D10 insns that
+         * access memory */
+        if (pop->format == FMT_D10)
+                misalignment_MOV_Lcc(regs, opcode);
+
         set_fs(seg);
-        return;
 }
 
 /*
  * determine the address that was being accessed
  */
-static int misalignment_addr(unsigned long *registers, unsigned params,
-                             unsigned opcode, unsigned disp,
-                             void **_address, unsigned long **_postinc)
+static int misalignment_addr(unsigned long *registers, unsigned long sp,
+                             unsigned params, unsigned opcode,
+                             unsigned long disp,
+                             void **_address, unsigned long **_postinc,
+                             unsigned long *_inc)
 {
         unsigned long *postinc = NULL, address = 0, tmp;
 
-        params &= 0x7fffffff;
+        if (!(params & 0x1000000)) {
+                kdebug("noinc");
+                *_inc = 0;
+                _inc = NULL;
+        }
+
+        params &= 0x00ffffff;
 
         do {
                 switch (params & 0xff) {
@@ -514,11 +571,11 @@ static int misalignment_addr(unsigned long *registers, unsigned params,
                         address += *postinc;
                         break;
                 case DM1:
-                        postinc = &registers[Dreg_index[opcode >> 2 & 0x0c]];
+                        postinc = &registers[Dreg_index[opcode >> 2 & 0x03]];
                         address += *postinc;
                         break;
                 case DM2:
-                        postinc = &registers[Dreg_index[opcode >> 4 & 0x30]];
+                        postinc = &registers[Dreg_index[opcode >> 4 & 0x03]];
                         address += *postinc;
                         break;
                 case AM0:
@@ -526,11 +583,11 @@ static int misalignment_addr(unsigned long *registers, unsigned params,
                         address += *postinc;
                         break;
                 case AM1:
-                        postinc = &registers[Areg_index[opcode >> 2 & 0x0c]];
+                        postinc = &registers[Areg_index[opcode >> 2 & 0x03]];
                         address += *postinc;
                         break;
                 case AM2:
-                        postinc = &registers[Areg_index[opcode >> 4 & 0x30]];
+                        postinc = &registers[Areg_index[opcode >> 4 & 0x03]];
                         address += *postinc;
                         break;
                 case RM0:
@@ -561,33 +618,53 @@ static int misalignment_addr(unsigned long *registers, unsigned params,
                         postinc = &registers[Rreg_index[disp >> 4 & 0x0f]];
                         address += *postinc;
                         break;
+                case SP:
+                        address += sp;
+                        break;
 
+                        /* displacements are either to be added to the address
+                         * before use, or, in the case of post-inc addressing,
+                         * to be added into the base register after use */
                 case SD8:
                 case SIMM8:
-                        address += (int32_t) (int8_t) (disp & 0xff);
-                        break;
+                        disp = (long) (int8_t) (disp & 0xff);
+                        goto displace_or_inc;
                 case SD16:
-                        address += (int32_t) (int16_t) (disp & 0xffff);
-                        break;
+                        disp = (long) (int16_t) (disp & 0xffff);
+                        goto displace_or_inc;
                 case SD24:
                         tmp = disp << 8;
                         asm("asr 8,%0" : "=r"(tmp) : "0"(tmp));
-                        address += tmp;
-                        break;
+                        disp = (long) tmp;
+                        goto displace_or_inc;
                 case SIMM4_2:
                         tmp = opcode >> 4 & 0x0f;
                         tmp <<= 28;
                         asm("asr 28,%0" : "=r"(tmp) : "0"(tmp));
-                        address += tmp;
-                        break;
+                        disp = (long) tmp;
+                        goto displace_or_inc;
+                case IMM8:
+                        disp &= 0x000000ff;
+                        goto displace_or_inc;
+                case IMM16:
+                        disp &= 0x0000ffff;
+                        goto displace_or_inc;
                 case IMM24:
-                        address += disp & 0x00ffffff;
-                        break;
+                        disp &= 0x00ffffff;
+                        goto displace_or_inc;
                 case IMM32:
+                case IMM32_MEM:
                 case IMM32_HIGH8:
-                        address += disp;
+                case IMM32_HIGH8_MEM:
+                displace_or_inc:
+                        kdebug("%s %lx", _inc ? "incr" : "disp", disp);
+                        if (!_inc)
+                                address += disp;
+                        else
+                                *_inc = disp;
                         break;
                 default:
+                        BUG();
                         return 0;
                 }
         } while ((params >>= 8));
@@ -601,7 +678,7 @@ static int misalignment_addr(unsigned long *registers, unsigned params,
  * determine the register that is acting as source/dest
  */
 static int misalignment_reg(unsigned long *registers, unsigned params,
-                            unsigned opcode, unsigned disp,
+                            unsigned opcode, unsigned long disp,
                             unsigned long **_register)
 {
         params &= 0x7fffffff;
@@ -654,8 +731,239 @@ static int misalignment_reg(unsigned long *registers, unsigned params,
                 break;
 
         default:
+                BUG();
                 return 0;
         }
 
         return 1;
 }
+
+/*
+ * handle the conditional loop part of the move-and-loop instructions
+ */
+static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode)
+{
+        unsigned long epsw = regs->epsw;
+        unsigned long NxorV;
+
+        kdebug("MOV_Lcc %x [flags=%lx]", opcode, epsw & 0xf);
+
+        /* calculate N^V and shift onto the same bit position as Z */
+        NxorV = ((epsw >> 3) ^ epsw >> 1) & 1;
+
+        switch (opcode & 0xf) {
+        case 0x0: /* MOV_LLT: N^V */
+                if (NxorV)
+                        goto take_the_loop;
+                return;
+        case 0x1: /* MOV_LGT: ~(Z or (N^V))*/
+                if (!((epsw & EPSW_FLAG_Z) | NxorV))
+                        goto take_the_loop;
+                return;
+        case 0x2: /* MOV_LGE: ~(N^V) */
+                if (!NxorV)
+                        goto take_the_loop;
+                return;
+        case 0x3: /* MOV_LLE: Z or (N^V) */
+                if ((epsw & EPSW_FLAG_Z) | NxorV)
+                        goto take_the_loop;
+                return;
+
+        case 0x4: /* MOV_LCS: C */
+                if (epsw & EPSW_FLAG_C)
+                        goto take_the_loop;
+                return;
+        case 0x5: /* MOV_LHI: ~(C or Z) */
+                if (!(epsw & (EPSW_FLAG_C | EPSW_FLAG_Z)))
+                        goto take_the_loop;
+                return;
+        case 0x6: /* MOV_LCC: ~C */
+                if (!(epsw & EPSW_FLAG_C))
+                        goto take_the_loop;
+                return;
+        case 0x7: /* MOV_LLS: C or Z */
+                if (epsw & (EPSW_FLAG_C | EPSW_FLAG_Z))
+                        goto take_the_loop;
+                return;
+
+        case 0x8: /* MOV_LEQ: Z */
+                if (epsw & EPSW_FLAG_Z)
+                        goto take_the_loop;
+                return;
+        case 0x9: /* MOV_LNE: ~Z */
+                if (!(epsw & EPSW_FLAG_Z))
+                        goto take_the_loop;
+                return;
+        case 0xa: /* MOV_LRA: always */
+                goto take_the_loop;
+
+        default:
+                BUG();
+        }
+
+take_the_loop:
+        /* wind the PC back to just after the SETLB insn */
+        kdebug("loop LAR=%lx", regs->lar);
+        regs->pc = regs->lar - 4;
+}
+
+/*
+ * misalignment handler tests
+ */
+#ifdef CONFIG_TEST_MISALIGNMENT_HANDLER
+static u8 __initdata testbuf[512] __attribute__((aligned(16))) = {
+        [257] = 0x11,
+        [258] = 0x22,
+        [259] = 0x33,
+        [260] = 0x44,
+};
+
+#define ASSERTCMP(X, OP, Y)                                             \
+do {                                                                    \
+        if (unlikely(!((X) OP (Y)))) {                                  \
+                printk(KERN_ERR "\n");                                  \
+                printk(KERN_ERR "MISALIGN: Assertion failed at line %u\n", \
+                       __LINE__);                                       \
+                printk(KERN_ERR "0x%lx " #OP " 0x%lx is false\n",       \
+                       (unsigned long)(X), (unsigned long)(Y));         \
+                BUG();                                                  \
+        }                                                               \
+} while(0)
+
+static int __init test_misalignment(void)
+{
+        register void *r asm("e0");
+        register u32 y asm("e1");
+        void *p = testbuf, *q;
+        u32 tmp, tmp2, x;
+
+        printk(KERN_NOTICE "==>test_misalignment() [testbuf=%p]\n", p);
+        p++;
+
+        printk(KERN_NOTICE "___ MOV (Am),Dn ___\n");
+        q = p + 256;
+        asm volatile("mov       (%0),%1" : "+a"(q), "=d"(x));
+        ASSERTCMP(q, ==, p + 256);
+        ASSERTCMP(x, ==, 0x44332211);
+
+        printk(KERN_NOTICE "___ MOV (256,Am),Dn ___\n");
+        q = p;
+        asm volatile("mov       (256,%0),%1" : "+a"(q), "=d"(x));
+        ASSERTCMP(q, ==, p);
+        ASSERTCMP(x, ==, 0x44332211);
+
+        printk(KERN_NOTICE "___ MOV (Di,Am),Dn ___\n");
+        tmp = 256;
+        q = p;
+        asm volatile("mov       (%2,%0),%1" : "+a"(q), "=d"(x), "+d"(tmp));
+        ASSERTCMP(q, ==, p);
+        ASSERTCMP(x, ==, 0x44332211);
+        ASSERTCMP(tmp, ==, 256);
+
+        printk(KERN_NOTICE "___ MOV (256,Rm),Rn ___\n");
+        r = p;
+        asm volatile("mov       (256,%0),%1" : "+r"(r), "=r"(y));
+        ASSERTCMP(r, ==, p);
+        ASSERTCMP(y, ==, 0x44332211);
+
+        printk(KERN_NOTICE "___ MOV (Rm+),Rn ___\n");
+        r = p + 256;
+        asm volatile("mov       (%0+),%1" : "+r"(r), "=r"(y));
+        ASSERTCMP(r, ==, p + 256 + 4);
+        ASSERTCMP(y, ==, 0x44332211);
+
+        printk(KERN_NOTICE "___ MOV (Rm+,8),Rn ___\n");
+        r = p + 256;
+        asm volatile("mov       (%0+,8),%1" : "+r"(r), "=r"(y));
+        ASSERTCMP(r, ==, p + 256 + 8);
+        ASSERTCMP(y, ==, 0x44332211);
+
+        printk(KERN_NOTICE "___ MOV (7,SP),Rn ___\n");
+        asm volatile(
+                "add    -16,sp          \n"
+                "mov    +0x11,%0        \n"
+                "movbu  %0,(7,sp)       \n"
+                "mov    +0x22,%0        \n"
+                "movbu  %0,(8,sp)       \n"
+                "mov    +0x33,%0        \n"
+                "movbu  %0,(9,sp)       \n"
+                "mov    +0x44,%0        \n"
+                "movbu  %0,(10,sp)      \n"
+                "mov    (7,sp),%1       \n"
+                "add    +16,sp          \n"
+                : "+a"(q), "=d"(x));
+        ASSERTCMP(x, ==, 0x44332211);
+
+        printk(KERN_NOTICE "___ MOV (259,SP),Rn ___\n");
+        asm volatile(
+                "add    -264,sp         \n"
+                "mov    +0x11,%0        \n"
+                "movbu  %0,(259,sp)     \n"
+                "mov    +0x22,%0        \n"
+                "movbu  %0,(260,sp)     \n"
+                "mov    +0x33,%0        \n"
+                "movbu  %0,(261,sp)     \n"
+                "mov    +0x55,%0        \n"
+                "movbu  %0,(262,sp)     \n"
+                "mov    (259,sp),%1     \n"
+                "add    +264,sp         \n"
+                : "+d"(tmp), "=d"(x));
+        ASSERTCMP(x, ==, 0x55332211);
+
+        printk(KERN_NOTICE "___ MOV (260,SP),Rn ___\n");
+        asm volatile(
+                "add    -264,sp         \n"
+                "mov    +0x11,%0        \n"
+                "movbu  %0,(260,sp)     \n"
+                "mov    +0x22,%0        \n"
+                "movbu  %0,(261,sp)     \n"
+                "mov    +0x33,%0        \n"
+                "movbu  %0,(262,sp)     \n"
+                "mov    +0x55,%0        \n"
+                "movbu  %0,(263,sp)     \n"
+                "mov    (260,sp),%1     \n"
+                "add    +264,sp         \n"
+                : "+d"(tmp), "=d"(x));
+        ASSERTCMP(x, ==, 0x55332211);
+
+
+        printk(KERN_NOTICE "___ MOV_LNE ___\n");
+        tmp = 1;
+        tmp2 = 2;
+        q = p + 256;
+        asm volatile(
+                "setlb                  \n"
+                "mov    %2,%3           \n"
+                "mov    %1,%2           \n"
+                "cmp    +0,%1           \n"
+                "mov_lne        (%0+,4),%1"
+                : "+r"(q), "+d"(tmp), "+d"(tmp2), "=d"(x)
+                :
+                : "cc");
+        ASSERTCMP(q, ==, p + 256 + 12);
+        ASSERTCMP(x, ==, 0x44332211);
+
+        printk(KERN_NOTICE "___ MOV in SETLB ___\n");
+        tmp = 1;
+        tmp2 = 2;
+        q = p + 256;
+        asm volatile(
+                "setlb                  \n"
+                "mov    %1,%3           \n"
+                "mov    (%0+),%1        \n"
+                "cmp    +0,%1           \n"
+                "lne                    "
+                : "+a"(q), "+d"(tmp), "+d"(tmp2), "=d"(x)
+                :
+                : "cc");
+
+        ASSERTCMP(q, ==, p + 256 + 8);
+        ASSERTCMP(x, ==, 0x44332211);
+
+        printk(KERN_NOTICE "<==test_misalignment()\n");
+        return 0;
+}
+
+arch_initcall(test_misalignment);
+
+#endif /* CONFIG_TEST_MISALIGNMENT_HANDLER */
diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h
index 398cdbaf4e54..409e698f4361 100644
--- a/arch/parisc/include/asm/smp.h
+++ b/arch/parisc/include/asm/smp.h
@@ -44,8 +44,6 @@ extern void arch_send_call_function_ipi(cpumask_t mask);
  
 #define PROC_CHANGE_PENALTY     15              /* Schedule penalty */
 
-extern unsigned long cpu_present_mask;
-
 #define raw_smp_processor_id()  (current_thread_info()->cpu)
 
 #else /* CONFIG_SMP */
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index ed500ef799b7..08844fc24a2e 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -61,22 +61,25 @@ STACK_SIZE  = 1 << STACK_SHIFT
 
 #ifdef CONFIG_TRACE_IRQFLAGS
         .macro  TRACE_IRQS_ON
-        l       %r1,BASED(.Ltrace_irq_on)
+        basr    %r2,%r0
+        l       %r1,BASED(.Ltrace_irq_on_caller)
         basr    %r14,%r1
         .endm
 
         .macro  TRACE_IRQS_OFF
-        l       %r1,BASED(.Ltrace_irq_off)
+        basr    %r2,%r0
+        l       %r1,BASED(.Ltrace_irq_off_caller)
         basr    %r14,%r1
         .endm
 
         .macro  TRACE_IRQS_CHECK
+        basr    %r2,%r0
         tm      SP_PSW(%r15),0x03       # irqs enabled?
         jz      0f
-        l       %r1,BASED(.Ltrace_irq_on)
+        l       %r1,BASED(.Ltrace_irq_on_caller)
         basr    %r14,%r1
         j       1f
-0:      l       %r1,BASED(.Ltrace_irq_off)
+0:      l       %r1,BASED(.Ltrace_irq_off_caller)
         basr    %r14,%r1
 1:
         .endm
@@ -1113,9 +1116,12 @@ cleanup_io_leave_insn:
 .Lschedtail:    .long   schedule_tail
 .Lsysc_table:   .long   sys_call_table
 #ifdef CONFIG_TRACE_IRQFLAGS
-.Ltrace_irq_on: .long   trace_hardirqs_on
-.Ltrace_irq_off:
-                .long   trace_hardirqs_off
+.Ltrace_irq_on_caller:
+                .long   trace_hardirqs_on_caller
+.Ltrace_irq_off_caller:
+                .long   trace_hardirqs_off_caller
+#endif
+#ifdef CONFIG_LOCKDEP
 .Llockdep_sys_exit:
                 .long   lockdep_sys_exit
 #endif
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index d7ce150453f2..41aca06682aa 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -61,19 +61,22 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
 
 #ifdef CONFIG_TRACE_IRQFLAGS
         .macro  TRACE_IRQS_ON
-         brasl  %r14,trace_hardirqs_on
+         basr   %r2,%r0
+         brasl  %r14,trace_hardirqs_on_caller
         .endm
 
         .macro  TRACE_IRQS_OFF
-         brasl  %r14,trace_hardirqs_off
+         basr   %r2,%r0
+         brasl  %r14,trace_hardirqs_off_caller
         .endm
 
         .macro TRACE_IRQS_CHECK
+        basr    %r2,%r0
         tm      SP_PSW(%r15),0x03       # irqs enabled?
         jz      0f
-        brasl   %r14,trace_hardirqs_on
+        brasl   %r14,trace_hardirqs_on_caller
         j       1f
-0:      brasl   %r14,trace_hardirqs_off
+0:      brasl   %r14,trace_hardirqs_off_caller
 1:
         .endm
 #else
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 3e2c05cb6a87..04f8c67a6101 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -136,9 +136,12 @@ static void default_idle(void)
                 return;
         }
         trace_hardirqs_on();
+        /* Don't trace preempt off for idle. */
+        stop_critical_timings();
         /* Wait for external, I/O or machine check interrupt. */
         __load_psw_mask(psw_kernel_bits | PSW_MASK_WAIT |
                         PSW_MASK_IO | PSW_MASK_EXT);
+        start_critical_timings();
 }
 
 void cpu_idle(void)
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 62122bad1e33..400b040df7fa 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -604,13 +604,13 @@ setup_memory(void)
                 if (memory_chunk[i].type != CHUNK_READ_WRITE)
                         continue;
                 start_chunk = PFN_DOWN(memory_chunk[i].addr);
-                end_chunk = start_chunk + PFN_DOWN(memory_chunk[i].size) - 1;
+                end_chunk = start_chunk + PFN_DOWN(memory_chunk[i].size);
                 end_chunk = min(end_chunk, end_pfn);
                 if (start_chunk >= end_chunk)
                         continue;
                 add_active_range(0, start_chunk, end_chunk);
                 pfn = max(start_chunk, start_pfn);
-                for (; pfn <= end_chunk; pfn++)
+                for (; pfn < end_chunk; pfn++)
                         page_set_storage_key(PFN_PHYS(pfn), PAGE_DEFAULT_KEY);
         }
 
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index 5fdb799062b7..4fe952e557ac 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -198,7 +198,7 @@ asmlinkage long s390x_newuname(struct new_utsname __user *name)
 {
         int ret = sys_newuname(name);
 
-        if (current->personality == PER_LINUX32 && !ret) {
+        if (personality(current->personality) == PER_LINUX32 && !ret) {
                 ret = copy_to_user(name->machine, "s390\0\0\0\0", 8);
                 if (ret) ret = -EFAULT;
         }
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 632b13e10053..a947899dcba1 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -65,18 +65,21 @@ static int machine_has_topology_irq;
 static struct timer_list topology_timer;
 static void set_topology_timer(void);
 static DECLARE_WORK(topology_work, topology_work_fn);
+/* topology_lock protects the core linked list */
+static DEFINE_SPINLOCK(topology_lock);
 
 cpumask_t cpu_core_map[NR_CPUS];
 
 cpumask_t cpu_coregroup_map(unsigned int cpu)
 {
         struct core_info *core = &core_info;
+        unsigned long flags;
         cpumask_t mask;
 
         cpus_clear(mask);
         if (!machine_has_topology)
                 return cpu_present_map;
-        mutex_lock(&smp_cpu_state_mutex);
+        spin_lock_irqsave(&topology_lock, flags);
         while (core) {
                 if (cpu_isset(cpu, core->mask)) {
                         mask = core->mask;
@@ -84,7 +87,7 @@ cpumask_t cpu_coregroup_map(unsigned int cpu)
                 }
                 core = core->next;
         }
-        mutex_unlock(&smp_cpu_state_mutex);
+        spin_unlock_irqrestore(&topology_lock, flags);
         if (cpus_empty(mask))
                 mask = cpumask_of_cpu(cpu);
         return mask;
@@ -133,7 +136,7 @@ static void tl_to_cores(struct tl_info *info)
         union tl_entry *tle, *end;
         struct core_info *core = &core_info;
 
-        mutex_lock(&smp_cpu_state_mutex);
+        spin_lock_irq(&topology_lock);
         clear_cores();
         tle = info->tle;
         end = (union tl_entry *)((unsigned long)info + info->length);
@@ -157,7 +160,7 @@ static void tl_to_cores(struct tl_info *info)
                 }
                 tle = next_tle(tle);
         }
-        mutex_unlock(&smp_cpu_state_mutex);
+        spin_unlock_irq(&topology_lock);
 }
 
 static void topology_update_polarization_simple(void)
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 436c28539577..65eaae34e753 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -293,6 +293,10 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
  */
 #define xlate_dev_kmem_ptr(p)   p
 
+#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
+int valid_phys_addr_range(unsigned long addr, size_t size);
+int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
+
 #endif /* __KERNEL__ */
 
 #endif /* __ASM_SH_IO_H */
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index 52220d70a096..b517ae08b9c0 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -148,6 +148,12 @@ extern void paging_init(void);
 extern void page_table_range_init(unsigned long start, unsigned long end,
                                   pgd_t *pgd);
 
+#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_CPU_SH4) && defined(CONFIG_MMU)
+extern void kmap_coherent_init(void);
+#else
+#define kmap_coherent_init()    do { } while (0)
+#endif
+
 #include <asm-generic/pgtable.h>
 
 #endif /* __ASM_SH_PGTABLE_H */
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index a7412cede534..6d9e6972cfc9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -119,17 +119,17 @@ static struct plat_sci_port sci_platform_data[] = {
         },{
                 .mapbase        = 0xa4e30000,
                 .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCI,
+                .type           = PORT_SCIFA,
                 .irqs           = { 56, 56, 56, 56 },
         },{
                 .mapbase        = 0xa4e40000,
                 .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCI,
+                .type           = PORT_SCIFA,
                 .irqs           = { 88, 88, 88, 88 },
         },{
                 .mapbase        = 0xa4e50000,
                 .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCI,
+                .type           = PORT_SCIFA,
                 .irqs           = { 109, 109, 109, 109 },
         }, {
                 .flags = 0,
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 6b7d166694e2..a952dcf9999d 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -75,6 +75,7 @@ static struct console bios_console = {
 #endif
 
 static struct uart_port scif_port = {
+        .type           = PORT_SCIF,
         .mapbase        = CONFIG_EARLY_SCIF_CONSOLE_PORT,
         .membase        = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT,
 };
@@ -84,9 +85,9 @@ static void scif_sercon_putc(int c)
         while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE))
                 ;
 
-        sci_out(&scif_port, SCxTDR, c);
         sci_in(&scif_port, SCxSR);
         sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
+        sci_out(&scif_port, SCxTDR, c);
 
         while ((sci_in(&scif_port, SCxSR) & 0x40) == 0)
                 ;
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index aaaf90d06b85..3c61ddd4d43e 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -120,7 +120,7 @@ static void tmu_set_mode(enum clock_event_mode mode,
 {
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
-                ctrl_outl(ctrl_inl(TMU0_TCNT), TMU0_TCOR);
+                ctrl_outl(tmu_latest_interval[TMU0], TMU0_TCOR);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 ctrl_outl(0, TMU0_TCOR);
diff --git a/arch/sh/lib/copy_page.S b/arch/sh/lib/copy_page.S
index 5d12e657be34..43de7e8e4e17 100644
--- a/arch/sh/lib/copy_page.S
+++ b/arch/sh/lib/copy_page.S
@@ -80,6 +80,11 @@ ENTRY(copy_page)
         .section __ex_table, "a";       \
         .long 9999b, 6000f      ;       \
         .previous
+#define EX_NO_POP(...)                  \
+        9999: __VA_ARGS__ ;             \
+        .section __ex_table, "a";       \
+        .long 9999b, 6005f      ;       \
+        .previous
 ENTRY(__copy_user)
         ! Check if small number of bytes
         mov     #11,r0
@@ -139,9 +144,9 @@ EX(	mov.b	r1,@r4		)
         bt      1f
 
 2:
-EX(     mov.b   @r5+,r0         )
+EX_NO_POP(      mov.b   @r5+,r0         )
         dt      r6
-EX(     mov.b   r0,@r4          )
+EX_NO_POP(      mov.b   r0,@r4          )
         bf/s    2b
          add    #1,r4
 
@@ -150,7 +155,7 @@ EX(	mov.b	r0,@r4		)
 
 # Exception handler:
 .section .fixup, "ax"
-6000:
+6005:
         mov.l   8000f,r1
         mov     r3,r0
         jmp     @r1
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32
index 70e0906023cc..f066e76da204 100644
--- a/arch/sh/mm/Makefile_32
+++ b/arch/sh/mm/Makefile_32
@@ -2,7 +2,7 @@
 # Makefile for the Linux SuperH-specific parts of the memory manager.
 #
 
-obj-y                   := init.o extable_32.o consistent.o
+obj-y                   := init.o extable_32.o consistent.o mmap.o
 
 ifndef CONFIG_CACHE_OFF
 cache-$(CONFIG_CPU_SH2)         := cache-sh2.o
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index 0d92a8a3ac9a..9481d0f54efd 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -2,7 +2,7 @@
 # Makefile for the Linux SuperH-specific parts of the memory manager.
 #
 
-obj-y                   := init.o consistent.o
+obj-y                   := init.o consistent.o mmap.o
 
 mmu-y                   := tlb-nommu.o pg-nommu.o extable_32.o
 mmu-$(CONFIG_MMU)       := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 4abf00031dae..6cbef8caeb56 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -137,6 +137,7 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
 void __init paging_init(void)
 {
         unsigned long max_zone_pfns[MAX_NR_ZONES];
+        unsigned long vaddr;
         int nid;
 
         /* We don't need to map the kernel through the TLB, as
@@ -148,10 +149,15 @@ void __init paging_init(void)
          * check for a null value. */
         set_TTB(swapper_pg_dir);
 
-        /* Populate the relevant portions of swapper_pg_dir so that
+        /*
+         * Populate the relevant portions of swapper_pg_dir so that
          * we can use the fixmap entries without calling kmalloc.
-         * pte's will be filled in by __set_fixmap(). */
-        page_table_range_init(FIXADDR_START, FIXADDR_TOP, swapper_pg_dir);
+         * pte's will be filled in by __set_fixmap().
+         */
+        vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
+        page_table_range_init(vaddr, 0, swapper_pg_dir);
+
+        kmap_coherent_init();
 
         memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
 
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
new file mode 100644
index 000000000000..8837d511710a
--- /dev/null
+++ b/arch/sh/mm/mmap.c
@@ -0,0 +1,31 @@
+/*
+ * arch/sh/mm/mmap.c
+ *
+ * Copyright (C) 2008  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <asm/page.h>
+
+/*
+ * You really shouldn't be using read() or write() on /dev/mem.  This
+ * might go away in the future.
+ */
+int valid_phys_addr_range(unsigned long addr, size_t count)
+{
+        if (addr < __MEMORY_START)
+                return 0;
+        if (addr + count > __pa(high_memory))
+                return 0;
+
+        return 1;
+}
+
+int valid_mmap_phys_addr_range(unsigned long pfn, size_t size)
+{
+        return 1;
+}
diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c
index 38870e0fc182..2fe14da1f839 100644
--- a/arch/sh/mm/pg-sh4.c
+++ b/arch/sh/mm/pg-sh4.c
@@ -7,6 +7,7 @@
  * Released under the terms of the GNU GPL v2.0.
  */
 #include <linux/mm.h>
+#include <linux/init.h>
 #include <linux/mutex.h>
 #include <linux/fs.h>
 #include <linux/highmem.h>
@@ -16,6 +17,20 @@
 
 #define CACHE_ALIAS (current_cpu_data.dcache.alias_mask)
 
+#define kmap_get_fixmap_pte(vaddr)                                     \
+        pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
+
+static pte_t *kmap_coherent_pte;
+
+void __init kmap_coherent_init(void)
+{
+        unsigned long vaddr;
+
+        /* cache the first coherent kmap pte */
+        vaddr = __fix_to_virt(FIX_CMAP_BEGIN);
+        kmap_coherent_pte = kmap_get_fixmap_pte(vaddr);
+}
+
 static inline void *kmap_coherent(struct page *page, unsigned long addr)
 {
         enum fixed_addresses idx;
@@ -34,6 +49,8 @@ static inline void *kmap_coherent(struct page *page, unsigned long addr)
 
         update_mmu_cache(NULL, vaddr, pte);
 
+        set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte);
+
         return (void *)vaddr;
 }
 
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 93224b569187..3cf457f90e8e 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -167,9 +167,12 @@ config GENERIC_PENDING_IRQ
 config X86_SMP
         bool
         depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)
-        select USE_GENERIC_SMP_HELPERS
         default y
 
+config USE_GENERIC_SMP_HELPERS
+        def_bool y
+        depends on SMP
+
 config X86_32_SMP
         def_bool y
         depends on X86_32 && SMP
@@ -239,21 +242,13 @@ config X86_FIND_SMP_CONFIG
         def_bool y
         depends on X86_MPPARSE || X86_VOYAGER
 
-if ACPI
 config X86_MPPARSE
-        def_bool y
-        bool "Enable MPS table"
+        bool "Enable MPS table" if ACPI
+        default y
         depends on X86_LOCAL_APIC
         help
           For old smp systems that do not have proper acpi support. Newer systems
           (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
-endif
-
-if !ACPI
-config X86_MPPARSE
-        def_bool y
-        depends on X86_LOCAL_APIC
-endif
 
 choice
         prompt "Subarchitecture Type"
diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c
index 4bc02b23674b..e82ebd652263 100644
--- a/arch/x86/ia32/ia32_signal.c
+++ b/arch/x86/ia32/ia32_signal.c
@@ -572,11 +572,6 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         regs->dx = (unsigned long) &frame->info;
         regs->cx = (unsigned long) &frame->uc;
 
-        /* Make -mregparm=3 work */
-        regs->ax = sig;
-        regs->dx = (unsigned long) &frame->info;
-        regs->cx = (unsigned long) &frame->uc;
-
         loadsegment(ds, __USER32_DS);
         loadsegment(es, __USER32_DS);
 
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 8d676d8ecde9..9830681446ad 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -113,7 +113,6 @@ static inline void acpi_disable_pci(void)
         acpi_pci_disabled = 1;
         acpi_noirq_set();
 }
-extern int acpi_irq_balance_set(char *str);
 
 /* routines for saving/restoring kernel state */
 extern int acpi_save_state_mem(void);
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 360010322711..9fa9dcdf344b 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -168,7 +168,15 @@ static inline void __change_bit(int nr, volatile unsigned long *addr)
  */
 static inline void change_bit(int nr, volatile unsigned long *addr)
 {
-        asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
+        if (IS_IMMEDIATE(nr)) {
+                asm volatile(LOCK_PREFIX "xorb %1,%0"
+                        : CONST_MASK_ADDR(nr, addr)
+                        : "iq" ((u8)CONST_MASK(nr)));
+        } else {
+                asm volatile(LOCK_PREFIX "btc %1,%0"
+                        : BITOP_ADDR(addr)
+                        : "Ir" (nr));
+        }
 }
 
 /**
diff --git a/arch/x86/include/asm/byteorder.h b/arch/x86/include/asm/byteorder.h
index e02ae2d89acf..f110ad417df3 100644
--- a/arch/x86/include/asm/byteorder.h
+++ b/arch/x86/include/asm/byteorder.h
@@ -4,26 +4,33 @@
 #include <asm/types.h>
 #include <linux/compiler.h>
 
-#ifdef __GNUC__
+#define __LITTLE_ENDIAN
 
-#ifdef __i386__
-
-static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
+static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
 {
-#ifdef CONFIG_X86_BSWAP
-        asm("bswap %0" : "=r" (x) : "0" (x));
-#else
+#ifdef __i386__
+# ifdef CONFIG_X86_BSWAP
+        asm("bswap %0" : "=r" (val) : "0" (val));
+# else
         asm("xchgb %b0,%h0\n\t" /* swap lower bytes     */
             "rorl $16,%0\n\t"   /* swap words           */
             "xchgb %b0,%h0"     /* swap higher bytes    */
-            : "=q" (x)
-            : "0" (x));
+            : "=q" (val)
+            : "0" (val));
+# endif
+
+#else /* __i386__ */
+        asm("bswapl %0"
+            : "=r" (val)
+            : "0" (val));
 #endif
-        return x;
+        return val;
 }
+#define __arch_swab32 __arch_swab32
 
-static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
+static inline __attribute_const__ __u64 __arch_swab64(__u64 val)
 {
+#ifdef __i386__
         union {
                 struct {
                         __u32 a;
@@ -32,50 +39,27 @@ static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
                 __u64 u;
         } v;
         v.u = val;
-#ifdef CONFIG_X86_BSWAP
+# ifdef CONFIG_X86_BSWAP
         asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
             : "=r" (v.s.a), "=r" (v.s.b)
             : "0" (v.s.a), "1" (v.s.b));
-#else
-        v.s.a = ___arch__swab32(v.s.a);
-        v.s.b = ___arch__swab32(v.s.b);
+# else
+        v.s.a = __arch_swab32(v.s.a);
+        v.s.b = __arch_swab32(v.s.b);
         asm("xchgl %0,%1"
             : "=r" (v.s.a), "=r" (v.s.b)
             : "0" (v.s.a), "1" (v.s.b));
-#endif
+# endif
         return v.u;
-}
-
 #else /* __i386__ */
-
-static inline __attribute_const__ __u64 ___arch__swab64(__u64 x)
-{
         asm("bswapq %0"
-            : "=r" (x)
-            : "0" (x));
-        return x;
-}
-
-static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
-{
-        asm("bswapl %0"
-            : "=r" (x)
-            : "0" (x));
-        return x;
-}
-
+            : "=r" (val)
+            : "0" (val));
+        return val;
 #endif
+}
+#define __arch_swab64 __arch_swab64
 
-/* Do not define swab16.  Gcc is smart enough to recognize "C" version and
-   convert it into rotation or exhange.  */
-
-#define __arch__swab64(x) ___arch__swab64(x)
-#define __arch__swab32(x) ___arch__swab32(x)
-
-#define __BYTEORDER_HAS_U64__
-
-#endif /* __GNUC__ */
-
-#include <linux/byteorder/little_endian.h>
+#include <linux/byteorder.h>
 
 #endif /* _ASM_X86_BYTEORDER_H */
diff --git a/arch/x86/include/asm/iomap.h b/arch/x86/include/asm/iomap.h
new file mode 100644
index 000000000000..c1f06289b14b
--- /dev/null
+++ b/arch/x86/include/asm/iomap.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright © 2008 Ingo Molnar
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ */
+
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/uaccess.h>
+#include <asm/cacheflush.h>
+#include <asm/pgtable.h>
+#include <asm/tlbflush.h>
+
+void *
+iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
+
+void
+iounmap_atomic(void *kvaddr, enum km_type type);
diff --git a/arch/x86/include/asm/iommu.h b/arch/x86/include/asm/iommu.h
index e4a552d44465..0b500c5b6446 100644
--- a/arch/x86/include/asm/iommu.h
+++ b/arch/x86/include/asm/iommu.h
@@ -6,7 +6,6 @@ extern void no_iommu_init(void);
 extern struct dma_mapping_ops nommu_dma_ops;
 extern int force_iommu, no_iommu;
 extern int iommu_detected;
-extern int dmar_disabled;
 
 extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len);
 
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index bae0eda95486..28e409fc73f3 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -31,10 +31,6 @@ static inline int irq_canonicalize(int irq)
 # endif
 #endif
 
-#ifdef CONFIG_IRQBALANCE
-extern int irqbalance_disable(char *str);
-#endif
-
 #ifdef CONFIG_HOTPLUG_CPU
 #include <linux/cpumask.h>
 extern void fixup_irqs(cpumask_t map);
diff --git a/arch/x86/include/asm/irq_regs_32.h b/arch/x86/include/asm/irq_regs_32.h
index af2f02d27fc7..86afd7473457 100644
--- a/arch/x86/include/asm/irq_regs_32.h
+++ b/arch/x86/include/asm/irq_regs_32.h
@@ -9,6 +9,8 @@
 
 #include <asm/percpu.h>
 
+#define ARCH_HAS_OWN_IRQ_REGS
+
 DECLARE_PER_CPU(struct pt_regs *, irq_regs);
 
 static inline struct pt_regs *get_irq_regs(void)
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 9cd83a8e40d5..38ae163cc91b 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -34,8 +34,6 @@ static inline cycles_t get_cycles(void)
 
 static __always_inline cycles_t vget_cycles(void)
 {
-        cycles_t cycles;
-
         /*
          * We only do VDSOs on TSC capable CPUs, so this shouldnt
          * access boot_cpu_data (which is not VDSO-safe):
@@ -44,11 +42,7 @@ static __always_inline cycles_t vget_cycles(void)
         if (!cpu_has_tsc)
                 return 0;
 #endif
-        rdtsc_barrier();
-        cycles = (cycles_t)__native_read_tsc();
-        rdtsc_barrier();
-
-        return cycles;
+        return (cycles_t)__native_read_tsc();
 }
 
 extern void tsc_init(void);
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 8c1f76abae9e..4c51a2f8fd31 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -1343,7 +1343,6 @@ static void __init acpi_process_madt(void)
                         error = acpi_parse_madt_ioapic_entries();
                         if (!error) {
                                 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
-                                acpi_irq_balance_set(NULL);
                                 acpi_ioapic = 1;
 
                                 smp_found_config = 1;
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c
index 2b69994fd3a8..d1a121443bde 100644
--- a/arch/x86/kernel/ds.c
+++ b/arch/x86/kernel/ds.c
@@ -236,17 +236,33 @@ static inline struct ds_context *ds_alloc_context(struct task_struct *task)
         struct ds_context *context = *p_context;
 
         if (!context) {
+                spin_unlock(&ds_lock);
+
                 context = kzalloc(sizeof(*context), GFP_KERNEL);
 
-                if (!context)
+                if (!context) {
+                        spin_lock(&ds_lock);
                         return NULL;
+                }
 
                 context->ds = kzalloc(ds_cfg.sizeof_ds, GFP_KERNEL);
                 if (!context->ds) {
                         kfree(context);
+                        spin_lock(&ds_lock);
                         return NULL;
                 }
 
+                spin_lock(&ds_lock);
+                /*
+                 * Check for race - another CPU could have allocated
+                 * it meanwhile:
+                 */
+                if (*p_context) {
+                        kfree(context->ds);
+                        kfree(context);
+                        return *p_context;
+                }
+
                 *p_context = context;
 
                 context->this = p_context;
@@ -384,14 +400,15 @@ static int ds_request(struct task_struct *task, void *base, size_t size,
 
         spin_lock(&ds_lock);
 
-        if (!check_tracer(task))
-                return -EPERM;
-
         error = -ENOMEM;
         context = ds_alloc_context(task);
         if (!context)
                 goto out_unlock;
 
+        error = -EPERM;
+        if (!check_tracer(task))
+                goto out_unlock;
+
         error = -EALREADY;
         if (context->owner[qual] == current)
                 goto out_unlock;
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 3ce029ffaa55..1b894b72c0f5 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -188,20 +188,6 @@ static void __init ati_bugs_contd(int num, int slot, int func)
 }
 #endif
 
-#ifdef CONFIG_DMAR
-static void __init intel_g33_dmar(int num, int slot, int func)
-{
-        struct acpi_table_header *dmar_tbl;
-        acpi_status status;
-
-        status = acpi_get_table(ACPI_SIG_DMAR, 0, &dmar_tbl);
-        if (ACPI_SUCCESS(status)) {
-                printk(KERN_INFO "BIOS BUG: DMAR advertised on Intel G31/G33 chipset -- ignoring\n");
-                dmar_disabled = 1;
-        }
-}
-#endif
-
 #define QFLAG_APPLY_ONCE        0x1
 #define QFLAG_APPLIED           0x2
 #define QFLAG_DONE              (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
@@ -225,10 +211,6 @@ static struct chipset early_qrk[] __initdata = {
           PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
         { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
           PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
-#ifdef CONFIG_DMAR
-        { PCI_VENDOR_ID_INTEL, 0x29c0,
-          PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, intel_g33_dmar },
-#endif
         {}
 };
 
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 369de6973c58..dbf06a0ef3d5 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -11,15 +11,15 @@
  *
  * NOTE: This code handles signal-recognition, which happens every time
  * after an interrupt and after each system call.
- * 
- * Normal syscalls and interrupts don't save a full stack frame, this is 
+ *
+ * Normal syscalls and interrupts don't save a full stack frame, this is
  * only done for syscall tracing, signals or fork/exec et.al.
- * 
- * A note on terminology:        
- * - top of stack: Architecture defined interrupt frame from SS to RIP 
- * at the top of the kernel process stack.      
+ *
+ * A note on terminology:
+ * - top of stack: Architecture defined interrupt frame from SS to RIP
+ * at the top of the kernel process stack.
  * - partial stack frame: partially saved registers upto R11.
- * - full stack frame: Like partial stack frame, but all register saved. 
+ * - full stack frame: Like partial stack frame, but all register saved.
  *
  * Some macro usage:
  * - CFI macros are used to generate dwarf2 unwind information for better
@@ -142,7 +142,7 @@ END(mcount)
 
 #ifndef CONFIG_PREEMPT
 #define retint_kernel retint_restore_args
-#endif  
+#endif
 
 #ifdef CONFIG_PARAVIRT
 ENTRY(native_usergs_sysret64)
@@ -161,14 +161,14 @@ ENTRY(native_usergs_sysret64)
 .endm
 
 /*
- * C code is not supposed to know about undefined top of stack. Every time 
- * a C function with an pt_regs argument is called from the SYSCALL based 
+ * C code is not supposed to know about undefined top of stack. Every time
+ * a C function with an pt_regs argument is called from the SYSCALL based
  * fast path FIXUP_TOP_OF_STACK is needed.
  * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs
  * manipulation.
- */             
-                
-        /* %rsp:at FRAMEEND */ 
+ */
+
+        /* %rsp:at FRAMEEND */
         .macro FIXUP_TOP_OF_STACK tmp
         movq    %gs:pda_oldrsp,\tmp
         movq    \tmp,RSP(%rsp)
@@ -244,8 +244,8 @@ ENTRY(native_usergs_sysret64)
         .endm
 /*
  * A newly forked process directly context switches into this.
- */     
-/* rdi: prev */ 
+ */
+/* rdi: prev */
 ENTRY(ret_from_fork)
         CFI_DEFAULT_STACK
         push kernel_eflags(%rip)
@@ -256,7 +256,7 @@ ENTRY(ret_from_fork)
         GET_THREAD_INFO(%rcx)
         testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT),TI_flags(%rcx)
         jnz rff_trace
-rff_action:     
+rff_action:
         RESTORE_REST
         testl $3,CS-ARGOFFSET(%rsp)     # from kernel_thread?
         je   int_ret_from_sys_call
@@ -267,7 +267,7 @@ rff_action:
 rff_trace:
         movq %rsp,%rdi
         call syscall_trace_leave
-        GET_THREAD_INFO(%rcx)   
+        GET_THREAD_INFO(%rcx)
         jmp rff_action
         CFI_ENDPROC
 END(ret_from_fork)
@@ -278,20 +278,20 @@ END(ret_from_fork)
  * SYSCALL does not save anything on the stack and does not change the
  * stack pointer.
  */
-                
+
 /*
- * Register setup:      
+ * Register setup:
  * rax  system call number
  * rdi  arg0
- * rcx  return address for syscall/sysret, C arg3 
+ * rcx  return address for syscall/sysret, C arg3
  * rsi  arg1
- * rdx  arg2    
+ * rdx  arg2
  * r10  arg3    (--> moved to rcx for C)
  * r8   arg4
  * r9   arg5
  * r11  eflags for syscall/sysret, temporary for C
- * r12-r15,rbp,rbx saved by C code, not touched.                
- * 
+ * r12-r15,rbp,rbx saved by C code, not touched.
+ *
  * Interrupts are off on entry.
  * Only called from user space.
  *
@@ -301,7 +301,7 @@ END(ret_from_fork)
  * When user can change the frames always force IRET. That is because
  * it deals with uncanonical addresses better. SYSRET has trouble
  * with them due to bugs in both AMD and Intel CPUs.
- */                                     
+ */
 
 ENTRY(system_call)
         CFI_STARTPROC   simple
@@ -317,7 +317,7 @@ ENTRY(system_call)
          */
 ENTRY(system_call_after_swapgs)
 
-        movq    %rsp,%gs:pda_oldrsp 
+        movq    %rsp,%gs:pda_oldrsp
         movq    %gs:pda_kernelstack,%rsp
         /*
          * No need to follow this irqs off/on section - it's straight
@@ -325,7 +325,7 @@ ENTRY(system_call_after_swapgs)
          */
         ENABLE_INTERRUPTS(CLBR_NONE)
         SAVE_ARGS 8,1
-        movq  %rax,ORIG_RAX-ARGOFFSET(%rsp) 
+        movq  %rax,ORIG_RAX-ARGOFFSET(%rsp)
         movq  %rcx,RIP-ARGOFFSET(%rsp)
         CFI_REL_OFFSET rip,RIP-ARGOFFSET
         GET_THREAD_INFO(%rcx)
@@ -339,19 +339,19 @@ system_call_fastpath:
         movq %rax,RAX-ARGOFFSET(%rsp)
 /*
  * Syscall return path ending with SYSRET (fast path)
- * Has incomplete stack frame and undefined top of stack. 
- */             
+ * Has incomplete stack frame and undefined top of stack.
+ */
 ret_from_sys_call:
         movl $_TIF_ALLWORK_MASK,%edi
         /* edi: flagmask */
-sysret_check:           
+sysret_check:
         LOCKDEP_SYS_EXIT
         GET_THREAD_INFO(%rcx)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
         movl TI_flags(%rcx),%edx
         andl %edi,%edx
-        jnz  sysret_careful 
+        jnz  sysret_careful
         CFI_REMEMBER_STATE
         /*
          * sysretq will re-enable interrupts:
@@ -366,7 +366,7 @@ sysret_check:
 
         CFI_RESTORE_STATE
         /* Handle reschedules */
-        /* edx: work, edi: workmask */  
+        /* edx: work, edi: workmask */
 sysret_careful:
         bt $TIF_NEED_RESCHED,%edx
         jnc sysret_signal
@@ -379,7 +379,7 @@ sysret_careful:
         CFI_ADJUST_CFA_OFFSET -8
         jmp sysret_check
 
-        /* Handle a signal */ 
+        /* Handle a signal */
 sysret_signal:
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_NONE)
@@ -398,7 +398,7 @@ sysret_signal:
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
         jmp int_with_check
-        
+
 badsys:
         movq $-ENOSYS,RAX-ARGOFFSET(%rsp)
         jmp ret_from_sys_call
@@ -437,7 +437,7 @@ sysret_audit:
 #endif  /* CONFIG_AUDITSYSCALL */
 
         /* Do syscall tracing */
-tracesys:                        
+tracesys:
 #ifdef CONFIG_AUDITSYSCALL
         testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%rcx)
         jz auditsys
@@ -460,8 +460,8 @@ tracesys:
         call *sys_call_table(,%rax,8)
         movq %rax,RAX-ARGOFFSET(%rsp)
         /* Use IRET because user could have changed frame */
-                
-/* 
+
+/*
  * Syscall return path ending with IRET.
  * Has correct top of stack, but partial stack frame.
  */
@@ -505,18 +505,18 @@ int_very_careful:
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_NONE)
         SAVE_REST
-        /* Check for syscall exit trace */      
+        /* Check for syscall exit trace */
         testl $_TIF_WORK_SYSCALL_EXIT,%edx
         jz int_signal
         pushq %rdi
         CFI_ADJUST_CFA_OFFSET 8
-        leaq 8(%rsp),%rdi       # &ptregs -> arg1       
+        leaq 8(%rsp),%rdi       # &ptregs -> arg1
         call syscall_trace_leave
         popq %rdi
         CFI_ADJUST_CFA_OFFSET -8
         andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
         jmp int_restore_rest
-        
+
 int_signal:
         testl $_TIF_DO_NOTIFY_MASK,%edx
         jz 1f
@@ -531,11 +531,11 @@ int_restore_rest:
         jmp int_with_check
         CFI_ENDPROC
 END(system_call)
-                
-/* 
+
+/*
  * Certain special system calls that need to save a complete full stack frame.
- */                                                             
-        
+ */
+
         .macro PTREGSCALL label,func,arg
         .globl \label
 \label:
@@ -572,7 +572,7 @@ ENTRY(ptregscall_common)
         ret
         CFI_ENDPROC
 END(ptregscall_common)
-        
+
 ENTRY(stub_execve)
         CFI_STARTPROC
         popq %r11
@@ -588,11 +588,11 @@ ENTRY(stub_execve)
         jmp int_ret_from_sys_call
         CFI_ENDPROC
 END(stub_execve)
-        
+
 /*
  * sigreturn is special because it needs to restore all registers on return.
  * This cannot be done with SYSRET, so use the IRET return path instead.
- */                
+ */
 ENTRY(stub_rt_sigreturn)
         CFI_STARTPROC
         addq $8, %rsp
@@ -731,12 +731,12 @@ exit_intr:
         GET_THREAD_INFO(%rcx)
         testl $3,CS-ARGOFFSET(%rsp)
         je retint_kernel
-        
+
         /* Interrupt came from user space */
         /*
          * Has a correct top of stack, but a partial stack frame
          * %rcx: thread info. Interrupts off.
-         */             
+         */
 retint_with_reschedule:
         movl $_TIF_WORK_MASK,%edi
 retint_check:
@@ -809,20 +809,20 @@ retint_careful:
         pushq %rdi
         CFI_ADJUST_CFA_OFFSET   8
         call  schedule
-        popq %rdi               
+        popq %rdi
         CFI_ADJUST_CFA_OFFSET   -8
         GET_THREAD_INFO(%rcx)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
         jmp retint_check
-        
+
 retint_signal:
         testl $_TIF_DO_NOTIFY_MASK,%edx
         jz    retint_swapgs
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_NONE)
         SAVE_REST
-        movq $-1,ORIG_RAX(%rsp)                         
+        movq $-1,ORIG_RAX(%rsp)
         xorl %esi,%esi          # oldset
         movq %rsp,%rdi          # &pt_regs
         call do_notify_resume
@@ -844,14 +844,14 @@ ENTRY(retint_kernel)
         jnc  retint_restore_args
         call preempt_schedule_irq
         jmp exit_intr
-#endif  
+#endif
 
         CFI_ENDPROC
 END(common_interrupt)
-        
+
 /*
  * APIC interrupts.
- */             
+ */
         .macro apicinterrupt num,func
         INTR_FRAME
         pushq $~(\num)
@@ -869,14 +869,14 @@ ENTRY(threshold_interrupt)
         apicinterrupt THRESHOLD_APIC_VECTOR,mce_threshold_interrupt
 END(threshold_interrupt)
 
-#ifdef CONFIG_SMP       
+#ifdef CONFIG_SMP
 ENTRY(reschedule_interrupt)
         apicinterrupt RESCHEDULE_VECTOR,smp_reschedule_interrupt
 END(reschedule_interrupt)
 
         .macro INVALIDATE_ENTRY num
 ENTRY(invalidate_interrupt\num)
-        apicinterrupt INVALIDATE_TLB_VECTOR_START+\num,smp_invalidate_interrupt 
+        apicinterrupt INVALIDATE_TLB_VECTOR_START+\num,smp_invalidate_interrupt
 END(invalidate_interrupt\num)
         .endm
 
@@ -915,22 +915,22 @@ END(error_interrupt)
 ENTRY(spurious_interrupt)
         apicinterrupt SPURIOUS_APIC_VECTOR,smp_spurious_interrupt
 END(spurious_interrupt)
-                                
+
 /*
  * Exception entry points.
- */             
+ */
         .macro zeroentry sym
         INTR_FRAME
         PARAVIRT_ADJUST_EXCEPTION_FRAME
-        pushq $0        /* push error code/oldrax */ 
+        pushq $0        /* push error code/oldrax */
         CFI_ADJUST_CFA_OFFSET 8
-        pushq %rax      /* push real oldrax to the rdi slot */ 
+        pushq %rax      /* push real oldrax to the rdi slot */
         CFI_ADJUST_CFA_OFFSET 8
         CFI_REL_OFFSET rax,0
         leaq  \sym(%rip),%rax
         jmp error_entry
         CFI_ENDPROC
-        .endm   
+        .endm
 
         .macro errorentry sym
         XCPT_FRAME
@@ -1044,13 +1044,13 @@ paranoid_schedule\trace:
 
 /*
  * Exception entry point. This expects an error code/orig_rax on the stack
- * and the exception handler in %rax.   
- */                                             
+ * and the exception handler in %rax.
+ */
 KPROBE_ENTRY(error_entry)
         _frame RDI
         CFI_REL_OFFSET rax,0
         /* rdi slot contains rax, oldrax contains error code */
-        cld     
+        cld
         subq  $14*8,%rsp
         CFI_ADJUST_CFA_OFFSET   (14*8)
         movq %rsi,13*8(%rsp)
@@ -1061,7 +1061,7 @@ KPROBE_ENTRY(error_entry)
         CFI_REL_OFFSET  rdx,RDX
         movq %rcx,11*8(%rsp)
         CFI_REL_OFFSET  rcx,RCX
-        movq %rsi,10*8(%rsp)    /* store rax */ 
+        movq %rsi,10*8(%rsp)    /* store rax */
         CFI_REL_OFFSET  rax,RAX
         movq %r8, 9*8(%rsp)
         CFI_REL_OFFSET  r8,R8
@@ -1071,29 +1071,29 @@ KPROBE_ENTRY(error_entry)
         CFI_REL_OFFSET  r10,R10
         movq %r11,6*8(%rsp)
         CFI_REL_OFFSET  r11,R11
-        movq %rbx,5*8(%rsp) 
+        movq %rbx,5*8(%rsp)
         CFI_REL_OFFSET  rbx,RBX
-        movq %rbp,4*8(%rsp) 
+        movq %rbp,4*8(%rsp)
         CFI_REL_OFFSET  rbp,RBP
-        movq %r12,3*8(%rsp) 
+        movq %r12,3*8(%rsp)
         CFI_REL_OFFSET  r12,R12
-        movq %r13,2*8(%rsp) 
+        movq %r13,2*8(%rsp)
         CFI_REL_OFFSET  r13,R13
-        movq %r14,1*8(%rsp) 
+        movq %r14,1*8(%rsp)
         CFI_REL_OFFSET  r14,R14
-        movq %r15,(%rsp) 
+        movq %r15,(%rsp)
         CFI_REL_OFFSET  r15,R15
-        xorl %ebx,%ebx  
+        xorl %ebx,%ebx
         testl $3,CS(%rsp)
         je  error_kernelspace
-error_swapgs:   
+error_swapgs:
         SWAPGS
 error_sti:
         TRACE_IRQS_OFF
-        movq %rdi,RDI(%rsp)     
+        movq %rdi,RDI(%rsp)
         CFI_REL_OFFSET  rdi,RDI
         movq %rsp,%rdi
-        movq ORIG_RAX(%rsp),%rsi        /* get error code */ 
+        movq ORIG_RAX(%rsp),%rsi        /* get error code */
         movq $-1,ORIG_RAX(%rsp)
         call *%rax
         /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */
@@ -1102,7 +1102,7 @@ error_exit:
         RESTORE_REST
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
-        GET_THREAD_INFO(%rcx)   
+        GET_THREAD_INFO(%rcx)
         testl %eax,%eax
         jne  retint_kernel
         LOCKDEP_SYS_EXIT_IRQ
@@ -1118,7 +1118,7 @@ error_kernelspace:
        /* There are two places in the kernel that can potentially fault with
           usergs. Handle them here. The exception handlers after
            iret run with kernel gs again, so don't set the user space flag.
-           B stepping K8s sometimes report an truncated RIP for IRET 
+           B stepping K8s sometimes report an truncated RIP for IRET
            exceptions returning to compat mode. Check for these here too. */
         leaq irq_return(%rip),%rcx
         cmpq %rcx,RIP(%rsp)
@@ -1130,17 +1130,17 @@ error_kernelspace:
         je   error_swapgs
         jmp  error_sti
 KPROBE_END(error_entry)
-        
+
        /* Reload gs selector with exception handling */
-       /* edi:  new selector */ 
+       /* edi:  new selector */
 ENTRY(native_load_gs_index)
         CFI_STARTPROC
         pushf
         CFI_ADJUST_CFA_OFFSET 8
         DISABLE_INTERRUPTS(CLBR_ANY | ~(CLBR_RDI))
         SWAPGS
-gs_change:     
-        movl %edi,%gs   
+gs_change:
+        movl %edi,%gs
 2:      mfence          /* workaround */
         SWAPGS
         popf
@@ -1148,20 +1148,20 @@ gs_change:
         ret
         CFI_ENDPROC
 ENDPROC(native_load_gs_index)
-       
+
         .section __ex_table,"a"
         .align 8
         .quad gs_change,bad_gs
         .previous
         .section .fixup,"ax"
         /* running with kernelgs */
-bad_gs: 
+bad_gs:
         SWAPGS                  /* switch back to user gs */
         xorl %eax,%eax
         movl %eax,%gs
         jmp  2b
-        .previous       
-        
+        .previous
+
 /*
  * Create a kernel thread.
  *
@@ -1184,7 +1184,7 @@ ENTRY(kernel_thread)
 
         xorl %r8d,%r8d
         xorl %r9d,%r9d
-        
+
         # clone now
         call do_fork
         movq %rax,RAX(%rsp)
@@ -1195,14 +1195,14 @@ ENTRY(kernel_thread)
          * so internally to the x86_64 port you can rely on kernel_thread()
          * not to reschedule the child before returning, this avoids the need
          * of hacks for example to fork off the per-CPU idle tasks.
-         * [Hopefully no generic code relies on the reschedule -AK]     
+         * [Hopefully no generic code relies on the reschedule -AK]
          */
         RESTORE_ALL
         UNFAKE_STACK_FRAME
         ret
         CFI_ENDPROC
 ENDPROC(kernel_thread)
-        
+
 child_rip:
         pushq $0                # fake return address
         CFI_STARTPROC
@@ -1237,10 +1237,10 @@ ENDPROC(child_rip)
 ENTRY(kernel_execve)
         CFI_STARTPROC
         FAKE_STACK_FRAME $0
-        SAVE_ALL        
+        SAVE_ALL
         movq %rsp,%rcx
         call sys_execve
-        movq %rax, RAX(%rsp)    
+        movq %rax, RAX(%rsp)
         RESTORE_REST
         testq %rax,%rax
         je int_ret_from_sys_call
@@ -1259,7 +1259,7 @@ ENTRY(coprocessor_error)
 END(coprocessor_error)
 
 ENTRY(simd_coprocessor_error)
-        zeroentry do_simd_coprocessor_error     
+        zeroentry do_simd_coprocessor_error
 END(simd_coprocessor_error)
 
 ENTRY(device_not_available)
@@ -1271,12 +1271,12 @@ KPROBE_ENTRY(debug)
         INTR_FRAME
         PARAVIRT_ADJUST_EXCEPTION_FRAME
         pushq $0
-        CFI_ADJUST_CFA_OFFSET 8         
+        CFI_ADJUST_CFA_OFFSET 8
         paranoidentry do_debug, DEBUG_STACK
         paranoidexit
 KPROBE_END(debug)
 
-        /* runs on exception stack */   
+        /* runs on exception stack */
 KPROBE_ENTRY(nmi)
         INTR_FRAME
         PARAVIRT_ADJUST_EXCEPTION_FRAME
@@ -1310,7 +1310,7 @@ ENTRY(bounds)
 END(bounds)
 
 ENTRY(invalid_op)
-        zeroentry do_invalid_op 
+        zeroentry do_invalid_op
 END(invalid_op)
 
 ENTRY(coprocessor_segment_overrun)
@@ -1365,7 +1365,7 @@ ENTRY(machine_check)
         INTR_FRAME
         PARAVIRT_ADJUST_EXCEPTION_FRAME
         pushq $0
-        CFI_ADJUST_CFA_OFFSET 8 
+        CFI_ADJUST_CFA_OFFSET 8
         paranoidentry do_machine_check
         jmp paranoid_exit1
         CFI_ENDPROC
diff --git a/arch/x86/kernel/es7000_32.c b/arch/x86/kernel/es7000_32.c
index f454c78fcef6..0aa2c443d600 100644
--- a/arch/x86/kernel/es7000_32.c
+++ b/arch/x86/kernel/es7000_32.c
@@ -250,31 +250,24 @@ int __init find_unisys_acpi_oem_table(unsigned long *oem_addr)
 {
         struct acpi_table_header *header = NULL;
         int i = 0;
-        acpi_size tbl_size;
 
-        while (ACPI_SUCCESS(acpi_get_table_with_size("OEM1", i++, &header, &tbl_size))) {
+        while (ACPI_SUCCESS(acpi_get_table("OEM1", i++, &header))) {
                 if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) {
                         struct oem_table *t = (struct oem_table *)header;
 
                         oem_addrX = t->OEMTableAddr;
                         oem_size = t->OEMTableSize;
-                        early_acpi_os_unmap_memory(header, tbl_size);
 
                         *oem_addr = (unsigned long)__acpi_map_table(oem_addrX,
                                                                     oem_size);
                         return 0;
                 }
-                early_acpi_os_unmap_memory(header, tbl_size);
         }
         return -1;
 }
 
 void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr)
 {
-        if (!oem_addr)
-                return;
-
-        __acpi_unmap_table((char *)oem_addr, oem_size);
 }
 #endif
 
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 774ac4991568..1c9cc431ea4f 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -128,7 +128,7 @@ static int kvm_register_clock(char *txt)
 }
 
 #ifdef CONFIG_X86_LOCAL_APIC
-static void kvm_setup_secondary_clock(void)
+static void __devinit kvm_setup_secondary_clock(void)
 {
         /*
          * Now that the first cpu already had this clocksource initialized,
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 9ffb01c31c40..1c0dfbca87c1 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -46,7 +46,9 @@ static __cpuinit void check_tsc_warp(void)
         cycles_t start, now, prev, end;
         int i;
 
+        rdtsc_barrier();
         start = get_cycles();
+        rdtsc_barrier();
         /*
          * The measurement runs for 20 msecs:
          */
@@ -61,7 +63,9 @@ static __cpuinit void check_tsc_warp(void)
                  */
                 __raw_spin_lock(&sync_lock);
                 prev = last_tsc;
+                rdtsc_barrier();
                 now = get_cycles();
+                rdtsc_barrier();
                 last_tsc = now;
                 __raw_spin_unlock(&sync_lock);
 
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 0b8b6690a86d..ebf2f12900f5 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -128,7 +128,16 @@ static __always_inline void do_vgettimeofday(struct timeval * tv)
                         gettimeofday(tv,NULL);
                         return;
                 }
+
+                /*
+                 * Surround the RDTSC by barriers, to make sure it's not
+                 * speculated to outside the seqlock critical section and
+                 * does not cause time warps:
+                 */
+                rdtsc_barrier();
                 now = vread();
+                rdtsc_barrier();
+
                 base = __vsyscall_gtod_data.clock.cycle_last;
                 mask = __vsyscall_gtod_data.clock.mask;
                 mult = __vsyscall_gtod_data.clock.mult;
diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
index ce3251ce5504..b81125f0bdee 100644
--- a/arch/x86/kvm/Kconfig
+++ b/arch/x86/kvm/Kconfig
@@ -20,6 +20,8 @@ if VIRTUALIZATION
 config KVM
         tristate "Kernel-based Virtual Machine (KVM) support"
         depends on HAVE_KVM
+        # for device assignment:
+        depends on PCI
         select PREEMPT_NOTIFIERS
         select MMU_NOTIFIER
         select ANON_INODES
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 8772dc946823..59ebd37ad79e 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -548,8 +548,10 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm)
         mutex_lock(&kvm->lock);
         pit->irq_source_id = kvm_request_irq_source_id(kvm);
         mutex_unlock(&kvm->lock);
-        if (pit->irq_source_id < 0)
+        if (pit->irq_source_id < 0) {
+                kfree(pit);
                 return NULL;
+        }
 
         mutex_init(&pit->pit_state.lock);
         mutex_lock(&pit->pit_state.lock);
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 2a5e64881d9b..f1983d9477cd 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -314,7 +314,7 @@ static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
         if (r)
                 goto out;
         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
-                                   rmap_desc_cache, 1);
+                                   rmap_desc_cache, 4);
         if (r)
                 goto out;
         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 2643b430d83a..d06b4dc0e2ea 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -3564,7 +3564,8 @@ static int __init vmx_init(void)
                 bypass_guest_pf = 0;
                 kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK |
                         VMX_EPT_WRITABLE_MASK |
-                        VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT);
+                        VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT |
+                        VMX_EPT_IGMT_BIT);
                 kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull,
                                 VMX_EPT_EXECUTABLE_MASK);
                 kvm_enable_tdp();
diff --git a/arch/x86/kvm/vmx.h b/arch/x86/kvm/vmx.h
index 3e010d21fdd7..ec5edc339da6 100644
--- a/arch/x86/kvm/vmx.h
+++ b/arch/x86/kvm/vmx.h
@@ -352,6 +352,7 @@ enum vmcs_field {
 #define VMX_EPT_READABLE_MASK                   0x1ull
 #define VMX_EPT_WRITABLE_MASK                   0x2ull
 #define VMX_EPT_EXECUTABLE_MASK                 0x4ull
+#define VMX_EPT_IGMT_BIT                        (1ull << 6)
 
 #define VMX_EPT_IDENTITY_PAGETABLE_ADDR         0xfffbc000ul
 
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index 0e331652681e..52145007bd7e 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -7,6 +7,7 @@
  * This file provides all the same external entries as smp.c but uses
  * the voyager hal to provide the functionality
  */
+#include <linux/cpu.h>
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/kernel_stat.h>
@@ -1790,6 +1791,17 @@ void __init smp_setup_processor_id(void)
         x86_write_percpu(cpu_number, hard_smp_processor_id());
 }
 
+static void voyager_send_call_func(cpumask_t callmask)
+{
+        __u32 mask = cpus_addr(callmask)[0] & ~(1 << smp_processor_id());
+        send_CPI(mask, VIC_CALL_FUNCTION_CPI);
+}
+
+static void voyager_send_call_func_single(int cpu)
+{
+        send_CPI(1 << cpu, VIC_CALL_FUNCTION_SINGLE_CPI);
+}
+
 struct smp_ops smp_ops = {
         .smp_prepare_boot_cpu = voyager_smp_prepare_boot_cpu,
         .smp_prepare_cpus = voyager_smp_prepare_cpus,
@@ -1799,6 +1811,6 @@ struct smp_ops smp_ops = {
         .smp_send_stop = voyager_smp_send_stop,
         .smp_send_reschedule = voyager_smp_send_reschedule,
 
-        .send_call_func_ipi = native_send_call_func_ipi,
-        .send_call_func_single_ipi = native_send_call_func_single_ipi,
+        .send_call_func_ipi = voyager_send_call_func,
+        .send_call_func_single_ipi = voyager_send_call_func_single,
 };
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index c483f4242079..3ffed259883e 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -102,6 +102,8 @@ static pmd_t * __init one_md_table_init(pgd_t *pgd)
                 set_pgd(pgd, __pgd(__pa(pmd_table) | _PAGE_PRESENT));
                 pud = pud_offset(pgd, 0);
                 BUG_ON(pmd_table != pmd_offset(pud, 0));
+
+                return pmd_table;
         }
 #endif
         pud = pud_offset(pgd, 0);