diff options
author | Jesper Juhl <jesper.juhl@gmail.com> | 2006-01-09 23:54:01 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-10 11:01:55 -0500 |
commit | 3c6bee1d4037a5c569f30d40bd852a57ba250912 (patch) | |
tree | dfa0259ccb4e0c823b81f3e040fb09ab17524bde /arch | |
parent | e7c368b7676bbe6145f14fbc87913596c9b93c11 (diff) |
[PATCH] turn "const static" into "static const"
ICC likes to complain about storage class not being first, GCC doesn't
care much (except for cases like "inline static").
have a hard time seeing how it could break anything.
Thanks to Gabriel A. Devenyi for pointing out
http://linuxicc.sourceforge.net/ which is what made me create this patch.
Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/plat-omap/dma.c | 2 | ||||
-rw-r--r-- | arch/h8300/kernel/gpio.c | 4 | ||||
-rw-r--r-- | arch/h8300/platform/h8300h/ptrace_h8300h.c | 12 | ||||
-rw-r--r-- | arch/h8300/platform/h8s/ints.c | 4 | ||||
-rw-r--r-- | arch/h8300/platform/h8s/ints_h8s.c | 4 |
5 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index f5cc21ad0956..a4e5ac77f6df 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -64,7 +64,7 @@ static int dma_chan_count; | |||
64 | static spinlock_t dma_chan_lock; | 64 | static spinlock_t dma_chan_lock; |
65 | static struct omap_dma_lch dma_chan[OMAP_LOGICAL_DMA_CH_COUNT]; | 65 | static struct omap_dma_lch dma_chan[OMAP_LOGICAL_DMA_CH_COUNT]; |
66 | 66 | ||
67 | const static u8 omap1_dma_irq[OMAP_LOGICAL_DMA_CH_COUNT] = { | 67 | static const u8 omap1_dma_irq[OMAP_LOGICAL_DMA_CH_COUNT] = { |
68 | INT_DMA_CH0_6, INT_DMA_CH1_7, INT_DMA_CH2_8, INT_DMA_CH3, | 68 | INT_DMA_CH0_6, INT_DMA_CH1_7, INT_DMA_CH2_8, INT_DMA_CH3, |
69 | INT_DMA_CH4, INT_DMA_CH5, INT_1610_DMA_CH6, INT_1610_DMA_CH7, | 69 | INT_DMA_CH4, INT_DMA_CH5, INT_1610_DMA_CH6, INT_1610_DMA_CH7, |
70 | INT_1610_DMA_CH8, INT_1610_DMA_CH9, INT_1610_DMA_CH10, | 70 | INT_1610_DMA_CH8, INT_1610_DMA_CH9, INT_1610_DMA_CH10, |
diff --git a/arch/h8300/kernel/gpio.c b/arch/h8300/kernel/gpio.c index 795682b873e2..d195568ca8a2 100644 --- a/arch/h8300/kernel/gpio.c +++ b/arch/h8300/kernel/gpio.c | |||
@@ -122,7 +122,7 @@ int h8300_get_gpio_dir(int port_bit) | |||
122 | static char *port_status(int portno) | 122 | static char *port_status(int portno) |
123 | { | 123 | { |
124 | static char result[10]; | 124 | static char result[10]; |
125 | const static char io[2]={'I','O'}; | 125 | static const char io[2]={'I','O'}; |
126 | char *rp; | 126 | char *rp; |
127 | int c; | 127 | int c; |
128 | unsigned char used,ddr; | 128 | unsigned char used,ddr; |
@@ -143,7 +143,7 @@ static int gpio_proc_read(char *buf, char **start, off_t offset, | |||
143 | int len, int *unused_i, void *unused_v) | 143 | int len, int *unused_i, void *unused_v) |
144 | { | 144 | { |
145 | int c,outlen; | 145 | int c,outlen; |
146 | const static char port_name[]="123456789ABCDEFGH"; | 146 | static const char port_name[]="123456789ABCDEFGH"; |
147 | outlen = 0; | 147 | outlen = 0; |
148 | for (c = 0; c < MAX_PORT; c++) { | 148 | for (c = 0; c < MAX_PORT; c++) { |
149 | if (ddrs[c] == NULL) | 149 | if (ddrs[c] == NULL) |
diff --git a/arch/h8300/platform/h8300h/ptrace_h8300h.c b/arch/h8300/platform/h8300h/ptrace_h8300h.c index 6ac93c05a1ae..746b1ae672a1 100644 --- a/arch/h8300/platform/h8300h/ptrace_h8300h.c +++ b/arch/h8300/platform/h8300h/ptrace_h8300h.c | |||
@@ -98,7 +98,7 @@ struct optable { | |||
98 | .type = jmp, \ | 98 | .type = jmp, \ |
99 | } | 99 | } |
100 | 100 | ||
101 | const static struct optable optable_0[] = { | 101 | static const struct optable optable_0[] = { |
102 | OPTABLE(0x00,0xff, 1,none), /* 0x00 */ | 102 | OPTABLE(0x00,0xff, 1,none), /* 0x00 */ |
103 | OPTABLE(0x01,0xff,-1,none), /* 0x01 */ | 103 | OPTABLE(0x01,0xff,-1,none), /* 0x01 */ |
104 | OPTABLE(0x02,0xfe, 1,none), /* 0x02-0x03 */ | 104 | OPTABLE(0x02,0xfe, 1,none), /* 0x02-0x03 */ |
@@ -131,31 +131,31 @@ const static struct optable optable_0[] = { | |||
131 | OPTABLE(0x80,0x80, 1,none), /* 0x80-0xff */ | 131 | OPTABLE(0x80,0x80, 1,none), /* 0x80-0xff */ |
132 | }; | 132 | }; |
133 | 133 | ||
134 | const static struct optable optable_1[] = { | 134 | static const struct optable optable_1[] = { |
135 | OPTABLE(0x00,0xff,-3,none), /* 0x0100 */ | 135 | OPTABLE(0x00,0xff,-3,none), /* 0x0100 */ |
136 | OPTABLE(0x40,0xf0,-3,none), /* 0x0140-0x14f */ | 136 | OPTABLE(0x40,0xf0,-3,none), /* 0x0140-0x14f */ |
137 | OPTABLE(0x80,0xf0, 1,none), /* 0x0180-0x018f */ | 137 | OPTABLE(0x80,0xf0, 1,none), /* 0x0180-0x018f */ |
138 | OPTABLE(0xc0,0xc0, 2,none), /* 0x01c0-0x01ff */ | 138 | OPTABLE(0xc0,0xc0, 2,none), /* 0x01c0-0x01ff */ |
139 | }; | 139 | }; |
140 | 140 | ||
141 | const static struct optable optable_2[] = { | 141 | static const struct optable optable_2[] = { |
142 | OPTABLE(0x00,0x20, 2,none), /* 0x6a0?/0x6a8?/0x6b0?/0x6b8? */ | 142 | OPTABLE(0x00,0x20, 2,none), /* 0x6a0?/0x6a8?/0x6b0?/0x6b8? */ |
143 | OPTABLE(0x20,0x20, 3,none), /* 0x6a2?/0x6aa?/0x6b2?/0x6ba? */ | 143 | OPTABLE(0x20,0x20, 3,none), /* 0x6a2?/0x6aa?/0x6b2?/0x6ba? */ |
144 | }; | 144 | }; |
145 | 145 | ||
146 | const static struct optable optable_3[] = { | 146 | static const struct optable optable_3[] = { |
147 | OPTABLE(0x69,0xfb, 2,none), /* 0x010069/0x01006d/014069/0x01406d */ | 147 | OPTABLE(0x69,0xfb, 2,none), /* 0x010069/0x01006d/014069/0x01406d */ |
148 | OPTABLE(0x6b,0xff,-4,none), /* 0x01006b/0x01406b */ | 148 | OPTABLE(0x6b,0xff,-4,none), /* 0x01006b/0x01406b */ |
149 | OPTABLE(0x6f,0xff, 3,none), /* 0x01006f/0x01406f */ | 149 | OPTABLE(0x6f,0xff, 3,none), /* 0x01006f/0x01406f */ |
150 | OPTABLE(0x78,0xff, 5,none), /* 0x010078/0x014078 */ | 150 | OPTABLE(0x78,0xff, 5,none), /* 0x010078/0x014078 */ |
151 | }; | 151 | }; |
152 | 152 | ||
153 | const static struct optable optable_4[] = { | 153 | static const struct optable optable_4[] = { |
154 | OPTABLE(0x00,0x78, 3,none), /* 0x0100690?/0x01006d0?/0140690/0x01406d0?/0x0100698?/0x01006d8?/0140698?/0x01406d8? */ | 154 | OPTABLE(0x00,0x78, 3,none), /* 0x0100690?/0x01006d0?/0140690/0x01406d0?/0x0100698?/0x01006d8?/0140698?/0x01406d8? */ |
155 | OPTABLE(0x20,0x78, 4,none), /* 0x0100692?/0x01006d2?/0140692/0x01406d2?/0x010069a?/0x01006da?/014069a?/0x01406da? */ | 155 | OPTABLE(0x20,0x78, 4,none), /* 0x0100692?/0x01006d2?/0140692/0x01406d2?/0x010069a?/0x01006da?/014069a?/0x01406da? */ |
156 | }; | 156 | }; |
157 | 157 | ||
158 | const static struct optables_list { | 158 | static const struct optables_list { |
159 | const struct optable *ptr; | 159 | const struct optable *ptr; |
160 | int size; | 160 | int size; |
161 | } optables[] = { | 161 | } optables[] = { |
diff --git a/arch/h8300/platform/h8s/ints.c b/arch/h8300/platform/h8s/ints.c index 5441cdd12a39..f6ed663bdde0 100644 --- a/arch/h8300/platform/h8s/ints.c +++ b/arch/h8300/platform/h8s/ints.c | |||
@@ -52,7 +52,7 @@ struct irq_pins { | |||
52 | unsigned char bit_no; | 52 | unsigned char bit_no; |
53 | }; | 53 | }; |
54 | /* ISTR = 0 */ | 54 | /* ISTR = 0 */ |
55 | const static struct irq_pins irq_assign_table0[16]={ | 55 | static const struct irq_pins irq_assign_table0[16]={ |
56 | {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1}, | 56 | {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1}, |
57 | {H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3}, | 57 | {H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3}, |
58 | {H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5}, | 58 | {H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5}, |
@@ -63,7 +63,7 @@ const static struct irq_pins irq_assign_table0[16]={ | |||
63 | {H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2}, | 63 | {H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2}, |
64 | }; | 64 | }; |
65 | /* ISTR = 1 */ | 65 | /* ISTR = 1 */ |
66 | const static struct irq_pins irq_assign_table1[16]={ | 66 | static const struct irq_pins irq_assign_table1[16]={ |
67 | {H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1}, | 67 | {H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1}, |
68 | {H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3}, | 68 | {H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3}, |
69 | {H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5}, | 69 | {H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5}, |
diff --git a/arch/h8300/platform/h8s/ints_h8s.c b/arch/h8300/platform/h8s/ints_h8s.c index f53de493e3e8..8268dfd12f1f 100644 --- a/arch/h8300/platform/h8s/ints_h8s.c +++ b/arch/h8300/platform/h8s/ints_h8s.c | |||
@@ -42,7 +42,7 @@ struct irq_pins { | |||
42 | unsigned char bit_no; | 42 | unsigned char bit_no; |
43 | } __attribute__((aligned(1),packed)); | 43 | } __attribute__((aligned(1),packed)); |
44 | /* ISTR = 0 */ | 44 | /* ISTR = 0 */ |
45 | const static struct irq_pins irq_assign_table0[16]={ | 45 | static const struct irq_pins irq_assign_table0[16]={ |
46 | {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1}, | 46 | {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1}, |
47 | {H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3}, | 47 | {H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3}, |
48 | {H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5}, | 48 | {H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5}, |
@@ -53,7 +53,7 @@ const static struct irq_pins irq_assign_table0[16]={ | |||
53 | {H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2}, | 53 | {H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2}, |
54 | }; | 54 | }; |
55 | /* ISTR = 1 */ | 55 | /* ISTR = 1 */ |
56 | const static struct irq_pins irq_assign_table1[16]={ | 56 | static const struct irq_pins irq_assign_table1[16]={ |
57 | {H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1}, | 57 | {H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1}, |
58 | {H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3}, | 58 | {H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3}, |
59 | {H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5}, | 59 | {H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5}, |