diff options
author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:42:52 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:42:52 -0400 |
commit | 9308add6ea4fedeba37b0d7c4630a542bd34f214 (patch) | |
tree | 5b94b9c8eebc7a7ef6879a7fdfc553c6758312dc /arch | |
parent | 138f4c359d23d2ec38d18bd70dd9613ae515fe93 (diff) |
dmaengine: cleanup unused transaction types
No drivers currently implement these operation types, so they can be
deleted.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-iop13xx/setup.c | 7 | ||||
-rw-r--r-- | arch/arm/plat-iop/adma.c | 2 |
2 files changed, 0 insertions, 9 deletions
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c index faaef95342b6..5c147fb66a01 100644 --- a/arch/arm/mach-iop13xx/setup.c +++ b/arch/arm/mach-iop13xx/setup.c | |||
@@ -477,10 +477,8 @@ void __init iop13xx_platform_init(void) | |||
477 | plat_data = &iop13xx_adma_0_data; | 477 | plat_data = &iop13xx_adma_0_data; |
478 | dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); | 478 | dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); |
479 | dma_cap_set(DMA_XOR, plat_data->cap_mask); | 479 | dma_cap_set(DMA_XOR, plat_data->cap_mask); |
480 | dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask); | ||
481 | dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); | 480 | dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); |
482 | dma_cap_set(DMA_MEMSET, plat_data->cap_mask); | 481 | dma_cap_set(DMA_MEMSET, plat_data->cap_mask); |
483 | dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask); | ||
484 | dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); | 482 | dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); |
485 | break; | 483 | break; |
486 | case IOP13XX_INIT_ADMA_1: | 484 | case IOP13XX_INIT_ADMA_1: |
@@ -489,10 +487,8 @@ void __init iop13xx_platform_init(void) | |||
489 | plat_data = &iop13xx_adma_1_data; | 487 | plat_data = &iop13xx_adma_1_data; |
490 | dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); | 488 | dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); |
491 | dma_cap_set(DMA_XOR, plat_data->cap_mask); | 489 | dma_cap_set(DMA_XOR, plat_data->cap_mask); |
492 | dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask); | ||
493 | dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); | 490 | dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); |
494 | dma_cap_set(DMA_MEMSET, plat_data->cap_mask); | 491 | dma_cap_set(DMA_MEMSET, plat_data->cap_mask); |
495 | dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask); | ||
496 | dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); | 492 | dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); |
497 | break; | 493 | break; |
498 | case IOP13XX_INIT_ADMA_2: | 494 | case IOP13XX_INIT_ADMA_2: |
@@ -501,13 +497,10 @@ void __init iop13xx_platform_init(void) | |||
501 | plat_data = &iop13xx_adma_2_data; | 497 | plat_data = &iop13xx_adma_2_data; |
502 | dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); | 498 | dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); |
503 | dma_cap_set(DMA_XOR, plat_data->cap_mask); | 499 | dma_cap_set(DMA_XOR, plat_data->cap_mask); |
504 | dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask); | ||
505 | dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); | 500 | dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); |
506 | dma_cap_set(DMA_MEMSET, plat_data->cap_mask); | 501 | dma_cap_set(DMA_MEMSET, plat_data->cap_mask); |
507 | dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask); | ||
508 | dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); | 502 | dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); |
509 | dma_cap_set(DMA_PQ, plat_data->cap_mask); | 503 | dma_cap_set(DMA_PQ, plat_data->cap_mask); |
510 | dma_cap_set(DMA_PQ_UPDATE, plat_data->cap_mask); | ||
511 | dma_cap_set(DMA_PQ_VAL, plat_data->cap_mask); | 504 | dma_cap_set(DMA_PQ_VAL, plat_data->cap_mask); |
512 | break; | 505 | break; |
513 | } | 506 | } |
diff --git a/arch/arm/plat-iop/adma.c b/arch/arm/plat-iop/adma.c index da1dd0dab07c..1ff6a37e893c 100644 --- a/arch/arm/plat-iop/adma.c +++ b/arch/arm/plat-iop/adma.c | |||
@@ -179,7 +179,6 @@ static int __init iop3xx_adma_cap_init(void) | |||
179 | dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask); | 179 | dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask); |
180 | #else | 180 | #else |
181 | dma_cap_set(DMA_MEMCPY, iop3xx_dma_0_data.cap_mask); | 181 | dma_cap_set(DMA_MEMCPY, iop3xx_dma_0_data.cap_mask); |
182 | dma_cap_set(DMA_MEMCPY_CRC32C, iop3xx_dma_0_data.cap_mask); | ||
183 | dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask); | 182 | dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask); |
184 | #endif | 183 | #endif |
185 | 184 | ||
@@ -188,7 +187,6 @@ static int __init iop3xx_adma_cap_init(void) | |||
188 | dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask); | 187 | dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask); |
189 | #else | 188 | #else |
190 | dma_cap_set(DMA_MEMCPY, iop3xx_dma_1_data.cap_mask); | 189 | dma_cap_set(DMA_MEMCPY, iop3xx_dma_1_data.cap_mask); |
191 | dma_cap_set(DMA_MEMCPY_CRC32C, iop3xx_dma_1_data.cap_mask); | ||
192 | dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask); | 190 | dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask); |
193 | #endif | 191 | #endif |
194 | 192 | ||