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authorDavid S. Miller <davem@sunset.davemloft.net>2007-03-15 18:44:05 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-04-26 04:55:26 -0400
commit4be5c34dc47b5a9e6f91c8f5937a93c464870b8e (patch)
tree0b62b34193547010e8446a4ecba7ab06d691f64c /arch
parenta0963bdfb91ca97c2b0b6d4ca81ff557fac66901 (diff)
[SPARC64]: Privatize sun4u_get_pte() and fix name.
__get_phys is only called from init.c as is prom_virt_to_phys(), __get_iospace() is not called at all, and sun4u_get_pte() is largely misnamed. Privatize the implementation and helper functions of sun4u_get_phys() to mm/init.c, and rename to kvaddr_to_paddr(). The only used of this thing is flush_icache_range(), and thus things can be considerably further simplified. For example, we should only see module or PAGE_OFFSET kernel addresses here, so we don't need the OBP firmware range handling at all. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/sparc64/mm/init.c129
1 files changed, 62 insertions, 67 deletions
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 56be943a6f0e..3cacea5da6ce 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -392,6 +392,67 @@ out:
392 put_cpu(); 392 put_cpu();
393} 393}
394 394
395struct linux_prom_translation {
396 unsigned long virt;
397 unsigned long size;
398 unsigned long data;
399};
400
401/* Exported for kernel TLB miss handling in ktlb.S */
402struct linux_prom_translation prom_trans[512] __read_mostly;
403unsigned int prom_trans_ents __read_mostly;
404
405/*
406 * Translate PROM's mapping we capture at boot time into physical address.
407 * The second parameter is only set from prom_callback() invocations.
408 */
409static unsigned long prom_virt_to_phys(unsigned long promva)
410{
411 unsigned long mask;
412 int i;
413
414 mask = _PAGE_PADDR_4U;
415 if (tlb_type == hypervisor)
416 mask = _PAGE_PADDR_4V;
417
418 for (i = 0; i < prom_trans_ents; i++) {
419 struct linux_prom_translation *p = &prom_trans[i];
420
421 if (promva >= p->virt &&
422 promva < (p->virt + p->size)) {
423 unsigned long base = p->data & mask;
424
425 return base + (promva & (8192 - 1));
426 }
427 }
428 return 0UL;
429}
430
431static unsigned long kvaddr_to_phys(unsigned long addr)
432{
433 pgd_t *pgdp;
434 pud_t *pudp;
435 pmd_t *pmdp;
436 pte_t *ptep;
437 unsigned long mask = _PAGE_PADDR_4U;
438
439 if (tlb_type == hypervisor)
440 mask = _PAGE_PADDR_4V;
441
442 if (addr >= PAGE_OFFSET)
443 return addr & mask;
444
445 if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
446 return prom_virt_to_phys(addr);
447
448 pgdp = pgd_offset_k(addr);
449 pudp = pud_offset(pgdp, addr);
450 pmdp = pmd_offset(pudp, addr);
451 ptep = pte_offset_kernel(pmdp, addr);
452
453 return pte_val(*ptep) & mask;
454}
455
395void __kprobes flush_icache_range(unsigned long start, unsigned long end) 456void __kprobes flush_icache_range(unsigned long start, unsigned long end)
396{ 457{
397 /* Cheetah and Hypervisor platform cpus have coherent I-cache. */ 458 /* Cheetah and Hypervisor platform cpus have coherent I-cache. */
@@ -399,7 +460,7 @@ void __kprobes flush_icache_range(unsigned long start, unsigned long end)
399 unsigned long kaddr; 460 unsigned long kaddr;
400 461
401 for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE) 462 for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE)
402 __flush_icache_page(__get_phys(kaddr)); 463 __flush_icache_page(kvaddr_to_phys(kaddr));
403 } 464 }
404} 465}
405 466
@@ -436,16 +497,6 @@ void mmu_info(struct seq_file *m)
436#endif /* CONFIG_DEBUG_DCFLUSH */ 497#endif /* CONFIG_DEBUG_DCFLUSH */
437} 498}
438 499
439struct linux_prom_translation {
440 unsigned long virt;
441 unsigned long size;
442 unsigned long data;
443};
444
445/* Exported for kernel TLB miss handling in ktlb.S */
446struct linux_prom_translation prom_trans[512] __read_mostly;
447unsigned int prom_trans_ents __read_mostly;
448
449/* Exported for SMP bootup purposes. */ 500/* Exported for SMP bootup purposes. */
450unsigned long kern_locked_tte_data; 501unsigned long kern_locked_tte_data;
451 502
@@ -1875,62 +1926,6 @@ static unsigned long kern_large_tte(unsigned long paddr)
1875 return val | paddr; 1926 return val | paddr;
1876} 1927}
1877 1928
1878/*
1879 * Translate PROM's mapping we capture at boot time into physical address.
1880 * The second parameter is only set from prom_callback() invocations.
1881 */
1882unsigned long prom_virt_to_phys(unsigned long promva, int *error)
1883{
1884 unsigned long mask;
1885 int i;
1886
1887 mask = _PAGE_PADDR_4U;
1888 if (tlb_type == hypervisor)
1889 mask = _PAGE_PADDR_4V;
1890
1891 for (i = 0; i < prom_trans_ents; i++) {
1892 struct linux_prom_translation *p = &prom_trans[i];
1893
1894 if (promva >= p->virt &&
1895 promva < (p->virt + p->size)) {
1896 unsigned long base = p->data & mask;
1897
1898 if (error)
1899 *error = 0;
1900 return base + (promva & (8192 - 1));
1901 }
1902 }
1903 if (error)
1904 *error = 1;
1905 return 0UL;
1906}
1907
1908/* XXX We should kill off this ugly thing at so me point. XXX */
1909unsigned long sun4u_get_pte(unsigned long addr)
1910{
1911 pgd_t *pgdp;
1912 pud_t *pudp;
1913 pmd_t *pmdp;
1914 pte_t *ptep;
1915 unsigned long mask = _PAGE_PADDR_4U;
1916
1917 if (tlb_type == hypervisor)
1918 mask = _PAGE_PADDR_4V;
1919
1920 if (addr >= PAGE_OFFSET)
1921 return addr & mask;
1922
1923 if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
1924 return prom_virt_to_phys(addr, NULL);
1925
1926 pgdp = pgd_offset_k(addr);
1927 pudp = pud_offset(pgdp, addr);
1928 pmdp = pmd_offset(pudp, addr);
1929 ptep = pte_offset_kernel(pmdp, addr);
1930
1931 return pte_val(*ptep) & mask;
1932}
1933
1934/* If not locked, zap it. */ 1929/* If not locked, zap it. */
1935void __flush_tlb_all(void) 1930void __flush_tlb_all(void)
1936{ 1931{