diff options
author | Paul Walmsley <paul@pwsan.com> | 2012-10-23 15:32:59 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-10-29 06:04:05 -0400 |
commit | 39141ddfb63a664f26d3f42f64ee386e879b492c (patch) | |
tree | f44acb07323c59e3fe9aece319ef7a822429f7eb /arch | |
parent | 6a4dae5e138a32b45ca5218cc2b81802f9d378c3 (diff) |
ARM: 7566/1: vfp: fix save and restore when running on pre-VFPv3 and CONFIG_VFPv3 set
After commit 846a136881b8f73c1f74250bf6acfaa309cab1f2 ("ARM: vfp: fix
saving d16-d31 vfp registers on v6+ kernels"), the OMAP 2430SDP board
started crashing during boot with omap2plus_defconfig:
[ 3.875122] mmcblk0: mmc0:e624 SD04G 3.69 GiB
[ 3.915954] mmcblk0: p1
[ 4.086639] Internal error: Oops - undefined instruction: 0 [#1] SMP ARM
[ 4.093719] Modules linked in:
[ 4.096954] CPU: 0 Not tainted (3.6.0-02232-g759e00b #570)
[ 4.103149] PC is at vfp_reload_hw+0x1c/0x44
[ 4.107666] LR is at __und_usr_fault_32+0x0/0x8
It turns out that the context save/restore fix unmasked a latent bug
in commit 5aaf254409f8d58229107b59507a8235b715a960 ("ARM: 6203/1: Make
VFPv3 usable on ARMv6"). When CONFIG_VFPv3 is set, but the kernel is
booted on a pre-VFPv3 core, the code attempts to save and restore the
d16-d31 VFP registers. These are only present on non-D16 VFPv3+, so
this results in an undefined instruction exception. The code didn't
crash before commit 846a136 because the save and restore code was
only touching d0-d15, present on all VFP.
Fix by implementing a request from Russell King to add a new HWCAP
flag that affirmatively indicates the presence of the d16-d31
registers:
http://marc.info/?l=linux-arm-kernel&m=135013547905283&w=2
and some feedback from Måns to clarify the name of the HWCAP flag.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Dave Martin <dave.martin@linaro.org>
Cc: Måns Rullgård <mans.rullgard@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/include/asm/vfpmacros.h | 12 | ||||
-rw-r--r-- | arch/arm/include/uapi/asm/hwcap.h | 3 | ||||
-rw-r--r-- | arch/arm/vfp/vfpmodule.c | 9 |
3 files changed, 14 insertions, 10 deletions
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h index 6a6f1e485f41..301c1db3e99b 100644 --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h | |||
@@ -27,9 +27,9 @@ | |||
27 | #if __LINUX_ARM_ARCH__ <= 6 | 27 | #if __LINUX_ARM_ARCH__ <= 6 |
28 | ldr \tmp, =elf_hwcap @ may not have MVFR regs | 28 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
29 | ldr \tmp, [\tmp, #0] | 29 | ldr \tmp, [\tmp, #0] |
30 | tst \tmp, #HWCAP_VFPv3D16 | 30 | tst \tmp, #HWCAP_VFPD32 |
31 | ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} | 31 | ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} |
32 | addne \base, \base, #32*4 @ step over unused register space | 32 | addeq \base, \base, #32*4 @ step over unused register space |
33 | #else | 33 | #else |
34 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | 34 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
35 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | 35 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
@@ -51,9 +51,9 @@ | |||
51 | #if __LINUX_ARM_ARCH__ <= 6 | 51 | #if __LINUX_ARM_ARCH__ <= 6 |
52 | ldr \tmp, =elf_hwcap @ may not have MVFR regs | 52 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
53 | ldr \tmp, [\tmp, #0] | 53 | ldr \tmp, [\tmp, #0] |
54 | tst \tmp, #HWCAP_VFPv3D16 | 54 | tst \tmp, #HWCAP_VFPD32 |
55 | stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} | 55 | stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} |
56 | addne \base, \base, #32*4 @ step over unused register space | 56 | addeq \base, \base, #32*4 @ step over unused register space |
57 | #else | 57 | #else |
58 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | 58 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
59 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | 59 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index f254f6503cce..3688fd15a32d 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h | |||
@@ -18,11 +18,12 @@ | |||
18 | #define HWCAP_THUMBEE (1 << 11) | 18 | #define HWCAP_THUMBEE (1 << 11) |
19 | #define HWCAP_NEON (1 << 12) | 19 | #define HWCAP_NEON (1 << 12) |
20 | #define HWCAP_VFPv3 (1 << 13) | 20 | #define HWCAP_VFPv3 (1 << 13) |
21 | #define HWCAP_VFPv3D16 (1 << 14) | 21 | #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ |
22 | #define HWCAP_TLS (1 << 15) | 22 | #define HWCAP_TLS (1 << 15) |
23 | #define HWCAP_VFPv4 (1 << 16) | 23 | #define HWCAP_VFPv4 (1 << 16) |
24 | #define HWCAP_IDIVA (1 << 17) | 24 | #define HWCAP_IDIVA (1 << 17) |
25 | #define HWCAP_IDIVT (1 << 18) | 25 | #define HWCAP_IDIVT (1 << 18) |
26 | #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ | ||
26 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) | 27 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) |
27 | 28 | ||
28 | 29 | ||
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index c834b32af275..3b44e0dd0a93 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -701,11 +701,14 @@ static int __init vfp_init(void) | |||
701 | elf_hwcap |= HWCAP_VFPv3; | 701 | elf_hwcap |= HWCAP_VFPv3; |
702 | 702 | ||
703 | /* | 703 | /* |
704 | * Check for VFPv3 D16. CPUs in this configuration | 704 | * Check for VFPv3 D16 and VFPv4 D16. CPUs in |
705 | * only have 16 x 64bit registers. | 705 | * this configuration only have 16 x 64bit |
706 | * registers. | ||
706 | */ | 707 | */ |
707 | if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) | 708 | if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) |
708 | elf_hwcap |= HWCAP_VFPv3D16; | 709 | elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */ |
710 | else | ||
711 | elf_hwcap |= HWCAP_VFPD32; | ||
709 | } | 712 | } |
710 | #endif | 713 | #endif |
711 | /* | 714 | /* |