diff options
author | Stanley.Miao <stanley.miao@windriver.com> | 2009-01-29 11:57:12 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2009-01-29 11:57:12 -0500 |
commit | 06151158f2da4764479b4ec01688dc4bade6ce9d (patch) | |
tree | b78b3f2ccde6e3d49e9f35bad3352fbfd9a3eca2 /arch | |
parent | 18e352e4a73465349711a9324767e1b2453383e2 (diff) |
ARM: OMAP: Fix McBSP spin_lock deadlock
A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.
omap_mcbsp_request()
\- clk_enable(mcbsp->clk) [takes and holds clockfw_lock]
\- omap2_clk_enable()
\- _omap2_clk_enable()
\- omap_mcbsp_clk_enable()
\- clk_enable(child clock) [tries for clockfw_lock again]
mcbsp_clk is a virtual clock and it comprises several child clocks. when
enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk
will enable its child clocks, then the deadlock occurs.
The solution is to remove the virtual clock and enable these child clocks in
omap_mcbsp_request() directly.
Signed-off-by: Stanley.Miao <stanley.miao@windriver.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap1/mcbsp.c | 98 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mcbsp.c | 145 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/mcbsp.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 52 |
4 files changed, 78 insertions, 223 deletions
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index ca7a0cc1707c..575ba31295cf 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
@@ -28,81 +28,8 @@ | |||
28 | #define DPS_RSTCT2_PER_EN (1 << 0) | 28 | #define DPS_RSTCT2_PER_EN (1 << 0) |
29 | #define DSP_RSTCT2_WD_PER_EN (1 << 1) | 29 | #define DSP_RSTCT2_WD_PER_EN (1 << 1) |
30 | 30 | ||
31 | struct mcbsp_internal_clk { | ||
32 | struct clk clk; | ||
33 | struct clk **childs; | ||
34 | int n_childs; | ||
35 | }; | ||
36 | |||
37 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) | 31 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) |
38 | static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) | 32 | const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" }; |
39 | { | ||
40 | const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" }; | ||
41 | int i; | ||
42 | |||
43 | mclk->n_childs = ARRAY_SIZE(clk_names); | ||
44 | mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *), | ||
45 | GFP_KERNEL); | ||
46 | |||
47 | for (i = 0; i < mclk->n_childs; i++) { | ||
48 | /* We fake a platform device to get correct device id */ | ||
49 | struct platform_device pdev; | ||
50 | |||
51 | pdev.dev.bus = &platform_bus_type; | ||
52 | pdev.id = mclk->clk.id; | ||
53 | mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]); | ||
54 | if (IS_ERR(mclk->childs[i])) | ||
55 | printk(KERN_ERR "Could not get clock %s (%d).\n", | ||
56 | clk_names[i], mclk->clk.id); | ||
57 | } | ||
58 | } | ||
59 | |||
60 | static int omap_mcbsp_clk_enable(struct clk *clk) | ||
61 | { | ||
62 | struct mcbsp_internal_clk *mclk = container_of(clk, | ||
63 | struct mcbsp_internal_clk, clk); | ||
64 | int i; | ||
65 | |||
66 | for (i = 0; i < mclk->n_childs; i++) | ||
67 | clk_enable(mclk->childs[i]); | ||
68 | return 0; | ||
69 | } | ||
70 | |||
71 | static void omap_mcbsp_clk_disable(struct clk *clk) | ||
72 | { | ||
73 | struct mcbsp_internal_clk *mclk = container_of(clk, | ||
74 | struct mcbsp_internal_clk, clk); | ||
75 | int i; | ||
76 | |||
77 | for (i = 0; i < mclk->n_childs; i++) | ||
78 | clk_disable(mclk->childs[i]); | ||
79 | } | ||
80 | |||
81 | static struct mcbsp_internal_clk omap_mcbsp_clks[] = { | ||
82 | { | ||
83 | .clk = { | ||
84 | .name = "mcbsp_clk", | ||
85 | .id = 1, | ||
86 | .enable = omap_mcbsp_clk_enable, | ||
87 | .disable = omap_mcbsp_clk_disable, | ||
88 | }, | ||
89 | }, | ||
90 | { | ||
91 | .clk = { | ||
92 | .name = "mcbsp_clk", | ||
93 | .id = 3, | ||
94 | .enable = omap_mcbsp_clk_enable, | ||
95 | .disable = omap_mcbsp_clk_disable, | ||
96 | }, | ||
97 | }, | ||
98 | }; | ||
99 | |||
100 | #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) | ||
101 | #else | ||
102 | #define omap_mcbsp_clks_size 0 | ||
103 | static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks; | ||
104 | static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) | ||
105 | { } | ||
106 | #endif | 33 | #endif |
107 | 34 | ||
108 | static void omap1_mcbsp_request(unsigned int id) | 35 | static void omap1_mcbsp_request(unsigned int id) |
@@ -167,8 +94,9 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | |||
167 | .rx_irq = INT_McBSP1RX, | 94 | .rx_irq = INT_McBSP1RX, |
168 | .tx_irq = INT_McBSP1TX, | 95 | .tx_irq = INT_McBSP1TX, |
169 | .ops = &omap1_mcbsp_ops, | 96 | .ops = &omap1_mcbsp_ops, |
170 | .clk_name = "mcbsp_clk", | 97 | .clk_names = clk_names, |
171 | }, | 98 | .num_clks = 3, |
99 | }, | ||
172 | { | 100 | { |
173 | .phys_base = OMAP1510_MCBSP2_BASE, | 101 | .phys_base = OMAP1510_MCBSP2_BASE, |
174 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, | 102 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, |
@@ -184,7 +112,8 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | |||
184 | .rx_irq = INT_McBSP3RX, | 112 | .rx_irq = INT_McBSP3RX, |
185 | .tx_irq = INT_McBSP3TX, | 113 | .tx_irq = INT_McBSP3TX, |
186 | .ops = &omap1_mcbsp_ops, | 114 | .ops = &omap1_mcbsp_ops, |
187 | .clk_name = "mcbsp_clk", | 115 | .clk_names = clk_names, |
116 | .num_clks = 3, | ||
188 | }, | 117 | }, |
189 | }; | 118 | }; |
190 | #define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) | 119 | #define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) |
@@ -202,7 +131,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | |||
202 | .rx_irq = INT_McBSP1RX, | 131 | .rx_irq = INT_McBSP1RX, |
203 | .tx_irq = INT_McBSP1TX, | 132 | .tx_irq = INT_McBSP1TX, |
204 | .ops = &omap1_mcbsp_ops, | 133 | .ops = &omap1_mcbsp_ops, |
205 | .clk_name = "mcbsp_clk", | 134 | .clk_names = clk_names, |
135 | .num_clks = 3, | ||
206 | }, | 136 | }, |
207 | { | 137 | { |
208 | .phys_base = OMAP1610_MCBSP2_BASE, | 138 | .phys_base = OMAP1610_MCBSP2_BASE, |
@@ -219,7 +149,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | |||
219 | .rx_irq = INT_McBSP3RX, | 149 | .rx_irq = INT_McBSP3RX, |
220 | .tx_irq = INT_McBSP3TX, | 150 | .tx_irq = INT_McBSP3TX, |
221 | .ops = &omap1_mcbsp_ops, | 151 | .ops = &omap1_mcbsp_ops, |
222 | .clk_name = "mcbsp_clk", | 152 | .clk_names = clk_names, |
153 | .num_clks = 3, | ||
223 | }, | 154 | }, |
224 | }; | 155 | }; |
225 | #define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) | 156 | #define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) |
@@ -230,15 +161,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | |||
230 | 161 | ||
231 | int __init omap1_mcbsp_init(void) | 162 | int __init omap1_mcbsp_init(void) |
232 | { | 163 | { |
233 | int i; | ||
234 | |||
235 | for (i = 0; i < omap_mcbsp_clks_size; i++) { | ||
236 | if (cpu_is_omap15xx() || cpu_is_omap16xx()) { | ||
237 | omap_mcbsp_clk_init(&omap_mcbsp_clks[i]); | ||
238 | clk_register(&omap_mcbsp_clks[i].clk); | ||
239 | } | ||
240 | } | ||
241 | |||
242 | if (cpu_is_omap730()) | 164 | if (cpu_is_omap730()) |
243 | omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; | 165 | omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; |
244 | if (cpu_is_omap15xx()) | 166 | if (cpu_is_omap15xx()) |
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index e20023c9d15d..a9e631fc1134 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -24,106 +24,7 @@ | |||
24 | #include <mach/cpu.h> | 24 | #include <mach/cpu.h> |
25 | #include <mach/mcbsp.h> | 25 | #include <mach/mcbsp.h> |
26 | 26 | ||
27 | struct mcbsp_internal_clk { | 27 | const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" }; |
28 | struct clk clk; | ||
29 | struct clk **childs; | ||
30 | int n_childs; | ||
31 | }; | ||
32 | |||
33 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
34 | static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) | ||
35 | { | ||
36 | const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" }; | ||
37 | int i; | ||
38 | |||
39 | mclk->n_childs = ARRAY_SIZE(clk_names); | ||
40 | mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *), | ||
41 | GFP_KERNEL); | ||
42 | |||
43 | for (i = 0; i < mclk->n_childs; i++) { | ||
44 | /* We fake a platform device to get correct device id */ | ||
45 | struct platform_device pdev; | ||
46 | |||
47 | pdev.dev.bus = &platform_bus_type; | ||
48 | pdev.id = mclk->clk.id; | ||
49 | mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]); | ||
50 | if (IS_ERR(mclk->childs[i])) | ||
51 | printk(KERN_ERR "Could not get clock %s (%d).\n", | ||
52 | clk_names[i], mclk->clk.id); | ||
53 | } | ||
54 | } | ||
55 | |||
56 | static int omap_mcbsp_clk_enable(struct clk *clk) | ||
57 | { | ||
58 | struct mcbsp_internal_clk *mclk = container_of(clk, | ||
59 | struct mcbsp_internal_clk, clk); | ||
60 | int i; | ||
61 | |||
62 | for (i = 0; i < mclk->n_childs; i++) | ||
63 | clk_enable(mclk->childs[i]); | ||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | static void omap_mcbsp_clk_disable(struct clk *clk) | ||
68 | { | ||
69 | struct mcbsp_internal_clk *mclk = container_of(clk, | ||
70 | struct mcbsp_internal_clk, clk); | ||
71 | int i; | ||
72 | |||
73 | for (i = 0; i < mclk->n_childs; i++) | ||
74 | clk_disable(mclk->childs[i]); | ||
75 | } | ||
76 | |||
77 | static struct mcbsp_internal_clk omap_mcbsp_clks[] = { | ||
78 | { | ||
79 | .clk = { | ||
80 | .name = "mcbsp_clk", | ||
81 | .id = 1, | ||
82 | .enable = omap_mcbsp_clk_enable, | ||
83 | .disable = omap_mcbsp_clk_disable, | ||
84 | }, | ||
85 | }, | ||
86 | { | ||
87 | .clk = { | ||
88 | .name = "mcbsp_clk", | ||
89 | .id = 2, | ||
90 | .enable = omap_mcbsp_clk_enable, | ||
91 | .disable = omap_mcbsp_clk_disable, | ||
92 | }, | ||
93 | }, | ||
94 | { | ||
95 | .clk = { | ||
96 | .name = "mcbsp_clk", | ||
97 | .id = 3, | ||
98 | .enable = omap_mcbsp_clk_enable, | ||
99 | .disable = omap_mcbsp_clk_disable, | ||
100 | }, | ||
101 | }, | ||
102 | { | ||
103 | .clk = { | ||
104 | .name = "mcbsp_clk", | ||
105 | .id = 4, | ||
106 | .enable = omap_mcbsp_clk_enable, | ||
107 | .disable = omap_mcbsp_clk_disable, | ||
108 | }, | ||
109 | }, | ||
110 | { | ||
111 | .clk = { | ||
112 | .name = "mcbsp_clk", | ||
113 | .id = 5, | ||
114 | .enable = omap_mcbsp_clk_enable, | ||
115 | .disable = omap_mcbsp_clk_disable, | ||
116 | }, | ||
117 | }, | ||
118 | }; | ||
119 | |||
120 | #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) | ||
121 | #else | ||
122 | #define omap_mcbsp_clks_size 0 | ||
123 | static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks; | ||
124 | static inline void omap_mcbsp_clk_init(struct clk *clk) | ||
125 | { } | ||
126 | #endif | ||
127 | 28 | ||
128 | static void omap2_mcbsp2_mux_setup(void) | 29 | static void omap2_mcbsp2_mux_setup(void) |
129 | { | 30 | { |
@@ -156,7 +57,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { | |||
156 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 57 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
157 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 58 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
158 | .ops = &omap2_mcbsp_ops, | 59 | .ops = &omap2_mcbsp_ops, |
159 | .clk_name = "mcbsp_clk", | 60 | .clk_names = clk_names, |
61 | .num_clks = 2, | ||
160 | }, | 62 | }, |
161 | { | 63 | { |
162 | .phys_base = OMAP24XX_MCBSP2_BASE, | 64 | .phys_base = OMAP24XX_MCBSP2_BASE, |
@@ -165,7 +67,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { | |||
165 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 67 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
166 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 68 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
167 | .ops = &omap2_mcbsp_ops, | 69 | .ops = &omap2_mcbsp_ops, |
168 | .clk_name = "mcbsp_clk", | 70 | .clk_names = clk_names, |
71 | .num_clks = 2, | ||
169 | }, | 72 | }, |
170 | }; | 73 | }; |
171 | #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) | 74 | #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) |
@@ -183,7 +86,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
183 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 86 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
184 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 87 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
185 | .ops = &omap2_mcbsp_ops, | 88 | .ops = &omap2_mcbsp_ops, |
186 | .clk_name = "mcbsp_clk", | 89 | .clk_names = clk_names, |
90 | .num_clks = 2, | ||
187 | }, | 91 | }, |
188 | { | 92 | { |
189 | .phys_base = OMAP24XX_MCBSP2_BASE, | 93 | .phys_base = OMAP24XX_MCBSP2_BASE, |
@@ -192,7 +96,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
192 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 96 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
193 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 97 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
194 | .ops = &omap2_mcbsp_ops, | 98 | .ops = &omap2_mcbsp_ops, |
195 | .clk_name = "mcbsp_clk", | 99 | .clk_names = clk_names, |
100 | .num_clks = 2, | ||
196 | }, | 101 | }, |
197 | { | 102 | { |
198 | .phys_base = OMAP2430_MCBSP3_BASE, | 103 | .phys_base = OMAP2430_MCBSP3_BASE, |
@@ -201,7 +106,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
201 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, | 106 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, |
202 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, | 107 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, |
203 | .ops = &omap2_mcbsp_ops, | 108 | .ops = &omap2_mcbsp_ops, |
204 | .clk_name = "mcbsp_clk", | 109 | .clk_names = clk_names, |
110 | .num_clks = 2, | ||
205 | }, | 111 | }, |
206 | { | 112 | { |
207 | .phys_base = OMAP2430_MCBSP4_BASE, | 113 | .phys_base = OMAP2430_MCBSP4_BASE, |
@@ -210,7 +116,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
210 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, | 116 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, |
211 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, | 117 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, |
212 | .ops = &omap2_mcbsp_ops, | 118 | .ops = &omap2_mcbsp_ops, |
213 | .clk_name = "mcbsp_clk", | 119 | .clk_names = clk_names, |
120 | .num_clks = 2, | ||
214 | }, | 121 | }, |
215 | { | 122 | { |
216 | .phys_base = OMAP2430_MCBSP5_BASE, | 123 | .phys_base = OMAP2430_MCBSP5_BASE, |
@@ -219,7 +126,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
219 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, | 126 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, |
220 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, | 127 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, |
221 | .ops = &omap2_mcbsp_ops, | 128 | .ops = &omap2_mcbsp_ops, |
222 | .clk_name = "mcbsp_clk", | 129 | .clk_names = clk_names, |
130 | .num_clks = 2, | ||
223 | }, | 131 | }, |
224 | }; | 132 | }; |
225 | #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) | 133 | #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) |
@@ -237,7 +145,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
237 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 145 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
238 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 146 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
239 | .ops = &omap2_mcbsp_ops, | 147 | .ops = &omap2_mcbsp_ops, |
240 | .clk_name = "mcbsp_clk", | 148 | .clk_names = clk_names, |
149 | .num_clks = 2, | ||
241 | }, | 150 | }, |
242 | { | 151 | { |
243 | .phys_base = OMAP34XX_MCBSP2_BASE, | 152 | .phys_base = OMAP34XX_MCBSP2_BASE, |
@@ -246,7 +155,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
246 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 155 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
247 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 156 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
248 | .ops = &omap2_mcbsp_ops, | 157 | .ops = &omap2_mcbsp_ops, |
249 | .clk_name = "mcbsp_clk", | 158 | .clk_names = clk_names, |
159 | .num_clks = 2, | ||
250 | }, | 160 | }, |
251 | { | 161 | { |
252 | .phys_base = OMAP34XX_MCBSP3_BASE, | 162 | .phys_base = OMAP34XX_MCBSP3_BASE, |
@@ -255,7 +165,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
255 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, | 165 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, |
256 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, | 166 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, |
257 | .ops = &omap2_mcbsp_ops, | 167 | .ops = &omap2_mcbsp_ops, |
258 | .clk_name = "mcbsp_clk", | 168 | .clk_names = clk_names, |
169 | .num_clks = 2, | ||
259 | }, | 170 | }, |
260 | { | 171 | { |
261 | .phys_base = OMAP34XX_MCBSP4_BASE, | 172 | .phys_base = OMAP34XX_MCBSP4_BASE, |
@@ -264,7 +175,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
264 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, | 175 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, |
265 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, | 176 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, |
266 | .ops = &omap2_mcbsp_ops, | 177 | .ops = &omap2_mcbsp_ops, |
267 | .clk_name = "mcbsp_clk", | 178 | .clk_names = clk_names, |
179 | .num_clks = 2, | ||
268 | }, | 180 | }, |
269 | { | 181 | { |
270 | .phys_base = OMAP34XX_MCBSP5_BASE, | 182 | .phys_base = OMAP34XX_MCBSP5_BASE, |
@@ -273,7 +185,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
273 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, | 185 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, |
274 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, | 186 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, |
275 | .ops = &omap2_mcbsp_ops, | 187 | .ops = &omap2_mcbsp_ops, |
276 | .clk_name = "mcbsp_clk", | 188 | .clk_names = clk_names, |
189 | .num_clks = 2, | ||
277 | }, | 190 | }, |
278 | }; | 191 | }; |
279 | #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) | 192 | #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) |
@@ -284,14 +197,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
284 | 197 | ||
285 | static int __init omap2_mcbsp_init(void) | 198 | static int __init omap2_mcbsp_init(void) |
286 | { | 199 | { |
287 | int i; | ||
288 | |||
289 | for (i = 0; i < omap_mcbsp_clks_size; i++) { | ||
290 | /* Once we call clk_get inside init, we do not register it */ | ||
291 | omap_mcbsp_clk_init(&omap_mcbsp_clks[i]); | ||
292 | clk_register(&omap_mcbsp_clks[i].clk); | ||
293 | } | ||
294 | |||
295 | if (cpu_is_omap2420()) | 200 | if (cpu_is_omap2420()) |
296 | omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; | 201 | omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; |
297 | if (cpu_is_omap2430()) | 202 | if (cpu_is_omap2430()) |
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h index eef873db3d48..113c2466c86a 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/mach/mcbsp.h | |||
@@ -344,7 +344,8 @@ struct omap_mcbsp_platform_data { | |||
344 | u8 dma_rx_sync, dma_tx_sync; | 344 | u8 dma_rx_sync, dma_tx_sync; |
345 | u16 rx_irq, tx_irq; | 345 | u16 rx_irq, tx_irq; |
346 | struct omap_mcbsp_ops *ops; | 346 | struct omap_mcbsp_ops *ops; |
347 | char const *clk_name; | 347 | char const **clk_names; |
348 | int num_clks; | ||
348 | }; | 349 | }; |
349 | 350 | ||
350 | struct omap_mcbsp { | 351 | struct omap_mcbsp { |
@@ -376,7 +377,8 @@ struct omap_mcbsp { | |||
376 | /* Protect the field .free, while checking if the mcbsp is in use */ | 377 | /* Protect the field .free, while checking if the mcbsp is in use */ |
377 | spinlock_t lock; | 378 | spinlock_t lock; |
378 | struct omap_mcbsp_platform_data *pdata; | 379 | struct omap_mcbsp_platform_data *pdata; |
379 | struct clk *clk; | 380 | struct clk **clks; |
381 | int num_clks; | ||
380 | }; | 382 | }; |
381 | extern struct omap_mcbsp **mcbsp_ptr; | 383 | extern struct omap_mcbsp **mcbsp_ptr; |
382 | extern int omap_mcbsp_count; | 384 | extern int omap_mcbsp_count; |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index f2401a831f99..e5842e30e534 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -214,6 +214,7 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type); | |||
214 | int omap_mcbsp_request(unsigned int id) | 214 | int omap_mcbsp_request(unsigned int id) |
215 | { | 215 | { |
216 | struct omap_mcbsp *mcbsp; | 216 | struct omap_mcbsp *mcbsp; |
217 | int i; | ||
217 | int err; | 218 | int err; |
218 | 219 | ||
219 | if (!omap_mcbsp_check_valid_id(id)) { | 220 | if (!omap_mcbsp_check_valid_id(id)) { |
@@ -225,7 +226,8 @@ int omap_mcbsp_request(unsigned int id) | |||
225 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) | 226 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) |
226 | mcbsp->pdata->ops->request(id); | 227 | mcbsp->pdata->ops->request(id); |
227 | 228 | ||
228 | clk_enable(mcbsp->clk); | 229 | for (i = 0; i < mcbsp->num_clks; i++) |
230 | clk_enable(mcbsp->clks[i]); | ||
229 | 231 | ||
230 | spin_lock(&mcbsp->lock); | 232 | spin_lock(&mcbsp->lock); |
231 | if (!mcbsp->free) { | 233 | if (!mcbsp->free) { |
@@ -276,6 +278,7 @@ EXPORT_SYMBOL(omap_mcbsp_request); | |||
276 | void omap_mcbsp_free(unsigned int id) | 278 | void omap_mcbsp_free(unsigned int id) |
277 | { | 279 | { |
278 | struct omap_mcbsp *mcbsp; | 280 | struct omap_mcbsp *mcbsp; |
281 | int i; | ||
279 | 282 | ||
280 | if (!omap_mcbsp_check_valid_id(id)) { | 283 | if (!omap_mcbsp_check_valid_id(id)) { |
281 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | 284 | printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); |
@@ -286,7 +289,8 @@ void omap_mcbsp_free(unsigned int id) | |||
286 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) | 289 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) |
287 | mcbsp->pdata->ops->free(id); | 290 | mcbsp->pdata->ops->free(id); |
288 | 291 | ||
289 | clk_disable(mcbsp->clk); | 292 | for (i = mcbsp->num_clks - 1; i >= 0; i--) |
293 | clk_disable(mcbsp->clks[i]); | ||
290 | 294 | ||
291 | spin_lock(&mcbsp->lock); | 295 | spin_lock(&mcbsp->lock); |
292 | if (mcbsp->free) { | 296 | if (mcbsp->free) { |
@@ -872,6 +876,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) | |||
872 | struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; | 876 | struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; |
873 | struct omap_mcbsp *mcbsp; | 877 | struct omap_mcbsp *mcbsp; |
874 | int id = pdev->id - 1; | 878 | int id = pdev->id - 1; |
879 | int i; | ||
875 | int ret = 0; | 880 | int ret = 0; |
876 | 881 | ||
877 | if (!pdata) { | 882 | if (!pdata) { |
@@ -916,14 +921,25 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) | |||
916 | mcbsp->dma_rx_sync = pdata->dma_rx_sync; | 921 | mcbsp->dma_rx_sync = pdata->dma_rx_sync; |
917 | mcbsp->dma_tx_sync = pdata->dma_tx_sync; | 922 | mcbsp->dma_tx_sync = pdata->dma_tx_sync; |
918 | 923 | ||
919 | if (pdata->clk_name) | 924 | if (pdata->num_clks) { |
920 | mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name); | 925 | mcbsp->num_clks = pdata->num_clks; |
921 | if (IS_ERR(mcbsp->clk)) { | 926 | mcbsp->clks = kzalloc(mcbsp->num_clks * sizeof(struct clk *), |
922 | dev_err(&pdev->dev, | 927 | GFP_KERNEL); |
923 | "Invalid clock configuration for McBSP%d.\n", | 928 | if (!mcbsp->clks) { |
924 | mcbsp->id); | 929 | ret = -ENOMEM; |
925 | ret = PTR_ERR(mcbsp->clk); | 930 | goto exit; |
926 | goto err_clk; | 931 | } |
932 | for (i = 0; i < mcbsp->num_clks; i++) { | ||
933 | mcbsp->clks[i] = clk_get(&pdev->dev, pdata->clk_names[i]); | ||
934 | if (IS_ERR(mcbsp->clks[i])) { | ||
935 | dev_err(&pdev->dev, | ||
936 | "Invalid %s configuration for McBSP%d.\n", | ||
937 | pdata->clk_names[i], mcbsp->id); | ||
938 | ret = PTR_ERR(mcbsp->clks[i]); | ||
939 | goto err_clk; | ||
940 | } | ||
941 | } | ||
942 | |||
927 | } | 943 | } |
928 | 944 | ||
929 | mcbsp->pdata = pdata; | 945 | mcbsp->pdata = pdata; |
@@ -932,6 +948,9 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) | |||
932 | return 0; | 948 | return 0; |
933 | 949 | ||
934 | err_clk: | 950 | err_clk: |
951 | while (i--) | ||
952 | clk_put(mcbsp->clks[i]); | ||
953 | kfree(mcbsp->clks); | ||
935 | iounmap(mcbsp->io_base); | 954 | iounmap(mcbsp->io_base); |
936 | err_ioremap: | 955 | err_ioremap: |
937 | mcbsp->free = 0; | 956 | mcbsp->free = 0; |
@@ -942,6 +961,7 @@ exit: | |||
942 | static int __devexit omap_mcbsp_remove(struct platform_device *pdev) | 961 | static int __devexit omap_mcbsp_remove(struct platform_device *pdev) |
943 | { | 962 | { |
944 | struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); | 963 | struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); |
964 | int i; | ||
945 | 965 | ||
946 | platform_set_drvdata(pdev, NULL); | 966 | platform_set_drvdata(pdev, NULL); |
947 | if (mcbsp) { | 967 | if (mcbsp) { |
@@ -950,12 +970,18 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev) | |||
950 | mcbsp->pdata->ops->free) | 970 | mcbsp->pdata->ops->free) |
951 | mcbsp->pdata->ops->free(mcbsp->id); | 971 | mcbsp->pdata->ops->free(mcbsp->id); |
952 | 972 | ||
953 | clk_disable(mcbsp->clk); | 973 | for (i = mcbsp->num_clks - 1; i >= 0; i--) { |
954 | clk_put(mcbsp->clk); | 974 | clk_disable(mcbsp->clks[i]); |
975 | clk_put(mcbsp->clks[i]); | ||
976 | } | ||
955 | 977 | ||
956 | iounmap(mcbsp->io_base); | 978 | iounmap(mcbsp->io_base); |
957 | 979 | ||
958 | mcbsp->clk = NULL; | 980 | if (mcbsp->num_clks) { |
981 | kfree(mcbsp->clks); | ||
982 | mcbsp->clks = NULL; | ||
983 | mcbsp->num_clks = 0; | ||
984 | } | ||
959 | mcbsp->free = 0; | 985 | mcbsp->free = 0; |
960 | mcbsp->dev = NULL; | 986 | mcbsp->dev = NULL; |
961 | } | 987 | } |