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authorCatalin Marinas <catalin.marinas@arm.com>2010-03-29 05:29:46 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-03-29 12:33:33 -0400
commitfd522a8dec11a08b5fdd23982193808e268be19e (patch)
tree0eb958250db72b19ff2e9da63c432e19be0122bb /arch
parent782a0fd16723bfc0e765d789e82853d5dc424e76 (diff)
ARM: 6006/1: ARM: Use the correct NOP size in memmove for Thumb-2 kernel builds
When compiling the kernel to Thumb-2, using a 16-bit NOP in the memmove() implementation causes the preceding ADD PC instruction to branch incorrectly in the middle of a 32-bit LDR or STR instruction. The memmove() code is now similar to the memcpy() template. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/lib/memmove.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S
index 5025c863713d..938fc14f962d 100644
--- a/arch/arm/lib/memmove.S
+++ b/arch/arm/lib/memmove.S
@@ -74,7 +74,7 @@ ENTRY(memmove)
74 rsb ip, ip, #32 74 rsb ip, ip, #32
75 addne pc, pc, ip @ C is always clear here 75 addne pc, pc, ip @ C is always clear here
76 b 7f 76 b 7f
776: nop 776: W(nop)
78 W(ldr) r3, [r1, #-4]! 78 W(ldr) r3, [r1, #-4]!
79 W(ldr) r4, [r1, #-4]! 79 W(ldr) r4, [r1, #-4]!
80 W(ldr) r5, [r1, #-4]! 80 W(ldr) r5, [r1, #-4]!
@@ -85,7 +85,7 @@ ENTRY(memmove)
85 85
86 add pc, pc, ip 86 add pc, pc, ip
87 nop 87 nop
88 nop 88 W(nop)
89 W(str) r3, [r0, #-4]! 89 W(str) r3, [r0, #-4]!
90 W(str) r4, [r0, #-4]! 90 W(str) r4, [r0, #-4]!
91 W(str) r5, [r0, #-4]! 91 W(str) r5, [r0, #-4]!