diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-06-01 19:55:42 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-06-01 19:55:42 -0400 |
commit | f5e7e844a571124ffc117d4696787d6afc4fc5ae (patch) | |
tree | 26bb17dc94e9536da540c187b00cedb0c1b24664 /arch | |
parent | 48445159e9ecb44a96a4de06c6ae7c54eb43ba5b (diff) | |
parent | 4a43faf54e9173b6acce37cf7f053fc9515a2cdf (diff) |
Merge tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd
Pull mtd update from David Woodhouse:
- More robust parsing especially of xattr data in JFFS2
- Updates to mxc_nand and gpmi drivers to support new boards and device tree
- Improve consistency of information about ECC strength in NAND devices
- Clean up partition handling of plat_nand
- Support NAND drivers without dedicated access to OOB area
- BCH hardware ECC support for OMAP
- Other fixes and cleanups, and a few new device IDs
Fixed trivial conflict in drivers/mtd/nand/gpmi-nand/gpmi-nand.c due to
added include files next to each other.
* tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd: (75 commits)
mtd: mxc_nand: move ecc strengh setup before nand_scan_tail
mtd: block2mtd: fix recursive call of mtd_writev
mtd: gpmi-nand: define ecc.strength
mtd: of_parts: fix breakage in Kconfig
mtd: nand: fix scan_read_raw_oob
mtd: docg3 fix in-middle of blocks reads
mtd: cfi_cmdset_0002: Slight cleanup of fixup messages
mtd: add fixup for S29NS512P NOR flash.
jffs2: allow to complete xattr integrity check on first GC scan
jffs2: allow to discriminate between recoverable and non-recoverable errors
mtd: nand: omap: add support for hardware BCH ecc
ARM: OMAP3: gpmc: add BCH ecc api and modes
mtd: nand: check the return code of 'read_oob/read_oob_raw'
mtd: nand: remove 'sndcmd' parameter of 'read_oob/read_oob_raw'
mtd: m25p80: Add support for Winbond W25Q80BW
jffs2: get rid of jffs2_sync_super
jffs2: remove unnecessary GC pass on sync
jffs2: remove unnecessary GC pass on umount
jffs2: remove lock_super
mtd: gpmi: add gpmi support for mx6q
...
Diffstat (limited to 'arch')
23 files changed, 206 insertions, 56 deletions
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 2b1a166d41f9..386c769c38d1 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi | |||
@@ -213,5 +213,14 @@ | |||
213 | status = "disabled"; | 213 | status = "disabled"; |
214 | }; | 214 | }; |
215 | }; | 215 | }; |
216 | nand@d8000000 { | ||
217 | #address-cells = <1>; | ||
218 | #size-cells = <1>; | ||
219 | |||
220 | compatible = "fsl,imx27-nand"; | ||
221 | reg = <0xd8000000 0x1000>; | ||
222 | interrupts = <29>; | ||
223 | status = "disabled"; | ||
224 | }; | ||
216 | }; | 225 | }; |
217 | }; | 226 | }; |
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c index eb282378fa78..01abd3516a77 100644 --- a/arch/arm/mach-ep93xx/snappercl15.c +++ b/arch/arm/mach-ep93xx/snappercl15.c | |||
@@ -82,8 +82,6 @@ static int snappercl15_nand_dev_ready(struct mtd_info *mtd) | |||
82 | return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY); | 82 | return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY); |
83 | } | 83 | } |
84 | 84 | ||
85 | static const char *snappercl15_nand_part_probes[] = {"cmdlinepart", NULL}; | ||
86 | |||
87 | static struct mtd_partition snappercl15_nand_parts[] = { | 85 | static struct mtd_partition snappercl15_nand_parts[] = { |
88 | { | 86 | { |
89 | .name = "Kernel", | 87 | .name = "Kernel", |
@@ -100,10 +98,8 @@ static struct mtd_partition snappercl15_nand_parts[] = { | |||
100 | static struct platform_nand_data snappercl15_nand_data = { | 98 | static struct platform_nand_data snappercl15_nand_data = { |
101 | .chip = { | 99 | .chip = { |
102 | .nr_chips = 1, | 100 | .nr_chips = 1, |
103 | .part_probe_types = snappercl15_nand_part_probes, | ||
104 | .partitions = snappercl15_nand_parts, | 101 | .partitions = snappercl15_nand_parts, |
105 | .nr_partitions = ARRAY_SIZE(snappercl15_nand_parts), | 102 | .nr_partitions = ARRAY_SIZE(snappercl15_nand_parts), |
106 | .options = NAND_NO_AUTOINCR, | ||
107 | .chip_delay = 25, | 103 | .chip_delay = 25, |
108 | }, | 104 | }, |
109 | .ctrl = { | 105 | .ctrl = { |
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c index d4ef339d961e..75cab2d7ec73 100644 --- a/arch/arm/mach-ep93xx/ts72xx.c +++ b/arch/arm/mach-ep93xx/ts72xx.c | |||
@@ -105,8 +105,6 @@ static int ts72xx_nand_device_ready(struct mtd_info *mtd) | |||
105 | return !!(__raw_readb(addr) & 0x20); | 105 | return !!(__raw_readb(addr) & 0x20); |
106 | } | 106 | } |
107 | 107 | ||
108 | static const char *ts72xx_nand_part_probes[] = { "cmdlinepart", NULL }; | ||
109 | |||
110 | #define TS72XX_BOOTROM_PART_SIZE (SZ_16K) | 108 | #define TS72XX_BOOTROM_PART_SIZE (SZ_16K) |
111 | #define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M) | 109 | #define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M) |
112 | 110 | ||
@@ -134,7 +132,6 @@ static struct platform_nand_data ts72xx_nand_data = { | |||
134 | .nr_chips = 1, | 132 | .nr_chips = 1, |
135 | .chip_offset = 0, | 133 | .chip_offset = 0, |
136 | .chip_delay = 15, | 134 | .chip_delay = 15, |
137 | .part_probe_types = ts72xx_nand_part_probes, | ||
138 | .partitions = ts72xx_nand_parts, | 135 | .partitions = ts72xx_nand_parts, |
139 | .nr_partitions = ARRAY_SIZE(ts72xx_nand_parts), | 136 | .nr_partitions = ARRAY_SIZE(ts72xx_nand_parts), |
140 | }, | 137 | }, |
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c index ed38d03c61f2..eee0cc8d92a4 100644 --- a/arch/arm/mach-imx/imx27-dt.c +++ b/arch/arm/mach-imx/imx27-dt.c | |||
@@ -29,6 +29,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = { | |||
29 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL), | 29 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL), |
30 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL), | 30 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL), |
31 | OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL), | 31 | OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL), |
32 | OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "mxc_nand.0", NULL), | ||
32 | { /* sentinel */ } | 33 | { /* sentinel */ } |
33 | }; | 34 | }; |
34 | 35 | ||
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 3d742aee1773..108a9d3f382d 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c | |||
@@ -60,8 +60,6 @@ static struct platform_device ixdp425_flash = { | |||
60 | #if defined(CONFIG_MTD_NAND_PLATFORM) || \ | 60 | #if defined(CONFIG_MTD_NAND_PLATFORM) || \ |
61 | defined(CONFIG_MTD_NAND_PLATFORM_MODULE) | 61 | defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
62 | 62 | ||
63 | const char *part_probes[] = { "cmdlinepart", NULL }; | ||
64 | |||
65 | static struct mtd_partition ixdp425_partitions[] = { | 63 | static struct mtd_partition ixdp425_partitions[] = { |
66 | { | 64 | { |
67 | .name = "ixp400 NAND FS 0", | 65 | .name = "ixp400 NAND FS 0", |
@@ -100,8 +98,6 @@ static struct platform_nand_data ixdp425_flash_nand_data = { | |||
100 | .chip = { | 98 | .chip = { |
101 | .nr_chips = 1, | 99 | .nr_chips = 1, |
102 | .chip_delay = 30, | 100 | .chip_delay = 30, |
103 | .options = NAND_NO_AUTOINCR, | ||
104 | .part_probe_types = part_probes, | ||
105 | .partitions = ixdp425_partitions, | 101 | .partitions = ixdp425_partitions, |
106 | .nr_partitions = ARRAY_SIZE(ixdp425_partitions), | 102 | .nr_partitions = ARRAY_SIZE(ixdp425_partitions), |
107 | }, | 103 | }, |
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 58cacafcf662..2e8d3e176bc7 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c | |||
@@ -111,7 +111,7 @@ static struct nomadik_nand_platform_data nhk8815_nand_data = { | |||
111 | .parts = nhk8815_partitions, | 111 | .parts = nhk8815_partitions, |
112 | .nparts = ARRAY_SIZE(nhk8815_partitions), | 112 | .nparts = ARRAY_SIZE(nhk8815_partitions), |
113 | .options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING \ | 113 | .options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING \ |
114 | | NAND_NO_READRDY | NAND_NO_AUTOINCR, | 114 | | NAND_NO_READRDY, |
115 | .init = nhk8815_nand_init, | 115 | .init = nhk8815_nand_init, |
116 | }; | 116 | }; |
117 | 117 | ||
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index c7364fdbda05..6872f3fd400f 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
@@ -192,14 +192,11 @@ static int nand_dev_ready(struct mtd_info *mtd) | |||
192 | return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN); | 192 | return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN); |
193 | } | 193 | } |
194 | 194 | ||
195 | static const char *part_probes[] = { "cmdlinepart", NULL }; | ||
196 | |||
197 | static struct platform_nand_data nand_data = { | 195 | static struct platform_nand_data nand_data = { |
198 | .chip = { | 196 | .chip = { |
199 | .nr_chips = 1, | 197 | .nr_chips = 1, |
200 | .chip_offset = 0, | 198 | .chip_offset = 0, |
201 | .options = NAND_SAMSUNG_LP_OPTIONS, | 199 | .options = NAND_SAMSUNG_LP_OPTIONS, |
202 | .part_probe_types = part_probes, | ||
203 | }, | 200 | }, |
204 | .ctrl = { | 201 | .ctrl = { |
205 | .cmd_ctrl = omap1_nand_cmd_ctl, | 202 | .cmd_ctrl = omap1_nand_cmd_ctl, |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 7e503686f7af..a28e989a63f4 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
@@ -186,8 +186,6 @@ static int h2_nand_dev_ready(struct mtd_info *mtd) | |||
186 | return gpio_get_value(H2_NAND_RB_GPIO_PIN); | 186 | return gpio_get_value(H2_NAND_RB_GPIO_PIN); |
187 | } | 187 | } |
188 | 188 | ||
189 | static const char *h2_part_probes[] = { "cmdlinepart", NULL }; | ||
190 | |||
191 | static struct platform_nand_data h2_nand_platdata = { | 189 | static struct platform_nand_data h2_nand_platdata = { |
192 | .chip = { | 190 | .chip = { |
193 | .nr_chips = 1, | 191 | .nr_chips = 1, |
@@ -195,7 +193,6 @@ static struct platform_nand_data h2_nand_platdata = { | |||
195 | .nr_partitions = ARRAY_SIZE(h2_nand_partitions), | 193 | .nr_partitions = ARRAY_SIZE(h2_nand_partitions), |
196 | .partitions = h2_nand_partitions, | 194 | .partitions = h2_nand_partitions, |
197 | .options = NAND_SAMSUNG_LP_OPTIONS, | 195 | .options = NAND_SAMSUNG_LP_OPTIONS, |
198 | .part_probe_types = h2_part_probes, | ||
199 | }, | 196 | }, |
200 | .ctrl = { | 197 | .ctrl = { |
201 | .cmd_ctrl = omap1_nand_cmd_ctl, | 198 | .cmd_ctrl = omap1_nand_cmd_ctl, |
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 9fb03f189d93..108a8640fc6f 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -188,8 +188,6 @@ static int nand_dev_ready(struct mtd_info *mtd) | |||
188 | return gpio_get_value(H3_NAND_RB_GPIO_PIN); | 188 | return gpio_get_value(H3_NAND_RB_GPIO_PIN); |
189 | } | 189 | } |
190 | 190 | ||
191 | static const char *part_probes[] = { "cmdlinepart", NULL }; | ||
192 | |||
193 | static struct platform_nand_data nand_platdata = { | 191 | static struct platform_nand_data nand_platdata = { |
194 | .chip = { | 192 | .chip = { |
195 | .nr_chips = 1, | 193 | .nr_chips = 1, |
@@ -197,7 +195,6 @@ static struct platform_nand_data nand_platdata = { | |||
197 | .nr_partitions = ARRAY_SIZE(nand_partitions), | 195 | .nr_partitions = ARRAY_SIZE(nand_partitions), |
198 | .partitions = nand_partitions, | 196 | .partitions = nand_partitions, |
199 | .options = NAND_SAMSUNG_LP_OPTIONS, | 197 | .options = NAND_SAMSUNG_LP_OPTIONS, |
200 | .part_probe_types = part_probes, | ||
201 | }, | 198 | }, |
202 | .ctrl = { | 199 | .ctrl = { |
203 | .cmd_ctrl = omap1_nand_cmd_ctl, | 200 | .cmd_ctrl = omap1_nand_cmd_ctl, |
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index f2cb24387c22..703d55ecffe2 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -150,14 +150,11 @@ static int nand_dev_ready(struct mtd_info *mtd) | |||
150 | return gpio_get_value(P2_NAND_RB_GPIO_PIN); | 150 | return gpio_get_value(P2_NAND_RB_GPIO_PIN); |
151 | } | 151 | } |
152 | 152 | ||
153 | static const char *part_probes[] = { "cmdlinepart", NULL }; | ||
154 | |||
155 | static struct platform_nand_data nand_data = { | 153 | static struct platform_nand_data nand_data = { |
156 | .chip = { | 154 | .chip = { |
157 | .nr_chips = 1, | 155 | .nr_chips = 1, |
158 | .chip_offset = 0, | 156 | .chip_offset = 0, |
159 | .options = NAND_SAMSUNG_LP_OPTIONS, | 157 | .options = NAND_SAMSUNG_LP_OPTIONS, |
160 | .part_probe_types = part_probes, | ||
161 | }, | 158 | }, |
162 | .ctrl = { | 159 | .ctrl = { |
163 | .cmd_ctrl = omap1_nand_cmd_ctl, | 160 | .cmd_ctrl = omap1_nand_cmd_ctl, |
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 46b09dae770e..2286410671e7 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -49,6 +49,7 @@ | |||
49 | #define GPMC_ECC_CONTROL 0x1f8 | 49 | #define GPMC_ECC_CONTROL 0x1f8 |
50 | #define GPMC_ECC_SIZE_CONFIG 0x1fc | 50 | #define GPMC_ECC_SIZE_CONFIG 0x1fc |
51 | #define GPMC_ECC1_RESULT 0x200 | 51 | #define GPMC_ECC1_RESULT 0x200 |
52 | #define GPMC_ECC_BCH_RESULT_0 0x240 /* not available on OMAP2 */ | ||
52 | 53 | ||
53 | /* GPMC ECC control settings */ | 54 | /* GPMC ECC control settings */ |
54 | #define GPMC_ECC_CTRL_ECCCLEAR 0x100 | 55 | #define GPMC_ECC_CTRL_ECCCLEAR 0x100 |
@@ -935,3 +936,186 @@ int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code) | |||
935 | return 0; | 936 | return 0; |
936 | } | 937 | } |
937 | EXPORT_SYMBOL_GPL(gpmc_calculate_ecc); | 938 | EXPORT_SYMBOL_GPL(gpmc_calculate_ecc); |
939 | |||
940 | #ifdef CONFIG_ARCH_OMAP3 | ||
941 | |||
942 | /** | ||
943 | * gpmc_init_hwecc_bch - initialize hardware BCH ecc functionality | ||
944 | * @cs: chip select number | ||
945 | * @nsectors: how many 512-byte sectors to process | ||
946 | * @nerrors: how many errors to correct per sector (4 or 8) | ||
947 | * | ||
948 | * This function must be executed before any call to gpmc_enable_hwecc_bch. | ||
949 | */ | ||
950 | int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors) | ||
951 | { | ||
952 | /* check if ecc module is in use */ | ||
953 | if (gpmc_ecc_used != -EINVAL) | ||
954 | return -EINVAL; | ||
955 | |||
956 | /* support only OMAP3 class */ | ||
957 | if (!cpu_is_omap34xx()) { | ||
958 | printk(KERN_ERR "BCH ecc is not supported on this CPU\n"); | ||
959 | return -EINVAL; | ||
960 | } | ||
961 | |||
962 | /* | ||
963 | * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1. | ||
964 | * Other chips may be added if confirmed to work. | ||
965 | */ | ||
966 | if ((nerrors == 4) && | ||
967 | (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) { | ||
968 | printk(KERN_ERR "BCH 4-bit mode is not supported on this CPU\n"); | ||
969 | return -EINVAL; | ||
970 | } | ||
971 | |||
972 | /* sanity check */ | ||
973 | if (nsectors > 8) { | ||
974 | printk(KERN_ERR "BCH cannot process %d sectors (max is 8)\n", | ||
975 | nsectors); | ||
976 | return -EINVAL; | ||
977 | } | ||
978 | |||
979 | return 0; | ||
980 | } | ||
981 | EXPORT_SYMBOL_GPL(gpmc_init_hwecc_bch); | ||
982 | |||
983 | /** | ||
984 | * gpmc_enable_hwecc_bch - enable hardware BCH ecc functionality | ||
985 | * @cs: chip select number | ||
986 | * @mode: read/write mode | ||
987 | * @dev_width: device bus width(1 for x16, 0 for x8) | ||
988 | * @nsectors: how many 512-byte sectors to process | ||
989 | * @nerrors: how many errors to correct per sector (4 or 8) | ||
990 | */ | ||
991 | int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors, | ||
992 | int nerrors) | ||
993 | { | ||
994 | unsigned int val; | ||
995 | |||
996 | /* check if ecc module is in use */ | ||
997 | if (gpmc_ecc_used != -EINVAL) | ||
998 | return -EINVAL; | ||
999 | |||
1000 | gpmc_ecc_used = cs; | ||
1001 | |||
1002 | /* clear ecc and enable bits */ | ||
1003 | gpmc_write_reg(GPMC_ECC_CONTROL, 0x1); | ||
1004 | |||
1005 | /* | ||
1006 | * When using BCH, sector size is hardcoded to 512 bytes. | ||
1007 | * Here we are using wrapping mode 6 both for reading and writing, with: | ||
1008 | * size0 = 0 (no additional protected byte in spare area) | ||
1009 | * size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area) | ||
1010 | */ | ||
1011 | gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, (32 << 22) | (0 << 12)); | ||
1012 | |||
1013 | /* BCH configuration */ | ||
1014 | val = ((1 << 16) | /* enable BCH */ | ||
1015 | (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */ | ||
1016 | (0x06 << 8) | /* wrap mode = 6 */ | ||
1017 | (dev_width << 7) | /* bus width */ | ||
1018 | (((nsectors-1) & 0x7) << 4) | /* number of sectors */ | ||
1019 | (cs << 1) | /* ECC CS */ | ||
1020 | (0x1)); /* enable ECC */ | ||
1021 | |||
1022 | gpmc_write_reg(GPMC_ECC_CONFIG, val); | ||
1023 | gpmc_write_reg(GPMC_ECC_CONTROL, 0x101); | ||
1024 | return 0; | ||
1025 | } | ||
1026 | EXPORT_SYMBOL_GPL(gpmc_enable_hwecc_bch); | ||
1027 | |||
1028 | /** | ||
1029 | * gpmc_calculate_ecc_bch4 - Generate 7 ecc bytes per sector of 512 data bytes | ||
1030 | * @cs: chip select number | ||
1031 | * @dat: The pointer to data on which ecc is computed | ||
1032 | * @ecc: The ecc output buffer | ||
1033 | */ | ||
1034 | int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc) | ||
1035 | { | ||
1036 | int i; | ||
1037 | unsigned long nsectors, reg, val1, val2; | ||
1038 | |||
1039 | if (gpmc_ecc_used != cs) | ||
1040 | return -EINVAL; | ||
1041 | |||
1042 | nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1; | ||
1043 | |||
1044 | for (i = 0; i < nsectors; i++) { | ||
1045 | |||
1046 | reg = GPMC_ECC_BCH_RESULT_0 + 16*i; | ||
1047 | |||
1048 | /* Read hw-computed remainder */ | ||
1049 | val1 = gpmc_read_reg(reg + 0); | ||
1050 | val2 = gpmc_read_reg(reg + 4); | ||
1051 | |||
1052 | /* | ||
1053 | * Add constant polynomial to remainder, in order to get an ecc | ||
1054 | * sequence of 0xFFs for a buffer filled with 0xFFs; and | ||
1055 | * left-justify the resulting polynomial. | ||
1056 | */ | ||
1057 | *ecc++ = 0x28 ^ ((val2 >> 12) & 0xFF); | ||
1058 | *ecc++ = 0x13 ^ ((val2 >> 4) & 0xFF); | ||
1059 | *ecc++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF)); | ||
1060 | *ecc++ = 0x39 ^ ((val1 >> 20) & 0xFF); | ||
1061 | *ecc++ = 0x96 ^ ((val1 >> 12) & 0xFF); | ||
1062 | *ecc++ = 0xac ^ ((val1 >> 4) & 0xFF); | ||
1063 | *ecc++ = 0x7f ^ ((val1 & 0xF) << 4); | ||
1064 | } | ||
1065 | |||
1066 | gpmc_ecc_used = -EINVAL; | ||
1067 | return 0; | ||
1068 | } | ||
1069 | EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch4); | ||
1070 | |||
1071 | /** | ||
1072 | * gpmc_calculate_ecc_bch8 - Generate 13 ecc bytes per block of 512 data bytes | ||
1073 | * @cs: chip select number | ||
1074 | * @dat: The pointer to data on which ecc is computed | ||
1075 | * @ecc: The ecc output buffer | ||
1076 | */ | ||
1077 | int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc) | ||
1078 | { | ||
1079 | int i; | ||
1080 | unsigned long nsectors, reg, val1, val2, val3, val4; | ||
1081 | |||
1082 | if (gpmc_ecc_used != cs) | ||
1083 | return -EINVAL; | ||
1084 | |||
1085 | nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1; | ||
1086 | |||
1087 | for (i = 0; i < nsectors; i++) { | ||
1088 | |||
1089 | reg = GPMC_ECC_BCH_RESULT_0 + 16*i; | ||
1090 | |||
1091 | /* Read hw-computed remainder */ | ||
1092 | val1 = gpmc_read_reg(reg + 0); | ||
1093 | val2 = gpmc_read_reg(reg + 4); | ||
1094 | val3 = gpmc_read_reg(reg + 8); | ||
1095 | val4 = gpmc_read_reg(reg + 12); | ||
1096 | |||
1097 | /* | ||
1098 | * Add constant polynomial to remainder, in order to get an ecc | ||
1099 | * sequence of 0xFFs for a buffer filled with 0xFFs. | ||
1100 | */ | ||
1101 | *ecc++ = 0xef ^ (val4 & 0xFF); | ||
1102 | *ecc++ = 0x51 ^ ((val3 >> 24) & 0xFF); | ||
1103 | *ecc++ = 0x2e ^ ((val3 >> 16) & 0xFF); | ||
1104 | *ecc++ = 0x09 ^ ((val3 >> 8) & 0xFF); | ||
1105 | *ecc++ = 0xed ^ (val3 & 0xFF); | ||
1106 | *ecc++ = 0x93 ^ ((val2 >> 24) & 0xFF); | ||
1107 | *ecc++ = 0x9a ^ ((val2 >> 16) & 0xFF); | ||
1108 | *ecc++ = 0xc2 ^ ((val2 >> 8) & 0xFF); | ||
1109 | *ecc++ = 0x97 ^ (val2 & 0xFF); | ||
1110 | *ecc++ = 0x79 ^ ((val1 >> 24) & 0xFF); | ||
1111 | *ecc++ = 0xe5 ^ ((val1 >> 16) & 0xFF); | ||
1112 | *ecc++ = 0x24 ^ ((val1 >> 8) & 0xFF); | ||
1113 | *ecc++ = 0xb5 ^ (val1 & 0xFF); | ||
1114 | } | ||
1115 | |||
1116 | gpmc_ecc_used = -EINVAL; | ||
1117 | return 0; | ||
1118 | } | ||
1119 | EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch8); | ||
1120 | |||
1121 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index a74f3cf54cc5..b4203277f3cd 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c | |||
@@ -251,8 +251,6 @@ static void ts78xx_ts_nand_read_buf(struct mtd_info *mtd, | |||
251 | readsb(io_base, buf, len); | 251 | readsb(io_base, buf, len); |
252 | } | 252 | } |
253 | 253 | ||
254 | const char *ts_nand_part_probes[] = { "cmdlinepart", NULL }; | ||
255 | |||
256 | static struct mtd_partition ts78xx_ts_nand_parts[] = { | 254 | static struct mtd_partition ts78xx_ts_nand_parts[] = { |
257 | { | 255 | { |
258 | .name = "mbr", | 256 | .name = "mbr", |
@@ -277,7 +275,6 @@ static struct mtd_partition ts78xx_ts_nand_parts[] = { | |||
277 | static struct platform_nand_data ts78xx_ts_nand_data = { | 275 | static struct platform_nand_data ts78xx_ts_nand_data = { |
278 | .chip = { | 276 | .chip = { |
279 | .nr_chips = 1, | 277 | .nr_chips = 1, |
280 | .part_probe_types = ts_nand_part_probes, | ||
281 | .partitions = ts78xx_ts_nand_parts, | 278 | .partitions = ts78xx_ts_nand_parts, |
282 | .nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts), | 279 | .nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts), |
283 | .chip_delay = 15, | 280 | .chip_delay = 15, |
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 56e8cebeb7d5..9244493dbcb7 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c | |||
@@ -679,8 +679,6 @@ static struct mtd_partition balloon3_partition_info[] = { | |||
679 | }, | 679 | }, |
680 | }; | 680 | }; |
681 | 681 | ||
682 | static const char *balloon3_part_probes[] = { "cmdlinepart", NULL }; | ||
683 | |||
684 | struct platform_nand_data balloon3_nand_pdata = { | 682 | struct platform_nand_data balloon3_nand_pdata = { |
685 | .chip = { | 683 | .chip = { |
686 | .nr_chips = 4, | 684 | .nr_chips = 4, |
@@ -688,7 +686,6 @@ struct platform_nand_data balloon3_nand_pdata = { | |||
688 | .nr_partitions = ARRAY_SIZE(balloon3_partition_info), | 686 | .nr_partitions = ARRAY_SIZE(balloon3_partition_info), |
689 | .partitions = balloon3_partition_info, | 687 | .partitions = balloon3_partition_info, |
690 | .chip_delay = 50, | 688 | .chip_delay = 50, |
691 | .part_probe_types = balloon3_part_probes, | ||
692 | }, | 689 | }, |
693 | .ctrl = { | 690 | .ctrl = { |
694 | .hwcontrol = 0, | 691 | .hwcontrol = 0, |
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index a3a4a38d4972..97f82ad341bf 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c | |||
@@ -338,8 +338,6 @@ static struct mtd_partition em_x270_partition_info[] = { | |||
338 | }, | 338 | }, |
339 | }; | 339 | }; |
340 | 340 | ||
341 | static const char *em_x270_part_probes[] = { "cmdlinepart", NULL }; | ||
342 | |||
343 | struct platform_nand_data em_x270_nand_platdata = { | 341 | struct platform_nand_data em_x270_nand_platdata = { |
344 | .chip = { | 342 | .chip = { |
345 | .nr_chips = 1, | 343 | .nr_chips = 1, |
@@ -347,7 +345,6 @@ struct platform_nand_data em_x270_nand_platdata = { | |||
347 | .nr_partitions = ARRAY_SIZE(em_x270_partition_info), | 345 | .nr_partitions = ARRAY_SIZE(em_x270_partition_info), |
348 | .partitions = em_x270_partition_info, | 346 | .partitions = em_x270_partition_info, |
349 | .chip_delay = 20, | 347 | .chip_delay = 20, |
350 | .part_probe_types = em_x270_part_probes, | ||
351 | }, | 348 | }, |
352 | .ctrl = { | 349 | .ctrl = { |
353 | .hwcontrol = 0, | 350 | .hwcontrol = 0, |
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 9507605ed547..0da35dccfd89 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
@@ -268,8 +268,6 @@ static struct mtd_partition palmtx_partition_info[] = { | |||
268 | }, | 268 | }, |
269 | }; | 269 | }; |
270 | 270 | ||
271 | static const char *palmtx_part_probes[] = { "cmdlinepart", NULL }; | ||
272 | |||
273 | struct platform_nand_data palmtx_nand_platdata = { | 271 | struct platform_nand_data palmtx_nand_platdata = { |
274 | .chip = { | 272 | .chip = { |
275 | .nr_chips = 1, | 273 | .nr_chips = 1, |
@@ -277,7 +275,6 @@ struct platform_nand_data palmtx_nand_platdata = { | |||
277 | .nr_partitions = ARRAY_SIZE(palmtx_partition_info), | 275 | .nr_partitions = ARRAY_SIZE(palmtx_partition_info), |
278 | .partitions = palmtx_partition_info, | 276 | .partitions = palmtx_partition_info, |
279 | .chip_delay = 20, | 277 | .chip_delay = 20, |
280 | .part_probe_types = palmtx_part_probes, | ||
281 | }, | 278 | }, |
282 | .ctrl = { | 279 | .ctrl = { |
283 | .cmd_ctrl = palmtx_nand_cmd_ctl, | 280 | .cmd_ctrl = palmtx_nand_cmd_ctl, |
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h index 1527929b445a..f37764a36072 100644 --- a/arch/arm/plat-omap/include/plat/gpmc.h +++ b/arch/arm/plat-omap/include/plat/gpmc.h | |||
@@ -92,6 +92,8 @@ enum omap_ecc { | |||
92 | OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ | 92 | OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ |
93 | /* 1-bit ecc: stored at beginning of spare area as romcode */ | 93 | /* 1-bit ecc: stored at beginning of spare area as romcode */ |
94 | OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ | 94 | OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ |
95 | OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */ | ||
96 | OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */ | ||
95 | }; | 97 | }; |
96 | 98 | ||
97 | /* | 99 | /* |
@@ -157,4 +159,13 @@ extern int gpmc_nand_write(int cs, int cmd, int wval); | |||
157 | 159 | ||
158 | int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size); | 160 | int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size); |
159 | int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code); | 161 | int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code); |
162 | |||
163 | #ifdef CONFIG_ARCH_OMAP3 | ||
164 | int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors); | ||
165 | int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors, | ||
166 | int nerrors); | ||
167 | int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc); | ||
168 | int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc); | ||
169 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
170 | |||
160 | #endif | 171 | #endif |
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c index f6ffd6f054c3..0b74218fdd3a 100644 --- a/arch/blackfin/mach-bf561/boards/acvilon.c +++ b/arch/blackfin/mach-bf561/boards/acvilon.c | |||
@@ -248,8 +248,6 @@ static struct platform_device bfin_uart0_device = { | |||
248 | 248 | ||
249 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) | 249 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
250 | 250 | ||
251 | const char *part_probes[] = { "cmdlinepart", NULL }; | ||
252 | |||
253 | static struct mtd_partition bfin_plat_nand_partitions[] = { | 251 | static struct mtd_partition bfin_plat_nand_partitions[] = { |
254 | { | 252 | { |
255 | .name = "params(nand)", | 253 | .name = "params(nand)", |
@@ -289,7 +287,6 @@ static struct platform_nand_data bfin_plat_nand_data = { | |||
289 | .chip = { | 287 | .chip = { |
290 | .nr_chips = 1, | 288 | .nr_chips = 1, |
291 | .chip_delay = 30, | 289 | .chip_delay = 30, |
292 | .part_probe_types = part_probes, | ||
293 | .partitions = bfin_plat_nand_partitions, | 290 | .partitions = bfin_plat_nand_partitions, |
294 | .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), | 291 | .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), |
295 | }, | 292 | }, |
diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c index 7dde01642d6b..bf2248474fa8 100644 --- a/arch/mips/alchemy/devboards/db1200.c +++ b/arch/mips/alchemy/devboards/db1200.c | |||
@@ -213,8 +213,6 @@ static int au1200_nand_device_ready(struct mtd_info *mtd) | |||
213 | return __raw_readl((void __iomem *)MEM_STSTAT) & 1; | 213 | return __raw_readl((void __iomem *)MEM_STSTAT) & 1; |
214 | } | 214 | } |
215 | 215 | ||
216 | static const char *db1200_part_probes[] = { "cmdlinepart", NULL }; | ||
217 | |||
218 | static struct mtd_partition db1200_nand_parts[] = { | 216 | static struct mtd_partition db1200_nand_parts[] = { |
219 | { | 217 | { |
220 | .name = "NAND FS 0", | 218 | .name = "NAND FS 0", |
@@ -235,7 +233,6 @@ struct platform_nand_data db1200_nand_platdata = { | |||
235 | .nr_partitions = ARRAY_SIZE(db1200_nand_parts), | 233 | .nr_partitions = ARRAY_SIZE(db1200_nand_parts), |
236 | .partitions = db1200_nand_parts, | 234 | .partitions = db1200_nand_parts, |
237 | .chip_delay = 20, | 235 | .chip_delay = 20, |
238 | .part_probe_types = db1200_part_probes, | ||
239 | }, | 236 | }, |
240 | .ctrl = { | 237 | .ctrl = { |
241 | .dev_ready = au1200_nand_device_ready, | 238 | .dev_ready = au1200_nand_device_ready, |
diff --git a/arch/mips/alchemy/devboards/db1300.c b/arch/mips/alchemy/devboards/db1300.c index 0893f2af0d01..c56e0246694e 100644 --- a/arch/mips/alchemy/devboards/db1300.c +++ b/arch/mips/alchemy/devboards/db1300.c | |||
@@ -145,8 +145,6 @@ static int au1300_nand_device_ready(struct mtd_info *mtd) | |||
145 | return __raw_readl((void __iomem *)MEM_STSTAT) & 1; | 145 | return __raw_readl((void __iomem *)MEM_STSTAT) & 1; |
146 | } | 146 | } |
147 | 147 | ||
148 | static const char *db1300_part_probes[] = { "cmdlinepart", NULL }; | ||
149 | |||
150 | static struct mtd_partition db1300_nand_parts[] = { | 148 | static struct mtd_partition db1300_nand_parts[] = { |
151 | { | 149 | { |
152 | .name = "NAND FS 0", | 150 | .name = "NAND FS 0", |
@@ -167,7 +165,6 @@ struct platform_nand_data db1300_nand_platdata = { | |||
167 | .nr_partitions = ARRAY_SIZE(db1300_nand_parts), | 165 | .nr_partitions = ARRAY_SIZE(db1300_nand_parts), |
168 | .partitions = db1300_nand_parts, | 166 | .partitions = db1300_nand_parts, |
169 | .chip_delay = 20, | 167 | .chip_delay = 20, |
170 | .part_probe_types = db1300_part_probes, | ||
171 | }, | 168 | }, |
172 | .ctrl = { | 169 | .ctrl = { |
173 | .dev_ready = au1300_nand_device_ready, | 170 | .dev_ready = au1300_nand_device_ready, |
diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c index 6815d0783cd8..9eb79062f46e 100644 --- a/arch/mips/alchemy/devboards/db1550.c +++ b/arch/mips/alchemy/devboards/db1550.c | |||
@@ -149,8 +149,6 @@ static int au1550_nand_device_ready(struct mtd_info *mtd) | |||
149 | return __raw_readl((void __iomem *)MEM_STSTAT) & 1; | 149 | return __raw_readl((void __iomem *)MEM_STSTAT) & 1; |
150 | } | 150 | } |
151 | 151 | ||
152 | static const char *db1550_part_probes[] = { "cmdlinepart", NULL }; | ||
153 | |||
154 | static struct mtd_partition db1550_nand_parts[] = { | 152 | static struct mtd_partition db1550_nand_parts[] = { |
155 | { | 153 | { |
156 | .name = "NAND FS 0", | 154 | .name = "NAND FS 0", |
@@ -171,7 +169,6 @@ struct platform_nand_data db1550_nand_platdata = { | |||
171 | .nr_partitions = ARRAY_SIZE(db1550_nand_parts), | 169 | .nr_partitions = ARRAY_SIZE(db1550_nand_parts), |
172 | .partitions = db1550_nand_parts, | 170 | .partitions = db1550_nand_parts, |
173 | .chip_delay = 20, | 171 | .chip_delay = 20, |
174 | .part_probe_types = db1550_part_probes, | ||
175 | }, | 172 | }, |
176 | .ctrl = { | 173 | .ctrl = { |
177 | .dev_ready = au1550_nand_device_ready, | 174 | .dev_ready = au1550_nand_device_ready, |
diff --git a/arch/mips/pnx833x/common/platform.c b/arch/mips/pnx833x/common/platform.c index 87167dcc79fa..05a1d922cd60 100644 --- a/arch/mips/pnx833x/common/platform.c +++ b/arch/mips/pnx833x/common/platform.c | |||
@@ -244,11 +244,6 @@ static struct platform_device pnx833x_sata_device = { | |||
244 | .resource = pnx833x_sata_resources, | 244 | .resource = pnx833x_sata_resources, |
245 | }; | 245 | }; |
246 | 246 | ||
247 | static const char *part_probes[] = { | ||
248 | "cmdlinepart", | ||
249 | NULL | ||
250 | }; | ||
251 | |||
252 | static void | 247 | static void |
253 | pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | 248 | pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
254 | { | 249 | { |
@@ -268,7 +263,6 @@ static struct platform_nand_data pnx833x_flash_nand_data = { | |||
268 | .chip = { | 263 | .chip = { |
269 | .nr_chips = 1, | 264 | .nr_chips = 1, |
270 | .chip_delay = 25, | 265 | .chip_delay = 25, |
271 | .part_probe_types = part_probes, | ||
272 | }, | 266 | }, |
273 | .ctrl = { | 267 | .ctrl = { |
274 | .cmd_ctrl = pnx833x_flash_nand_cmd_ctrl | 268 | .cmd_ctrl = pnx833x_flash_nand_cmd_ctrl |
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c index ea774285e6c5..716e9a12f0e7 100644 --- a/arch/mips/rb532/devices.c +++ b/arch/mips/rb532/devices.c | |||
@@ -293,7 +293,6 @@ static void __init rb532_nand_setup(void) | |||
293 | rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info); | 293 | rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info); |
294 | rb532_nand_data.chip.partitions = rb532_partition_info; | 294 | rb532_nand_data.chip.partitions = rb532_partition_info; |
295 | rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY; | 295 | rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY; |
296 | rb532_nand_data.chip.options = NAND_NO_AUTOINCR; | ||
297 | } | 296 | } |
298 | 297 | ||
299 | 298 | ||
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index 34cd0c5ff2e1..a8a1ca741c85 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c | |||
@@ -188,7 +188,6 @@ static struct platform_nand_data migor_nand_flash_data = { | |||
188 | .partitions = migor_nand_flash_partitions, | 188 | .partitions = migor_nand_flash_partitions, |
189 | .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions), | 189 | .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions), |
190 | .chip_delay = 20, | 190 | .chip_delay = 20, |
191 | .part_probe_types = (const char *[]) { "cmdlinepart", NULL }, | ||
192 | }, | 191 | }, |
193 | .ctrl = { | 192 | .ctrl = { |
194 | .dev_ready = migor_nand_flash_ready, | 193 | .dev_ready = migor_nand_flash_ready, |