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authorEduardo Valentin <eduardo.valentin@nokia.com>2010-12-20 15:05:09 -0500
committerKevin Hilman <khilman@deeprootsystems.com>2010-12-21 17:45:53 -0500
commitcc1b6028878646a2419b27e5f590b5e9fe01dc3d (patch)
tree560f6e797d20c112d1887d74250d41668b43b2ff /arch
parent80723c3fe457a5d29c178da4ac72983f47b37ed7 (diff)
OMAP3630: PM: Erratum i583: disable coreoff if < ES1.2
Limitation i583: Self_Refresh Exit issue after OFF mode Issue: When device is waking up from OFF mode, then SDRC state machine sends inappropriate sequence violating JEDEC standards. Impact: OMAP3630 < ES1.2 is impacted as follows depending on the platform: CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while for all other sysclk frequencies, varied levels of instability seen based on varied parameters. CS1: impacted This patch takes option #3 as recommended by the Silicon erratum: Avoid core power domain transitioning to OFF mode. Power consumption impact is expected in this case. To do this, we route core OFF requests to RET request on the impacted revisions of silicon. Acked-by: Jean Pihet <j-pihet@ti.com> [nm@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c12
-rw-r--r--arch/arm/mach-omap2/pm.h1
-rw-r--r--arch/arm/mach-omap2/pm34xx.c25
3 files changed, 35 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index f290e484e576..0fb619c52588 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -453,6 +453,18 @@ void omap_init_power_states(void)
453 omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF; 453 omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF;
454 omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID | 454 omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID |
455 CPUIDLE_FLAG_CHECK_BM; 455 CPUIDLE_FLAG_CHECK_BM;
456
457 /*
458 * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot
459 * enable OFF mode in a stable form for previous revisions.
460 * we disable C7 state as a result.
461 */
462 if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) {
463 omap3_power_states[OMAP3_STATE_C7].valid = 0;
464 cpuidle_params_table[OMAP3_STATE_C7].valid = 0;
465 WARN_ONCE(1, "%s: core off state C7 disabled due to i583\n",
466 __func__);
467 }
456} 468}
457 469
458struct cpuidle_driver omap3_idle_driver = { 470struct cpuidle_driver omap3_idle_driver = {
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 29663cc01a59..b4e66f9e1945 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -86,6 +86,7 @@ extern unsigned int omap24xx_cpu_suspend_sz;
86extern unsigned int omap34xx_cpu_suspend_sz; 86extern unsigned int omap34xx_cpu_suspend_sz;
87 87
88#define PM_RTA_ERRATUM_i608 (1 << 0) 88#define PM_RTA_ERRATUM_i608 (1 << 0)
89#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
89 90
90#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 91#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
91extern u16 pm34xx_errata; 92extern u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 74bc15e71e9f..a81ed251e667 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -917,12 +917,29 @@ void omap3_pm_off_mode_enable(int enable)
917 state = PWRDM_POWER_RET; 917 state = PWRDM_POWER_RET;
918 918
919#ifdef CONFIG_CPU_IDLE 919#ifdef CONFIG_CPU_IDLE
920 omap3_cpuidle_update_states(state, state); 920 /*
921 * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot
922 * enable OFF mode in a stable form for previous revisions, restrict
923 * instead to RET
924 */
925 if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583))
926 omap3_cpuidle_update_states(state, PWRDM_POWER_RET);
927 else
928 omap3_cpuidle_update_states(state, state);
921#endif 929#endif
922 930
923 list_for_each_entry(pwrst, &pwrst_list, node) { 931 list_for_each_entry(pwrst, &pwrst_list, node) {
924 pwrst->next_state = state; 932 if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583) &&
925 omap_set_pwrdm_state(pwrst->pwrdm, state); 933 pwrst->pwrdm == core_pwrdm &&
934 state == PWRDM_POWER_OFF) {
935 pwrst->next_state = PWRDM_POWER_RET;
936 WARN_ONCE(1,
937 "%s: Core OFF disabled due to errata i583\n",
938 __func__);
939 } else {
940 pwrst->next_state = state;
941 }
942 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
926 } 943 }
927} 944}
928 945
@@ -1000,6 +1017,8 @@ static void __init pm_errata_configure(void)
1000 pm34xx_errata |= PM_RTA_ERRATUM_i608; 1017 pm34xx_errata |= PM_RTA_ERRATUM_i608;
1001 /* Enable the l2 cache toggling in sleep logic */ 1018 /* Enable the l2 cache toggling in sleep logic */
1002 enable_omap3630_toggle_l2_on_restore(); 1019 enable_omap3630_toggle_l2_on_restore();
1020 if (omap_rev() < OMAP3630_REV_ES1_2)
1021 pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583;
1003 } 1022 }
1004} 1023}
1005 1024