diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-06-10 10:35:41 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-06-10 10:35:41 -0400 |
commit | 7c8d20d40f29e7c08332d406d7a65678dece4627 (patch) | |
tree | 4543b2ee96158c2591b9a897b2d85a0241ad7d61 /arch | |
parent | 63a07cb64ccc3ceae619d3298545d602ab5ecd38 (diff) | |
parent | 9a40ac86152c9cffd3dca482a15ddf9a8c5716b3 (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: 6164/1: Add kto and kfrom to input operands list.
ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6
ARM: 6165/1: trap overflows on highmem pages from kmap_atomic when debugging
ARM: 6152/1: ux500 make it possible to disable localtimers
[ARM] pxa/spitz: Correctly register WM8750
[ARM] pxa/palmtc: storage class should be before const qualifier
ARM: 6146/1: sa1111: Prevent deadlock in resume path
ARM: 6145/1: ux500 MTU clockrate correction
ARM: 6144/1: TCM memory bug freeing bug
ARM: VFP: Fix vfp_put_double() for d16-d31
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/common/sa1111.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-nomadik/clock.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-nomadik/clock.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-nomadik/cpu-8815.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-pxa/palmtc.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/spitz.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-ux500/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/mach-ux500/clock.c | 104 | ||||
-rw-r--r-- | arch/arm/mach-ux500/clock.h | 22 | ||||
-rw-r--r-- | arch/arm/mach-ux500/cpu.c | 6 | ||||
-rw-r--r-- | arch/arm/mm/copypage-feroceon.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/copypage-v4wb.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/copypage-v4wt.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/copypage-xsc3.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/fault.c | 3 | ||||
-rw-r--r-- | arch/arm/mm/highmem.c | 11 | ||||
-rw-r--r-- | arch/arm/mm/init.c | 6 | ||||
-rw-r--r-- | arch/arm/plat-nomadik/timer.c | 26 | ||||
-rw-r--r-- | arch/arm/vfp/vfphw.S | 2 |
19 files changed, 206 insertions, 30 deletions
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index a52a27c1d9be..6f80665f477e 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -951,8 +951,6 @@ static int sa1111_resume(struct platform_device *dev) | |||
951 | if (!save) | 951 | if (!save) |
952 | return 0; | 952 | return 0; |
953 | 953 | ||
954 | spin_lock_irqsave(&sachip->lock, flags); | ||
955 | |||
956 | /* | 954 | /* |
957 | * Ensure that the SA1111 is still here. | 955 | * Ensure that the SA1111 is still here. |
958 | * FIXME: shouldn't do this here. | 956 | * FIXME: shouldn't do this here. |
@@ -969,6 +967,13 @@ static int sa1111_resume(struct platform_device *dev) | |||
969 | * First of all, wake up the chip. | 967 | * First of all, wake up the chip. |
970 | */ | 968 | */ |
971 | sa1111_wake(sachip); | 969 | sa1111_wake(sachip); |
970 | |||
971 | /* | ||
972 | * Only lock for write ops. Also, sa1111_wake must be called with | ||
973 | * released spinlock! | ||
974 | */ | ||
975 | spin_lock_irqsave(&sachip->lock, flags); | ||
976 | |||
972 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); | 977 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); |
973 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); | 978 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); |
974 | 979 | ||
diff --git a/arch/arm/mach-nomadik/clock.c b/arch/arm/mach-nomadik/clock.c index 2c471fc451d7..f035f4185274 100644 --- a/arch/arm/mach-nomadik/clock.c +++ b/arch/arm/mach-nomadik/clock.c | |||
@@ -32,7 +32,10 @@ void clk_disable(struct clk *clk) | |||
32 | } | 32 | } |
33 | EXPORT_SYMBOL(clk_disable); | 33 | EXPORT_SYMBOL(clk_disable); |
34 | 34 | ||
35 | /* We have a fixed clock alone, for now */ | 35 | static struct clk clk_24 = { |
36 | .rate = 2400000, | ||
37 | }; | ||
38 | |||
36 | static struct clk clk_48 = { | 39 | static struct clk clk_48 = { |
37 | .rate = 48 * 1000 * 1000, | 40 | .rate = 48 * 1000 * 1000, |
38 | }; | 41 | }; |
@@ -50,6 +53,8 @@ static struct clk clk_default; | |||
50 | } | 53 | } |
51 | 54 | ||
52 | static struct clk_lookup lookups[] = { | 55 | static struct clk_lookup lookups[] = { |
56 | CLK(&clk_24, "mtu0"), | ||
57 | CLK(&clk_24, "mtu1"), | ||
53 | CLK(&clk_48, "uart0"), | 58 | CLK(&clk_48, "uart0"), |
54 | CLK(&clk_48, "uart1"), | 59 | CLK(&clk_48, "uart1"), |
55 | CLK(&clk_default, "gpio.0"), | 60 | CLK(&clk_default, "gpio.0"), |
@@ -59,10 +64,8 @@ static struct clk_lookup lookups[] = { | |||
59 | CLK(&clk_default, "rng"), | 64 | CLK(&clk_default, "rng"), |
60 | }; | 65 | }; |
61 | 66 | ||
62 | static int __init clk_init(void) | 67 | int __init clk_init(void) |
63 | { | 68 | { |
64 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 69 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
65 | return 0; | 70 | return 0; |
66 | } | 71 | } |
67 | |||
68 | arch_initcall(clk_init); | ||
diff --git a/arch/arm/mach-nomadik/clock.h b/arch/arm/mach-nomadik/clock.h index 5563985a2cc7..78da2e7c3985 100644 --- a/arch/arm/mach-nomadik/clock.h +++ b/arch/arm/mach-nomadik/clock.h | |||
@@ -11,3 +11,5 @@ | |||
11 | struct clk { | 11 | struct clk { |
12 | unsigned long rate; | 12 | unsigned long rate; |
13 | }; | 13 | }; |
14 | |||
15 | int __init clk_init(void); | ||
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 91c3c901b469..ac58e3b03b1a 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c | |||
@@ -31,6 +31,8 @@ | |||
31 | #include <asm/cacheflush.h> | 31 | #include <asm/cacheflush.h> |
32 | #include <asm/hardware/cache-l2x0.h> | 32 | #include <asm/hardware/cache-l2x0.h> |
33 | 33 | ||
34 | #include "clock.h" | ||
35 | |||
34 | #define __MEM_4K_RESOURCE(x) \ | 36 | #define __MEM_4K_RESOURCE(x) \ |
35 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} | 37 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} |
36 | 38 | ||
@@ -143,6 +145,12 @@ void __init cpu8815_init_irq(void) | |||
143 | /* This modified VIC cell has two register blocks, at 0 and 0x20 */ | 145 | /* This modified VIC cell has two register blocks, at 0 and 0x20 */ |
144 | vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0); | 146 | vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0); |
145 | vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0); | 147 | vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0); |
148 | |||
149 | /* | ||
150 | * Init clocks here so that they are available for system timer | ||
151 | * initialization. | ||
152 | */ | ||
153 | clk_init(); | ||
146 | } | 154 | } |
147 | 155 | ||
148 | /* | 156 | /* |
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 033b567e50bb..ce1104d1bc17 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c | |||
@@ -263,11 +263,11 @@ const struct matrix_keymap_data palmtc_keymap_data = { | |||
263 | .keymap_size = ARRAY_SIZE(palmtc_matrix_keys), | 263 | .keymap_size = ARRAY_SIZE(palmtc_matrix_keys), |
264 | }; | 264 | }; |
265 | 265 | ||
266 | const static unsigned int palmtc_keypad_row_gpios[] = { | 266 | static const unsigned int palmtc_keypad_row_gpios[] = { |
267 | 0, 9, 10, 11 | 267 | 0, 9, 10, 11 |
268 | }; | 268 | }; |
269 | 269 | ||
270 | const static unsigned int palmtc_keypad_col_gpios[] = { | 270 | static const unsigned int palmtc_keypad_col_gpios[] = { |
271 | 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80 | 271 | 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80 |
272 | }; | 272 | }; |
273 | 273 | ||
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 4d2413ed0ffa..c1048a35f187 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -818,6 +818,9 @@ static struct i2c_board_info akita_i2c_board_info[] = { | |||
818 | .type = "max7310", | 818 | .type = "max7310", |
819 | .addr = 0x18, | 819 | .addr = 0x18, |
820 | .platform_data = &akita_ioexp, | 820 | .platform_data = &akita_ioexp, |
821 | }, { | ||
822 | .type = "wm8750", | ||
823 | .addr = 0x1b, | ||
821 | }, | 824 | }, |
822 | }; | 825 | }; |
823 | 826 | ||
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile index c7bc4199e3a8..4556aea9c3c5 100644 --- a/arch/arm/mach-ux500/Makefile +++ b/arch/arm/mach-ux500/Makefile | |||
@@ -7,4 +7,5 @@ obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o devices-db5500.o | |||
7 | obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o | 7 | obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o |
8 | obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o | 8 | obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o |
9 | obj-$(CONFIG_MACH_U5500) += board-u5500.o | 9 | obj-$(CONFIG_MACH_U5500) += board-u5500.o |
10 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o | 10 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
11 | obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o | ||
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c index 6544855af2f1..fe84b9021c7a 100644 --- a/arch/arm/mach-ux500/clock.c +++ b/arch/arm/mach-ux500/clock.c | |||
@@ -16,6 +16,7 @@ | |||
16 | 16 | ||
17 | #include <asm/clkdev.h> | 17 | #include <asm/clkdev.h> |
18 | 18 | ||
19 | #include <plat/mtu.h> | ||
19 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
20 | #include "clock.h" | 21 | #include "clock.h" |
21 | 22 | ||
@@ -59,6 +60,9 @@ | |||
59 | #define PRCM_DMACLK_MGT 0x074 | 60 | #define PRCM_DMACLK_MGT 0x074 |
60 | #define PRCM_B2R2CLK_MGT 0x078 | 61 | #define PRCM_B2R2CLK_MGT 0x078 |
61 | #define PRCM_TVCLK_MGT 0x07C | 62 | #define PRCM_TVCLK_MGT 0x07C |
63 | #define PRCM_TCR 0x1C8 | ||
64 | #define PRCM_TCR_STOPPED (1 << 16) | ||
65 | #define PRCM_TCR_DOZE_MODE (1 << 17) | ||
62 | #define PRCM_UNIPROCLK_MGT 0x278 | 66 | #define PRCM_UNIPROCLK_MGT 0x278 |
63 | #define PRCM_SSPCLK_MGT 0x280 | 67 | #define PRCM_SSPCLK_MGT 0x280 |
64 | #define PRCM_RNGCLK_MGT 0x284 | 68 | #define PRCM_RNGCLK_MGT 0x284 |
@@ -120,10 +124,95 @@ void clk_disable(struct clk *clk) | |||
120 | } | 124 | } |
121 | EXPORT_SYMBOL(clk_disable); | 125 | EXPORT_SYMBOL(clk_disable); |
122 | 126 | ||
127 | /* | ||
128 | * The MTU has a separate, rather complex muxing setup | ||
129 | * with alternative parents (peripheral cluster or | ||
130 | * ULP or fixed 32768 Hz) depending on settings | ||
131 | */ | ||
132 | static unsigned long clk_mtu_get_rate(struct clk *clk) | ||
133 | { | ||
134 | void __iomem *addr = __io_address(U8500_PRCMU_BASE) | ||
135 | + PRCM_TCR; | ||
136 | u32 tcr = readl(addr); | ||
137 | int mtu = (int) clk->data; | ||
138 | /* | ||
139 | * One of these is selected eventually | ||
140 | * TODO: Replace the constant with a reference | ||
141 | * to the ULP source once this is modeled. | ||
142 | */ | ||
143 | unsigned long clk32k = 32768; | ||
144 | unsigned long mturate; | ||
145 | unsigned long retclk; | ||
146 | |||
147 | /* Get the rate from the parent as a default */ | ||
148 | if (clk->parent_periph) | ||
149 | mturate = clk_get_rate(clk->parent_periph); | ||
150 | else if (clk->parent_cluster) | ||
151 | mturate = clk_get_rate(clk->parent_cluster); | ||
152 | else | ||
153 | /* We need to be connected SOMEWHERE */ | ||
154 | BUG(); | ||
155 | |||
156 | /* | ||
157 | * Are we in doze mode? | ||
158 | * In this mode the parent peripheral or the fixed 32768 Hz | ||
159 | * clock is fed into the block. | ||
160 | */ | ||
161 | if (!(tcr & PRCM_TCR_DOZE_MODE)) { | ||
162 | /* | ||
163 | * Here we're using the clock input from the APE ULP | ||
164 | * clock domain. But first: are the timers stopped? | ||
165 | */ | ||
166 | if (tcr & PRCM_TCR_STOPPED) { | ||
167 | clk32k = 0; | ||
168 | mturate = 0; | ||
169 | } else { | ||
170 | /* Else default mode: 0 and 2.4 MHz */ | ||
171 | clk32k = 0; | ||
172 | if (cpu_is_u5500()) | ||
173 | /* DB5500 divides by 8 */ | ||
174 | mturate /= 8; | ||
175 | else if (cpu_is_u8500ed()) { | ||
176 | /* | ||
177 | * This clocking setting must not be used | ||
178 | * in the ED chip, it is simply not | ||
179 | * connected anywhere! | ||
180 | */ | ||
181 | mturate = 0; | ||
182 | BUG(); | ||
183 | } else | ||
184 | /* | ||
185 | * In this mode the ulp38m4 clock is divided | ||
186 | * by a factor 16, on the DB8500 typically | ||
187 | * 38400000 / 16 ~ 2.4 MHz. | ||
188 | * TODO: Replace the constant with a reference | ||
189 | * to the ULP source once this is modeled. | ||
190 | */ | ||
191 | mturate = 38400000 / 16; | ||
192 | } | ||
193 | } | ||
194 | |||
195 | /* Return the clock selected for this MTU */ | ||
196 | if (tcr & (1 << mtu)) | ||
197 | retclk = clk32k; | ||
198 | else | ||
199 | retclk = mturate; | ||
200 | |||
201 | pr_info("MTU%d clock rate: %lu Hz\n", mtu, retclk); | ||
202 | return retclk; | ||
203 | } | ||
204 | |||
123 | unsigned long clk_get_rate(struct clk *clk) | 205 | unsigned long clk_get_rate(struct clk *clk) |
124 | { | 206 | { |
125 | unsigned long rate; | 207 | unsigned long rate; |
126 | 208 | ||
209 | /* | ||
210 | * If there is a custom getrate callback for this clock, | ||
211 | * it will take precedence. | ||
212 | */ | ||
213 | if (clk->get_rate) | ||
214 | return clk->get_rate(clk); | ||
215 | |||
127 | if (clk->ops && clk->ops->get_rate) | 216 | if (clk->ops && clk->ops->get_rate) |
128 | return clk->ops->get_rate(clk); | 217 | return clk->ops->get_rate(clk); |
129 | 218 | ||
@@ -341,8 +430,9 @@ static DEFINE_PRCC_CLK(5, usb_v1, 0, 0, NULL); | |||
341 | 430 | ||
342 | /* Peripheral Cluster #6 */ | 431 | /* Peripheral Cluster #6 */ |
343 | 432 | ||
344 | static DEFINE_PRCC_CLK(6, mtu1_v1, 8, -1, NULL); | 433 | /* MTU ID in data */ |
345 | static DEFINE_PRCC_CLK(6, mtu0_v1, 7, -1, NULL); | 434 | static DEFINE_PRCC_CLK_CUSTOM(6, mtu1_v1, 8, -1, NULL, clk_mtu_get_rate, 1); |
435 | static DEFINE_PRCC_CLK_CUSTOM(6, mtu0_v1, 7, -1, NULL, clk_mtu_get_rate, 0); | ||
346 | static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL); | 436 | static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL); |
347 | static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL); | 437 | static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL); |
348 | static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL); | 438 | static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL); |
@@ -357,8 +447,9 @@ static DEFINE_PRCC_CLK(6, rng_v1, 0, 0, &clk_rngclk); | |||
357 | /* Peripheral Cluster #7 */ | 447 | /* Peripheral Cluster #7 */ |
358 | 448 | ||
359 | static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL); | 449 | static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL); |
360 | static DEFINE_PRCC_CLK(7, mtu1_ed, 3, -1, NULL); | 450 | /* MTU ID in data */ |
361 | static DEFINE_PRCC_CLK(7, mtu0_ed, 2, -1, NULL); | 451 | static DEFINE_PRCC_CLK_CUSTOM(7, mtu1_ed, 3, -1, NULL, clk_mtu_get_rate, 1); |
452 | static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0); | ||
362 | static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL); | 453 | static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL); |
363 | static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL); | 454 | static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL); |
364 | 455 | ||
@@ -503,15 +594,17 @@ static struct clk_lookup u8500_v1_clks[] = { | |||
503 | CLK(uiccclk, "uicc", NULL), | 594 | CLK(uiccclk, "uicc", NULL), |
504 | }; | 595 | }; |
505 | 596 | ||
506 | static int __init clk_init(void) | 597 | int __init clk_init(void) |
507 | { | 598 | { |
508 | if (cpu_is_u8500ed()) { | 599 | if (cpu_is_u8500ed()) { |
509 | clk_prcmu_ops.enable = clk_prcmu_ed_enable; | 600 | clk_prcmu_ops.enable = clk_prcmu_ed_enable; |
510 | clk_prcmu_ops.disable = clk_prcmu_ed_disable; | 601 | clk_prcmu_ops.disable = clk_prcmu_ed_disable; |
602 | clk_per6clk.rate = 100000000; | ||
511 | } else if (cpu_is_u5500()) { | 603 | } else if (cpu_is_u5500()) { |
512 | /* Clock tree for U5500 not implemented yet */ | 604 | /* Clock tree for U5500 not implemented yet */ |
513 | clk_prcc_ops.enable = clk_prcc_ops.disable = NULL; | 605 | clk_prcc_ops.enable = clk_prcc_ops.disable = NULL; |
514 | clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL; | 606 | clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL; |
607 | clk_per6clk.rate = 26000000; | ||
515 | } | 608 | } |
516 | 609 | ||
517 | clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks)); | 610 | clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks)); |
@@ -522,4 +615,3 @@ static int __init clk_init(void) | |||
522 | 615 | ||
523 | return 0; | 616 | return 0; |
524 | } | 617 | } |
525 | arch_initcall(clk_init); | ||
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h index e4f99b65026f..a05802501527 100644 --- a/arch/arm/mach-ux500/clock.h +++ b/arch/arm/mach-ux500/clock.h | |||
@@ -28,6 +28,9 @@ struct clkops { | |||
28 | * @ops: pointer to clkops struct used to control this clock | 28 | * @ops: pointer to clkops struct used to control this clock |
29 | * @name: name, for debugging | 29 | * @name: name, for debugging |
30 | * @enabled: refcount. positive if enabled, zero if disabled | 30 | * @enabled: refcount. positive if enabled, zero if disabled |
31 | * @get_rate: custom callback for getting the clock rate | ||
32 | * @data: custom per-clock data for example for the get_rate | ||
33 | * callback | ||
31 | * @rate: fixed rate for clocks which don't implement | 34 | * @rate: fixed rate for clocks which don't implement |
32 | * ops->getrate | 35 | * ops->getrate |
33 | * @prcmu_cg_off: address offset of the combined enable/disable register | 36 | * @prcmu_cg_off: address offset of the combined enable/disable register |
@@ -67,6 +70,8 @@ struct clk { | |||
67 | const struct clkops *ops; | 70 | const struct clkops *ops; |
68 | const char *name; | 71 | const char *name; |
69 | unsigned int enabled; | 72 | unsigned int enabled; |
73 | unsigned long (*get_rate)(struct clk *); | ||
74 | void *data; | ||
70 | 75 | ||
71 | unsigned long rate; | 76 | unsigned long rate; |
72 | struct list_head list; | 77 | struct list_head list; |
@@ -117,9 +122,26 @@ struct clk clk_##_name = { \ | |||
117 | .parent_periph = _kernclk \ | 122 | .parent_periph = _kernclk \ |
118 | } | 123 | } |
119 | 124 | ||
125 | #define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \ | ||
126 | struct clk clk_##_name = { \ | ||
127 | .name = #_name, \ | ||
128 | .ops = &clk_prcc_ops, \ | ||
129 | .cluster = _pclust, \ | ||
130 | .prcc_bus = _bus_en, \ | ||
131 | .prcc_kernel = _kernel_en, \ | ||
132 | .parent_cluster = &clk_per##_pclust##clk, \ | ||
133 | .parent_periph = _kernclk, \ | ||
134 | .get_rate = _callback, \ | ||
135 | .data = (void *) _data \ | ||
136 | } | ||
137 | |||
138 | |||
120 | #define CLK(_clk, _devname, _conname) \ | 139 | #define CLK(_clk, _devname, _conname) \ |
121 | { \ | 140 | { \ |
122 | .clk = &clk_##_clk, \ | 141 | .clk = &clk_##_clk, \ |
123 | .dev_id = _devname, \ | 142 | .dev_id = _devname, \ |
124 | .con_id = _conname, \ | 143 | .con_id = _conname, \ |
125 | } | 144 | } |
145 | |||
146 | int __init clk_db8500_ed_fixup(void); | ||
147 | int __init clk_init(void); | ||
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index d81ad023963c..e0fd747e447a 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
@@ -62,6 +62,12 @@ void __init ux500_init_irq(void) | |||
62 | { | 62 | { |
63 | gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29); | 63 | gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29); |
64 | gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); | 64 | gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); |
65 | |||
66 | /* | ||
67 | * Init clocks here so that they are available for system timer | ||
68 | * initialization. | ||
69 | */ | ||
70 | clk_init(); | ||
65 | } | 71 | } |
66 | 72 | ||
67 | #ifdef CONFIG_CACHE_L2X0 | 73 | #ifdef CONFIG_CACHE_L2X0 |
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c index 5eb4fd93893d..ac163de7dc01 100644 --- a/arch/arm/mm/copypage-feroceon.c +++ b/arch/arm/mm/copypage-feroceon.c | |||
@@ -18,7 +18,7 @@ feroceon_copy_user_page(void *kto, const void *kfrom) | |||
18 | { | 18 | { |
19 | asm("\ | 19 | asm("\ |
20 | stmfd sp!, {r4-r9, lr} \n\ | 20 | stmfd sp!, {r4-r9, lr} \n\ |
21 | mov ip, %0 \n\ | 21 | mov ip, %2 \n\ |
22 | 1: mov lr, r1 \n\ | 22 | 1: mov lr, r1 \n\ |
23 | ldmia r1!, {r2 - r9} \n\ | 23 | ldmia r1!, {r2 - r9} \n\ |
24 | pld [lr, #32] \n\ | 24 | pld [lr, #32] \n\ |
@@ -64,7 +64,7 @@ feroceon_copy_user_page(void *kto, const void *kfrom) | |||
64 | mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\ | 64 | mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\ |
65 | ldmfd sp!, {r4-r9, pc}" | 65 | ldmfd sp!, {r4-r9, pc}" |
66 | : | 66 | : |
67 | : "I" (PAGE_SIZE)); | 67 | : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE)); |
68 | } | 68 | } |
69 | 69 | ||
70 | void feroceon_copy_user_highpage(struct page *to, struct page *from, | 70 | void feroceon_copy_user_highpage(struct page *to, struct page *from, |
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c index 7c2eb55cd4a9..cb589cbb2b6c 100644 --- a/arch/arm/mm/copypage-v4wb.c +++ b/arch/arm/mm/copypage-v4wb.c | |||
@@ -27,7 +27,7 @@ v4wb_copy_user_page(void *kto, const void *kfrom) | |||
27 | { | 27 | { |
28 | asm("\ | 28 | asm("\ |
29 | stmfd sp!, {r4, lr} @ 2\n\ | 29 | stmfd sp!, {r4, lr} @ 2\n\ |
30 | mov r2, %0 @ 1\n\ | 30 | mov r2, %2 @ 1\n\ |
31 | ldmia r1!, {r3, r4, ip, lr} @ 4\n\ | 31 | ldmia r1!, {r3, r4, ip, lr} @ 4\n\ |
32 | 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ | 32 | 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ |
33 | stmia r0!, {r3, r4, ip, lr} @ 4\n\ | 33 | stmia r0!, {r3, r4, ip, lr} @ 4\n\ |
@@ -44,7 +44,7 @@ v4wb_copy_user_page(void *kto, const void *kfrom) | |||
44 | mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\ | 44 | mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\ |
45 | ldmfd sp!, {r4, pc} @ 3" | 45 | ldmfd sp!, {r4, pc} @ 3" |
46 | : | 46 | : |
47 | : "I" (PAGE_SIZE / 64)); | 47 | : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64)); |
48 | } | 48 | } |
49 | 49 | ||
50 | void v4wb_copy_user_highpage(struct page *to, struct page *from, | 50 | void v4wb_copy_user_highpage(struct page *to, struct page *from, |
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c index 172e6a55458e..30c7d048a324 100644 --- a/arch/arm/mm/copypage-v4wt.c +++ b/arch/arm/mm/copypage-v4wt.c | |||
@@ -25,7 +25,7 @@ v4wt_copy_user_page(void *kto, const void *kfrom) | |||
25 | { | 25 | { |
26 | asm("\ | 26 | asm("\ |
27 | stmfd sp!, {r4, lr} @ 2\n\ | 27 | stmfd sp!, {r4, lr} @ 2\n\ |
28 | mov r2, %0 @ 1\n\ | 28 | mov r2, %2 @ 1\n\ |
29 | ldmia r1!, {r3, r4, ip, lr} @ 4\n\ | 29 | ldmia r1!, {r3, r4, ip, lr} @ 4\n\ |
30 | 1: stmia r0!, {r3, r4, ip, lr} @ 4\n\ | 30 | 1: stmia r0!, {r3, r4, ip, lr} @ 4\n\ |
31 | ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\ | 31 | ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\ |
@@ -40,7 +40,7 @@ v4wt_copy_user_page(void *kto, const void *kfrom) | |||
40 | mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\ | 40 | mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\ |
41 | ldmfd sp!, {r4, pc} @ 3" | 41 | ldmfd sp!, {r4, pc} @ 3" |
42 | : | 42 | : |
43 | : "I" (PAGE_SIZE / 64)); | 43 | : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64)); |
44 | } | 44 | } |
45 | 45 | ||
46 | void v4wt_copy_user_highpage(struct page *to, struct page *from, | 46 | void v4wt_copy_user_highpage(struct page *to, struct page *from, |
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c index 747ad4140fc7..f9cde0702f1e 100644 --- a/arch/arm/mm/copypage-xsc3.c +++ b/arch/arm/mm/copypage-xsc3.c | |||
@@ -34,7 +34,7 @@ xsc3_mc_copy_user_page(void *kto, const void *kfrom) | |||
34 | { | 34 | { |
35 | asm("\ | 35 | asm("\ |
36 | stmfd sp!, {r4, r5, lr} \n\ | 36 | stmfd sp!, {r4, r5, lr} \n\ |
37 | mov lr, %0 \n\ | 37 | mov lr, %2 \n\ |
38 | \n\ | 38 | \n\ |
39 | pld [r1, #0] \n\ | 39 | pld [r1, #0] \n\ |
40 | pld [r1, #32] \n\ | 40 | pld [r1, #32] \n\ |
@@ -67,7 +67,7 @@ xsc3_mc_copy_user_page(void *kto, const void *kfrom) | |||
67 | \n\ | 67 | \n\ |
68 | ldmfd sp!, {r4, r5, pc}" | 68 | ldmfd sp!, {r4, r5, pc}" |
69 | : | 69 | : |
70 | : "I" (PAGE_SIZE / 64 - 1)); | 70 | : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64 - 1)); |
71 | } | 71 | } |
72 | 72 | ||
73 | void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, | 73 | void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, |
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 92f5801f99c1..cbfb2edcf7d1 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c | |||
@@ -393,6 +393,9 @@ do_translation_fault(unsigned long addr, unsigned int fsr, | |||
393 | if (addr < TASK_SIZE) | 393 | if (addr < TASK_SIZE) |
394 | return do_page_fault(addr, fsr, regs); | 394 | return do_page_fault(addr, fsr, regs); |
395 | 395 | ||
396 | if (user_mode(regs)) | ||
397 | goto bad_area; | ||
398 | |||
396 | index = pgd_index(addr); | 399 | index = pgd_index(addr); |
397 | 400 | ||
398 | /* | 401 | /* |
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index 77b030f5ec09..086816b205b8 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
@@ -48,7 +48,16 @@ void *kmap_atomic(struct page *page, enum km_type type) | |||
48 | 48 | ||
49 | debug_kmap_atomic(type); | 49 | debug_kmap_atomic(type); |
50 | 50 | ||
51 | kmap = kmap_high_get(page); | 51 | #ifdef CONFIG_DEBUG_HIGHMEM |
52 | /* | ||
53 | * There is no cache coherency issue when non VIVT, so force the | ||
54 | * dedicated kmap usage for better debugging purposes in that case. | ||
55 | */ | ||
56 | if (!cache_is_vivt()) | ||
57 | kmap = NULL; | ||
58 | else | ||
59 | #endif | ||
60 | kmap = kmap_high_get(page); | ||
52 | if (kmap) | 61 | if (kmap) |
53 | return kmap; | 62 | return kmap; |
54 | 63 | ||
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 1ba6cf5a2c02..f6a999465323 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -678,10 +678,10 @@ void __init mem_init(void) | |||
678 | void free_initmem(void) | 678 | void free_initmem(void) |
679 | { | 679 | { |
680 | #ifdef CONFIG_HAVE_TCM | 680 | #ifdef CONFIG_HAVE_TCM |
681 | extern char *__tcm_start, *__tcm_end; | 681 | extern char __tcm_start, __tcm_end; |
682 | 682 | ||
683 | totalram_pages += free_area(__phys_to_pfn(__pa(__tcm_start)), | 683 | totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)), |
684 | __phys_to_pfn(__pa(__tcm_end)), | 684 | __phys_to_pfn(__pa(&__tcm_end)), |
685 | "TCM link"); | 685 | "TCM link"); |
686 | #endif | 686 | #endif |
687 | 687 | ||
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index 0ff3798769ab..08aaa4a7f65f 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c | |||
@@ -13,7 +13,9 @@ | |||
13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/clockchips.h> | 15 | #include <linux/clockchips.h> |
16 | #include <linux/clk.h> | ||
16 | #include <linux/jiffies.h> | 17 | #include <linux/jiffies.h> |
18 | #include <linux/err.h> | ||
17 | #include <asm/mach/time.h> | 19 | #include <asm/mach/time.h> |
18 | 20 | ||
19 | #include <plat/mtu.h> | 21 | #include <plat/mtu.h> |
@@ -124,13 +126,25 @@ static struct irqaction nmdk_timer_irq = { | |||
124 | void __init nmdk_timer_init(void) | 126 | void __init nmdk_timer_init(void) |
125 | { | 127 | { |
126 | unsigned long rate; | 128 | unsigned long rate; |
127 | u32 cr = MTU_CRn_32BITS;; | 129 | struct clk *clk0; |
130 | struct clk *clk1; | ||
131 | u32 cr; | ||
132 | |||
133 | clk0 = clk_get_sys("mtu0", NULL); | ||
134 | BUG_ON(IS_ERR(clk0)); | ||
135 | |||
136 | clk1 = clk_get_sys("mtu1", NULL); | ||
137 | BUG_ON(IS_ERR(clk1)); | ||
138 | |||
139 | clk_enable(clk0); | ||
140 | clk_enable(clk1); | ||
128 | 141 | ||
129 | /* | 142 | /* |
130 | * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: | 143 | * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: |
131 | * use a divide-by-16 counter if it's more than 16MHz | 144 | * use a divide-by-16 counter if it's more than 16MHz |
132 | */ | 145 | */ |
133 | rate = CLOCK_TICK_RATE; | 146 | cr = MTU_CRn_32BITS;; |
147 | rate = clk_get_rate(clk0); | ||
134 | if (rate > 16 << 20) { | 148 | if (rate > 16 << 20) { |
135 | rate /= 16; | 149 | rate /= 16; |
136 | cr |= MTU_CRn_PRESCALE_16; | 150 | cr |= MTU_CRn_PRESCALE_16; |
@@ -153,6 +167,14 @@ void __init nmdk_timer_init(void) | |||
153 | nmdk_clksrc.name); | 167 | nmdk_clksrc.name); |
154 | 168 | ||
155 | /* Timer 1 is used for events, fix according to rate */ | 169 | /* Timer 1 is used for events, fix according to rate */ |
170 | cr = MTU_CRn_32BITS; | ||
171 | rate = clk_get_rate(clk1); | ||
172 | if (rate > 16 << 20) { | ||
173 | rate /= 16; | ||
174 | cr |= MTU_CRn_PRESCALE_16; | ||
175 | } else { | ||
176 | cr |= MTU_CRn_PRESCALE_1; | ||
177 | } | ||
156 | writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ | 178 | writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ |
157 | nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift); | 179 | nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift); |
158 | nmdk_clkevt.max_delta_ns = | 180 | nmdk_clkevt.max_delta_ns = |
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 66dc2d03b7fc..d66cead97d28 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
@@ -277,7 +277,7 @@ ENTRY(vfp_put_double) | |||
277 | #ifdef CONFIG_VFPv3 | 277 | #ifdef CONFIG_VFPv3 |
278 | @ d16 - d31 registers | 278 | @ d16 - d31 registers |
279 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | 279 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 |
280 | 1: mcrr p11, 3, r1, r2, c\dr @ fmdrr r1, r2, d\dr | 280 | 1: mcrr p11, 3, r0, r1, c\dr @ fmdrr r0, r1, d\dr |
281 | mov pc, lr | 281 | mov pc, lr |
282 | .org 1b + 8 | 282 | .org 1b + 8 |
283 | .endr | 283 | .endr |