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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-17 21:40:24 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-17 21:40:24 -0500
commit57f2685c16fa8e0cb86e4bc7c8ac33bfed943819 (patch)
tree96a42fe632687c8486c250c4805bf1d4c9c34d19 /arch
parent488a9d018256dc9f29e041c0360445b6d25eea9a (diff)
parente08b881a69d638175bfa99b5af4d72b731633ea7 (diff)
Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (53 commits) ARM: mach-shmobile: specify CHCLR registers on SH7372 dma: shdma: fix runtime PM: clear channel buffers on reset dma/imx-sdma: save irq flags when use spin_lock in sdma_tx_submit dmaengine/ste_dma40: clear LNK on channel startup dmaengine: intel_mid_dma: remove legacy pm interface ASoC: mxs: correct 'direction' of device_prep_dma_cyclic dmaengine: intel_mid_dma: error path fix dmaengine: intel_mid_dma: locking and freeing fixes mtd: gpmi-nand: move to dma_transfer_direction mtd: fix compile error for gpmi-nand mmc: mxs-mmc: fix the dma_transfer_direction migration dmaengine: add DMA_TRANS_NONE to dma_transfer_direction dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled. dma: mxs-dma: fix a typo in comment DMA: PL330: Remove pm_runtime_xxx calls from pl330 probe/remove video i.MX IPU: Fix display connections i.MX IPU DMA: Fix wrong burstsize settings dmaengine/ste_dma40: allow fixed physical channel ... Fix up conflicts in drivers/dma/{Kconfig,mxs-dma.c,pl330.c} The conflicts looked pretty trivial, but I'll ask people to verify them.
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-ep93xx/include/mach/dma.h6
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c15
-rw-r--r--arch/arm/plat-mxc/include/mach/mx3fb.h15
-rw-r--r--arch/arm/plat-nomadik/include/plat/ste_dma40.h11
-rw-r--r--arch/arm/plat-samsung/dma-ops.c4
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-ops.h4
6 files changed, 42 insertions, 13 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
index 46d4d876e6fb..e82c642fa53c 100644
--- a/arch/arm/mach-ep93xx/include/mach/dma.h
+++ b/arch/arm/mach-ep93xx/include/mach/dma.h
@@ -37,7 +37,7 @@
37 */ 37 */
38struct ep93xx_dma_data { 38struct ep93xx_dma_data {
39 int port; 39 int port;
40 enum dma_data_direction direction; 40 enum dma_transfer_direction direction;
41 const char *name; 41 const char *name;
42}; 42};
43 43
@@ -80,14 +80,14 @@ static inline bool ep93xx_dma_chan_is_m2p(struct dma_chan *chan)
80 * channel supports given DMA direction. Only M2P channels have such 80 * channel supports given DMA direction. Only M2P channels have such
81 * limitation, for M2M channels the direction is configurable. 81 * limitation, for M2M channels the direction is configurable.
82 */ 82 */
83static inline enum dma_data_direction 83static inline enum dma_transfer_direction
84ep93xx_dma_chan_direction(struct dma_chan *chan) 84ep93xx_dma_chan_direction(struct dma_chan *chan)
85{ 85{
86 if (!ep93xx_dma_chan_is_m2p(chan)) 86 if (!ep93xx_dma_chan_is_m2p(chan))
87 return DMA_NONE; 87 return DMA_NONE;
88 88
89 /* even channels are for TX, odd for RX */ 89 /* even channels are for TX, odd for RX */
90 return (chan->chan_id % 2 == 0) ? DMA_TO_DEVICE : DMA_FROM_DEVICE; 90 return (chan->chan_id % 2 == 0) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
91} 91}
92 92
93#endif /* __ASM_ARCH_DMA_H */ 93#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 1ea89be63e29..6fcf304d3cdf 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -445,31 +445,39 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
445 }, 445 },
446}; 446};
447 447
448#define SH7372_CHCLR 0x220
449
448static const struct sh_dmae_channel sh7372_dmae_channels[] = { 450static const struct sh_dmae_channel sh7372_dmae_channels[] = {
449 { 451 {
450 .offset = 0, 452 .offset = 0,
451 .dmars = 0, 453 .dmars = 0,
452 .dmars_bit = 0, 454 .dmars_bit = 0,
455 .chclr_offset = SH7372_CHCLR + 0,
453 }, { 456 }, {
454 .offset = 0x10, 457 .offset = 0x10,
455 .dmars = 0, 458 .dmars = 0,
456 .dmars_bit = 8, 459 .dmars_bit = 8,
460 .chclr_offset = SH7372_CHCLR + 0x10,
457 }, { 461 }, {
458 .offset = 0x20, 462 .offset = 0x20,
459 .dmars = 4, 463 .dmars = 4,
460 .dmars_bit = 0, 464 .dmars_bit = 0,
465 .chclr_offset = SH7372_CHCLR + 0x20,
461 }, { 466 }, {
462 .offset = 0x30, 467 .offset = 0x30,
463 .dmars = 4, 468 .dmars = 4,
464 .dmars_bit = 8, 469 .dmars_bit = 8,
470 .chclr_offset = SH7372_CHCLR + 0x30,
465 }, { 471 }, {
466 .offset = 0x50, 472 .offset = 0x50,
467 .dmars = 8, 473 .dmars = 8,
468 .dmars_bit = 0, 474 .dmars_bit = 0,
475 .chclr_offset = SH7372_CHCLR + 0x50,
469 }, { 476 }, {
470 .offset = 0x60, 477 .offset = 0x60,
471 .dmars = 8, 478 .dmars = 8,
472 .dmars_bit = 8, 479 .dmars_bit = 8,
480 .chclr_offset = SH7372_CHCLR + 0x60,
473 } 481 }
474}; 482};
475 483
@@ -487,6 +495,7 @@ static struct sh_dmae_pdata dma_platform_data = {
487 .ts_shift = ts_shift, 495 .ts_shift = ts_shift,
488 .ts_shift_num = ARRAY_SIZE(ts_shift), 496 .ts_shift_num = ARRAY_SIZE(ts_shift),
489 .dmaor_init = DMAOR_DME, 497 .dmaor_init = DMAOR_DME,
498 .chclr_present = 1,
490}; 499};
491 500
492/* Resource order important! */ 501/* Resource order important! */
@@ -494,7 +503,7 @@ static struct resource sh7372_dmae0_resources[] = {
494 { 503 {
495 /* Channel registers and DMAOR */ 504 /* Channel registers and DMAOR */
496 .start = 0xfe008020, 505 .start = 0xfe008020,
497 .end = 0xfe00808f, 506 .end = 0xfe00828f,
498 .flags = IORESOURCE_MEM, 507 .flags = IORESOURCE_MEM,
499 }, 508 },
500 { 509 {
@@ -522,7 +531,7 @@ static struct resource sh7372_dmae1_resources[] = {
522 { 531 {
523 /* Channel registers and DMAOR */ 532 /* Channel registers and DMAOR */
524 .start = 0xfe018020, 533 .start = 0xfe018020,
525 .end = 0xfe01808f, 534 .end = 0xfe01828f,
526 .flags = IORESOURCE_MEM, 535 .flags = IORESOURCE_MEM,
527 }, 536 },
528 { 537 {
@@ -550,7 +559,7 @@ static struct resource sh7372_dmae2_resources[] = {
550 { 559 {
551 /* Channel registers and DMAOR */ 560 /* Channel registers and DMAOR */
552 .start = 0xfe028020, 561 .start = 0xfe028020,
553 .end = 0xfe02808f, 562 .end = 0xfe02828f,
554 .flags = IORESOURCE_MEM, 563 .flags = IORESOURCE_MEM,
555 }, 564 },
556 { 565 {
diff --git a/arch/arm/plat-mxc/include/mach/mx3fb.h b/arch/arm/plat-mxc/include/mach/mx3fb.h
index ac24c5c4bc83..fdbe60001542 100644
--- a/arch/arm/plat-mxc/include/mach/mx3fb.h
+++ b/arch/arm/plat-mxc/include/mach/mx3fb.h
@@ -22,6 +22,20 @@
22#define FB_SYNC_SWAP_RGB 0x04000000 22#define FB_SYNC_SWAP_RGB 0x04000000
23#define FB_SYNC_CLK_SEL_EN 0x02000000 23#define FB_SYNC_CLK_SEL_EN 0x02000000
24 24
25/*
26 * Specify the way your display is connected. The IPU can arbitrarily
27 * map the internal colors to the external data lines. We only support
28 * the following mappings at the moment.
29 */
30enum disp_data_mapping {
31 /* blue -> d[0..5], green -> d[6..11], red -> d[12..17] */
32 IPU_DISP_DATA_MAPPING_RGB666,
33 /* blue -> d[0..4], green -> d[5..10], red -> d[11..15] */
34 IPU_DISP_DATA_MAPPING_RGB565,
35 /* blue -> d[0..7], green -> d[8..15], red -> d[16..23] */
36 IPU_DISP_DATA_MAPPING_RGB888,
37};
38
25/** 39/**
26 * struct mx3fb_platform_data - mx3fb platform data 40 * struct mx3fb_platform_data - mx3fb platform data
27 * 41 *
@@ -33,6 +47,7 @@ struct mx3fb_platform_data {
33 const char *name; 47 const char *name;
34 const struct fb_videomode *mode; 48 const struct fb_videomode *mode;
35 int num_modes; 49 int num_modes;
50 enum disp_data_mapping disp_data_fmt;
36}; 51};
37 52
38#endif 53#endif
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
index 685c78716d95..fd0ee84c45d1 100644
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
@@ -113,7 +113,8 @@ struct stedma40_half_channel_info {
113 * @dst_dev_type: Dst device type 113 * @dst_dev_type: Dst device type
114 * @src_info: Parameters for dst half channel 114 * @src_info: Parameters for dst half channel
115 * @dst_info: Parameters for dst half channel 115 * @dst_info: Parameters for dst half channel
116 * 116 * @use_fixed_channel: if true, use physical channel specified by phy_channel
117 * @phy_channel: physical channel to use, only if use_fixed_channel is true
117 * 118 *
118 * This structure has to be filled by the client drivers. 119 * This structure has to be filled by the client drivers.
119 * It is recommended to do all dma configurations for clients in the machine. 120 * It is recommended to do all dma configurations for clients in the machine.
@@ -129,6 +130,9 @@ struct stedma40_chan_cfg {
129 int dst_dev_type; 130 int dst_dev_type;
130 struct stedma40_half_channel_info src_info; 131 struct stedma40_half_channel_info src_info;
131 struct stedma40_half_channel_info dst_info; 132 struct stedma40_half_channel_info dst_info;
133
134 bool use_fixed_channel;
135 int phy_channel;
132}; 136};
133 137
134/** 138/**
@@ -153,6 +157,7 @@ struct stedma40_platform_data {
153 struct stedma40_chan_cfg *memcpy_conf_phy; 157 struct stedma40_chan_cfg *memcpy_conf_phy;
154 struct stedma40_chan_cfg *memcpy_conf_log; 158 struct stedma40_chan_cfg *memcpy_conf_log;
155 int disabled_channels[STEDMA40_MAX_PHYS]; 159 int disabled_channels[STEDMA40_MAX_PHYS];
160 bool use_esram_lcla;
156}; 161};
157 162
158#ifdef CONFIG_STE_DMA40 163#ifdef CONFIG_STE_DMA40
@@ -187,7 +192,7 @@ static inline struct
187dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, 192dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
188 dma_addr_t addr, 193 dma_addr_t addr,
189 unsigned int size, 194 unsigned int size,
190 enum dma_data_direction direction, 195 enum dma_transfer_direction direction,
191 unsigned long flags) 196 unsigned long flags)
192{ 197{
193 struct scatterlist sg; 198 struct scatterlist sg;
@@ -209,7 +214,7 @@ static inline struct
209dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, 214dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
210 dma_addr_t addr, 215 dma_addr_t addr,
211 unsigned int size, 216 unsigned int size,
212 enum dma_data_direction direction, 217 enum dma_transfer_direction direction,
213 unsigned long flags) 218 unsigned long flags)
214{ 219{
215 return NULL; 220 return NULL;
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 2cded872f22b..0747c77a2fd5 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -37,14 +37,14 @@ static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
37 (void *)dma_ch; 37 (void *)dma_ch;
38 chan = dma_request_channel(mask, pl330_filter, filter_param); 38 chan = dma_request_channel(mask, pl330_filter, filter_param);
39 39
40 if (info->direction == DMA_FROM_DEVICE) { 40 if (info->direction == DMA_DEV_TO_MEM) {
41 memset(&slave_config, 0, sizeof(struct dma_slave_config)); 41 memset(&slave_config, 0, sizeof(struct dma_slave_config));
42 slave_config.direction = info->direction; 42 slave_config.direction = info->direction;
43 slave_config.src_addr = info->fifo; 43 slave_config.src_addr = info->fifo;
44 slave_config.src_addr_width = info->width; 44 slave_config.src_addr_width = info->width;
45 slave_config.src_maxburst = 1; 45 slave_config.src_maxburst = 1;
46 dmaengine_slave_config(chan, &slave_config); 46 dmaengine_slave_config(chan, &slave_config);
47 } else if (info->direction == DMA_TO_DEVICE) { 47 } else if (info->direction == DMA_MEM_TO_DEV) {
48 memset(&slave_config, 0, sizeof(struct dma_slave_config)); 48 memset(&slave_config, 0, sizeof(struct dma_slave_config));
49 slave_config.direction = info->direction; 49 slave_config.direction = info->direction;
50 slave_config.dst_addr = info->fifo; 50 slave_config.dst_addr = info->fifo;
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h
index 22eafc310bd7..70b6325edb99 100644
--- a/arch/arm/plat-samsung/include/plat/dma-ops.h
+++ b/arch/arm/plat-samsung/include/plat/dma-ops.h
@@ -17,7 +17,7 @@
17 17
18struct samsung_dma_prep_info { 18struct samsung_dma_prep_info {
19 enum dma_transaction_type cap; 19 enum dma_transaction_type cap;
20 enum dma_data_direction direction; 20 enum dma_transfer_direction direction;
21 dma_addr_t buf; 21 dma_addr_t buf;
22 unsigned long period; 22 unsigned long period;
23 unsigned long len; 23 unsigned long len;
@@ -27,7 +27,7 @@ struct samsung_dma_prep_info {
27 27
28struct samsung_dma_info { 28struct samsung_dma_info {
29 enum dma_transaction_type cap; 29 enum dma_transaction_type cap;
30 enum dma_data_direction direction; 30 enum dma_transfer_direction direction;
31 enum dma_slave_buswidth width; 31 enum dma_slave_buswidth width;
32 dma_addr_t fifo; 32 dma_addr_t fifo;
33 struct s3c2410_dma_client *client; 33 struct s3c2410_dma_client *client;