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authorGreg Ungerer <gerg@uclinux.org>2009-04-27 01:15:01 -0400
committerGreg Ungerer <gerg@uclinux.org>2009-09-15 19:43:40 -0400
commitd0d77c26cb6195e881325befc950cc54732ba261 (patch)
tree4b72b28377d8ecb385145ddfd80cfcc2f3b7521e /arch
parentcd3dd4068db5e1258a14b63e0feaf0332640d896 (diff)
m68knommu: remove per device interrupt mask setting for ColdFire 520x
With general interrupt controller code in place we don't need specific unmasking code for the internal ColdFire 520x UARTs or ethernet (FEC). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/m68knommu/platform/520x/config.c21
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
index 1c43a8aec69b..6a1fd743817a 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -85,16 +85,11 @@ static struct platform_device *m520x_devices[] __initdata = {
85 85
86static void __init m520x_uart_init_line(int line, int irq) 86static void __init m520x_uart_init_line(int line, int irq)
87{ 87{
88 u32 imr;
89 u16 par; 88 u16 par;
90 u8 par2; 89 u8 par2;
91 90
92 writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line); 91 writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
93 92
94 imr = readl(INTC0 + MCFINTC_IMRL);
95 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
96 writel(imr, INTC0 + MCFINTC_IMRL);
97
98 switch (line) { 93 switch (line) {
99 case 0: 94 case 0:
100 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); 95 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
@@ -131,7 +126,6 @@ static void __init m520x_uarts_init(void)
131 126
132static void __init m520x_fec_init(void) 127static void __init m520x_fec_init(void)
133{ 128{
134 u32 imr;
135 u8 v; 129 u8 v;
136 130
137 /* Unmask FEC interrupts at ColdFire interrupt controller */ 131 /* Unmask FEC interrupts at ColdFire interrupt controller */
@@ -139,10 +133,6 @@ static void __init m520x_fec_init(void)
139 writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40); 133 writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40);
140 writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42); 134 writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42);
141 135
142 imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
143 imr &= ~0x0001FFF0;
144 writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
145
146 /* Set multi-function pins to ethernet mode */ 136 /* Set multi-function pins to ethernet mode */
147 v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC); 137 v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC);
148 writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC); 138 writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC);
@@ -153,17 +143,6 @@ static void __init m520x_fec_init(void)
153 143
154/***************************************************************************/ 144/***************************************************************************/
155 145
156/*
157 * Program the vector to be an auto-vectored.
158 */
159
160void mcf_autovector(unsigned int vec)
161{
162 /* Everything is auto-vectored on the 520x devices */
163}
164
165/***************************************************************************/
166
167static void m520x_cpu_reset(void) 146static void m520x_cpu_reset(void)
168{ 147{
169 local_irq_disable(); 148 local_irq_disable();